Defect detection method, device, apparatus, storage medium, and product

Abstract

The application relates to a defect detection method and device, a defect detection equipment, a storage medium and a product. The method comprises the following steps: acquiring a first threshold voltage of a MOSFET to be detected; acquiring a second threshold voltage of the MOSFET to be detected under the condition that the time length of a target gate-source voltage applied to the gate-source electrode of the MOSFET to be detected is a first preset time length; and determining a defect detection result of a gate oxide layer of the MOSFET to be detected based on the difference between the first threshold voltage and the second threshold voltage; and the target gate-source voltage is used for exciting defects of the gate oxide layer of the MOSFET to be detected. Macroscopic defects and microscopic defects can be detected more comprehensively and accurately.

Description

Technical Field

[0001] This application relates to the field of defect detection technology, and in particular to a defect detection method, apparatus, equipment, storage medium, and product. Background Technology

[0002] Metal-oxide-semiconductor field-effect transistors (MOSFETs) play a crucial role in consumer electronics, industrial control, new energy, and artificial intelligence. However, some MOSFETs, such as silicon carbide MOSFETs, have defects in their gate oxide layers, such as interface state defects and trap defects. These defects can trap charge carriers, triggering a shift in the MOSFET's threshold voltage and thus affecting its lifetime. Therefore, it is necessary to perform defect detection on the MOSFET's gate oxide layer.

[0003] Currently, by applying a preset gate-source voltage to the gate and source of a MOSFET and obtaining the gate leakage current when the preset gate-source voltage is applied, it is determined whether the gate leakage current is within the preset leakage current range, and the defect detection result of the gate oxide layer of the MOSFET is determined based on the judgment result.

[0004] However, current methods for detecting defects in gate oxide layers can only detect relatively large, obvious macroscopic defects, and cannot detect relatively small microscopic defects. Summary of the Invention

[0005] Therefore, it is necessary to provide a defect detection method, apparatus, equipment, storage medium, and product that can detect macroscopic and microscopic defects in the gate oxide layer of a MOSFET, thereby improving the accuracy of defect detection, in order to address the aforementioned technical problems.

[0006] Firstly, this application provides a defect detection method. The method includes:

[0007] Obtain the first threshold voltage of the metal-oxide-semiconductor transistor (MOSFET) under test;

[0008] When the duration of the target gate-source voltage applied to the gate and source of the MOSFET under test is a first preset duration, a second threshold voltage of the MOSFET under test is obtained; the target gate-source voltage is the voltage applied after obtaining the first threshold voltage, provided that the drain-source voltage of the MOSFET under test is not greater than a preset voltage, and the target gate-source voltage is used to excite defects in the gate oxide layer of the MOSFET under test.

[0009] The defect detection result of the gate oxide layer of the MOSFET under test is determined based on the difference between the first threshold voltage and the second threshold voltage.

[0010] The method provided in this embodiment acquires a first threshold voltage of the MOSFET under test, and, while applying a target gate-source voltage to the gate and source of the MOSFET under test for a first preset duration, acquires a second threshold voltage of the MOSFET under test. Based on the difference between the first and second threshold voltages, the defect detection result of the gate oxide layer of the MOSFET under test is determined. The target gate-source voltage is used to excite defects in the gate oxide layer of the MOSFET under test. Since the target gate-source voltage can excite potential defects in the MOSFET under test, such as micro and macro defects, the acquired second threshold voltage will decrease when defects are excited. Therefore, by acquiring the second threshold voltage when defects are excited, and based on the difference between the first and second threshold voltages, the defect detection result of the gate oxide layer of the MOSFET under test can be determined, thereby enabling more comprehensive and accurate defect detection of both macro and micro defects.

[0011] In one embodiment, the target gate-source voltage is not less than the defect detection voltage and is less than the breakdown voltage of the MOSFET under test. The defect detection voltage is determined based on a first threshold voltage sample obtained when the application time of the gate-source voltage sample applied to the gate-source of the MOSFET sample is a second preset time.

[0012] The gate-source voltage sample is the voltage applied when the drain-source voltage of the MOSFET sample is not greater than a preset voltage. The gate-source voltage sample is not less than the tunneling voltage of the MOSFET sample and is less than the breakdown voltage of the MOSFET sample.

[0013] In this embodiment, by limiting the target gate-source voltage to be no less than the defect detection voltage and less than the breakdown voltage of the MOSFET under test, the probability of the MOSFET under test failing during the detection process can be reduced, and defects in the gate oxide layer of the MOSFET under test can be more effectively activated, improving the comprehensiveness of defect detection. Furthermore, by applying the gate-source voltage sample to the gate-source of the MOSFET sample for a second preset duration, the obtained first threshold voltage sample can quickly determine the defect detection voltage, improving the efficiency of defect detection voltage determination.

[0014] In one embodiment, the method for determining the defect detection voltage includes:

[0015] Before applying a gate-source voltage sample to the gate-source of the MOSFET sample, obtain a second threshold voltage sample of the MOSFET sample;

[0016] The defect detection voltage is determined based on the first and second threshold voltage samples of the MOSFET sample.

[0017] In this embodiment, before applying a gate-source voltage sample to the gate-source of the MOSFET sample, a second threshold voltage sample of the MOSFET sample is obtained. Based on the first and second threshold voltage samples of the MOSFET sample, a defect detection voltage is determined, thereby providing a basis for determining the defect detection result of the gate oxide layer of the MOSFET under test based on the defect detection voltage.

[0018] In one embodiment, there are multiple MOSFET samples. The defect detection voltage is determined based on a first threshold voltage sample and a second threshold voltage sample of the MOSFET samples, including:

[0019] For each MOSFET sample, the first threshold voltage offset rate of the MOSFET sample is determined based on the first threshold voltage sample and the second threshold voltage sample of the MOSFET sample.

[0020] The defect detection voltage is determined based on the first threshold voltage offset rate of each MOSFET sample and the gate-source voltage sample corresponding to each first threshold voltage offset rate.

[0021] In this embodiment, for each MOSFET sample, a first threshold voltage offset rate is determined based on the first threshold voltage sample and the second threshold voltage sample of the MOSFET sample. Based on the first threshold voltage offset rate of each MOSFET sample and the gate-source voltage sample corresponding to each first threshold voltage offset rate, a defect detection voltage is determined. Since the threshold voltage offset rate can more accurately determine the variation range of the threshold voltage sample of the MOSFET sample, based on the first threshold voltage offset rate of the MOSFET sample, the threshold voltage offset rate with a smaller variation range can be more accurately determined. Therefore, based on the gate-source voltage sample corresponding to the threshold voltage offset rate with a smaller variation range, the defect detection voltage is determined, reducing the probability of MOSFET failure when using the defect detection voltage to detect defects in the gate oxide layer of the MOSFET under test.

[0022] In one embodiment, the defect detection voltage is determined based on the first threshold voltage offset rate of each MOSFET sample and the gate-source voltage sample corresponding to each first threshold voltage offset rate, including:

[0023] The first threshold voltage offset rate, which is less than the first preset threshold voltage offset rate, is determined to be the target threshold voltage offset rate.

[0024] The defect detection voltage is determined based on the gate-source voltage sample corresponding to the target threshold voltage offset rate.

[0025] In this embodiment, a first threshold voltage offset rate less than a first preset threshold voltage offset rate is determined as the target threshold voltage offset rate, and a defect detection voltage is determined based on the gate-source voltage sample corresponding to the target threshold voltage offset rate. Since the defect detection voltage is determined based on the gate-source voltage sample corresponding to the threshold voltage offset rate with a small change amplitude, the probability of the MOSFET under test failing when using the defect detection voltage to detect defects in the gate oxide layer of the MOSFET under test can be reduced.

[0026] In one embodiment, the defect detection voltage is determined based on the gate-source voltage sample corresponding to the target threshold voltage offset rate, including:

[0027] Obtain the gate leakage current of the MOSFET sample corresponding to the target threshold voltage offset rate; the gate leakage current is the leakage current obtained when the application time is a second preset time.

[0028] The minimum value in the gate-source voltage sample corresponding to the minimum gate leakage current is determined as the defect detection voltage.

[0029] In this embodiment, by obtaining the gate leakage current of the MOSFET sample corresponding to the target threshold voltage offset rate, the minimum value of the gate-source voltage sample corresponding to the minimum gate leakage current is determined as the defect detection voltage. This achieves the goal of determining the defect detection voltage by combining the gate leakage current and the gate-source voltage sample values, making the determined defect detection voltage more reasonable. This not only more effectively excites defects in the gate oxide layer of the MOSFET under test, but also reduces the probability of the MOSFET under test failing during defect detection due to an excessively large determined defect detection voltage.

[0030] In one embodiment, the defect detection result of the gate oxide layer of the MOSFET under test is determined based on the difference between a first threshold voltage and a second threshold voltage, including:

[0031] The second threshold voltage offset rate is determined based on the difference between the first threshold voltage and the second threshold voltage.

[0032] If the second threshold voltage offset rate is less than the second preset threshold voltage offset rate, the defect detection result is determined to be that there is no defect in the gate oxide layer;

[0033] If the second threshold voltage offset rate is not less than the second preset threshold voltage offset rate, the defect detection result is determined to be that there is a defect in the gate oxide layer.

[0034] In this embodiment, a second threshold voltage offset rate is determined based on the difference between the first threshold voltage and the second threshold voltage. If the second threshold voltage offset rate is less than the second preset threshold voltage offset rate, the defect detection result is determined to be that there is no defect in the gate oxide layer. If the second threshold voltage offset rate is not less than the second preset threshold voltage offset rate, the defect detection result is determined to be that there is a defect in the gate oxide layer. This can improve the defect detection accuracy of the gate oxide layer of the MOSFET under test.

[0035] In one embodiment, the method further includes:

[0036] A predetermined number of target MOSFETs are determined from the MOSFETs under test whose gate oxide layer has no defects according to the defect detection results.

[0037] The third threshold voltage offset rate of each target MOSFET is obtained; the third threshold voltage offset rate is determined based on the threshold voltage reference value and the threshold voltage degradation value obtained by testing the target MOSFET under preset test conditions; the preset test conditions include that the gate-source voltage applied to the gate and source of the target MOSFET is equal to the tunneling voltage;

[0038] Determine the target parameters of the third threshold voltage offset rate for each target MOSFET, and obtain the equivalent lifetime of each target MOSFET under preset test conditions;

[0039] Based on the target parameters and equivalent lifetime, the lifetime assessment results of a preset number of target MOSFETs are determined.

[0040] In this embodiment, a predetermined number of target MOSFETs are determined from the MOSFETs under test whose gate oxide layer has no defects according to the defect detection results. The third threshold voltage offset rate of each target MOSFET is obtained, the target parameters of the third threshold voltage offset rate of each target MOSFET are determined, and the equivalent lifetime of each target MOSFET under predetermined test conditions is obtained. Based on the target parameters and equivalent lifetime, the lifetime assessment results of the predetermined number of target MOSFETs are determined. Thus, based on the lifetime assessment results, it can be determined whether the equivalent lifetime of the MOSFETs with no gate oxide layer selected based on the defect detection voltage meets the expected lifetime.

[0041] In one embodiment, based on target parameters and equivalent lifetime, the lifetime assessment results of a predetermined number of target MOSFETs are determined, including:

[0042] If the target parameter is less than the third preset threshold voltage offset rate and the equivalent lifetime is not less than the expected lifetime, the lifetime assessment result is determined to meet the expected lifetime.

[0043] If the target parameter is not less than the third preset threshold voltage offset rate, and / or the equivalent lifetime is less than the expected lifetime, the lifetime assessment result is determined to be unsatisfactory.

[0044] In this embodiment, the lifetime assessment result is determined to meet the expected lifetime if the target parameter is less than the third preset threshold voltage offset rate and the equivalent lifetime is not less than the expected lifetime; and the lifetime assessment result is determined to not meet the expected lifetime if the target parameter is not less than the third preset threshold voltage offset rate and / or the equivalent lifetime is less than the expected lifetime. By using both the target parameter and the equivalent lifetime as conditions to determine whether the lifetime assessment result meets the expected lifetime, the comprehensiveness and reliability of the obtained lifetime assessment result can be improved.

[0045] In one embodiment, the method further includes:

[0046] If the life assessment result does not meet the expected life, return to the method for determining the defect detection voltage, redetermine the new defect detection voltage, until the life assessment result determined based on the most recently determined new defect detection voltage meets the expected life, and update the defect detection voltage with the most recently determined new defect detection voltage.

[0047] In this embodiment, if the lifetime assessment result does not meet the expected lifetime, the method for determining the defect detection voltage is returned to perform the process, and a new defect detection voltage is determined. This process continues until the lifetime assessment result determined based on the most recently determined new defect detection voltage meets the expected lifetime. The defect detection voltage is then updated using the most recently determined new defect detection voltage. This achieves the goal of obtaining a new defect detection voltage that meets the expected lifetime. In other words, when using a new defect detection voltage that meets the expected lifetime to perform defect detection on the gate oxide layer of the MOSFET under test, not only can defective MOSFETs be detected more comprehensively, but the lifetime of the detected non-defective MOSFETs can also meet the expected lifetime.

[0048] In one embodiment, the method further includes:

[0049] Obtain the relationship between the gate-source voltage and gate leakage current of the MOSFET sample;

[0050] The target data point is determined based on the correspondence and the preset leakage current threshold; the gate leakage current corresponding to the target data point is less than the preset leakage current threshold, and the current difference between the gate leakage current corresponding to the target data point and the gate leakage current corresponding to the previous data point is greater than the preset current value.

[0051] The tunneling voltage is determined based on the gate-source voltage in the target data point.

[0052] The method provided in this embodiment obtains the correspondence between the gate-source voltage and the gate leakage current of a MOSFET sample, determines the target data point based on the correspondence and a preset leakage current threshold, and determines the tunneling voltage based on the gate-source voltage in the target data point. This lays the foundation for determining the gate-source voltage sample based on the tunneling voltage, enabling the MOSFET sample to be tested based on the gate-source voltage sample to obtain a reasonable defect detection voltage.

[0053] Secondly, this application also provides a defect detection device. The device includes:

[0054] The first acquisition module is used to acquire the first threshold voltage of the metal-oxide-semiconductor transistor (MOSFET) under test.

[0055] The second acquisition module is used to acquire a second threshold voltage of the MOSFET under test when the duration of the target gate-source voltage applied to the gate-source of the MOSFET under test is a first preset duration; the target gate-source voltage is the voltage applied after acquiring the first threshold voltage when the drain-source voltage of the MOSFET under test is not greater than a preset voltage, and the target gate-source voltage is used to excite defects in the gate oxide layer of the MOSFET under test.

[0056] The first determining module is used to determine the defect detection result of the gate oxide layer of the MOSFET under test based on the difference between the first threshold voltage and the second threshold voltage.

[0057] Thirdly, this application also provides a defect detection device. The defect detection device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement the steps of any of the above methods.

[0058] Fourthly, this application also provides a computer-readable storage medium. The computer-readable storage medium stores a computer program thereon, which, when executed by a processor, implements the steps of any of the methods described above.

[0059] Fifthly, this application also provides a computer program product. The computer program product includes a computer program that, when executed by a processor, implements the steps of any of the methods described above.

[0060] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, specific embodiments of this application are given below. Attached Figure Description

[0061] Various other advantages and benefits will become apparent to those skilled in the art upon reading the detailed description of the preferred embodiments below. The accompanying drawings are for illustrative purposes only and are not intended to limit the scope of this application. Furthermore, the same reference numerals denote the same parts throughout the drawings. In the drawings:

[0062] Figure 1 This is an internal structural diagram of a defect detection device in one embodiment;

[0063] Figure 2 This is a schematic flowchart of a defect detection method provided in an embodiment of this application;

[0064] Figure 3 This is one of the flowcharts illustrating the method for determining the defect detection voltage provided in the embodiments of this application;

[0065] Figure 4 This is a second schematic flowchart of the method for determining the defect detection voltage provided in the embodiments of this application;

[0066] Figure 5 This is the third flowchart illustrating the method for determining the defect detection voltage provided in the embodiments of this application;

[0067] Figure 6 This is the fourth flowchart illustrating the method for determining the defect detection voltage provided in the embodiments of this application;

[0068] Figure 7 This is a flowchart illustrating a method for determining defect detection results provided in an embodiment of this application;

[0069] Figure 8 This is a schematic diagram illustrating the gate oxide layer defect detection effect obtained from a conventional first defect detection, as provided in an embodiment of this application.

[0070] Figure 9 This is a schematic diagram of the gate oxide layer defect detection effect obtained by testing when the target gate source voltage is equal to 35 volts after the first defect detection is performed, according to an embodiment of this application.

[0071] Figure 10 This is a schematic diagram of the gate oxide layer defect detection effect obtained by performing a conventional second defect detection after the target gate-source voltage is equal to 35 volts, according to an embodiment of this application.

[0072] Figure 11 This is a schematic flowchart of a MOSFET lifetime assessment method provided in an embodiment of this application;

[0073] Figure 12 This is a flowchart illustrating a method for determining tunneling voltage provided in an embodiment of this application;

[0074] Figure 13 This is the equivalent circuit model upon which the correspondence acquisition method provided in this application embodiment is based;

[0075] Figure 14 This is a schematic diagram of a curve representing the relationship between the gate-source voltage and the gate leakage current of a MOSFET sample, provided in an embodiment of this application.

[0076] Figure 15 This is a schematic diagram of three curves representing the relationship between gate-source voltage and gate leakage current for three MOSFET samples provided in an embodiment of this application;

[0077] Figure 16 This is a schematic diagram of the overall process of a defect detection method provided in an embodiment of this application;

[0078] Figure 17 This is a schematic diagram of the structure of a defect detection device provided in an embodiment of this application. Detailed Implementation

[0079] The embodiments of the technical solution of this application will now be described in detail with reference to the accompanying drawings. These embodiments are only used to more clearly illustrate the technical solution of this application and are therefore merely examples, and should not be used to limit the scope of protection of this application.

[0080] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the application; the terms “comprising” and “having”, and any variations thereof, in the specification, claims, and foregoing description of the drawings are intended to cover non-exclusive inclusion.

[0081] In the description of the embodiments of this application, technical terms such as "first" and "second" are used only to distinguish different objects and should not be construed as indicating or implying relative importance or implicitly specifying the number, specific order, or primary and secondary relationship of the indicated technical features. In the description of the embodiments of this application, "multiple" means two or more, unless otherwise explicitly defined.

[0082] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0083] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.

[0084] In the description of the embodiments of this application, the term "multiple" refers to two or more (including two), similarly, "multiple sets" refers to two or more (including two sets), and "multiple pieces" refers to two or more (including two pieces).

[0085] In the description of the embodiments of this application, the technical terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the embodiments of this application and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application.

[0086] In the description of the embodiments of this application, unless otherwise expressly specified and limited, technical terms such as "installation," "connection," "joining," and "fixing" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. For those skilled in the art, the specific meaning of the above terms in the embodiments of this application can be understood according to the specific circumstances.

[0087] MOSFETs are core components of modern electronics, playing a crucial role in consumer electronics, industrial control, new energy, and artificial intelligence. However, some MOSFETs, such as silicon carbide MOSFETs, have defects in their gate oxide layers, such as interface state defects and trap defects. These defects can trap charge carriers, triggering a shift in the MOSFET's threshold voltage and thus affecting its lifetime. Therefore, it is necessary to perform defect detection on the MOSFET's gate oxide layer.

[0088] Interface state defects refer to defects or imperfect structures at the metal-oxide interface or the oxide-semiconductor interface, which may include dangling bonds, impurities, dislocations, or structural irregularities. Trap defects are a type of microstructural defect with "charge trapping ability," which, like a "trap," can temporarily or permanently trap charge carriers, such as electrons or holes, and directly affect the electrical performance of MOSFETs through the process of charge trapping or releasing.

[0089] Currently, by applying a preset reverse voltage, such as -8V, to the gate and source of a MOSFET and testing the gate leakage current, it is determined whether the gate leakage current is within a first preset leakage current range. If it is not within the first preset leakage current range, it can be determined that the gate oxide layer of the MOSFET has a defect. If it is within the first preset leakage current range, a preset forward voltage, such as 22V, is then applied to the gate and source of the MOSFET, and the gate leakage current is tested to determine whether it is within a second preset leakage current range. If it is within the second preset leakage current range, it can be determined that the gate oxide layer of the MOSFET does not have a defect; if it is not within the second preset leakage current range, it can be determined that the gate oxide layer of the MOSFET has a defect. However, this defect detection method can only perform coarse defect detection, that is, it can only detect macroscopic defects in the gate oxide layer and cannot detect smaller microscopic defects. Therefore, it suffers from low detection accuracy.

[0090] To address the aforementioned technical problems, embodiments of this application provide a defect detection method, which can be applied to, for example... Figure 1 The defect detection device shown can be a terminal, and its internal structure diagram can be as follows. Figure 1 As shown, the defect detection device includes a processor, memory, communication interface, display screen, and input device connected via a system bus. The processor provides computational and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs in the non-volatile storage media. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, mobile cellular networks, NFC (Near Field Communication), or other technologies. When the computer program is executed by the processor, it implements a defect detection method. The display screen can be an LCD screen or an e-ink screen. The input device can be a touch layer covering the display screen, buttons, a trackball, or a touchpad on the device's casing, or an external keyboard, touchpad, or mouse.

[0091] Those skilled in the art will understand that Figure 1The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the defect detection equipment to which the present application is applied. Specific defect detection equipment may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0092] In one embodiment, such as Figure 2 As shown, Figure 2 This is a flowchart illustrating a defect detection method provided in an embodiment of this application, applied to... Figure 1 Taking the defect detection equipment in the example, the explanation includes the following steps S201-S203:

[0093] S201, obtain the first threshold voltage of the metal-oxide-semiconductor MOSFET under test.

[0094] To facilitate a clearer description of the embodiments of this application, the drain voltage of the MOSFET under test is denoted as VD, the source voltage of the MOSFET under test is denoted as VS, and the gate voltage of the MOSFET under test is denoted as VG. The drain-source voltage applied between the drain and source of the MOSFET under test is denoted as VDS, where VDS equals VD minus VS; the gate-source voltage applied between the gate and source of the MOSFET under test is denoted as VGS, where VDS equals VD minus VS; and the drain-source current flowing from the drain to the source of the MOSFET under test is denoted as IDS.

[0095] In this embodiment, the first threshold voltage of the MOSFET under test can be obtained in the following manner:

[0096] The drain-source voltage VDS is slowly increased, while the gate-source voltage VGS is increased synchronously according to the requirement VGS=VDS. During the voltage increase, the drain-source current IDS can be monitored. When the drain-source current IDS equals the preset drain-source current, the gate-source voltage VGS at this time can be recorded and determined as the first threshold voltage. The preset drain-source current can be measured in microamps.

[0097] S202, when the duration of the target gate-source voltage applied to the gate-source of the MOSFET under test is a first preset duration, the second threshold voltage of the MOSFET under test is obtained.

[0098] The target gate-source voltage is the voltage applied after obtaining the first threshold voltage, provided that the drain-source voltage of the MOSFET under test is not greater than a preset voltage. The target gate-source voltage is used to excite defects in the gate oxide layer of the MOSFET under test.

[0099] Traditional detection methods often fail to detect subtle, microscopic defects present in the gate oxide layer. The method provided in this application, however, excites both microscopic and macroscopic defects using a target gate-source voltage, causing these pre-existing defects to become apparent through a second threshold voltage. Specifically, if defects are present, the second threshold voltage will show a significant decrease compared to the first threshold voltage. Therefore, the defect detection result of the gate oxide layer of the MOSFET under test can be determined using both the first and second threshold voltages.

[0100] After acquiring the first threshold voltage, a target gate-source voltage is applied to the gate-source of the MOSFET under test, provided that the drain-source voltage of the MOSFET under test is not greater than a preset voltage. Then, while the duration of applying the target gate-source voltage is a first preset duration, the second threshold voltage of the MOSFET under test is acquired by the testing equipment. It can be determined that when the duration of applying the target gate-source voltage is the first preset duration, the threshold voltage displayed by the testing equipment is the second threshold voltage.

[0101] The preset voltage can be 0 volts or a value very close to 0 volts. For example, with VGS=0 volts, a target gate-source voltage is applied to the gate and source of the MOSFET under test. The target gate-source voltage can excite defects in the gate oxide layer of the MOSFET under test. The defects in the gate oxide layer of the MOSFET under test may include defects in the gate oxide layer and / or interface state defects.

[0102] When the drain-source voltage of the MOSFET under test is not greater than the preset voltage, applying the target gate-source voltage to the gate-source of the MOSFET under test can reduce the influence of the drain-source voltage on the gate-source voltage, thereby making it easier for the gate-source voltage to reach the target gate-source voltage.

[0103] The target gate-source voltage is used to excite defects in the gate oxide layer of the MOSFET under test. These defects may include, but are not limited to, interface state defects and trap defects.

[0104] The method for obtaining the second threshold voltage of the MOSFET under test is similar to that for obtaining the first threshold voltage of the MOSFET under test. That is, the drain-source voltage VDS is slowly increased, and the gate-source voltage VGS is increased synchronously according to the requirement of VGS=VDS. During the voltage increase, the drain-source current IDS can be monitored. When the drain-source current IDS is equal to the preset drain-source current, the gate-source voltage VGS at this time can be recorded and determined as the second threshold voltage.

[0105] S203, based on the difference between the first threshold voltage and the second threshold voltage, determine the defect detection result of the gate oxide layer of the MOSFET under test.

[0106] In one possible implementation, the absolute value of the threshold voltage difference between the first threshold voltage and the second threshold voltage can be determined, and the ratio of the absolute value to the first threshold voltage can be determined. If the ratio is greater than a certain preset threshold voltage offset rate, the defect detection result of the gate oxide layer of the MOSFET under test is determined to be that there is a defect in the gate oxide layer; if the ratio is not greater than the preset threshold voltage offset rate, the defect detection result of the gate oxide layer of the MOSFET under test is determined to be that there is no defect in the gate oxide layer.

[0107] In another possible implementation, the threshold voltage difference between the first threshold voltage and the second threshold voltage can be determined. If the threshold voltage difference is greater than the preset threshold voltage difference, it means that the threshold voltage of the MOSFET under test has decreased significantly, and the defect detection result of the gate oxide layer of the MOSFET under test can be determined to be that there is a defect in the gate oxide layer. If the threshold voltage difference is not greater than the preset threshold voltage difference, the defect detection result of the gate oxide layer of the MOSFET under test can be determined to be that there is no defect in the gate oxide layer.

[0108] The method provided in this embodiment obtains a first threshold voltage of the MOSFET under test, and then obtains a second threshold voltage of the MOSFET under test while applying a target gate-source voltage to the gate and source of the MOSFET under test for a first preset duration. Based on the difference between the first and second threshold voltages, the defect detection result of the gate oxide layer of the MOSFET under test is determined. The target gate-source voltage is used to excite defects in the gate oxide layer of the MOSFET under test. Since the target gate-source voltage can excite potential defects in the MOSFET under test, such as micro and macro defects, the obtained second threshold voltage will decrease when defects are excited. Therefore, by obtaining the second threshold voltage when defects are excited, the defect detection result of the gate oxide layer of the MOSFET under test can be determined based on the difference between the first and second threshold voltages, thereby achieving more comprehensive and accurate defect detection of macro and micro defects. For example, if the gate oxide layer of a MOSFET under test actually has some micro defects, and the method provided in this embodiment can excite these micro defects, causing a significant decrease in the second threshold voltage of the MOSFET under test, then the defect detection result can be determined to be that there are defects in the gate oxide layer. If the gate oxide layer of a MOSFET under test is actually free of defects, and the decrease in the second threshold voltage of the MOSFET under test obtained by the method provided in this embodiment remains unchanged or is small, then the defect detection result can be determined to be that the gate oxide layer is free of defects.

[0109] In one embodiment, the target gate-source voltage is not less than the defect detection voltage and is less than the breakdown voltage of the MOSFET under test. The defect detection voltage is determined based on a first threshold voltage sample obtained when the application time of the gate-source voltage sample applied to the gate-source of the MOSFET sample is a second preset time.

[0110] The gate-source voltage sample is the voltage applied when the drain-source voltage of the MOSFET sample is not greater than a preset voltage. The gate-source voltage sample is not less than the tunneling voltage of the MOSFET sample and is less than the breakdown voltage of the MOSFET sample.

[0111] Applying a gate-source voltage sample to the gate-source of a MOSFET sample is similar to applying a target gate-source voltage to the gate-source of the MOSFET under test. That is, when the drain-source voltage of the MOSFET sample is not greater than the preset voltage, applying a gate-source voltage sample to the gate-source of the MOSFET sample can reduce the influence of the drain-source voltage of the MOSFET sample on the gate-source voltage sample, thereby making it easier for the gate-source voltage value to reach the gate-source voltage sample.

[0112] The gate-source voltage sample must be higher than or equal to the tunneling voltage, but at the same time, the gate-source voltage sample cannot be too high, otherwise it will cause the gate oxide layer of the MOSFET sample to break down. Therefore, the gate-source voltage sample must be lower than the breakdown voltage. The breakdown voltage is determined by the thickness of the gate oxide layer. For example, if the breakdown voltage is equal to 42V, then the gate-source voltage sample needs to be no less than the tunneling voltage and less than 42V.

[0113] By applying a gate-source voltage sample to the gate and source of the MOSFET sample for a second preset duration, a first threshold voltage sample can be obtained. The method for obtaining the first threshold voltage sample is similar to the method for obtaining the first threshold voltage described above, and will not be repeated here.

[0114] Since applying the gate-source voltage sample to the MOSFET sample causes gate degradation, resulting in the threshold voltage of the MOSFET sample (i.e., the obtained first threshold voltage sample) being lower than the reference threshold voltage, the defect detection voltage can be determined as follows:

[0115] Method 1: The difference between the reference threshold voltage and the first threshold voltage sample can be determined. If this difference is less than a preset difference, the gate-source voltage sample can be used as the defect detection voltage. The reference threshold voltage can be equal to the threshold voltage obtained by testing a MOSFET of the same specifications as the MOSFET sample in actual application, or equal to the product of the threshold voltage and a preset coefficient.

[0116] Method 2: For multiple MOSFET samples, different gate-source voltage samples can be applied to the MOSFET samples, and the difference between each MOSFET sample can be determined using the method of Method 1. The difference less than the preset difference is the target difference, and the gate-source voltage sample corresponding to the smallest difference among the target differences is the defect detection voltage.

[0117] In this embodiment, by limiting the target gate-source voltage to be no less than the defect detection voltage and less than the breakdown voltage of the MOSFET under test, the probability of the MOSFET under test failing during the detection process can be reduced, and defects in the gate oxide layer of the MOSFET under test can be more effectively activated, improving the comprehensiveness of defect detection. Furthermore, by applying the gate-source voltage sample to the gate-source of the MOSFET sample for a second preset duration, the obtained first threshold voltage sample can quickly determine the defect detection voltage, improving the efficiency of defect detection voltage determination.

[0118] In one embodiment, refer to Figure 3 , Figure 3 This is one of the flowcharts illustrating the method for determining the defect detection voltage provided in this application embodiment. In this embodiment, the target gate-source voltage is not less than the defect detection voltage and is less than the breakdown voltage of the MOSFET under test. The method for determining the defect detection voltage includes the following steps S301-S302:

[0119] S301, before applying a gate-source voltage sample to the gate-source of the MOSFET sample, obtain a second threshold voltage sample of the MOSFET sample.

[0120] The method for obtaining the second threshold voltage sample of the MOSFET is similar to the method for obtaining the first threshold voltage, and will not be repeated here.

[0121] It should be noted that after obtaining the second threshold voltage sample, a gate-source voltage sample can be applied to the gate-source of the MOSFET sample. If the application duration is equal to the second preset duration, a first threshold voltage sample can be obtained. Since the gate-source voltage sample degrades the threshold voltage of the MOSFET sample, the first threshold voltage sample obtained in this case is smaller than the second threshold voltage sample.

[0122] S302 determines the defect detection voltage based on the first threshold voltage sample and the second threshold voltage sample of the MOSFET sample.

[0123] The defect detection voltage is determined based on the first and second threshold voltage samples of the MOSFET sample, which can be achieved in the following way:

[0124] In one possible implementation, there are multiple MOSFET samples. For each MOSFET sample, a first threshold voltage offset rate is determined based on a first threshold voltage sample and a second threshold voltage sample of the MOSFET sample. A first threshold voltage offset rate less than a first preset threshold voltage offset rate is determined as a target threshold voltage offset rate. Any gate-source voltage sample in the gate-source voltage samples corresponding to the target threshold voltage offset rate is determined as the defect detection voltage.

[0125] As shown in Table 1 below, taking a silicon carbide MOSFET as the sample, with 9 MOSFET samples and a second preset duration of 100 ms as an example, the table shows the second threshold voltage sample VTH2 and the first threshold voltage sample VTH1 for each MOSFET sample, as well as the first threshold voltage offset rate determined based on the first and second threshold voltage samples of the MOSFET samples. The threshold voltage offset rate can be determined by dividing the difference between the second threshold voltage sample VTH2 and the first threshold voltage sample VTH1 by the second threshold voltage sample VTH2.

[0126] Table 1

[0127]

[0128] As shown in Table 1, taking three MOSFET samples as a sample group, the gate-source voltage samples (VGSF) of the first sample group were 35.8V, 36V, and 35V, and the monitored gate leakage current (IGSS) was 40nA. The gate-source voltage samples (VGSF) of the second sample group were 39.2V, 39.1V, and 39.2V, and the monitored gate leakage current (IGSS) was 80nA. The gate-source voltage samples (VGSF) of the third sample group were 36.1V, 36V, and 36V, and the monitored gate leakage current (IGSS) was 140nA.

[0129] Taking a first preset threshold voltage offset rate of 8% as an example, Table 1 shows that the first threshold voltage offset rates corresponding to the gate-source voltage samples of 35.8V, 36V, and 35V in the first sample group are less than the first preset threshold voltage offset rate. Any one of the three gate-source voltage samples in the first sample group can be used as the defect detection voltage. Alternatively, the smallest gate-source voltage sample among the three can be used as the defect detection voltage. Or, the smallest gate-source voltage sample can be rounded down, and the resulting value can be used as the defect detection voltage. For example, rounding down 35.5V yields 35V, which can then be used as the defect detection voltage.

[0130] It should be noted that, as shown in Table 1, the threshold voltage of the MOSFET samples degrades significantly at 80nA and 140nA, exceeding 10%. For safety reasons, it is advisable to select IGSS=40nA and gate-source voltage sample VGSF=35V as the defect detection voltage.

[0131] Since a larger first threshold voltage offset rate increases the risk of MOSFET failure, in one embodiment, a minimum first threshold voltage offset rate can be determined from the target threshold voltage offset rates, and the gate-source voltage sample corresponding to the minimum first threshold voltage offset rate can be used as the defect detection voltage. For example, 0.7% of the threshold voltage offset rate is the minimum in Table 1; therefore, the gate-source voltage sample of 36V corresponding to 0.7% of the threshold voltage offset rate can be used as the defect detection voltage.

[0132] In another possible implementation, for each MOSFET sample, the quotient of the second threshold voltage sample and the first threshold voltage sample of the MOSFET sample is determined; the quotient less than the preset quotient is determined as the target quotient, and any gate-source voltage sample in the gate-source voltage sample corresponding to the target quotient is determined as the defect detection voltage.

[0133] In this embodiment, before applying a gate-source voltage sample to the gate-source of the MOSFET sample, a second threshold voltage sample of the MOSFET sample is obtained. Based on the first and second threshold voltage samples of the MOSFET sample, a defect detection voltage is determined, thereby providing a basis for determining the defect detection result of the gate oxide layer of the MOSFET under test based on the defect detection voltage.

[0134] Reference Figure 4 , Figure 4 This is the second flowchart illustrating the method for determining the defect detection voltage provided in this application embodiment. In this embodiment, there are multiple MOSFET samples. This embodiment relates to a possible implementation of determining the defect detection voltage based on a first threshold voltage sample and a second threshold voltage sample of the MOSFET samples. Based on the above embodiment, S303 may include the following steps S401-S402:

[0135] S401, for each MOSFET sample, determine the first threshold voltage offset rate of the MOSFET sample based on the first threshold voltage sample and the second threshold voltage sample of the MOSFET sample.

[0136] As shown in Table 1 above, the voltage sample difference obtained by subtracting the second threshold voltage sample from the first threshold voltage sample can be determined, the absolute value of the voltage sample difference can be determined as the quotient of the second threshold voltage sample, and the first threshold voltage offset rate can be determined based on the quotient.

[0137] S402, based on the first threshold voltage offset rate of each MOSFET sample and the gate-source voltage sample corresponding to each first threshold voltage offset rate, determine the defect detection voltage.

[0138] The defect detection voltage is determined based on the first threshold voltage offset rate of each MOSFET sample and the gate-source voltage sample corresponding to each first threshold voltage offset rate. This can be achieved in the following way:

[0139] The first threshold voltage offset rate, which is less than the first preset threshold voltage offset rate, can be determined as the target threshold voltage offset rate. Any gate source voltage sample in the gate source voltage sample corresponding to the target threshold voltage offset rate can be determined as the defect detection voltage.

[0140] In this embodiment, for each MOSFET sample, a first threshold voltage offset rate is determined based on the first threshold voltage sample and the second threshold voltage sample of the MOSFET sample. Based on the first threshold voltage offset rate of each MOSFET sample and the gate-source voltage sample corresponding to each first threshold voltage offset rate, a defect detection voltage is determined. Since the threshold voltage offset rate can more accurately determine the variation range of the threshold voltage sample of the MOSFET sample, based on the first threshold voltage offset rate of the MOSFET sample, the threshold voltage offset rate with a smaller variation range can be more accurately determined. Therefore, based on the gate-source voltage sample corresponding to the threshold voltage offset rate with a smaller variation range, the defect detection voltage is determined, reducing the probability of MOSFET failure when using the defect detection voltage to detect defects in the gate oxide layer of the MOSFET under test.

[0141] Reference Figure 5 , Figure 5 This is the third flowchart illustrating the method for determining the defect detection voltage provided in this application embodiment. In this embodiment, there are multiple MOSFET samples. This embodiment relates to a possible implementation of determining the defect detection voltage based on the first threshold voltage offset rate of each MOSFET sample and the gate-source voltage sample corresponding to each first threshold voltage offset rate. Based on the above embodiment, S402 may include the following steps S501-S502:

[0142] S501, the first threshold voltage offset rate, which is less than the first preset threshold voltage offset rate, is determined to be the target threshold voltage offset rate.

[0143] For example, referring to Table 1 above, the threshold voltage offset rates corresponding to the first sample group are all less than the first preset threshold voltage offset rate of 8%. Therefore, the threshold voltage offset rate corresponding to the first sample group can be determined as the target threshold voltage offset rate. That is, the target threshold voltage offset rates include 2.1%, 0.7%, and 1.1%.

[0144] S502, based on the gate-source voltage sample corresponding to the target threshold voltage offset rate, determine the defect detection voltage.

[0145] For example, referring to Table 1 above, the gate-source voltage sample corresponding to 2.1% is 35.8V, the gate-source voltage sample corresponding to 0.7% is 36V, and the gate-source voltage sample corresponding to 1.1% is 35.5V. Any one of 35.8V, 36V, and 35.5V can be used as the defect detection voltage.

[0146] In this embodiment, a first threshold voltage offset rate less than a first preset threshold voltage offset rate is determined as the target threshold voltage offset rate, and a defect detection voltage is determined based on the gate-source voltage sample corresponding to the target threshold voltage offset rate. Since the defect detection voltage is determined based on the gate-source voltage sample corresponding to the threshold voltage offset rate with a small change amplitude, the probability of the MOSFET under test failing when using the defect detection voltage to detect defects in the gate oxide layer of the MOSFET under test can be reduced.

[0147] Reference Figure 6 , Figure 6 This is the fourth flowchart illustrating the method for determining the defect detection voltage provided in this application. This embodiment relates to a possible implementation of determining the defect detection voltage based on the gate-source voltage sample corresponding to the target threshold voltage offset rate. Based on the above embodiment, S502 may include the following steps S601-S602:

[0148] S601, obtain the gate leakage current of the MOSFET sample corresponding to the target threshold voltage offset rate.

[0149] The gate leakage current is the leakage current obtained when the application time is a second preset time.

[0150] As shown in Table 1 above, the target threshold voltage offset rate is the threshold voltage offset rate corresponding to the first sample group, and the gate leakage current of the MOSFET sample corresponding to the target threshold voltage offset rate is 40nA.

[0151] S602, determine the minimum value in the gate-source voltage sample corresponding to the minimum gate leakage current as the defect detection voltage.

[0152] Based on the above examples, a gate leakage current of 40nA is the minimum gate leakage current. The gate-source voltage samples corresponding to a gate leakage current of 40nA include 35.8V, 36V, and 35.5V. The minimum value among 35.8V, 36V, and 35.5V is 35.5V. Therefore, 35.5V can be determined as the defect detection voltage.

[0153] In this embodiment, by obtaining the gate leakage current of the MOSFET sample corresponding to the target threshold voltage offset rate, the minimum value of the gate-source voltage sample corresponding to the minimum gate leakage current is determined as the defect detection voltage. This achieves the goal of determining the defect detection voltage by combining the gate leakage current and the gate-source voltage sample values, making the determined defect detection voltage more reasonable. This not only more effectively excites defects in the gate oxide layer of the MOSFET under test, but also reduces the probability of the MOSFET under test failing during defect detection due to an excessively large determined defect detection voltage.

[0154] Reference Figure 7 , Figure 7 This is a flowchart illustrating a method for determining defect detection results provided in an embodiment of this application. This embodiment relates to a possible implementation of determining the defect detection result of the gate oxide layer of a MOSFET under test based on the difference between a first threshold voltage and a second threshold voltage. Based on the above embodiment, step S203 may include the following steps S701-S703:

[0155] S701, based on the difference between the first threshold voltage and the second threshold voltage, determine the second threshold voltage offset rate.

[0156] The method for determining the second threshold voltage offset rate is similar to that for determining the first threshold voltage offset rate, and will not be repeated here.

[0157] S702, if the second threshold voltage offset rate is less than the second preset threshold voltage offset rate, the defect detection result is determined to be that there is no defect in the gate oxide layer.

[0158] S703, if the second threshold voltage offset rate is not less than the second preset threshold voltage offset rate, the defect detection result is determined to be that there is a defect in the gate oxide layer.

[0159] The second preset threshold voltage offset rate may be equal to or different from the first preset threshold voltage offset rate.

[0160] The method provided in this application embodiment can improve the accuracy of defect detection in the gate oxide layer of the MOSFET under test. Here, 23 silicon carbide wafers are selected to verify the method provided in this embodiment for more comprehensive and accurate defect detection. Each silicon carbide wafer can be used to produce multiple silicon carbide MOSFETs, and defect detection can be performed on the gate oxide layers of multiple silicon carbide MOSFETs produced from each silicon carbide wafer. The schematic diagram of the gate oxide layer defect detection effect is shown below. Figure 8 , Figure 9 and Figure 10 As shown. Figure 8 This is a schematic diagram illustrating the gate oxide layer defect detection effect obtained from a conventional first defect detection, as provided in an embodiment of this application. Figure 9 This is a schematic diagram illustrating the gate oxide layer defect detection effect obtained by testing when the target gate-source voltage is equal to 35 volts after the first defect detection as described above, according to an embodiment of this application. Figure 10 This is a schematic diagram of the gate oxide layer defect detection effect obtained by performing a conventional second defect detection after the target gate-source voltage is equal to 35 volts, according to an embodiment of this application.

[0161] from Figure 8 , Figure 9 and Figure 10 It can be seen that after the first defect detection, the test with an applied target gate-source voltage of 35 volts can still screen out some MOSFETs with large leakage currents, that is, it screens out failed MOSFETs. Furthermore, no new failures were added after the second defect detection, meaning that the failure rate of each silicon carbide wafer was zero during the second defect detection. Figure 10 The failure rate corresponding to each silicon carbide wafer number in the diagram, represented by the ordinate value, is zero. This means that the target gate-source voltage applied in this embodiment can perform more comprehensive and accurate defect detection.

[0162] When the drain-source voltage of the MOSFET under test is not greater than a preset voltage, a target gate-source voltage is applied to the gate-source terminal of the MOSFET under test to excite defects in the gate oxide layer of the MOSFET under test, and a second threshold voltage of the MOSFET under test is obtained under this condition. If there are actually defects in the gate oxide layer of the MOSFET under test, the defects will be excited by the target gate-source voltage, and the obtained second threshold voltage will be less than the first threshold voltage. The absolute value of the difference between the second threshold voltage and the first threshold voltage is large, which makes the second threshold voltage offset rate greater than the second preset threshold voltage offset rate. The defect detection result is determined to be that there are defects in the gate oxide layer, thus improving the defect detection accuracy of the gate oxide layer of the MOSFET under test.

[0163] In this embodiment, a second threshold voltage offset rate is determined based on the difference between the first threshold voltage and the second threshold voltage. If the second threshold voltage offset rate is less than the second preset threshold voltage offset rate, the defect detection result is determined to be that there is no defect in the gate oxide layer. If the second threshold voltage offset rate is not less than the second preset threshold voltage offset rate, the defect detection result is determined to be that there is a defect in the gate oxide layer. This can improve the defect detection accuracy of the gate oxide layer of the MOSFET under test.

[0164] Reference Figure 11 , Figure 11 This is a flowchart illustrating a MOSFET lifetime assessment method provided in an embodiment of this application. The method may include the following steps S1101-S1104:

[0165] S1101, determine a preset number of target MOSFETs from the MOSFETs under test whose gate oxide layer has no defects according to the defect detection results.

[0166] The preset quantity can be, for example, no less than 231 MOSFETs, which can be selected from 3 batches, with each batch containing 77 MOSFETs.

[0167] S1102, obtain the third threshold voltage offset rate of each target MOSFET; the third threshold voltage offset rate is determined based on the threshold voltage reference value and the threshold voltage degradation value obtained by the target MOSFET under preset test conditions.

[0168] The preset test conditions include that the gate-source voltage applied to the target MOSFET is equal to the tunneling voltage.

[0169] The preset test conditions may also include test temperature, test frequency, and test period. Among them, the test temperature Ta can be equal to 150℃ (degrees Celsius), the test frequency can be between 150KHz (kilohertz) and 1000KHz, and the test period can be, for example, equal to 1000 hours.

[0170] For ease of subsequent description, the tests under the aforementioned preset test conditions will be referred to as non-standard HTGB tests, to distinguish them from standard HTGB tests. It should be noted that during the test process of obtaining the third threshold voltage offset rate, intermediate threshold voltage offset rates corresponding to multiple intermediate test durations during the non-standard HTGB test process, such as 168 hours, 336 hours, and 500 hours, can also be obtained. The third threshold voltage offset rate of the target MOSFET in this step is the threshold voltage offset rate obtained after completing one test cycle, i.e., a test duration of 1000 hours.

[0171] S1103, determine the target parameters of the third threshold voltage offset rate of each target MOSFET, and obtain the equivalent lifetime of each target MOSFET under preset test conditions.

[0172] The target parameter can be the average or median of the offset rates of each third threshold voltage. The acceleration factor can be calculated using the Arrhenius lifetime model. :

[0173] = (1)

[0174] Where Ea represents the activation energy, which characterizes the energy barrier that exists during the process of the target MOSFET changing from the normal state to the failure state, and is generally between -0.2 and 1.4 eV; k represents the Boltzmann constant, k = 8.617385 × 10⁵; Tu represents the actual operating temperature (less than the maximum operating temperature); Tt represents the test environment temperature; and 273 represents the difference between Celsius and absolute temperature.

[0175] The equivalent life is calculated using the following formula (2). :

[0176] (2)

[0177] in, This represents the duration of the nth trial, for example, when n=1. =168 hours; when n=2, =336 hours; when n=3 =500 hours; when n=4, =1000 hours. The acceleration factor is calculated using formula (1). The acceleration factor is the same for each test duration, and then the equivalent lifetime corresponding to each test duration can be calculated using formula (2).

[0178] As shown in Table 2 below, the target parameters in Table 2 are taken as the average value equal to the third threshold voltage offset rate. Table 2 shows the intermediate threshold voltage offset rate, the equivalent lifetime corresponding to the intermediate threshold voltage offset rate, the third threshold voltage offset rate obtained when the test duration is equal to 1000 hours, and the equivalent lifetime corresponding to the third threshold voltage offset rate for a target MOSFET at various intermediate test durations.

[0179] Table 2

[0180]

[0181] The equivalent lifetime of the target MOSFET shown in Table 2 above under the preset test conditions is B4, and the target parameter is A4.

[0182] S1104 determines the lifetime assessment results of a preset number of target MOSFETs based on target parameters and equivalent lifetime.

[0183] If the target parameter is less than the third preset threshold voltage offset rate and the equivalent lifetime is not less than the expected lifetime, the lifetime assessment result is determined to meet the expected lifetime.

[0184] If the target parameter is not less than the third preset threshold voltage offset rate, and / or the equivalent lifetime is less than the expected lifetime, the lifetime assessment result is determined to be unsatisfactory.

[0185] The third preset threshold voltage offset rate can be equal to or different from the first preset threshold voltage offset rate.

[0186] In this embodiment, a predetermined number of target MOSFETs are determined from the MOSFETs under test whose gate oxide layer has no defects according to the defect detection results. The third threshold voltage offset rate of each target MOSFET is obtained, the target parameters of the third threshold voltage offset rate of each target MOSFET are determined, and the equivalent lifetime of each target MOSFET under predetermined test conditions is obtained. Based on the target parameters and equivalent lifetime, the lifetime assessment results of the predetermined number of target MOSFETs are determined. Thus, based on the lifetime assessment results, it can be determined whether the equivalent lifetime of the MOSFETs with no gate oxide layer selected based on the defect detection voltage meets the expected lifetime.

[0187] In one embodiment, S1104 above, which determines the lifetime assessment results of a preset number of target MOSFETs based on target parameters and equivalent lifetime, can be achieved in the following way:

[0188] If the target parameter is less than the third preset threshold voltage offset rate and the equivalent lifetime is not less than the expected lifetime, the lifetime assessment result is determined to meet the expected lifetime.

[0189] If the target parameter is not less than the third preset threshold voltage offset rate, and / or the equivalent lifetime is less than the expected lifetime, the lifetime assessment result is determined to be unsatisfactory.

[0190] In this embodiment, the lifetime assessment result is determined to meet the expected lifetime if the target parameter is less than the third preset threshold voltage offset rate and the equivalent lifetime is not less than the expected lifetime; and the lifetime assessment result is determined to not meet the expected lifetime if the target parameter is not less than the third preset threshold voltage offset rate and / or the equivalent lifetime is less than the expected lifetime. By using both the target parameter and the equivalent lifetime as conditions to determine whether the lifetime assessment result meets the expected lifetime, the comprehensiveness and reliability of the obtained lifetime assessment result can be improved.

[0191] In one embodiment, if the life assessment result indicates that the expected lifespan is not met, the following procedure may also be performed:

[0192] If the life assessment result does not meet the expected life, return to the method for determining the defect detection voltage, redetermine the new defect detection voltage, until the life assessment result determined based on the most recently determined new defect detection voltage meets the expected life, and update the defect detection voltage with the most recently determined new defect detection voltage.

[0193] If the lifetime assessment result shows that the expected lifetime is not met, the method for determining the defect detection voltage can be re-executed to redetermine a new defect detection voltage. When re-executing the defect detection voltage determination method, other MOSFET samples of the same specifications can be used.

[0194] In this embodiment, if the lifetime assessment result does not meet the expected lifetime, the method for determining the defect detection voltage is returned to perform the process, and a new defect detection voltage is determined. This process continues until the lifetime assessment result determined based on the most recently determined new defect detection voltage meets the expected lifetime. The defect detection voltage is then updated using the most recently determined new defect detection voltage. This achieves the goal of obtaining a new defect detection voltage that meets the expected lifetime. In other words, when using a new defect detection voltage that meets the expected lifetime to perform defect detection on the gate oxide layer of the MOSFET under test, not only can defective MOSFETs be detected more comprehensively, but the lifetime of the detected non-defective MOSFETs can also meet the expected lifetime.

[0195] Reference Figure 12 , Figure 12 This is a flowchart illustrating a method for determining tunneling voltage according to an embodiment of this application. The method may include the following steps S1201-S1203:

[0196] S1201, obtain the correspondence between the gate-source voltage and gate leakage current of the MOSFET sample.

[0197] like Figure 13 As shown, Figure 13This application provides an embodiment of an equivalent circuit model for obtaining a correspondence relationship. The gate G of a MOSFET sample is connected to a resistor Rg. The gate G and source S of the MOSFET sample are grounded. The resistor Rg is connected to a power supply U and a voltmeter V. The power supply U and voltmeter V are grounded. The voltmeter V displays the gate-source voltage VGS applied to the MOSFET sample. The gate-source voltage VGS is applied to the MOSFET sample, for example, increasing from 22V in 1V increments, performing a stepped test. The test time for each gate-source voltage VGS test can be between 100 milliseconds and 600 milliseconds. Because the MOSFET parasitic capacitance requires a charging process, the test time needs to be evaluated based on the time it takes for different products to reach a stable gate leakage current IGSS value. The gate leakage current IGSS corresponding to each tested gate-source voltage VGS is recorded. Based on each tested gate-source voltage VGS and its corresponding gate leakage current IGSS, the correspondence between the gate-source voltage VGS and gate leakage current IGSS of the MOSFET sample is obtained.

[0198] The relationship between gate-source voltage and gate leakage current can be characterized by a curve or by a data table. For example... Figure 14 As shown, Figure 14 This is a schematic diagram of a curve representing the relationship between the gate-source voltage and the gate leakage current of a MOSFET sample, provided in an embodiment of this application. Figure 14 The diagram illustrates the relationship between the gate-source voltage and gate-drain current of a MOSFET sample. (Example:) Figure 15 As shown, Figure 15 This is a schematic diagram of three curves representing the relationship between gate-source voltage and gate leakage current for three MOSFET samples provided in an embodiment of this application. From... Figure 14 and Figure 15 It can be seen that the correspondence between the gate-source voltage and gate leakage current of the three different MOSFET samples is highly consistent.

[0199] S1202, determine the target data point based on the correspondence and the preset leakage current threshold; the gate leakage current corresponding to the target data point is less than the preset leakage current threshold, and the current difference between the gate leakage current corresponding to the target data point and the gate leakage current corresponding to the previous data point is greater than the preset current value.

[0200] The target data point can be determined based on the relationship between gate-source voltage and gate leakage current. The target data point can be: Figure 14 The inflection point of the curve.

[0201] When a high voltage is applied to the gate, Fowler-Nordheim tunneling (FN) tunneling dominates, and the FN tunneling current gradually increases and becomes dominant. Electrons reaching the anode through FN tunneling can generate energetic holes in the anode, which are captured by the oxide layer, leading to a decrease in the electron barrier height and a sharp increase in the gate leakage current IGSS. Therefore, based on this tunneling characteristic, the preset leakage current threshold can be set to, for example, 1 nA, to find the first inflection point 141 where the gate leakage current is less than 1 nA. For example, as... Figure 14 As shown, since the gate leakage current corresponding to a second inflection point 142 on the curve is approximately 1.00E-03 amps, or 1000 mA, the gate leakage current corresponding to the second inflection point 142 is greater than the preset leakage current threshold. Therefore, the second inflection point 142 does not meet the condition that the gate leakage current is less than the preset leakage current threshold. However, the gate leakage current corresponding to the first inflection point 141 is less than the preset leakage current threshold. Therefore, the first inflection point 141 is determined as the target data point, and the tunneling voltage can be determined based on the gate-source voltage corresponding to the target data point.

[0202] It should be noted that the gate leakage current at the first inflection point 141 is less than 0.1nA, and the preset leakage current threshold is 1nA. Therefore, the gate leakage current at the first inflection point 141 meets the condition of being less than the preset leakage current threshold. Thus, the tunneling voltage can be determined based on the gate-source voltage corresponding to the first inflection point 141.

[0203] S1203 determines the tunneling voltage based on the gate-source voltage in the target data point.

[0204] For example, the gate-source voltage corresponding to the target data point can be used as the tunneling voltage, or the gate-source voltage corresponding to the target data point can be rounded down, and the resulting value can be determined as the tunneling voltage. For example, the tunneling voltage is equal to 27V.

[0205] The method provided in this embodiment obtains the correspondence between the gate-source voltage and the gate leakage current of a MOSFET sample, determines the target data point based on the correspondence and a preset leakage current threshold, and determines the tunneling voltage based on the gate-source voltage in the target data point. This lays the foundation for determining the gate-source voltage sample based on the tunneling voltage, enabling the MOSFET sample to be tested based on the gate-source voltage sample to obtain a reasonable defect detection voltage.

[0206] To provide a clearer description of the embodiments of this application, the following is combined with... Figure 16 The overall process of the embodiments of this application will be further described and explained. Figure 16 This is a schematic diagram of the overall process of a defect detection method provided in an embodiment of this application. The method includes the following steps S1601-S1609:

[0207] S1601, obtain the correspondence between the gate-source voltage and gate leakage current of the MOSFET sample.

[0208] S1602 determines the target data point based on the correspondence and the preset leakage current threshold.

[0209] S1603 determines the tunneling voltage based on the gate-source voltage in the target data point.

[0210] S1604, before applying a gate-source voltage sample to the gate-source of the MOSFET sample, obtain a second threshold voltage sample of the MOSFET sample.

[0211] S1605, when the application duration of the gate-source voltage sample applied to the gate-source terminal of the MOSFET sample is a second preset duration, the first threshold voltage sample of the MOSFET sample is obtained.

[0212] S1606 determines the defect detection voltage based on the first and second threshold voltage samples of the MOSFET sample.

[0213] S1607, obtain the first threshold voltage of the MOSFET to be tested.

[0214] S1608, when the duration of the target gate-source voltage applied to the gate-source of the MOSFET under test is a first preset duration, the second threshold voltage of the MOSFET under test is obtained; the target gate-source voltage is not less than the defect detection voltage and is less than the breakdown voltage.

[0215] S1609, based on the difference between the first threshold voltage and the second threshold voltage, determine the defect detection result of the gate oxide layer of the MOSFET under test.

[0216] It should be understood that although the steps in the flowcharts of the above embodiments are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the above embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0217] Based on the same inventive concept, this application also provides a defect detection device for implementing the defect detection method described above. The solution provided by this device is similar to the solution described in the above method; therefore, the specific limitations in one or more defect detection device embodiments provided below can be found in the limitations of the defect detection method described above, and will not be repeated here.

[0218] In one embodiment, such as Figure 17 As shown, Figure 17 This is a schematic diagram of a defect detection device provided in an embodiment of this application. The defect detection device 1700 includes:

[0219] The first acquisition module 1701 is used to acquire the first threshold voltage of the metal-oxide-semiconductor transistor (MOSFET) under test.

[0220] The second acquisition module 1702 is used to acquire a second threshold voltage of the MOSFET under test when the duration of the target gate-source voltage applied to the gate-source of the MOSFET under test is a first preset duration; the target gate-source voltage is the voltage applied after acquiring the first threshold voltage when the drain-source voltage of the MOSFET under test is not greater than a preset voltage, and the target gate-source voltage is used to excite defects in the gate oxide layer of the MOSFET under test.

[0221] The first determining module 1703 is used to determine the defect detection result of the gate oxide layer of the MOSFET under test based on the difference between the first threshold voltage and the second threshold voltage.

[0222] In one embodiment, the target gate-source voltage is not less than the defect detection voltage and is less than the breakdown voltage of the MOSFET under test. The defect detection voltage is determined based on a first threshold voltage sample obtained when the application time of the gate-source voltage sample applied to the gate-source of the MOSFET sample is a second preset time.

[0223] The gate-source voltage sample is the voltage applied when the drain-source voltage of the MOSFET sample is not greater than a preset voltage. The gate-source voltage sample is not less than the tunneling voltage of the MOSFET sample and is less than the breakdown voltage of the MOSFET sample.

[0224] In one embodiment, the defect detection device 1700 may further include:

[0225] The third acquisition module is used to acquire a second threshold voltage sample of the MOSFET sample before applying a gate-source voltage sample to the gate-source of the MOSFET sample;

[0226] The second determining module is used to determine the defect detection voltage based on the first threshold voltage sample and the second threshold voltage sample of the MOSFET sample.

[0227] In one embodiment, the number of MOSFET samples is multiple, and the second determining module includes:

[0228] The first determining submodule is used to determine the first threshold voltage offset rate of each MOSFET sample based on the first threshold voltage sample and the second threshold voltage sample of the MOSFET sample.

[0229] The second determination submodule is used to determine the defect detection voltage based on the first threshold voltage offset rate of each MOSFET sample and the gate-source voltage sample corresponding to each first threshold voltage offset rate.

[0230] In one embodiment, the second determining submodule includes:

[0231] The first determining unit is used to determine that the first threshold voltage offset rate, which is less than the first preset threshold voltage offset rate, is the target threshold voltage offset rate.

[0232] The second determining unit is used to determine the defect detection voltage based on the gate-source voltage sample corresponding to the target threshold voltage offset rate.

[0233] In one embodiment, the second determining unit is specifically used to obtain the gate leakage current of the MOSFET sample corresponding to the target threshold voltage offset rate; the gate leakage current is the leakage current obtained when the application time is a second preset time; and the minimum value in the gate-source voltage sample corresponding to the minimum gate leakage current is determined to be the defect detection voltage.

[0234] In one embodiment, the first determining module 1703 is specifically used to determine a second threshold voltage offset rate based on the difference between a first threshold voltage and a second threshold voltage; if the second threshold voltage offset rate is less than a second preset threshold voltage offset rate, determine that the defect detection result is that there is no defect in the gate oxide layer; if the second threshold voltage offset rate is not less than the second preset threshold voltage offset rate, determine that the defect detection result is that there is a defect in the gate oxide layer.

[0235] In one embodiment, the defect detection device 1700 may further include:

[0236] The third determining module is used to determine a preset number of target MOSFETs from the MOSFETs under test whose gate oxide layer has no defects according to the defect detection results.

[0237] The fourth acquisition module is used to acquire the third threshold voltage offset rate of each target MOSFET. The third threshold voltage offset rate is determined based on the threshold voltage reference value and the threshold voltage degradation value obtained by testing the target MOSFET under preset test conditions. The preset test conditions include that the gate-source voltage applied to the gate and source of the target MOSFET is equal to the tunneling voltage.

[0238] The fourth determination module is used to determine the target parameters of the third threshold voltage offset rate of each target MOSFET, and to obtain the equivalent lifetime of each target MOSFET under preset test conditions.

[0239] The fifth determining module is used to determine the lifetime assessment results of a preset number of target MOSFETs based on the target parameters and equivalent lifetime.

[0240] In one embodiment, the fifth determining module is specifically used to determine that the lifetime assessment result meets the expected lifetime when the target parameter is less than the third preset threshold voltage offset rate and the equivalent lifetime is not less than the expected lifetime; and to determine that the lifetime assessment result does not meet the expected lifetime when the target parameter is not less than the third preset threshold voltage offset rate and / or the equivalent lifetime is less than the expected lifetime.

[0241] In one embodiment, the defect detection device 1700 further includes:

[0242] The update module is used to return to the method for determining the defect detection voltage when the life assessment result does not meet the expected life, redetermine the new defect detection voltage, and continue until the life assessment result determined based on the most recently determined new defect detection voltage meets the expected life, and update the defect detection voltage with the most recently determined new defect detection voltage.

[0243] In one embodiment, the defect detection device 1700 further includes:

[0244] The fifth acquisition module is used to acquire the correspondence between the gate-source voltage and the gate leakage current of the MOSFET sample;

[0245] The sixth determining module is used to determine the target data point based on the correspondence and the preset leakage current threshold; the gate leakage current corresponding to the target data point is less than the preset leakage current threshold, and the current difference between the gate leakage current corresponding to the target data point and the gate leakage current corresponding to the previous data point is greater than the preset current value.

[0246] The seventh determination module is used to determine the tunneling voltage based on the gate-source voltage in the target data point.

[0247] Each module in the aforementioned defect detection device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in the processor of the defect detection device in hardware form or independent of it, or they can be stored in the memory of the defect detection device in software form, so that the processor can call and execute the corresponding operations of each module.

[0248] In one embodiment, a defect detection device is provided, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the steps of any of the above method embodiments. The technical principles and effects are similar and will not be repeated here.

[0249] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, it implements the steps of any of the above method embodiments. The technical principles and effects are similar and will not be repeated here.

[0250] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps of any of the above method embodiments. The technical principles and effects are similar and will not be repeated here.

[0251] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties.

[0252] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments described above. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, etc., and are not limited to these.

[0253] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0254] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and not to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. These modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application, and they should all be covered within the scope of the claims and specification of this application. In particular, as long as there is no structural conflict, the various technical features mentioned in the embodiments can be combined in any way. This application is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. A defect detection method, characterized in that, The method includes: Obtain the first threshold voltage of the metal-oxide-semiconductor transistor (MOSFET) under test; When the duration of the target gate-source voltage applied to the gate-source of the MOSFET under test is a first preset duration, a second threshold voltage of the MOSFET under test is obtained; the target gate-source voltage is the voltage applied after obtaining the first threshold voltage, provided that the drain-source voltage of the MOSFET under test is not greater than a preset voltage, and the target gate-source voltage is used to excite defects in the gate oxide layer of the MOSFET under test. Based on the difference between the first threshold voltage and the second threshold voltage, the defect detection result of the gate oxide layer of the MOSFET under test is determined; The target gate-source voltage is not less than the defect detection voltage and is less than the breakdown voltage of the MOSFET under test. The defect detection voltage is determined based on a first threshold voltage sample obtained when the application time of the gate-source voltage sample applied to the gate and source of the MOSFET sample is a second preset time. The gate-source voltage sample is the voltage applied when the drain-source voltage of the MOSFET sample is not greater than the preset voltage, and the gate-source voltage sample is not less than the tunneling voltage of the MOSFET sample and is less than the breakdown voltage of the MOSFET sample. The number of MOSFET samples is multiple, and the method for determining the defect detection voltage includes: Before applying the gate-source voltage sample to the gate-source of the MOSFET sample, a second threshold voltage sample of the MOSFET sample is obtained; For each of the MOSFET samples, a first threshold voltage offset rate of the MOSFET sample is determined based on a first threshold voltage sample and a second threshold voltage sample of the MOSFET sample. The defect detection voltage is determined based on the first threshold voltage offset rate of each MOSFET sample and the gate-source voltage sample corresponding to each first threshold voltage offset rate.

2. The method according to claim 1, characterized in that, The step of determining the defect detection voltage based on the first threshold voltage offset rate of each MOSFET sample and the gate-source voltage sample corresponding to each first threshold voltage offset rate includes: The first threshold voltage offset rate, which is less than the first preset threshold voltage offset rate, is determined to be the target threshold voltage offset rate. The defect detection voltage is determined based on the gate-source voltage sample corresponding to the target threshold voltage offset rate.

3. The method according to claim 2, characterized in that, Determining the defect detection voltage based on the gate-source voltage sample corresponding to the target threshold voltage offset rate includes: Obtain the gate leakage current of the MOSFET sample corresponding to the target threshold voltage offset rate; the gate leakage current is the leakage current obtained when the application duration is the second preset duration; The minimum value among the gate-source voltage samples corresponding to the minimum gate leakage current is determined as the defect detection voltage.

4. The method according to any one of claims 1-3, characterized in that, The step of determining the defect detection result of the gate oxide layer of the MOSFET under test based on the difference between the first threshold voltage and the second threshold voltage includes: The second threshold voltage offset rate is determined based on the difference between the first threshold voltage and the second threshold voltage. If the second threshold voltage offset rate is less than the second preset threshold voltage offset rate, the defect detection result is determined to be that there is no defect in the gate oxide layer; If the second threshold voltage offset rate is not less than the second preset threshold voltage offset rate, the defect detection result is determined to be that there is a defect in the gate oxide layer.

5. The method according to any one of claims 1-3, characterized in that, The method further includes: A predetermined number of target MOSFETs are determined from the MOSFETs under test whose gate oxide layer has no defects as determined by the defect detection results. A third threshold voltage offset rate is obtained for each of the target MOSFETs; the third threshold voltage offset rate is determined based on a threshold voltage reference value and a threshold voltage degradation value obtained by testing the target MOSFET under preset test conditions; the preset test conditions include that the gate-source voltage applied to the gate and source of the target MOSFET is equal to the tunneling voltage; Determine the target parameters of the third threshold voltage offset rate of each target MOSFET, and obtain the equivalent lifetime of each target MOSFET under the preset test conditions; Based on the target parameters and the equivalent lifetime, the lifetime assessment results of the preset number of target MOSFETs are determined.

6. The method according to claim 5, characterized in that, The determination of the lifetime assessment results for the preset number of target MOSFETs based on the target parameters and the equivalent lifetime includes: If the target parameter is less than the third preset threshold voltage offset rate and the equivalent lifetime is not less than the expected lifetime, the lifetime assessment result is determined to meet the expected lifetime. If the target parameter is not less than the third preset threshold voltage offset rate, and / or the equivalent lifetime is less than the expected lifetime, the lifetime assessment result is determined to be that the expected lifetime is not met.

7. The method according to claim 6, characterized in that, The method further includes: If the life assessment result does not meet the expected life, the method for determining the defect detection voltage is returned to be executed, and a new defect detection voltage is determined until the life assessment result determined based on the most recently determined new defect detection voltage meets the expected life, and the defect detection voltage is updated using the most recently determined new defect detection voltage.

8. The method according to any one of claims 1-3, characterized in that, The method further includes: Obtain the correspondence between the gate-source voltage and the gate leakage current of the MOSFET sample; The target data point is determined based on the correspondence and the preset leakage current threshold; the gate leakage current corresponding to the target data point is less than the preset leakage current threshold, and the current difference between the gate leakage current corresponding to the target data point and the gate leakage current corresponding to the previous data point is greater than the preset current value. The tunneling voltage is determined based on the gate-source voltage in the target data point.

9. A defect detection device, characterized in that, The device includes: The first acquisition module is used to acquire the first threshold voltage of the metal-oxide-semiconductor transistor (MOSFET) under test. The second acquisition module is used to acquire a second threshold voltage of the MOSFET under test when the duration of the target gate-source voltage applied to the gate-source of the MOSFET under test is a first preset duration; the target gate-source voltage is the voltage applied after acquiring the first threshold voltage when the drain-source voltage of the MOSFET under test is not greater than a preset voltage, and the target gate-source voltage is used to excite defects in the gate oxide layer of the MOSFET under test. The first determining module is used to determine the defect detection result of the gate oxide layer of the MOSFET under test based on the difference between the first threshold voltage and the second threshold voltage. Wherein, the target gate-source voltage is not less than the defect detection voltage and is less than the breakdown voltage of the MOSFET under test. The defect detection voltage is determined based on a first threshold voltage sample obtained when the application time of the gate-source voltage sample applied to the gate and source of the MOSFET sample is a second preset time. Wherein, the gate-source voltage sample is the voltage applied when the drain-source voltage of the MOSFET sample is not greater than the preset voltage. The gate-source voltage sample is not less than the tunneling voltage of the MOSFET sample and is less than the breakdown voltage of the MOSFET sample. The number of MOSFET samples is multiple, and the device further includes: The third acquisition module is used to acquire a second threshold voltage sample of the MOSFET sample before applying the gate-source voltage sample to the gate-source of the MOSFET sample; The second determining module is used to determine, for each MOSFET sample, a first threshold voltage offset rate of the MOSFET sample based on a first threshold voltage sample and a second threshold voltage sample of the MOSFET sample; and to determine the defect detection voltage based on the first threshold voltage offset rate of each MOSFET sample and the gate-source voltage sample corresponding to each first threshold voltage offset rate.

10. A defect detection device, comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 8.

11. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 8.

12. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 8.

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