Feedforward circuitry and method for regulating voltage using alternating current coupling

Abstract

The invention provides a feed-forward circuitry (1) for regulating a voltage, comprising: a voltage regulator (12) for generating a regulated voltage; a bias generator (14) operably connected to the voltage regulator (12) for generating a sub-threshold gate bias; a plurality of coupling capacitors (16), at least one of the plurality of coupling capacitors (16) being operably connected to the bias generator; and a feed-forward amplifier (18) operably coupled with at least one of the plurality of coupling capacitors, characterized in that the plurality of coupling capacitors (16) are configured to be AC coupled with an output of the CMOS logic gate. The invention also discloses a method for regulating the voltage in the feed-forward circuitry (1) by AC coupling.

Description

Technical Field

[0001] This invention relates to feedforward circuit systems used in voltage regulators. In particular, the invention provides a zero-delay feedforward circuit by directly transmitting the input signal to the feedforward amplifier via AC coupling. Background Technology

[0002] Voltage regulation is a crucial aspect of electrical and electronic circuit design, providing exceptionally stable power levels in sensitive electronic devices or components. Its primary function is to ensure that circuits receive a stable supply voltage, unaffected by fluctuations in the input source or changes in load conditions. This stability is essential for the proper functioning of electronic components, preventing damage from overvoltage or undervoltage. Voltage regulation is widely recognized across industries, from consumer electronics to industrial automation and communications. With continuous technological advancements, the need for efficient and precise voltage regulation solutions remains indispensable, driving ongoing innovation in this field.

[0003] Feedforward circuitry in voltage regulation also plays a role in improving response time and efficiency. By utilizing AC coupling, the need for complex level-shifting techniques and independent control logic is reduced, thereby simplifying circuit design and reducing latency. This innovation enables voltage regulators to quickly adapt to changes in current demand, thus improving their effectiveness in dynamic circuit environments.

[0004] Voltage regulation has traditionally been employed in various ways, including using charge pumps or switched capacitors. These methods draw current input or output from a regulated voltage rail, depending on the circuit function. However, a drawback of these methods is that connecting a charge pump or switched capacitor requires converting the input signal level to an unregulated voltage rail, which includes circuitry necessary to accommodate additional area, power, complexity, and delay for these components.

[0005] Many breakthroughs have been made in overcoming the limitations of traditional voltage regulation techniques. For example, techniques using switching detectors have been developed. These detectors are used to detect activity in the input signal and then perform level shifting to control a feedforward amplifier. The feedforward amplifier then regulates the current from or flowing into the regulated voltage rail based on the output of the switching detector. However, this approach also faces challenges, particularly due to the random patterns formed by multiple unique switching pulses resulting from the limitations of the switching detectors.

[0006] An example of a voltage regulator with feedforward circuitry is US10185339B2, which discloses a voltage regulator with power supply noise feedforward cancellation that utilizes a process tracking circuit and a tracking capacitor. The tracking capacitor is coupled to the process tracking circuit, generating an injection voltage proportional to the voltage. The Ahuja compensated regulator utilizes this process to generate the regulated voltage.

[0007] Another example is KR102596255B1, which discloses mitigating supply voltage noise using a capacitive feedforward ripple cancellation circuit. This voltage regulator includes a capacitive feedforward ripple cancellation circuit that includes a transmission unit designed to convert the input voltage from the input to the output voltage in response to a control signal. Furthermore, the task of the capacitive feedforward ripple cancellation unit is to generate the control signal by eliminating ripple in the input voltage using a reference voltage and a comparison signal.

[0008] Another example is CN117452998A, which discloses a PMOS power transistor LDO circuit with feedforward zero-point stability compensation, primarily for stability rather than relying on the parasitic equivalent series resistance of the capacitor. It generates a zero in the mid-frequency band at mid-to-high frequencies through a feedforward circuit, which compensates for the phase roll-off caused by the LDO poles.

[0009] As mentioned above, various feedforward circuits have been developed in voltage regulator systems. However, none of the prior art discloses a system that regulates the supply voltage and ground voltage by operating in dual modes, nor does it describe in detail a stability guarantee mechanism formed by compensating for current caused by sudden switching activities. Summary of the Invention

[0010] This invention relates to feedforward circuit systems used in voltage regulators. In particular, the invention provides a zero-delay feedforward circuit by directly transmitting the input signal to the feedforward amplifier via AC coupling.

[0011] One aspect of the present invention provides a feedforward circuit system for regulating voltage, comprising a voltage regulator for generating a regulated voltage; a bias generator operatively connected to the voltage regulator for generating a subthreshold gate bias; a plurality of coupling capacitors, at least one of which is operatively connected to the bias generator; and a feedforward amplifier operatively coupled to at least one of the plurality of coupling capacitors; characterized in that the plurality of coupling capacitors are configured to AC couple with the output of a CMOS logic gate; wherein the output conversion of the CMOS logic gate is driven by a plurality of data signals on the gate bias of the feedforward amplifier; wherein the feedforward amplifier acts on the voltage difference between the gate bias of the feedforward amplifier and the subthreshold gate bias of the bias generator for current injection or current release.

[0012] Another aspect of the invention provides a plurality of coupling capacitors, including at least one main coupling capacitor and at least one programmable capacitor configured to cover process-voltage-temperature variations.

[0013] Another aspect of the invention provides a feedforward amplifier comprising at least one NMOS or PMOS in a common-drain amplifier configuration, and a resistor.

[0014] Another aspect of the invention provides a bias generator comprising a resistor, a diode-connected NMOS or PMOS, and a capacitor.

[0015] Another aspect of the present invention provides a method for regulating voltage in a feedforward circuit system via AC coupling, the method comprising the steps of: regulating voltage based on an input reference voltage from a bandgap reference or a resistive ladder circuit; generating a subthreshold gate bias by a bias generator; characterized in that, based on multiple data signals, the output of a CMOS logic gate is AC-coupled to the gate bias of a feedforward amplifier via multiple coupling capacitors; wherein the feedforward amplifier acts on the voltage difference between the gate bias of the feedforward amplifier and the subthreshold gate bias of the bias generator for current injection or current discharge.

[0016] Another aspect of the invention provides a method for regulating a supply voltage, comprising the steps of: regulating the supply voltage according to an input reference voltage from a bandgap reference or a resistive ladder circuit; generating a subthreshold gate bias by a bias generator; identifying a voltage difference between a gate bias of a feedforward amplifier and a subthreshold gate bias of the bias generator; wherein when the voltage level of the gate bias is equal to the subthreshold gate bias that causes a static data signal, the feedforward amplifier is turned off; wherein when the voltage level of the gate bias is higher than the subthreshold gate bias that causes a switching data signal, AC coupling is performed to the output of a CMOS logic gate through a plurality of coupling capacitors, and current from a positive supply voltage connection is injected into the regulated supply voltage through the feedforward amplifier.

[0017] Another aspect of the invention is that a method for regulating a ground voltage includes the following steps: regulating the ground voltage according to an input reference voltage from a bandgap or resistive ladder circuit; generating a subthreshold gate bias by a bias generator; identifying the voltage difference between the gate bias of a feedforward amplifier and the subthreshold gate bias of the bias generator; wherein when the voltage level of the gate bias is equal to the subthreshold gate bias that causes a static data signal, the feedforward amplifier is turned off; wherein when the voltage level of the gate bias is lower than the subthreshold gate bias that causes a switching data signal, AC coupling is performed to the output of a CMOS logic gate through a plurality of coupling capacitors, and the feedforward amplifier absorbs current from regulating the ground voltage to the ground supply voltage connection.

[0018] Another aspect of the invention provides that the output switching of a CMOS logic gate is controlled by at least one programmable capacitor driven by a NAND gate having a high-level active enable.

[0019] Another aspect of the invention provides that the output switching of a CMOS logic gate is controlled by at least one programmable capacitor driven by a NOR gate having a low-level active enable.

[0020] The present invention comprises a combination of features and a plurality of parts fully described and illustrated in the accompanying drawings. It should be understood that various changes to the details may be made without departing from the scope of the invention or sacrificing any advantages thereof. Attached Figure Description

[0021] To further clarify various aspects of some embodiments of the present invention, the invention will be described in more detail with reference to specific embodiments illustrated in the accompanying drawings. It should be understood that these drawings depict only typical embodiments of the invention and should not be considered as limiting its scope. The invention will be described and explained with reference to the accompanying drawings, in which:

[0022] Figure 1A block diagram of a feedforward circuit system for adjusting the supply voltage according to an embodiment of the present invention is shown;

[0023] Figure 2 The data signal is described in multiple waveforms, including static and switching waveforms, as well as current injection when the supply voltage is adjusted.

[0024] Figure 3 A block diagram of a feedforward circuit system in the form of adjusting ground voltage according to an embodiment of the present invention is shown; and

[0025] Figure 4 It describes multiple waveforms of the data signal, including static and switched waveforms, as well as the current release when adjusting the ground voltage. Detailed Implementation

[0026] Although the invention has been described herein by way of example using embodiments and illustrative drawings, those skilled in the art will recognize that the invention is not limited to the embodiments described in one or more of the drawings, and is not intended to represent proportions of various elements. Furthermore, for ease of illustration, some elements that may form part of the invention may not be shown in some figures, and such omissions do not in any way limit the embodiments outlined. It should be understood that the drawings and their detailed description are not intended to limit the invention to the specific forms disclosed, but rather, the invention is intended to cover all modifications, equivalents, and substitutions falling within the scope of the invention as defined by the appended claims. As used throughout the specification, the word “may” indicates an optional meaning (i.e., possible) rather than a mandatory meaning (i.e., must). Furthermore, unless otherwise stated, the word “a” means “at least one,” and the word “a plurality” means “one or more.” Moreover, the terminology and wording used herein are for descriptive purposes only and should not be construed as limiting the scope. Language such as “comprising,” “including,” “having,” “including,” or “involving,” and variations thereof, is intended to be broad and encompass the subjects, equivalents, and additional subjects not listed thereafter, and is not intended to exclude other additions, elements, integrals, or steps. Similarly, for applicable legal purposes, the term "comprising" is considered synonymous with the terms "including" or "containing". Any discussion of documents, actions, materials, equipment, articles, etc., is included in the specification only to provide context for the invention. No implication or representation is made that any or all of these matters constitute part of the prior art or common general knowledge in the field related to this invention.

[0027] In this disclosure, whenever a composition, element, or group of elements is preceded by the transitional phrase “comprising”, it should be understood that we also contemplate the same composition, element, or group of elements preceded by the transitional phrases “composed of,” “formed by,” “selected from,” “comprising,” or “is,” and vice versa.

[0028] The invention is described below by way of various embodiments. However, the invention can be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided to make this disclosure thorough and complete, and to fully convey the scope of the invention to those skilled in the art. In the following detailed description, numerical values ​​and ranges are provided for various aspects of the described embodiments. These values ​​and ranges are considered merely examples and are not intended to limit the scope of the claims. Furthermore, several materials have been identified as applicable to various aspects of these embodiments. These materials are considered exemplary and are not intended to limit the scope of the invention.

[0029] This invention relates to a feedforward circuit system (1) used in voltage regulators. In particular, the invention provides a zero-delay feedforward circuit by transmitting the input signal to the feedforward amplifier in an AC-coupling manner.

[0030] refer to Figure 1 and 4 The invention will now be described in more detail. These figures illustrate exemplary block diagrams and multiple waveforms, respectively, in the form of regulating the supply voltage and regulating the ground voltage. Those skilled in the art will understand that in practical implementations, the block diagrams are not limited to the form of voltage regulation; they can be very complex, and the circuitry can inject or release current from the regulated voltage rail based on switching modes.

[0031] The feedforward circuit system (1) of the present invention includes a voltage regulator (12), a bias generator (14), a plurality of coupling capacitors (16), and a feedforward amplifier. The voltage regulator (12) generates a regulating voltage, the bias generator (14) is operatively connected to the voltage regulator (12) to generate a subthreshold gate bias, at least one of the plurality of coupling capacitors (16) is operatively connected to the subthreshold gate bias, and the feedforward amplifier is operatively coupled to at least one of the plurality of coupling capacitors. The plurality of coupling capacitors (16) are configured to AC couple with the output of a CMOS logic gate, wherein the output of the CMOS logic gate is driven by a data signal DIN to the gate bias of the feedforward amplifier (18), wherein the feedforward amplifier (18) acts on the voltage difference between the gate bias of the feedforward amplifier (18) and the subthreshold gate bias of the bias generator (14) for current injection or current release.

[0032] Figure 1 This is a block diagram of a feedforward circuit in the form of a regulated supply voltage. A voltage regulator (12) generates a regulated supply voltage VDD_REG based on an input reference voltage. Then, a bias generator (14) generates a subthreshold gate bias nbias to the feedforward amplifier (18). Next, a coupling capacitor AC-couples the output of a CMOS logic gate driven by the data signal DIN to the gate bias of the feedforward amplifier (18). Finally, the feedforward amplifier (18) injects current from VDD into the regulated supply voltage VDD_REG based on the activity of the data signal DIN.

[0033] According to an embodiment of the present invention, the voltage regulator (12) generates a regulated supply voltage, and the input reference voltage may come from a bandgap reference or a resistive ladder circuit.

[0034] According to one embodiment of the invention, a bias generator (14) generates a subthreshold gate bias nbias to a feedforward amplifier (18), and a high-resistance resistor R100, along with a diode-connected large-size NMOS MN100, is used to obtain a bias slightly below VDD_REG+VtMN0. VtMN0 is the threshold voltage of MN0 in the feedforward amplifier (18). Alternatively, the diode-connected large-size NMOS can be replaced with a diode. Furthermore, a large capacitor C100 is connected to nbias to stabilize its voltage level. Optionally, a unity-gain buffer can also be integrated on nbias for the same purpose.

[0035] According to embodiments of the present invention and with reference to Figure 1 The coupling capacitors AC couple the outputs of multiple CMOS logic gates, with capacitor C0 acting as the main coupling capacitor. Its dimensions are designed to meet the minimum capacitance requirements under all process-voltage-temperature (PVT) conditions. Conversely, programmable capacitor C1 allows for precise adjustment to accommodate variations in PVT. Each element in the array of programmable capacitors C1 is controlled by a NAND gate ND0, characterized by a high-level active enable signal EN. The NAND gate is chosen thoughtfully because its output remains high when disabled, thus minimizing the voltage difference between the multiple disabled C1 capacitors. This is crucial for reducing the effective parasitic capacitance on the gate bias of the feedforward amplifier (18). C0 and C1 capacitors can be implemented using metal-oxide-metal, MOM, MOS, or a hybrid combination of MOM and MOS capacitors.

[0036] According to an embodiment of the invention, a feedforward amplifier (18) injects current into the regulated supply voltage. The feedforward amplifier (18) includes an NMOS MN0 in a common-drain amplifier configuration and a high-resistance resistor R0 to generate a weak DC gate bias nbias_int for MN0. Due to this weak DC bias and extremely small parasitic net capacitance, the output switching of a CMOS logic gate driven by the data signal DIN can be seamlessly AC-coupled to nbias_int via a coupling capacitor.

[0037] Figure 3 This is a block diagram of a feedforward circuit in the form of an regulated ground voltage. A voltage regulator (12) generates an regulated ground voltage VSS_REG based on an input reference voltage. Then, a bias generator (14) generates a subthreshold gate bias pbias to the feedforward amplifier (18). Next, a coupling capacitor AC-couples the output of a CMOS logic gate driven by the data signal DIN to the gate bias of the feedforward amplifier (18). Finally, the feedforward amplifier (18) draws current from the regulated ground voltage VSS_REG to VSS based on the activity of the data signal DIN.

[0038] According to an embodiment of the present invention, the voltage regulator (12) generates a regulated ground voltage, and the input reference voltage may come from a bandgap reference or a resistive ladder circuit.

[0039] According to one embodiment of the invention, a bias generator (14) generates a subthreshold gate bias pbias to a feedforward amplifier (18), and a high-resistance resistor R100, along with a diode-connected large-size PMOS MP100, is used to obtain a bias slightly below VSS_REG+VtMP0. VtMP0 is the threshold voltage of MP0 in the feedforward amplifier (18). Alternatively, the diode-connected large-size NMOS can be replaced with a diode. Furthermore, a large capacitor C100 is connected to the pbias to stabilize its voltage level. Optionally, a unity-gain buffer can also be integrated on the pbias for the same purpose.

[0040] According to one embodiment of the invention, where coupling capacitors AC couple the output conversion of multiple CMOS logic gates, capacitor C0 serves as the main coupling capacitor, its dimensions designed to meet the minimum capacitance requirements under all process-voltage-temperature (PVT) conditions. Conversely, programmable capacitor C1 allows for precise adjustment to accommodate variations in PVT. Each element in the array of multiple programmable capacitors C1 is controlled by a NOR gate NR0, characterized by a low-level active enable signal ENB. The NOR gate is chosen thoughtfully because its output remains low when disabled, thereby minimizing the voltage difference between the multiple disabled C1 capacitors. This is crucial for reducing the effective parasitic capacitance on the gate bias of the feedforward amplifier (18). C0 and C1 capacitors can be implemented using metal-oxide-metal, MOM capacitors, MOS capacitors, or a hybrid combination of MOM and MOS capacitors.

[0041] According to one embodiment of the invention, the feedforward amplifier (18) draws current from the regulated ground voltage. The feedforward amplifier (18) includes a PMOS MP0 in a common-drain amplifier configuration and a high-resistance resistor R0 to generate a weak DC gate bias pbias_int for MP0. Due to this weak DC bias and extremely small parasitic net capacitance, the output switching of the CMOS logic gate driven by the data signal DIN can be seamlessly AC-coupled to pbias_int via a coupling capacitor.

[0042] The present invention also discloses a method for regulating the voltage in a feedforward circuit system (1) via AC coupling. The voltage includes a supply voltage and a ground voltage, wherein AC coupling occurs during data switching, in which current is injected to regulate the supply voltage and current is absorbed from the ground voltage to regulate the ground voltage.

[0043] In the following text, reference will be made to Figure 2 and Figure 4 An example of the invention is provided for more detailed explanation. From this example, the advantages of the invention can be more readily understood and put into practice. However, it should be understood that the following example is not intended to limit the scope of the invention in any way.

[0044] Example

[0045] Figure 2Several signal waveforms in the form of regulating the supply voltage are described. These signal waveforms describe that when DIN remains static, the feedforward amplifier (18) is turned off because the DC gate bias nbias_int is equal to the subthreshold gate bias nbias voltage level. However, when DIN switches, the CMOS logic gate driven by DIN AC-couples nbias_int. Therefore, whenever nbias_int is higher than the nbias voltage level, the feedforward amplifier (18) is turned on, injecting current into VDD_REG. Through proper sizing and calibration of the coupling capacitors, the current injected into VDD_REG by the feedforward amplifier (18) cancels the current obtained from VDD_REG by the load circuit. This results in a stable VDD_REG being obtained even in the event of sudden switching activity.

[0046] Figure 4 Several signal waveforms in the form of regulating the ground voltage are described. These signal waveforms describe that when DIN remains static, the feedforward amplifier (18) is turned off because the DC gate bias pbias_int is equal to the subthreshold gate bias pbias voltage level. However, when DIN switches, the CMOS logic gate driven by DIN AC-couples pbias_int. Therefore, whenever pbias_int is below the pbias voltage level, the feedforward amplifier (18) is turned on, drawing current from VSS_REG. Through proper sizing and calibration of the coupling capacitor, the current drawn from VSS_REG by the feedforward amplifier (18) cancels the current injected into VSS_REG by the load circuit. This results in a stable VSS_REG even under sudden switching activity.

[0047] Various modifications to these embodiments will be apparent to those skilled in the art from the specification and accompanying drawings. The principles associated with the various embodiments described herein can be applied to other embodiments. Therefore, this description is not intended to be limited to the embodiments described herein. Figure 1 The embodiments shown are intended to provide the broadest scope consistent with the principles and novel and inventive features disclosed or suggested herein. Therefore, the invention is intended to reserve all other such alternatives, modifications, and variations that fall within the scope of the invention and the appended claims.

Claims

1. A feedforward circuit system (1) for regulating voltage, comprising: Voltage regulator (12) is used to generate a regulating voltage; A bias generator (14), operatively connected to the voltage regulator (12), is used to generate a subthreshold gate bias; A plurality of coupling capacitors (16), at least one of which is operatively connected to the bias generator (14); as well as The feedforward amplifier (18) is operatively coupled to at least one of the plurality of coupling capacitors; The plurality of coupling capacitors (16) are characterized in that they are configured to AC couple with the output of a CMOS logic gate; The output conversion of the CMOS logic gate is driven by multiple data signals on the gate bias of the feedforward amplifier (18); The feedforward amplifier (18) acts on the voltage difference between the gate bias of the feedforward amplifier (18) and the subthreshold gate bias of the bias generator (14) for current injection or current release.

2. The feedforward circuit system (1) according to claim 1, wherein, The plurality of coupling capacitors (16) include at least one main coupling capacitor and at least one programmable capacitor, the at least one programmable capacitor being configured to cover process-voltage-temperature variations.

3. The feedforward circuit system (1) according to claim 1, wherein the feedforward amplifier (18) comprises at least one NMOS or PMOS in a common-drain amplifier configuration, and a high-resistance resistor.

4. The feedforward circuit system (1) according to claim 1, wherein the bias generator (14) comprises a high-resistance resistor, a diode-connected NMOS or PMOS, and a capacitor.

5. A method for regulating the voltage in a feedforward circuit system (1) via AC coupling, the method comprising the steps of: The voltage is regulated based on the input reference voltage from a bandgap reference or a resistive ladder circuit; A subthreshold gate bias is generated by the bias generator (14); Its features Based on multiple data signals, the output of the CMOS logic gate is converted and AC coupled to the gate bias of the feedforward amplifier (18) through multiple coupling capacitors (16); The feedforward amplifier (18) acts on the voltage difference between the gate bias of the feedforward amplifier (18) and the subthreshold gate bias of the bias generator (14) for current injection or current release.

6. The method of claim 5, wherein the method for adjusting the supply voltage comprises the following steps: The supply voltage is adjusted based on the input reference voltage from a bandgap reference or a resistive ladder circuit; A subthreshold gate bias is generated by the bias generator (14); Identify the voltage difference between the gate bias of the feedforward amplifier (18) and the subthreshold gate bias of the bias generator (14); When the voltage level of the gate bias is equal to the subthreshold gate bias that causes the static data signal, the feedforward amplifier (18) is turned off. When the voltage level of the gate bias is higher than the subthreshold gate bias that causes the data switching signal, the output of the CMOS logic gate is AC coupled through multiple coupling capacitors (16), and current is injected from the positive supply voltage connection into the regulated supply voltage through the feedforward amplifier (18).

7. The method of claim 5, wherein the method for adjusting the ground voltage comprises the following steps: The ground voltage is adjusted according to the input reference voltage from the bandgap reference or the resistive ladder circuit; A subthreshold gate bias is generated by the bias generator (14); Identify the voltage difference between the gate bias of the feedforward amplifier (18) and the subthreshold gate bias of the bias generator (14); When the voltage level of the gate bias is equal to the subthreshold gate bias that causes the static data signal, the feedforward amplifier (18) is turned off. When the voltage level of the gate bias is lower than the subthreshold gate bias that causes the data switching signal, the output of the CMOS logic gate is AC coupled through multiple coupling capacitors (16) and the current from the regulated ground voltage is absorbed by the feedforward amplifier (18) to the ground supply voltage connection.

8. The method of claim 6, wherein the output conversion of the AC-coupled CMOS logic gate is controlled by at least one programmable capacitor, the programmable capacitor being driven by a NAND gate having a high-level active enable.

9. The method of claim 7, wherein the output conversion of the AC-coupled CMOS logic gate is controlled by at least one programmable capacitor, the programmable capacitor being driven by a NOR gate having a low-level active enable.

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