Development platform and method based on audio DSP chip algorithm
By using a development platform based on audio DSP chips and building algorithm logic files through a graphical interface, the internal running program of the chip can be directly generated. This solves the problems of low efficiency, high cost and difficulty in ensuring real-time performance in existing audio DSP chip algorithm development, and realizes efficient and low-cost audio algorithm deployment and optimization.
Patent Information
- Application Number
- CN202511657968.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-13
- Publication Date
- 2026-02-10
AI Technical Summary
Existing audio DSP chip algorithm development suffers from problems such as low efficiency, high cost, difficulty in ensuring real-time performance, and a prominent contradiction between resource constraints and performance requirements. In particular, in mobile devices and portable audio devices, traditional development methods are time-consuming, labor-intensive, and prone to introducing errors.
The development platform based on the audio DSP chip is adopted, including UI tools, algorithm library and DSP framework. The algorithm logic file is built through the graphical interface and the internal running program of the chip is generated directly, which simplifies the process of algorithm porting and optimization and reduces the dependence on algorithm engineers.
It improves development efficiency, reduces costs, simplifies the development process, ensures real-time performance and audio fidelity, and adapts to the efficient deployment of complex audio algorithms.
Smart Images
Figure CN121501262A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of chip technology and relates to chip development technology, specifically to a development platform and method based on audio DSP chip algorithms. Background Technology
[0002] Audio digital signal processors (DSPs), as specialized microprocessors designed for real-time audio signal processing, have been widely used in consumer electronics, communications, automotive electronics, and professional audio equipment. With the rapid development of high-resolution audio, spatial audio, and intelligent audio devices, the complexity of modern audio processing algorithms is increasing exponentially, placing higher demands on the algorithm development platforms and methods for audio DSP chips. The core challenge in developing audio DSP chip algorithms lies in how to efficiently deploy and optimize complex audio algorithms within limited resource constraints (such as processor computing power, storage space, and power consumption budget), while ensuring real-time performance and sound fidelity.
[0003] In the field of audio DSP chip algorithm development, traditional development methods typically face multiple technical bottlenecks. First, there is a significant efficiency gap in the conversion process from algorithm simulation to embedded implementation—algorithm engineers usually design and verify algorithms in advanced simulation environments such as MATLAB, while embedded development engineers need to manually convert these algorithms into C or assembly code that can run efficiently on specific DSP architectures. This process is not only time-consuming and labor-intensive but also prone to introducing errors, reducing development efficiency. Second, with the increasing complexity of audio algorithms (such as high-resolution audio processing, multi-channel surround sound, and AI-powered audio enhancement), ensuring real-time performance becomes a huge challenge. Complex audio algorithms require a large number of multiply-accumulate operations and fast Fourier transforms, which places extremely high demands on the parallel processing capabilities and memory bandwidth of DSP chips.
[0004] Furthermore, balancing resource constraints with performance requirements remains a challenge, especially in mobile devices and battery-powered portable audio devices, where power consumption constraints severely limit available computing resources, while consumer expectations for audio quality and feature richness continue to rise, creating a clear technological contradiction.
[0005] To address the needs of audio DSP chip algorithm development, the industry currently primarily uses a general simulation-based porting development solution. The core idea is to complete algorithm design and simulation on a general-purpose computing platform, and then port it to the target audio DSP chip. Algorithm simulation tools include general-purpose software such as MATLAB and Python (NumPy / SciPy libraries) for building audio algorithm models (e.g., spectral subtraction noise reduction, short-time Fourier transform analysis), with real-time display and effect evaluation of time-domain / frequency-domain waveforms. Format conversion tools are used to convert the floating-point algorithm model in the simulation environment into C language code. The target DSP chip's original compiler and debugger are then used to complete the cross-compilation, burning, and verification of the code.
[0006] A specific process of the existing technology using a general simulation porting development scheme is as follows: Figure 2 As shown, the main disadvantages are as follows: 1. Algorithm engineers convert algorithm models into C language usable on the corresponding DSP platform. This usually requires paying a considerable fee to companies using third-party tools, or it requires independent algorithm engineering engineers, resulting in very high development costs. 2. Fragmented development process: Simulation, conversion, porting, and testing are done with separate tools, and data cannot flow seamlessly. For example, frequency domain analysis results in MATLAB cannot be directly used for DSP debugging and need to be manually recorded and compared. 3. Difficulty in ensuring real-time performance: The simulation environment does not take into account the resource constraints of the target chip. After porting the designed high-complexity algorithm, real-time performance often fails to meet the requirements, requiring repeated rollbacks and modifications. 4. The performance of the algorithm on the target DSP cannot be predicted during the simulation stage. It can only be optimized through iterative cycles of "porting-testing-modification", which is inefficient. Summary of the Invention
[0007] To address the technical shortcomings of existing technologies and to provide a low-code development solution based on conventional audio DSP development algorithms, this invention discloses a development platform and method based on audio DSP chip algorithms.
[0008] The development platform based on audio DSP chip algorithms described in this invention includes a UI tool, an algorithm library and a DSP framework set within the DSP chip. The UI tool includes a basic algorithm module, a graphical algorithm building module, an algorithm flowchart conversion configuration file module, and an algorithm file transfer module. The basic algorithm module stores various basic algorithms. The graphical algorithm building module allows developers to combine basic algorithms visually through a graphical interface to generate algorithm logic files for the developed algorithms. The algorithm flowchart conversion configuration file module converts the algorithm logic files into internal programs that can be recognized and run by the DSP chip, and then identifies and transfers them to the DSP chip through the algorithm file transfer module. The algorithm library includes a basic algorithm library, an algorithm flowchart configuration file parsing module for parsing the internal program of the chip, and an audio stream algorithm execution module for executing the program. The DSP framework includes a driver module and an audio stream algorithm logic framework.
[0009] Preferably, the UI tool is installed on a PC, and the algorithm file transfer module is connected to the algorithm flowchart configuration file parsing module via the PC's serial port.
[0010] Preferably, the DSP chip has internal flash memory.
[0011] Preferably, the UI tool further includes a communication module for controlling the data interaction between the UI tool and the DSP chip.
[0012] A development method based on an audio DSP chip algorithm, utilizing the aforementioned development platform, includes the following steps: Step 1. Set up the basic algorithm module so that the basic algorithm library generates all the basic algorithms corresponding to the basic algorithm library inside the DSP chip, and generates an icon for each basic algorithm that can be called by the graphical algorithm building module; Step 2. Use a UI tool to generate the internal program for DSP chip development, specifically: Step 2.1 On the UI tool running on the PC, use the graphical algorithm building module to call the basic algorithm module, draw the algorithm logic diagram, and generate the algorithm logic file corresponding to the algorithm logic diagram. Step 2.2: Convert the algorithm logic file into an internal program that can be recognized and run by the DSP chip through the algorithm flowchart conversion configuration file module; Step 2.3: The internal program of the chip is transferred to the DSP chip through the algorithm file transfer module; Step 3. DSP chip operating steps: Step 3.1 Receive the chip's internal program via the serial port connected to the UI tool; Step 3.2 Analyze the chip's internal running program. Based on the logic in the chip's internal running program, call the basic algorithm library in the algorithm library, and the built algorithm is executed by the audio stream algorithm execution module. Step 3.3: Process the input audio stream using an algorithm and output the processed audio stream.
[0013] Preferably, step 1 specifically includes: Step 1.1 Algorithm engineers build the basic algorithm model; Step 1.2: Convert the basic algorithm model into C language code; Step 1.3: Compile the C language code using a compiler. After compilation, store the code in the basic algorithm module and generate an icon for each basic algorithm that can be called by the graphical algorithm building module.
[0014] Preferably, in step 1.1, the basic algorithm model is built using Matlab or Python.
[0015] Compared to existing technologies, this invention eliminates the need for traditional algorithm engineers to write and compile algorithm code for different DSP chips, even after the basic algorithm module is built and not updated. Chip developers can independently complete chip function development and verification without the need for algorithm engineers to update and cooperate, thus reducing development costs and improving development efficiency. Attached Figure Description
[0016] Figure 1 This is a schematic diagram illustrating a specific implementation of the development platform based on audio DSP chip algorithms described in this invention. Figure 2 This is a schematic diagram illustrating a specific implementation of the development method based on audio DSP chip algorithms described in this invention. Detailed Implementation
[0017] The specific embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.
[0018] This invention is mainly applied to the development of DSP chips, such as... Figure 1 As shown, the development platform based on audio DSP chip algorithms described in this invention includes a UI (user interface) tool, an algorithm library, and a DSP framework. The UI tool is generally installed on a PC and connected to the DSP chip via a serial port. The DSP chip contains the DSP framework and algorithm library.
[0019] The UI tool includes a basic algorithm module, a graphical algorithm building module, an algorithm flowchart conversion configuration file module, and an algorithm file transfer module. The basic algorithm module stores various basic algorithms. The graphical algorithm building module allows developers to combine basic algorithms visually on a graphical interface to generate algorithm logic files for the developed algorithms. The algorithm flowchart conversion configuration file module converts the algorithm logic files into internal programs that can be recognized and run by the DSP chip, and then identifies and transfers them to the DSP chip through the algorithm file transfer module. The algorithm library includes a basic algorithm library, an algorithm flowchart configuration file parsing module for parsing the internal program of the chip, and an audio stream algorithm execution module for executing the program; the DSP framework includes a driver module and an audio stream algorithm logic framework.
[0020] In this invention, a specific implementation of the UI tool is as follows: Figure 2 As shown, it includes a communication module, a basic algorithm module, a graphical algorithm building module, an algorithm flowchart to configuration file conversion module, and an algorithm file transfer module; The communication module allows users to interact with external systems. The basic algorithm module stores various fundamental algorithms, such as addition, subtraction, multiplication, division, iteration, and Fourier transform used in DSP development. It also stores the display symbols, port definitions, and algorithm definitions for these algorithms in the UI tools. Based on the basic algorithm settings that the DSP chip under development might use, the basic algorithm module includes all the fundamental algorithms required by the DSP chip itself during normal operation.
[0021] The graphical algorithm building module is a software module on the PC with a graphical interface, used by DSP developers to build algorithms. Through the graphical algorithm building module, DSP developers can directly call various algorithm symbols in the basic algorithm module, and combine basic algorithms in a visual manner on the graphical interface to generate algorithm logic files for the developed algorithms. The algorithm logic files can be built and modified on the PC using conventional operations such as keyboard and mouse, realizing the combination of different basic algorithms, and presented to developers in a graphical form.
[0022] The algorithm logic file generated by the graphical algorithm building module is a parameterized configuration file that can be directly recognized and run by the DSP chip without further language compilation. The algorithm flowchart to configuration file conversion module converts the algorithm logic file built by DSP developers through the graphical algorithm building module into an internal chip program that can be recognized and run by the DSP chip. The algorithm file transfer module then identifies and transfers the program to the DSP chip.
[0023] The DSP chip receives the internal running program via serial port. The program is written to a designated storage location in the DSP chip's internal flash memory. The algorithm flowchart configuration file parsing module parses the program and calls existing basic algorithm libraries. The basic algorithm library contains the actual running code of each basic algorithm inside the DSP chip. The internal running program sent by the UI tool is generated based on the algorithm logic file that calls the basic algorithms. After these basic algorithms are parsed by the algorithm flowchart configuration file parsing module, the specific code in the basic algorithm library is called, and the audio stream algorithm execution module performs the actual execution inside the DSP chip.
[0024] The basic algorithm library is generated based on the existing HIFI platform runtime library, which is also stored inside the DSP chip.
[0025] The DSP framework includes a chip driver module and an audio stream algorithm logic framework. The chip driver module generates DSP chip drive signals based on the chip's internal program. The audio stream algorithm logic framework is a built-in module of the DSP chip, used to execute the audio stream algorithm. Both the chip driver module and the audio stream algorithm logic framework are modules that are included with the DSP chip after its development is complete; this invention does not involve any specific modifications.
[0026] The DSP chip development method based on the above platform includes the following steps: Step 1. Set up the basic algorithm module; Step 1.1 Algorithm engineers use any computer language such as Matlab or Python to build basic algorithm models; Step 1.2: Convert the basic algorithm model into C language code; Step 1.3 Compile the C language code using a compiler. After compilation, store the code in the basic algorithm module and generate an icon for each basic algorithm that can be called by the graphical algorithm building module. By storing all the basic algorithms in the form of modules and generating icons in step 1, DSP developers no longer need to write and compile the basic algorithms. In subsequent software upgrades and updates, as long as the basic algorithms are not updated, the basic algorithm modules will not need to be updated, which reduces the development difficulty and shortens the development cycle.
[0027] Step 2. Use UI tools to generate the internal program for DSP chip development: Step 2.1 On the UI tool running on the PC, use the graphical algorithm building module to call the basic algorithm module, draw the algorithm logic diagram, and generate the algorithm logic file corresponding to the algorithm logic diagram. Step 2.2: Convert the algorithm logic file into an internal program that can be recognized and run by the DSP chip through the algorithm flowchart conversion configuration file module; Step 2.3: The internal program of the chip is transferred to the DSP chip through the algorithm file transfer module; In this step, DSP developers can directly call the basic algorithm module through the graphical algorithm building module and draw the algorithm logic block diagram. This significantly reduces the technical skill requirements for developers, and even those without DSP code development experience can generate algorithms for DSP chips without writing any code. The graphically displayed algorithm is easy to understand, modify, and update.
[0028] Step 3. DSP chip operating steps: Step 3.1 Receive the internal program of the chip through the serial port connected to the UI tool and write it to the specified address of the flash memory chip inside the DSP chip; Step 3.2 Analyze the chip's internal running program. Based on the logic in the chip's internal running program, call the basic algorithm library in the algorithm library, and the built algorithm is executed by the audio stream algorithm execution module. Step 3.3: Process the input audio stream using an algorithm and output the processed audio stream.
[0029] Developers perform performance testing and analysis on the input and output audio streams to develop and verify the functionality of the DSP chip.
[0030] When it is necessary to change the algorithm, if no new basic algorithm is added to the DSP chip, it is only necessary to draw or modify the new algorithm logic block diagram in step 2.1 and generate a new algorithm logic file to complete the algorithm improvement and upgrade in the DSP development process.
[0031] If a new basic algorithm is added to the DSP chip, then in step 1, the new basic algorithm needs to be compiled and stored in the basic algorithm module in the order of steps 1.1 to 1.3.
[0032] Compared to existing technologies, this invention eliminates the need for traditional algorithm engineers to write and compile algorithm code for different DSP chips, even after the basic algorithm module is built and not updated. Chip developers can independently complete chip function development and verification without the need for algorithm engineers to update and cooperate.
[0033] This invention utilizes a graphical interface for building and modifying algorithms, facilitating understanding and version management for developers, and simplifying algorithm updates. Visual building via a UI tool avoids the need for recompiling every time the algorithm is modified.
[0034] The foregoing descriptions are preferred embodiments of the present invention. Unless there is a clear contradiction between the preferred embodiments or a premise of a particular preferred embodiment, the preferred embodiments can be arbitrarily combined and used. The embodiments and specific parameters described are only for clearly illustrating the inventor's invention verification process and are not intended to limit the scope of patent protection of the present invention. The scope of patent protection of the present invention shall still be determined by its claims. Similarly, any equivalent structural changes made based on the description and drawings of the present invention shall also be included within the scope of protection of the present invention.
Claims
1. A development platform based on audio DSP chip algorithms, characterized in that, The system includes a UI tool, an algorithm library embedded in the DSP chip, and a DSP framework. The UI tool comprises a basic algorithm module, a graphical algorithm building module, an algorithm flowchart conversion configuration file module, and an algorithm file transfer module. The basic algorithm module stores various basic algorithms. The graphical algorithm building module allows developers to combine basic algorithms visually through a graphical interface, generating algorithm logic files for the developed algorithms. The algorithm flowchart conversion configuration file module converts the algorithm logic files into internal programs that can be recognized and run by the DSP chip, which are then recognized and transferred to the DSP chip via the algorithm file transfer module. The algorithm library includes a basic algorithm library, an algorithm flowchart configuration file parsing module for parsing the internal program of the chip, and an audio stream algorithm execution module for executing the program. The DSP framework includes a driver module and an audio stream algorithm logic framework.
2. The development platform based on audio DSP chip algorithms as described in claim 1, characterized in that, The UI tool is installed on the PC, and the algorithm file transfer module is connected to the algorithm flowchart configuration file parsing module through the PC's serial port.
3. The development platform based on audio DSP chip algorithms as described in claim 1, characterized in that, The DSP chip has internal flash memory.
4. The development platform based on audio DSP chip algorithms as described in claim 1, characterized in that, The UI tool also includes a communication module for controlling the data interaction between the UI tool and the DSP chip.
5. A development method based on an audio DSP chip algorithm, characterized in that, The development platform according to any one of claims 1 to 4 includes the following steps: Step 1. Set up the basic algorithm module so that the basic algorithm library generates all the basic algorithms corresponding to the basic algorithm library inside the DSP chip, and generates an icon for each basic algorithm that can be called by the graphical algorithm building module; Step 2. Use a UI tool to generate the internal program for DSP chip development, specifically: Step 2.1 On the UI tool running on the PC, use the graphical algorithm building module to call the basic algorithm module, draw the algorithm logic diagram, and generate the algorithm logic file corresponding to the algorithm logic diagram. Step 2.2: Convert the algorithm logic file into an internal program that can be recognized and run by the DSP chip through the algorithm flowchart conversion configuration file module; Step 2.3: The internal program of the chip is transferred to the DSP chip through the algorithm file transfer module; Step 3. DSP chip operating steps: Step 3.1 Receive the chip's internal program via the serial port connected to the UI tool; Step 3.2 Analyze the chip's internal running program. Based on the logic in the chip's internal running program, call the basic algorithm library in the algorithm library, and the built algorithm is executed by the audio stream algorithm execution module. Step 3.3: Process the input audio stream using an algorithm and output the processed audio stream.
6. The development method based on audio DSP chip algorithm as described in claim 5, characterized in that, Step 1 specifically includes: Step 1.1 Algorithm engineers build the basic algorithm model; Step 1.2: Convert the basic algorithm model into C language code; Step 1.3: Compile the C language code using a compiler. After compilation, store the code in the basic algorithm module and generate an icon for each basic algorithm that can be called by the graphical algorithm building module.
7. The development method based on audio DSP chip algorithm as described in claim 6, characterized in that, In step 1.1, a basic algorithm model is built using Matlab or Python.