A data access method, architecture, medium and product

Abstract

This disclosure provides a data access method, architecture, medium, and product. The data access method of this disclosure is applied to a NUMA architecture, which includes multiple request nodes and multiple consistency nodes. The multiple request nodes and multiple consistency nodes in the NUMA architecture are divided into multiple groups, each group including at least one request node and at least one consistency node. The method includes: a request node initiating an access request, the access request including a request address, and the request node being located in a first group; the request node determining a target consistency node based on the request address, wherein the target consistency node is a first-level consistency node or a second-level consistency node; the request node sending the access request to the target consistency node; and the target consistency node returning a request response to the request node, the request response including cached data of the request address.

Description

Technical Field

[0001] This disclosure relates to the field of communication technology, and in particular to a data access method, architecture, medium, and product. Background Technology

[0002] On-chip bus interconnect networks typically employ a three-level cache architecture: L1 cache, L2 cache, and L3 cache. This effectively reduces the interaction between the Central Processing Unit (CPU) and main memory, improving execution efficiency. In practical applications of multi-core systems, it is often necessary to group CPUs with different business types for management, allowing CPUs within a group to share a single L3 cache resource. However, a single routing mode cannot support flexible grouping, thus limiting the application of the chip system. Summary of the Invention

[0003] This disclosure provides a data access method, architecture, medium, and product.

[0004] In a first aspect, embodiments of this disclosure provide a data access method applied to a non-consistent memory access NUMA architecture. The NUMA architecture includes multiple request nodes and multiple consistent nodes. The multiple request nodes and multiple consistent nodes of the NUMA architecture are divided into multiple groups, each group including at least one request node and at least one consistent node, comprising:

[0005] The requesting node initiates an access request, which includes a request address, and the requesting node is located in the first group;

[0006] The requesting node determines the target consistency node based on the request address. The target consistency node is either a first-level consistency node or a second-level consistency node. The first-level consistency node is a consistency node used to manage cache consistency among requesting nodes within the first group, and the second-level consistency node is a consistency node used to manage global cache consistency of the NUMA architecture.

[0007] The requesting node sends an access request to the target consistency node;

[0008] The target consistency node returns a request response to the requesting node, and the request response includes cached data of the request address.

[0009] In one possible implementation, determining the target consistency node based on the requested address includes:

[0010] The primary consistency node and the secondary consistency node are determined based on the requested address;

[0011] If the first-level consistency node and the second-level consistency node are the same consistency node, then the second-level consistency node is determined as the target consistency node;

[0012] If the first-level consistency node and the second-level consistency node are different consistency nodes, the first-level consistency node is determined as the target consistency node.

[0013] In one possible implementation, determining the first-level consistency node based on the request address includes:

[0014] Based on the request address and the number of consistent nodes in the first group, determine the index value of the first-level consistent node in the first group;

[0015] The first-level consistency node is determined based on its index value in the first group.

[0016] In one possible implementation, determining the index value of the first-level consistency node in the first group based on the request address and the number of consistency nodes within the first group includes:

[0017] Obtain the hash attribute of the first group, which includes the number of consistent nodes in the first group, the hash algorithm used by the first group, and the base index of the consistent nodes in the first group in a preset consistent node lookup table.

[0018] Based on the number of consistent nodes in the first group and the hash algorithm used in the first group, a hash operation is performed on the request address to obtain the hash offset of the first-level consistent node in the first group;

[0019] The index value of the first-level consistent node in the first group is determined based on the base index of the consistent node in the preset consistent node lookup table within the first group and the hash offset of the first-level consistent node within the first group.

[0020] In one possible implementation, determining the first-level consistency node based on its index value in the first group includes:

[0021] In the preset mapping table, the target identifier corresponding to the index value of the first-level consistency node in the first group is found, and the consistency node indicated by the found target identifier is determined as the first-level consistency node. The preset mapping table is used to indicate the mapping relationship between the index value and the target identifier.

[0022] In one possible implementation, determining the second-level consistency node based on the request address includes:

[0023] Based on the request address and the number of consistency nodes within the NUMA architecture, determine the index value of the second-level consistency node in the NUMA architecture;

[0024] The secondary consistency node is determined based on its index value in the NUMA architecture.

[0025] In one possible implementation, determining the index value of the second-level consistency node in the NUMA architecture based on the request address and the number of consistency nodes within the NUMA architecture includes:

[0026] Obtain the hash attribute of the NUMA architecture, which includes the number of consistent nodes in the NUMA architecture, the hash algorithm used by the NUMA architecture, and the base index of the consistent nodes in the NUMA architecture in a preset consistent node lookup table.

[0027] Based on the number of consistent nodes in the NUMA architecture and the hash algorithm used by the NUMA architecture, a hash operation is performed on the request address to obtain the hash offset of the second-level consistent node in the NUMA architecture;

[0028] The index value of the second-level consistency node in the NUMA architecture is determined based on the base index of the consistency node in the preset consistency node lookup table and the hash offset of the second-level consistency node in the NUMA architecture.

[0029] In one possible implementation, determining the second-level consistency node based on its index value in the NUMA architecture includes:

[0030] In a preset mapping table, a target identifier corresponding to the index value of the secondary consistency node in the NUMA architecture is found, and the consistency node indicated by the found target identifier is determined as the secondary consistency node. The preset mapping table is used to indicate the mapping relationship between the index value and the target identifier.

[0031] In one possible implementation, the request nodes and consistency nodes in each die are grouped together, or the request nodes and consistency nodes in each die are divided into multiple groups, or the request nodes and consistency nodes in different dies of the same chip are grouped together.

[0032] In one possible implementation, the method further includes:

[0033] When the target consistency node is a first-level consistency node, the target consistency node reads the cached data within the first group.

[0034] In one possible implementation, the method further includes:

[0035] If the target consistency node does not read the cached data, it determines the secondary consistency node based on the request address.

[0036] The target consistency node routes the access request to the secondary consistency node;

[0037] The target consistency node receives the cached data returned by the secondary consistency node.

[0038] In one possible implementation, determining the second-level consistency node based on the requested address includes:

[0039] Based on the request address and the number of second-level consistency nodes in the NUMA architecture, determine the index value of the second-level consistency node in the NUMA architecture;

[0040] The secondary consistency node is determined based on its index value in the NUMA architecture.

[0041] In one possible implementation, determining the index value of the second-level consistency node in the NUMA architecture based on the request address and the number of second-level consistency nodes within the NUMA architecture includes:

[0042] Obtain the hash attribute of the NUMA architecture, which includes the number of second-level consistency nodes in the NUMA architecture, the hash algorithm used by the NUMA architecture, and the base index of the second-level consistency nodes in the second-level consistency node lookup table.

[0043] Based on the number of second-level consistency nodes in the NUMA architecture and the hash algorithm used by the NUMA architecture, a hash operation is performed on the request address to obtain the hash offset of the second-level consistency node in the NUMA architecture;

[0044] The index value of the second-level consistency node in the NUMA architecture is determined based on the base index of the second-level consistency node in the second-level consistency node lookup table and the hash offset of the second-level consistency node in the NUMA architecture.

[0045] In one possible implementation, determining the second-level consistency node based on its index value in the NUMA architecture includes:

[0046] In a preset mapping table, a target identifier corresponding to the index value of the secondary consistency node in the NUMA architecture is found, and the consistency node indicated by the found target identifier is determined as the secondary consistency node. The preset mapping table is used to indicate the mapping relationship between the index value and the target identifier.

[0047] In one possible implementation, the method further includes:

[0048] When the target consistency node is a second-level consistency node, the target consistency node reads the cached data within the NUMA architecture.

[0049] Secondly, embodiments of this disclosure provide a NUMA architecture, which includes multiple request nodes and multiple consistency nodes. The multiple request nodes and multiple consistency nodes of the NUMA architecture are divided into multiple groups, and each group includes at least one request node and at least one consistency node.

[0050] The requesting node, located in the first group, is used to initiate an access request; a target consistency node is determined based on the request address, wherein the target consistency node is a first-level consistency node or a second-level consistency node, the first-level consistency node represents a consistency node used to manage cache consistency among requesting nodes within the first group, and the second-level consistency node represents a consistency node used to manage global cache consistency of the NUMA architecture; an access request is sent to the target consistency node.

[0051] The target consistency node is used to return a request response to the request node, and the request response includes cached data of the request address.

[0052] Thirdly, embodiments of this disclosure provide a computer-readable medium having a computer program stored thereon, which, when executed by a processor, implements the data access method of the first aspect.

[0053] Fourthly, embodiments of this disclosure provide a computer program product, which includes a computer program that, when executed by a processor, implements the data access method of the first aspect.

[0054] In this embodiment, multiple request nodes and multiple consistency nodes of the NUMA architecture are divided into multiple groups, such that each group includes at least one request node and at least one consistency node. For any request node in the first group, when initiating an access request for a request address, the first-level consistency node managing cache consistency among request nodes within the first group or the second-level consistency node managing global cache consistency of the NUMA architecture can be determined as the target consistency node based on the request address. The access request is then sent to the target consistency node, which returns the cached data for the request address. In this way, by grouping request nodes and consistency nodes, two-level consistency routing is implemented. The same operation is performed on both levels of consistency nodes for the request node, simplifying the routing implementation and thus realizing a two-level consistency routing management that supports flexible grouping. Attached Figure Description

[0055] In the accompanying drawings of the embodiments disclosed herein:

[0056] Figure 1 This is a schematic diagram of the internal structure of a chip provided in an embodiment of this disclosure.

[0057] Figure 2 This is a flowchart of a data access method provided in an embodiment of the present disclosure.

[0058] Figure 3 This is a block diagram illustrating the composition of a computer-readable medium provided in an embodiment of the present disclosure.

[0059] Figure 4 This is a flowchart of a data access method provided in an embodiment of the present disclosure.

[0060] Figure 5 This is a schematic diagram of the RART processing procedure provided in an embodiment of the present disclosure.

[0061] Figure 6 This is a schematic diagram of the HART processing procedure provided in an embodiment of this disclosure.

[0062] Figure 7 This is a schematic diagram of NUMA architecture grouping provided in an embodiment of this disclosure.

[0063] Figure 8 This is a schematic diagram of a single-crystal, single-group scenario provided in an embodiment of this disclosure.

[0064] Figure 9 This is a schematic diagram of a preset mapping table in RART provided in an embodiment of this disclosure.

[0065] Figure 10 This is a schematic diagram of a preset mapping table in HART provided in an embodiment of this disclosure. Detailed Implementation

[0066] To enable those skilled in the art to better understand the technical solutions of this disclosure, the embodiments of this disclosure will be described in detail below with reference to the accompanying drawings.

[0067] The present disclosure will be described more fully below with reference to the accompanying drawings; however, the embodiments shown may be embodied in different forms, and the present disclosure should not be construed as limited to the embodiments set forth below. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will enable those skilled in the art to fully understand the scope of the disclosure.

[0068] The accompanying drawings are provided to further illustrate this disclosure and form part of the specification. They are used together with the detailed embodiments to explain this disclosure and do not constitute a limitation thereof. These and other features and advantages will become more apparent to those skilled in the art from the description of detailed embodiments with reference to the accompanying drawings.

[0069] Unless otherwise specified, each embodiment and feature of this disclosure may be used individually or in combination with other embodiments and features thereof.

[0070] Those skilled in the art will understand that various changes in form and detail may be made to the embodiments of this disclosure without departing from the scope of this disclosure as set forth by the appended claims.

[0071] The terminology used in this disclosure is for the purpose of describing particular embodiments only and is not intended to limit the disclosure. The term "and / or" as used in this disclosure includes any and all combinations of one or more of the associated enumerated entries. The singular forms "a" and "the" as used in this disclosure are also intended to include the plural forms, unless the context clearly indicates otherwise. The terms "comprising," "made of," etc., as used in this disclosure specify the presence of the stated feature, integral, step, operation, element, and / or component, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof.

[0072] Unless otherwise specified, all terms used in this disclosure (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and this disclosure, and will not be interpreted as having an idealized or overly formal meaning, unless expressly so defined in this disclosure.

[0073] This disclosure is not limited to the embodiments shown in the accompanying drawings, but includes modifications to the configuration based on the manufacturing process. Therefore, the areas illustrated in the drawings are schematic, and the shapes of the areas shown illustrate specific shapes of the areas of an element, but are not intended to be limiting.

[0074] For ease of understanding and description, some of the terms used in the embodiments of this disclosure will be explained below.

[0075] Request nodes (RNs) can be used to connect to processors or other devices and can initiate different types of access requests, such as read and write, to a consistent memory space.

[0076] A Coherent Home Node (CHN) can be used to cache cache lines in the memory address space it manages, maintaining cache coherency between the processor and storage devices. A cache line is the smallest data block in the cache.

[0077] Chip-to-Chip Protocol Gateway (C2C) can be used for cross-chip communication. Cross-chip communication generally uses a different transmission protocol than on-chip communication. For example, cross-chip communication can use the Chip-to-Chip (C2C) protocol, the Peripheral Component Interconnect Express (PCIE) bus protocol, etc.

[0078] Slave nodes (SNs) can be used to connect to Double Data Rate (DDR) or other types of storage devices to receive requests for access to memory space from the requesting device.

[0079] The Request Node Address Route Table (RART) is located in both the RN and C2C. It can be used to process request addresses in the RN or C2C and find the destination node of the next level of routing, i.e., the next-hop node.

[0080] The Home Address Route Table (HART) is located in the CHN and can be used to process requested addresses in the CHN to find the target node for the next level of routing, i.e., the next-hop node.

[0081] Network on Chip (NoC) is a communication network architecture implemented on an integrated circuit chip, used to connect various functional modules, processors, storage devices and other important components on the chip.

[0082] Interconnect buses can be used to connect all processors and storage devices on an on-chip network.

[0083] On-chip bus interconnect network refers to an on-chip network that connects the processor and storage devices through an interconnect bus.

[0084] This disclosure provides a chip comprising multiple symmetrical dies, each die consisting of an RN, a CHN, and an SN. The RN contains a RART, and the CHN contains a HART.

[0085] Figure 1 This is a schematic diagram of the internal structure of a chip provided in an embodiment of this disclosure. Figure 1 As shown, Chip0 includes die0, die1, die2, and die3. Each die includes components such as RN, CHN, and SN. CHN includes HART, and RN includes RART.

[0086] It should be understood that Figure 1 This is merely an exemplary schematic diagram of the internal structure of a chip according to embodiments of this disclosure and is not intended to limit the chip. In embodiments of this disclosure, there is no limitation on the number of chips in the chip, or the number of RN, CHN, and SN contained in any given chip.

[0087] In some embodiments, the on-chip interconnect network system of this disclosure may adopt a symmetric multi-processing (SMP) architecture, in which all processors are equal in status and share system resources.

[0088] It should be understood that Figure 1 This is merely an example of an on-chip interconnect network system according to embodiments of this disclosure and is not intended to limit the scope of the on-chip interconnect network system. In embodiments of this disclosure, there are no limitations on the number of chips in the on-chip interconnect network system, the number of dies contained in any chip, or the number of RNs, CHNs, and SNs contained in any die.

[0089] This disclosure provides an on-chip bus interconnect network, which may include multiple chips provided in this disclosure, and any two chips can communicate through cross-chip nodes. In one example, the on-chip bus interconnect network may employ a coherency bus, such as a CHI bus, to connect components such as RN, CHN, and C2C in the network. In another example, the on-chip bus interconnect network of this disclosure may be a server chip; servers have high computing demands and require multiple processors to be connected and used through an interconnect bus.

[0090] In related technologies, on-chip bus interconnect networks often employ a three-level cache architecture, grouping CPUs of different service types (grp) for management. This allows CPUs within a group to share a single L3 cache, effectively shortening paths and improving system access performance. However, in large-scale on-chip bus interconnect networks, the consistency of the two-level caches within and outside the group increases routing complexity and introduces additional retry resource overhead for nodes maintaining consistency. Furthermore, due to changes in software application scenarios, grouping requirements also change. In related technologies, a single routing mode cannot support flexible grouping, thus limiting system applications.

[0091] In this embodiment, multiple request nodes and multiple consistency nodes of the NUMA architecture are divided into multiple groups, such that each group includes at least one request node and at least one consistency node. For any request node in the first group, when initiating an access request for a request address, the first-level consistency node managing cache consistency among request nodes within the first group or the second-level consistency node managing global cache consistency of the NUMA architecture can be determined as the target consistency node based on the request address. The access request is then sent to the target consistency node, which returns the cached data for the request address. In this way, by grouping request nodes and consistency nodes, two-level consistency routing is implemented. The same operation is performed on both levels of consistency nodes for the request node, simplifying the routing implementation and thus realizing a two-level consistency routing management that supports flexible grouping.

[0092] The two-level consistency nodes in this embodiment will be described below. The RN and CHN groups serve as the boundary between the two levels of consistency. The first-level consistency node can be simply referred to as the first-level CHN; the second-level consistency node can be simply referred to as the second-level CHN.

[0093] The first-level CHN maintains cache consistency among all RNs within a group. Taking the first group as an example, the RART within the first group's RN performs a hash calculation on all CHNs within the first group using the request address, and finds one CHN as the first-level CHN for routing management. All CHNs within the first group can be regarded as a distributed L3 cache, and the first-level CHN of the first group is responsible for caching cache line data and maintaining cache consistency among all RNs within the first group.

[0094] Second-level CHNs can maintain global cache consistency in asymmetric content access (NUMA) architectures. NUMA is a memory access architecture where accessing local NUMA memory has significantly lower latency than accessing remote NUMA. In a distributed caching network, memory addresses within a NUMA are evenly distributed across all CHNs for consistency management. The HART within a first-level CHN uses the requested address to hash all CHNs within the NUMA to find one CHN to serve as the second-level CHN for routing management. This second-level CHN within the NUMA then manages the load balancing of the requested address to maintain global cache consistency within that NUMA.

[0095] This disclosure provides a NUMA architecture that may include multiple request nodes and multiple consistency nodes. The multiple request nodes and multiple consistency nodes of the NUMA architecture are divided into multiple groups, and each group includes at least one request node and at least one consistency node. It should be understood that in this disclosure, for any NUMA architecture grouped, the NUMA architecture has a second-level CHN, and each group of the NUMA architecture has a first-level CHN.

[0096] Firstly, embodiments of this disclosure provide a data access method. This data access method can be applied to the NUMA architecture provided in embodiments of this disclosure. (Refer to...) Figure 2 The data access method provided in this disclosure embodiment may include:

[0097] S101, the requesting node initiates an access request.

[0098] A requesting node can represent a node initiating an access request, and it can be used to connect to processors or other devices in a NUMA architecture. The requesting node is located in the first group. The NUMA architecture is divided into multiple groups, and the first group can represent any one of these groups. The grouping method of the NUMA architecture will be explained in detail later and will not be repeated here.

[0099] An access request can be used to access cached data in a requested address. The access request can include the requested address. When a requesting node needs to access cached data in a requested address, the requesting node can initiate an access request carrying the requested address.

[0100] S102, the requesting node determines the target consistency node based on the request address.

[0101] In this embodiment, the consistency nodes are divided into two levels: Level 1 consistency nodes and Level 2 consistency nodes. Level 1 consistency nodes are used to manage cache consistency among requesting nodes within the same group. Level 2 consistency nodes are used to manage global cache consistency in a NUMA architecture.

[0102] Therefore, the target consistency node identified in this step is either a first-level consistency node or a second-level consistency node. Since the target consistency node is located within the first group, the first-level consistency node in this step can represent a consistency node used to manage cache consistency among requesting nodes within the first group, ensuring that different requesting nodes within the first group have consistent cache states for the same cached data; the second-level consistency node can represent a consistency node used to manage global cache consistency of the NUMA architecture, ensuring that different requesting nodes within the entire NUMA architecture have consistent cache states for the same cached data.

[0103] The requesting node can determine whether the target consistency node is a first-level consistency node or a second-level consistency node based on whether the request address is within the first group. When the request address is within the first group, the target consistency node within the first group can perform global cache consistency management for the request address, so the target consistency node is a second-level consistency node. When the request address is not within the first group, the target consistency node within the first group is restricted to performing consistency management for the request address within the scope of the first group, so the target consistency node is a first-level consistency node.

[0104] S103, the requesting node sends an access request to the target consistency node.

[0105] After the target consistency node is determined, the requesting node can send the access request to the target consistency node so that the target consistency node can obtain the cached data of the request address.

[0106] S104, the target consistency node returns a request response to the requesting node, the request response including cached data of the request address.

[0107] After receiving an access request, the target consistency node can obtain the cached data of the requested address and return a request response carrying the cached data to the requesting node.

[0108] When the target consistency node is a second-level consistency node, the target consistency node directly manages the request address, so the target consistency node can directly read cached data from the request address.

[0109] When the target consistency node is a first-level consistency node, it can forward the access request to a second-level consistency node that can perform global consistency management for the requested address. This second-level consistency node then reads and returns the cached data for the requested address. After receiving the cached data from the second-level consistency node, the target consistency node sends a request response containing the cached data to the requesting node.

[0110] In this embodiment, multiple request nodes and multiple consistency nodes of the NUMA architecture are divided into multiple groups, such that each group includes at least one request node and at least one consistency node. For any request node in the first group, when initiating an access request for a request address, the first-level consistency node managing cache consistency among request nodes within the first group or the second-level consistency node managing global cache consistency of the NUMA architecture can be determined as the target consistency node based on the request address. The access request is then sent to the target consistency node, which returns the cached data for the request address. In this way, by grouping request nodes and consistency nodes, two-level consistency routing is implemented. The same operation is performed on both levels of consistency nodes for the request node, simplifying the routing implementation and thus realizing a two-level consistency routing management that supports flexible grouping.

[0111] In some embodiments, determining the target consistency node based on the request address in step S102 may include:

[0112] S1021, determine the first-level consistency node and the second-level consistency node based on the requested address.

[0113] The requesting node can determine the first-level consistency node within the first group, which manages the consistency of the request address cache, and the second-level consistency node, which manages the consistency of the request address cache globally, based on the request address. When determining the first-level consistency node, the hash attributes of the first group are required, such as the number of consistency nodes within the first group and the hash algorithm configured for the first group. When determining the second-level consistency node, the hash attributes of the NUMA architecture are required, such as the number of consistency nodes within the NUMA architecture and the hash algorithm configured for the NUMA architecture.

[0114] The following sections describe the process of determining the first-level consistency node based on the request address and the process of determining the second-level consistency node based on the request address.

[0115] In one possible implementation, determining the first-level consistency node based on the requested address in step S1021 may include:

[0116] S10211, determine the index value of the first-level consistency node in the first group based on the request address and the number of consistency nodes in the first group.

[0117] In one example, step S10211 may include: obtaining the hash attribute of the first group, the hash attribute of the first group including the number of consistent nodes in the first group, the hash algorithm used by the first group, and the base index of the consistent nodes in the first group in a preset consistent node lookup table; performing a hash operation on the request address according to the number of consistent nodes in the first group and the hash algorithm used by the first group to obtain the hash offset of the first-level consistent node in the first group; and determining the index value of the first-level consistent node in the first group according to the base index of the consistent nodes in the first group in the preset consistent node lookup table and the hash offset of the first-level consistent node in the first group.

[0118] The hash algorithm used in the first group can be pre-configured as needed; for example, it can be modulo operation, CRC32, etc. By using a hash algorithm, the uniqueness and uniformity of the calculation results can be determined.

[0119] The consistency node lookup table can be pre-configured as needed. The table includes multiple base indexes, each corresponding to a group, and each base index also corresponds to multiple hash offsets. The base index is the starting index for consistent nodes within the corresponding group, used to distinguish consistent nodes in different groups; the hash offset is the offset value relative to the base index obtained through hash operations. Combining the base index and the hash offset yields the unique index value of a first-level consistent node within the first group.

[0120] The requesting node first performs a hash operation on the request address based on the number of consistent nodes in the first group and the hash algorithm used in the first group to obtain the hash offset of the first-level consistent node in the first group; then, it combines the base index of the consistent node in the consistency node lookup table in the first group with the hash offset of the first-level consistent node in the first group to obtain the index value of the first-level consistent node in the first group.

[0121] As one embodiment of this disclosure, the base index can be used to accurately distinguish the consistency nodes of different groups, and the hash offset can be used to distinguish the consistency nodes of different groups. The combination of the base index and the hash offset enables the accurate positioning of the first-level consistency nodes in the first group.

[0122] S10212, Determine the first-level consistency node based on the index value of the first-level consistency node in the first group.

[0123] In one example, step S10212 may include: finding a target identifier in a preset mapping table that corresponds to the index value of the first-level consistency node in the first group, and determining the consistency node indicated by the found target identifier as the first-level consistency node, wherein the preset mapping table is used to indicate the mapping relationship between the index value and the target identifier.

[0124] After obtaining the index value of the first-level consistency node, the specific first-level consistency node can be located by querying the preset mapping table, thus realizing the location of the hardware node.

[0125] In one example, the preset mapping table can be stored in the local cache of the requesting node or in a shared storage unit within a group, which facilitates quick lookup by the requesting node and thus improves the efficiency of node location.

[0126] In one possible implementation, determining the secondary consistency node based on the requested address in step S1021 may include:

[0127] S10213, Based on the request address and the number of consistency nodes in the NUMA architecture, determine the index value of the secondary consistency node in the NUMA architecture.

[0128] In one example, step S10213 may include: obtaining the hash attributes of the NUMA architecture, the hash attributes of the NUMA architecture including the number of consistent nodes in the NUMA architecture, the hash algorithm used by the NUMA architecture, and the base index of the consistent nodes in the NUMA architecture in a preset consistent node lookup table; performing a hash operation on the request address according to the number of consistent nodes in the NUMA architecture and the hash algorithm used by the NUMA architecture to obtain the hash offset of the second-level consistent node in the NUMA architecture; and determining the index value of the second-level consistent node in the NUMA architecture according to the base index of the consistent nodes in the preset consistent node lookup table and the hash offset of the second-level consistent node in the NUMA architecture.

[0129] The consistency node lookup table can be pre-configured as needed. The table includes multiple base indexes, each corresponding to a NUMA architecture and multiple hash offsets. The base index is the starting index for the consistency node within the corresponding NUMA architecture, used to distinguish consistency nodes in different groups. The hash offset is the offset value relative to the base index obtained through hash operations. Combining the base index and the hash offset yields the unique index value of the second-level consistency node within the NUMA architecture.

[0130] The requesting node first performs a hash operation on the request address based on the number of consistent nodes in the NUMA architecture and the hash algorithm used by the NUMA architecture to obtain the hash offset of the second-level consistent node in the NUMA architecture. Then, it combines the base index of the consistent node in the consistent node lookup table in the NUMA architecture with the hash offset of the second-level consistent node in the NUMA architecture to obtain the index value of the second-level consistent node in the NUMA architecture.

[0131] As one embodiment of this disclosure, the base index can be used to accurately distinguish consistent nodes in different NUMA architectures, and the hash offset can be used to distinguish different consistent nodes in the same NUMA architecture. The combination of the base index and the hash offset enables the accurate location of secondary consistent nodes in the NUMA architecture.

[0132] S10214, Determine the secondary consistency node based on its index value in the NUMA architecture.

[0133] In one possible implementation, step S10214, determining the secondary consistency node based on its index value in the NUMA architecture, may include: searching a target identifier in a preset mapping table that corresponds to the index value of the secondary consistency node in the NUMA architecture, and determining the consistency node indicated by the found target identifier as the secondary consistency node. The preset mapping table is used to indicate the mapping relationship between the index value and the target identifier.

[0134] After obtaining the index value of the second-level consistency node, the specific second-level consistency node can be located by querying the preset mapping table, thus realizing the location of the hardware node.

[0135] S1022, if the first-level consistency node and the second-level consistency node are the same consistency node, determine the second-level consistency node as the target consistency node.

[0136] After determining the first-level and second-level consistent nodes through step S1011, the requesting node can compare the first-level and second-level consistent nodes. If the first-level and second-level consistent nodes are the same consistent node, it indicates that the node has both the ability to manage cache consistency within the first group and the ability to manage global cache consistency. At this time, the requesting node and the second-level consistent node are in the same group, and the requesting node can directly send an access request to the second-level consistent node. Therefore, the second-level consistent node can be determined as the target consistent node.

[0137] It should be understood that although the first-level consistent node and the second-level consistent node are actually the same node, the routing level of the target consistent node is second-level, not first-level. Therefore, in this step, the second-level consistent node is determined as the target consistent node, rather than the first-level consistent node.

[0138] S1023, if the first-level consistency node and the second-level consistency node are different consistency nodes, determine the first-level consistency node as the target consistency node.

[0139] If the first-level consistency node and the second-level consistency node are not the same consistency node, it means that the requesting node and the second-level consistency node are in different groups. The requesting node needs to communicate with the second-level consistency node through the first-level consistency node. Therefore, the first-level consistency node can be determined as the target consistency node, that is, the next-hop node of the requesting node.

[0140] In some embodiments, the request nodes and consistency nodes in each die are grouped together, or the request nodes and consistency nodes in each die are divided into multiple groups, or the request nodes and consistency nodes in different dies of the same chip are divided into one group.

[0141] As one embodiment of this disclosure, all request nodes and consistency nodes in a single die can be grouped together. Thus, the number of dies in a NUMA architecture determines the number of groups it is divided into. For example, if a NUMA architecture includes 10 dies, it is divided into 10 groups, each group corresponding to one die, and each group includes all request nodes and consistency nodes within that die.

[0142] As one embodiment of this disclosure, the request nodes and consistency nodes in a single die can be divided into multiple groups. It should be understood that the request nodes and consistency nodes in each group originate from the same die, but the request nodes and consistency nodes in the same die may be assigned to the same group or different groups. For example, a NUMA architecture includes two dies, each including four request nodes and four consistency nodes. For each die, the two request nodes and two consistency nodes in that die can be divided into two groups. Thus, the entire NUMA architecture is divided into four groups.

[0143] As one embodiment of this disclosure, request nodes and consistency nodes from different dies of the same chip can be grouped into one group. It should be understood that the request nodes and consistency nodes in each group originate from the same chip, but can come from different dies. For example, a NUMA architecture includes two chips, namely chip 1 and chip 2, each chip including two dies, and each die including four request nodes and four consistency nodes. In this case, the eight request nodes and eight consistency nodes from the two dies of chip 1 can be grouped together. However, the request nodes and consistency nodes from chip 1 and chip 2 cannot be placed in the same group.

[0144] It should be understood that all three grouping methods described above can ensure that the requesting node and the consistency node within the same group originate from the same chip. In this way, the requesting node and the consistency node within the same group can communicate directly without needing to forward data across different chips.

[0145] The process of a first-level consistency node acquiring cached data is explained below.

[0146] In some embodiments, the data access method provided in this disclosure may further include:

[0147] S105, if the target consistency node is a first-level consistency node, the target consistency node reads the cached data within the first group.

[0148] When the target consistency node is a first-level consistency node, it can manage cache consistency within the first group. If the cached data is stored in the first group, the target consistency node can read the cached data. If the cached data is stored in other groups, the target consistency node cannot read the cached data, and in this case, it is necessary to find a second-level consistency node that can manage global consistency in the NUMA architecture.

[0149] In some embodiments, the data access method provided in this disclosure may further include:

[0150] S106, if the target consistency node does not read the cached data, it determines the secondary consistency node based on the request address.

[0151] In this step, the process of determining the secondary consistency node based on the requested address is described in detail in steps S1061 and S1062 below.

[0152] S107, the target consistency node routes the access request to the secondary consistency node.

[0153] The target consistent node can send access requests to the second-level consistent node. Since the second-level consistent node manages global consistency in the NUMA architecture, it can directly read the cached data. After reading the cached data, the second-level consistent node can return the cached data to the first-level consistent node.

[0154] S108, the target consistency node receives the cached data returned by the secondary consistency node.

[0155] As one embodiment of this disclosure, the requested address may be an address within the first group or data within other groups. Therefore, upon receiving an access request, the first-level consistency node (i.e., the target consistency node) within the first group can prioritize reading cached data within the first group. If cached data is found within the first group, the subsequent interaction with the second-level consistency node can be omitted, saving resources and improving efficiency. If cached data is not found within the first group, the access request can be forwarded to the second-level consistency node, thereby ensuring the successful reading of cached data.

[0156] In some embodiments, step S106, which determines the secondary consistency node based on the requested address, includes:

[0157] S1061, Based on the request address and the number of secondary consistency nodes in the NUMA architecture, determine the index value of the secondary consistency node in the NUMA architecture.

[0158] In one possible implementation, step S1061 may include: obtaining the hash attributes of the NUMA architecture, wherein the hash attributes of the NUMA architecture include the number of second-level consistency nodes in the NUMA architecture, the hash algorithm used by the NUMA architecture, and the base index of the second-level consistency node in the second-level consistency node lookup table; performing a hash operation on the request address according to the number of second-level consistency nodes in the NUMA architecture and the hash algorithm used by the NUMA architecture to obtain the hash offset of the second-level consistency node in the NUMA architecture; and determining the index value of the second-level consistency node in the NUMA architecture according to the base index of the second-level consistency node in the second-level consistency node lookup table and the hash offset of the second-level consistency node in the NUMA architecture.

[0159] The process of determining the index value of the second-level consistency node in the NUMA architecture can be referred to step S10213. The difference is that step S10213 is executed by the requesting node, while this step is executed by the target consistency node.

[0160] S1062, Determine the secondary consistency node based on the index value of the secondary consistency node in the NUMA architecture.

[0161] In one possible implementation, step S1062 may include: searching a target identifier in a preset mapping table that corresponds to the index value of the secondary consistency node in the NUMA architecture, and determining the consistency node indicated by the found target identifier as the secondary consistency node, wherein the preset mapping table is used to indicate the mapping relationship between the index value and the target identifier.

[0162] The process of determining the second-level consistency node in this step can be referred to step S10214. The difference is that step S10214 is executed by the requesting node, while this step is executed by the target consistency node.

[0163] As one embodiment of this disclosure, after determining the second-level consistency node, the target consistency node can send an access request to the second-level consistency node so that the second-level consistency node can read the cached data. The process of the second-level consistency node reading the cached data can be referred to step S109 below. The difference is that step S109 is executed by the target consistency node when the target consistency node is a second-level consistency node, while here it is executed by a second-level consistency node different from the target consistency node when the target consistency node is a first-level consistency node.

[0164] The process of a second-level consistency node acquiring cached data is explained below.

[0165] In one possible implementation, the data access method provided in this disclosure embodiment may further include:

[0166] S109, if the target consistency node is a second-level consistency node, the target consistency node reads the cached data within the NUMA architecture.

[0167] Because a second-level consistency node can manage global cache consistency within a NUMA architecture, when the target consistency node is a second-level consistency node, it can manage global cache consistency within the NUMA architecture and can directly read cached data from the request address.

[0168] As one embodiment of this disclosure, when the target consistency node is a first-level consistency node, cached data is preferentially read from the first group; if it is not read, the cached data is read by the second-level consistency node. When the target consistency node is a second-level consistency node, the cached data is read directly. This saves resources, improves efficiency, and provides a guarantee that cached data will be read.

[0169] This disclosure provides a two-level consistent routing system within and outside a packet. The routing boundary is defined by the packet. The RART in the requesting node performs a hash operation on the consistent nodes within the packet based on the request address to find the first-level consistent node. This first-level consistent node is mainly used to maintain cache consistency among the processors within the packet. The HART in the first-level consistent node hashes the consistent nodes within the NUMA architecture outside the packet to find the second-level consistent node. This second-level consistent node is used to maintain cache consistency among all packets. The two-level cache consistency within and outside the packet meets the Modified, Exclusive, Shared, Invalid (MESI) protocol requirements.

[0170] This disclosure provides a flexible grouping method, which configures the hash algorithm according to the number of consistent nodes in the group, thereby supporting flexible grouping methods such as cross-crystal grouping and multiple grouping within a single crystal, meeting the needs of different software application scenarios.

[0171] This disclosure implements the binding of consistency nodes between groups. By restricting the hash operation of the second-level consistency node from including the hash operation rules of the first-level consistency node, consistency nodes with the same group number can be bound to each other. Each second-level consistency node only receives access requests from the first-level consistency nodes bound to it in each group, which can effectively reduce the number of source nodes set in the second-level consistency node and optimize the retry resources in the consistency node.

[0172] Secondly, embodiments of this disclosure provide a NUMA architecture, which includes multiple request nodes and multiple consistency nodes. The multiple request nodes and multiple consistency nodes of the NUMA architecture are divided into multiple groups, and each group includes at least one request node and at least one consistency node.

[0173] The requesting node, located in the first group, is used to initiate an access request; a target consistency node is determined based on the request address, wherein the target consistency node is a first-level consistency node or a second-level consistency node, the first-level consistency node represents a consistency node used to manage cache consistency among requesting nodes within the first group, and the second-level consistency node represents a consistency node used to manage global cache consistency of the NUMA architecture; an access request is sent to the target consistency node.

[0174] The target consistency node is used to return a request response to the request node, and the request response includes cached data of the request address.

[0175] Thirdly, referring to Figure 3This disclosure provides a computer-readable medium storing a computer program that, when executed by a processor, implements any one of the data access methods of this disclosure.

[0176] Fourthly, embodiments of this disclosure provide a computer program product, which includes a computer program that, when executed by a processor, implements any of the data access methods of embodiments of this disclosure.

[0177] The embodiments of this disclosure will now be described in detail with reference to examples.

[0178] Example 1

[0179] This example illustrates three routing paths for access requests in embodiments of this disclosure.

[0180] The first routing path is direct routing from the RN to the secondary CHN. This corresponds to step S1022. When the secondary CHN obtained by hash calculation within the corresponding NUMA architecture from the request address of an RN access request is the same node as the primary CHN within the RN's group, it indicates that the primary CHN and secondary CHN of this access request overlap. The primary CHN within the RN's group is essentially a secondary CHN and can directly manage the global cache consistency of this request address. Therefore, this path only passes through the secondary CHN.

[0181] The second routing path involves the RN first passing through a first-level CHN, and then through a second-level CHN. This corresponds to steps S1023 and S106. When the second-level CHN obtained after hash calculation within the corresponding NUMA architecture from the request address of an RN access request is not the same node as the first-level CHN in the RN's group, it indicates that the access request is first processed by the first-level CHN in the RN's group. If the first-level CHN does not have cached data for the request address, the access request needs to be forwarded from the first-level CHN to the second-level CHN for processing.

[0182] The third routing path involves only traversing the first-level CHN. This corresponds to steps S1023 and S105. When the second-level CHN obtained by hash calculation within the corresponding NUMA architecture from the request address of an RN access request is not the same node as the first-level CHN in the RN's group, the access request is first processed by the first-level CHN in the RN's group. If the first-level CHN has cached data for the request address, it directly returns the cached data to the RN that initiated the access request.

[0183] Figure 4 A flowchart illustrating a data access method provided in an embodiment of this disclosure. (Refer to...) Figure 4 The method may include:

[0184] S401, the RN of the first group initiates an access request. The RART of the RN performs hash operations on the request address of the access request according to the hash attribute of the first group and the hash attribute of the NUMA architecture, respectively, to obtain the index value of the first-level CHN in the first group and the index value of the second-level CHN in the NUMA architecture.

[0185] This step can be referred to as step S1021, and will not be repeated here.

[0186] In S402, RART in RN retrieves the first-level CHN and second-level CHN by looking up the index value of the first-level CHN in the first group and the index value of the second-level CHN in the NUMA architecture.

[0187] Among them, the first-level CHN is the first-level CHN of the first group, and the second-level CHN is the second-level CHN of the NUMA architecture globally.

[0188] In step S403, the RN determines whether the primary CHN and the secondary CHN are the same node. If yes, proceed to step S409; otherwise, proceed to step S404.

[0189] S404, RN routes the access request to the first-level CHN of the first group.

[0190] In step S405, the first-level CHN of the first group determines whether there is cached data for the requested address. If yes, proceed to step S408; otherwise, proceed to step S406.

[0191] S406, the HART in the first-level CHN of the first group performs a hash operation on the request address according to the hash attribute of the NUMA architecture, obtains the index value of the second-level CHN in the NUMA architecture, looks up the second-level CHN in the table, and routes the access request to the found second-level CHN.

[0192] S407: After receiving the access request, the second-level CHN reads the cached data, completes the consistency-related processing, and returns the request response to the RN that initiated the access request.

[0193] S408, the first-level CHN of the first group directly returns a response to the RN that initiated the access request and completes the consistency-related processing.

[0194] In step S409, the RN outputs the secondary CHN and routes the access request to the secondary CHN. Then, step S407 is executed.

[0195] Example 2

[0196] This example illustrates RART in RN.

[0197] Figure 5 This is a schematic diagram of the RART processing procedure provided in an embodiment of this disclosure. (Refer to...) Figure 5The RART includes an HMR address matching unit, a hash calculation unit, and a consistency node lookup table. The input to the RART is the requested address, and the output is the node identifier of the target CHN.

[0198] In this embodiment of the disclosure, each NUMA architecture is configured with an HMR, the address range of which is defined by a base address and an end address. (Refer to...) Figure 5 The number of HMRs is N+1, including HMR0, HMR1, ..., HMRN. The HMR address matching unit can determine the NUMA architecture based on the HMR where the requested address is located.

[0199] RART can obtain the hash attributes of the NUMA architecture configuration, including the number of CHNs within the NUMA architecture, the hash algorithm used (numa_hash_algorithm), and the base index (numa_base_index) of the CHNs within the entire consistency node lookup table. This corresponds to step S10213.

[0200] RART can also obtain the hash attributes configured for the group where the RN is located (i.e., the first group), including the number of CHNs in the group, the hash algorithm used (grp_hash_algorithm), and the base index (grp_base_index) of the CHNs in the entire consistency node lookup table. This corresponds to step S10211.

[0201] The hash calculation unit performs a hash operation on the request address based on the hash attributes of the NUMA architecture and the hash attributes of the group to which the RN belongs, and obtains the NUMA index value (i.e., the index value of the second-level consistency node in the NUMA architecture) and the group index value (i.e., the index value of the first-level consistency node in the first group). The hash results obtained by performing a hash operation on the request address are denoted as nuam_hash_offest and grp_hash_offest, respectively.

[0202] In one example, the NUMA index value is calculated as shown in Formula 1:

[0203] numa_hash_index=numa_base_index+nuam_hash_offest (Formula 1)

[0204] Wherein, numa_hash_index represents the NUMA index value, numa_base_index represents the base index of the hit NUMA CHN in the entire consistency node lookup table, and numa_hash_offest represents the hash result obtained by hashing the request address according to the hash attribute of the NUMA architecture.

[0205] In one example, the grouping index value is calculated as shown in Formula 2:

[0206] grp_hash_index=grp_base_index+grp_hash_offest (formula 2)

[0207] Here, grp_hash_index represents the group index value, grp_base_index represents the base index of CHN in the group where the RN is located in the entire consistency node query table, and grp_hash_offest represents the hash result obtained by hashing the request address according to the hash attribute of the group where the RN is located.

[0208] Next, the node identifiers of the second-level CHN and the first-level CHN are retrieved from the preset mapping table using the NUMA index value and the group index value, respectively, and then compared. When the node identifiers of the second-level CHN and the first-level CHN are the same, the output node identifier of the second-level CHN is used as the node identifier of the target consistency node, and the local_level value is set to 2. When the node identifiers of the second-level CHN and the first-level CHN are different, it means that the request address first passes through the first-level CHN in the RN group, and the output node identifier of the first-level CHN is used as the node identifier of the target consistency node, and the local_level value is set to 1.

[0209] Example 3

[0210] This example illustrates HART in CHN.

[0211] Figure 6 This is a schematic diagram of the HART processing procedure provided in an embodiment of this disclosure. (Refer to...) Figure 6 HART includes an address matching unit, a secondary CHN hash calculation unit, and a preset mapping table.

[0212] In this embodiment of the disclosure, each NUMA architecture is configured with an HMR, the address range of which is defined by a base address and an end address. (Refer to...) Figure 5 The number of HMRs is N+1, including HMR0, HMR1, ..., HMRN. The HMR address matching unit can determine the NUMA architecture based on the HMR where the requested address is located.

[0213] HART can obtain the hash attributes configured for the NUMA architecture, including the hash algorithm used to calculate the secondary CHN (chn2_hash_algorithm) and the base index of the secondary CHN in the entire secondary consistency node lookup table for the NUMA architecture (chn2_base_index).

[0214] The secondary CHN hash calculation unit calculates the secondary CHN index value (i.e., the index value of the secondary consistency node in the NUMA architecture) based on the hash attributes of the NUMA architecture. This corresponds to step S1061.

[0215] In one example, the secondary CHN index value is calculated as shown in Formula 3:

[0216] chn2_hash_index = chn2_base_index + chn2_hash_offest (Formula 3)

[0217] Wherein, chn2_hash_index represents the secondary CHN index value, chn2_base_index represents the base index of the secondary CHN in the entire secondary consistency node query table of the UMA architecture, and index+chn2_hash_offest represents the hash result obtained by hashing the request address according to the hash algorithm used to calculate the secondary CHN.

[0218] Then, HART uses the secondary CHN index value to query the preset mapping table to obtain the node identifier of the secondary consistency node.

[0219] Example 4

[0220] This example illustrates the relationship between hash algorithms.

[0221] In this embodiment of the disclosure, the grouping defines the boundary of the primary routing level, and the NUMA architecture serves as the boundary of the secondary routing level. It is required that the grouping within a NUMA architecture cannot exceed the NUMA architecture range, and the range of a group can be less than or equal to the NUMA architecture range. The relationship between the hash algorithm `numa_hash_algorithm` used in RART to calculate the NUMA index value, the hash algorithm `grp_hash_algorithm` used to calculate the group index value, and the hash algorithm `chn2_hash_algorithm` used in HART to calculate the secondary CHN index value in the above example is shown in Formula 4.

[0222] (Formula 4)

[0223] Example 5

[0224] This example illustrates the grouping method for NUMA architecture.

[0225] Figure 7 This is a schematic diagram illustrating the grouping of the NUMA architecture provided in an embodiment of this disclosure. (Refer to...) Figure 7A chip contains four dies, namely die0, die1, die2 and die3. Each die contains four RNs (RN0 to RN3), four CHNs (CHN0 to CHN3) and four SNs (SN0 to SN3). The address space of the storage devices mounted on all SNs of the entire chip is divided into a NUMA architecture.

[0226] exist Figure 7 In the scenario shown, the scope of a group does not exceed the scope of the NUMA architecture, and it supports cross-die grouping, single-die single-grouping, and multiple groups within a single die. Figure 7 In the scenario shown, the configuration relationships between the hash algorithm numa_hash_algorithm used to calculate the NUMA index value, the hash algorithm grp_hash_algorithm used to calculate the group index value, and the hash algorithm chn2_hash_algorithm used to calculate the second-level CHN index value can be found in Table 1.

[0227] Table 1

[0228]

[0229] Example 5

[0230] This example binds CHNs with the same number in different groups.

[0231] When using bus protocols (such as CHI bus) for communication in a mesh interconnection network, a CHN needs to record the identification information of the source nodes. When it cannot receive new access requests internally, it needs to return a retry response to the source node based on its identification information. This source node identification information occupies the retry resources inside the CHN. Therefore, when a CHN faces too many source nodes, its internal retry resources will also increase significantly.

[0232] In this embodiment, after defining the group as the primary routing boundary, each CHN, in addition to its original RN, needs to receive requests forwarded by other primary CHNs or handle consistency-related matters. Without restrictions in the routing implementation, this could lead to each CHN receiving requests from all other CHNs in the entire system, significantly increasing retry resources within the CHN. In this embodiment, the aforementioned hash algorithm allows binding multiple CHNs with the same node identifier within each group.

[0233] Figure 8 This is a schematic diagram illustrating a single-grain, single-group scenario provided in an embodiment of this disclosure. (Refer to...) Figure 8Each grain is divided into a group, and each group contains 4 first-level CHNs. Therefore, numa_hash_algorithm is configured as follows: If grp_hash_algorithm is configured for a power-four hash calculation, then:

[0234] .

[0235] Assuming a single-crystal, single-group scenario as described above, RN0 on die0 issues an access request. First, we focus on the gRP calculation, i.e., the second-level hash calculation. If the result is 3, i.e., grp_hash_algorithm=3, it means that the hash operation on the request address yields grp_hash_index=3. RN0 on die0 belongs to the first group grp0. Therefore, the first-level route to the first-level CHN in the first group grp0 is CHN3 on die0. Since the possible results of the first-level hash calculation are 0, 1, 2, and 3, the routing process is as follows:

[0236] If the first-level hash calculation result is 0, i.e. chn2_hash_algorithm=0, then the request address is directly managed by CHN3 within the first group grp0 for global consistency. The first-level CHN and the second-level CHN overlap, and only the first-level CHN is accessed.

[0237] If the result of the first-level hash calculation is 1, that is, chn2_hash_algorithm=1, then the first-level CHN will look up CHN3 in the second group grp1 as the second-level CHN.

[0238] If the result of the first-level hash calculation is 2 (chn2_hash_algorithm=2), then the first-level CHN will look up CHN3 in the third group grp2 as CHN.

[0239] If the result of the first-level hash calculation is 3, that is, chn2_hash_algorithm=3, then the first-level CHN will look up CHN3 in the fourth group grp3 as the second-level CHN.

[0240] If an access request initiated within the first group (grp0) passes through a first-level CHN node that is the CHN3 node of the first group, then the second-level CHN node can only be a CHN3 node within another group. The above two-level routing paths are as follows: Figure 8 As shown.

[0241] Figure 9 This is a schematic diagram of a preset mapping table in RART provided in an embodiment of this disclosure. (Refer to...) Figure 9grp0, grp1, grp2, and grp3 represent groups, and CHN0 tgtid to CHN3 tgtid represent the node identifiers of the CHNs. The node identifiers of each CHN within group grp0 are CHN0 tgtid to CHN3 tgtid. The node identifiers of each CHN within group grp1 are CHN0 tgtid to CHN3 tgtid. The node identifiers of each CHN within group grp2 are CHN0 tgtid to CHN3 tgtid. The node identifiers of each CHN within group grp3 are CHN0 tgtid to CHN3 tgtid.

[0242] Figure 10 This is a schematic diagram of a preset mapping table in a HART provided in an embodiment of this disclosure. (Refer to...) Figure 10 The preset mapping table includes the node identifier CHN3 tgtid in group grp0, the node identifier CHN3 tgtid in group grp1, the node identifier CHN3 tgtid in group grp2, and the node identifier CHN3 tgtid in group grp3.

[0243] The preset mapping table configurations in the RART within the RN and the HART within the CHN in the above path are as follows: Figure 9 and Figure 10 As shown, since CHNs with the same number within all packets are bound together, acting as first-level and second-level CHNs, each CHN will only receive consistent services from CHNs with the same number within other packets. Therefore, when a CHN retryes, it is not necessary to record the node identifiers of other CHNs within the same packet, thus optimizing retry resources within local consistent nodes under a two-level consistent routing system. This simplifies routing implementation, reduces the number of source nodes for CHNs, and optimizes retransmission resources within CHNs.

[0244] In this embodiment, it is supported to divide different processors within a chip into the same group for management, and the group shares an L3 cache resource to reduce access latency and improve system performance; it supports two-level consistency within and outside the group, with the first-level consistency node within the group caching data and maintaining cache consistency of all processors within the group, and the second-level consistency node outside the group maintaining global consistency; consistency nodes with the same group number are bound to each other, which can reduce the number of source nodes of consistency nodes and save internal retry resources.

[0245] Those skilled in the art will understand that all or some of the steps, systems, and devices disclosed above, as functional modules / units, can be implemented as software, firmware, hardware, or suitable combinations thereof.

[0246] In hardware implementations, the division between functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be executed by several physical components working together.

[0247] Some or all of the physical components may be implemented as software executed by a processor, such as a central processing unit (CPU), digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit (ASIC). Such software may be distributed on a computer-readable medium, which may include computer storage media and communication media. In embodiments of this disclosure, computer storage media include volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information, and any other media that can be used to store desired information and can be accessed by a computer. In embodiments of this disclosure, communication media typically contain computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.

Claims

1. A data access method, characterized in that, This is applied to a non-consistent memory access NUMA architecture, which includes multiple request nodes and multiple consistent nodes. The multiple request nodes and multiple consistent nodes of the NUMA architecture are divided into multiple groups, each group including at least one request node and at least one consistent node, comprising: The requesting node initiates an access request, which includes a request address, and the requesting node is located in the first group; The requesting node determines the target consistency node based on the request address. The target consistency node is either a first-level consistency node or a second-level consistency node. The first-level consistency node is a consistency node used to manage cache consistency among requesting nodes within the first group, and the second-level consistency node is a consistency node used to manage global cache consistency of the NUMA architecture. The requesting node sends an access request to the target consistency node; The target consistency node returns a request response to the requesting node, and the request response includes cached data of the request address; The step of determining the target consistency node based on the requested address includes: The primary consistency node and the secondary consistency node are determined based on the requested address; If the first-level consistency node and the second-level consistency node are the same consistency node, then the second-level consistency node is determined as the target consistency node; If the first-level consistency node and the second-level consistency node are different consistency nodes, the first-level consistency node is determined as the target consistency node.

2. The method according to claim 1, characterized in that, The first-level consistency node is determined based on the requested address, including: Based on the request address and the number of consistent nodes in the first group, determine the index value of the first-level consistent node in the first group; The first-level consistency node is determined based on its index value in the first group.

3. The method according to claim 2, characterized in that, The step of determining the index value of the first-level consistency node in the first group based on the request address and the number of consistency nodes in the first group includes: Obtain the hash attribute of the first group, which includes the number of consistent nodes in the first group, the hash algorithm used by the first group, and the base index of the consistent nodes in the first group in a preset consistent node lookup table. Based on the number of consistent nodes in the first group and the hash algorithm used in the first group, a hash operation is performed on the request address to obtain the hash offset of the first-level consistent node in the first group; The index value of the first-level consistent node in the first group is determined based on the base index of the consistent node in the preset consistent node lookup table within the first group and the hash offset of the first-level consistent node within the first group.

4. The method according to claim 2, characterized in that, Determining the first-level consistency node based on its index value in the first group includes: In the preset mapping table, the target identifier corresponding to the index value of the first-level consistency node in the first group is found, and the consistency node indicated by the found target identifier is determined as the first-level consistency node. The preset mapping table is used to indicate the mapping relationship between the index value and the target identifier.

5. The method according to claim 1, characterized in that, The second-level consistency node is determined based on the requested address, including: Based on the request address and the number of consistency nodes within the NUMA architecture, determine the index value of the second-level consistency node in the NUMA architecture; The secondary consistency node is determined based on its index value in the NUMA architecture.

6. The method according to claim 5, characterized in that, Determining the index value of the second-level consistency node in the NUMA architecture based on the request address and the number of consistency nodes within the NUMA architecture includes: Obtain the hash attribute of the NUMA architecture, which includes the number of consistent nodes in the NUMA architecture, the hash algorithm used by the NUMA architecture, and the base index of the consistent nodes in the NUMA architecture in a preset consistent node lookup table. Based on the number of consistent nodes in the NUMA architecture and the hash algorithm used by the NUMA architecture, a hash operation is performed on the request address to obtain the hash offset of the second-level consistent node in the NUMA architecture; The index value of the second-level consistency node in the NUMA architecture is determined based on the base index of the consistency node in the preset consistency node lookup table and the hash offset of the second-level consistency node in the NUMA architecture.

7. The method according to claim 5, characterized in that, The step of determining the second-level consistency node based on its index value in the NUMA architecture includes: In a preset mapping table, a target identifier corresponding to the index value of the secondary consistency node in the NUMA architecture is found, and the consistency node indicated by the found target identifier is determined as the secondary consistency node. The preset mapping table is used to indicate the mapping relationship between the index value and the target identifier.

8. The method according to claim 1, characterized in that, The request nodes and consistency nodes in each die can be grouped together, or the request nodes and consistency nodes in each die can be divided into multiple groups, or the request nodes and consistency nodes in different dies of the same chip can be grouped together.

9. The method according to claim 1, characterized in that, The method further includes: When the target consistency node is a first-level consistency node, the target consistency node reads the cached data within the first group.

10. The method according to claim 9, characterized in that, The method further includes: If the target consistency node does not read the cached data, it determines the secondary consistency node based on the request address. The target consistency node routes the access request to the secondary consistency node; The target consistency node receives the cached data returned by the secondary consistency node.

11. The method according to claim 10, characterized in that, The step of determining the second-level consistency node based on the requested address includes: Based on the request address and the number of second-level consistency nodes in the NUMA architecture, determine the index value of the second-level consistency node in the NUMA architecture; The secondary consistency node is determined based on its index value in the NUMA architecture.

12. The method according to claim 11, characterized in that, The step of determining the index value of the second-level consistency node in the NUMA architecture based on the request address and the number of second-level consistency nodes in the NUMA architecture includes: Obtain the hash attribute of the NUMA architecture, which includes the number of second-level consistency nodes in the NUMA architecture, the hash algorithm used by the NUMA architecture, and the base index of the second-level consistency nodes in the second-level consistency node lookup table. Based on the number of second-level consistency nodes in the NUMA architecture and the hash algorithm used by the NUMA architecture, a hash operation is performed on the request address to obtain the hash offset of the second-level consistency node in the NUMA architecture; The index value of the second-level consistency node in the NUMA architecture is determined based on the base index of the second-level consistency node in the second-level consistency node lookup table and the hash offset of the second-level consistency node in the NUMA architecture.

13. The method according to claim 11, characterized in that, The step of determining the second-level consistency node based on its index value in the NUMA architecture includes: In a preset mapping table, a target identifier corresponding to the index value of the secondary consistency node in the NUMA architecture is found, and the consistency node indicated by the found target identifier is determined as the secondary consistency node. The preset mapping table is used to indicate the mapping relationship between the index value and the target identifier.

14. The method according to claim 1, characterized in that, The method further includes: When the target consistency node is a second-level consistency node, the target consistency node reads the cached data within the NUMA architecture.

15. A NUMA architecture, characterized in that, The NUMA architecture includes multiple request nodes and multiple consistency nodes. The multiple request nodes and multiple consistency nodes of the NUMA architecture are divided into multiple groups, and each group includes at least one request node and at least one consistency node. The request node, located in the first group, is used to initiate access requests; The target consistency node is determined based on the requested address, wherein the target consistency node is a first-level consistency node or a second-level consistency node. The first-level consistency node is a consistency node used to manage cache consistency among requesting nodes within the first group, and the second-level consistency node is a consistency node used to manage global cache consistency of the NUMA architecture. An access request is sent to the target consistency node. The target consistency node is used to return a request response to the request node, and the request response includes cached data of the request address; The step of determining the target consistency node based on the requested address includes: The primary consistency node and the secondary consistency node are determined based on the requested address; If the first-level consistency node and the second-level consistency node are the same consistency node, then the second-level consistency node is determined as the target consistency node; If the first-level consistency node and the second-level consistency node are different consistency nodes, the first-level consistency node is determined as the target consistency node.

16. A computer-readable medium, characterized in that, It stores a computer program thereon, which, when executed by a processor, implements the method described in any one of claims 1 to 14.

17. A computer program product, characterized in that, It includes a computer program that, when executed by a processor, implements the method described in any one of claims 1 to 14.

Images