Display device

Abstract

The invention provides a display device. In response to the display panel, the display panel is configured to work in a two-dimensional display mode, and the refractive indexes of the two branches in each sub-pixel are the same; the display panel is configured to work in a three-dimensional display mode in response to the display panel, the two subsections of the same sub-pixel have different refractive indexes, and in the same basic pixel unit, the subsections corresponding in position in all the sub-pixels have the same refractive index. And in the 2D mode, the two subsections of the sub-pixels are combined for single-pixel display. And in the 3D mode, the two branch light rays of the sub-pixels are refracted to different directions to form parallax. And meanwhile, the number of the sub-pixels in each basic pixel unit is fixed, so that stable viewpoint resolution is ensured, and the viewpoint resolution of 3D display can be improved.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display device. Background Technology

[0002] The development of 3D display technology is the result of technological progress, industrial upgrading, and the increasing demands of human needs. Its core value lies in breaking through the limitations of traditional 2D displays, bringing revolutionary improvements to information transmission, interactive experience, and application scenarios. Traditional 2D displays compress the three-dimensional world into a plane, losing depth information and spatial relationships, resulting in incomplete information transmission. 3D displays, by restoring stereoscopic vision, allow humans to receive information in a more natural and physiologically compatible way, reducing the "cognitive conversion cost."

[0003] However, existing 3D multi-view display technologies have significant drawbacks: when the number of viewpoints increases or decreases rapidly, or when the viewpoint positions move, the display effects of some viewpoints become inconsistent, leading to a degraded visual experience. In traditional solutions, viewpoint switching requires the reallocation of pixel resources, resulting in resolution loss. Summary of the Invention

[0004] The main technical problem addressed by this application is to provide a display device that solves the problem of how to improve the viewpoint resolution of 3D displays in the prior art.

[0005] To solve the above-mentioned technical problems, the first technical solution provided in this application is: to provide a display device, comprising: The display panel includes multiple basic pixel units, each basic pixel unit includes multiple sub-pixels of different colors; each sub-pixel includes two symmetrically arranged parts. The control circuit is configured to output a viewpoint control signal to the display panel in a three-dimensional display mode; the viewpoint control signal is used to indicate whether to maintain or adjust the current viewpoint configuration information, which includes viewpoint quantity information and / or viewpoint position information. In this configuration, the display panel is set to operate in a two-dimensional display mode, where the refractive indices of the two portions in each sub-pixel are the same. In response to the display panel being configured to operate in a three-dimensional display mode, two portions of the same sub-pixel have different refractive indices, and within the same basic pixel unit, the portions corresponding to the positions in all sub-pixels have the same refractive index.

[0006] In some embodiments, the display panel further includes: The first substrate is a driving substrate; The second substrate is disposed opposite to the first substrate, and the light-emitting side of the display panel is located outside the second substrate; the second substrate includes a dimming structure, the dimming structure includes multiple dimming layers, and the dimming layers have electric field-dependent refractive index characteristics. Each section is equipped with a unique dimming layer.

[0007] In some embodiments, the dimming structure further includes multiple electrode pairs, each corresponding to a dimming layer; the two control electrodes in each electrode pair are located on opposite sides of the corresponding dimming layer in the thickness direction; wherein... Multiple dimming layers are patterned using the same material layer, and the control electrodes located on the same side of the dimming layers are patterned using the same conductive layer; or, On the surface of the second substrate, two control electrodes located on the same side of the dimming layer and arbitrarily adjacent to each other are formed using different conductive layer patterns.

[0008] In some embodiments, in response to the display panel being configured to operate in a three-dimensional display mode, the display panel includes a plurality of composite pixel units arranged in an array; each composite pixel unit consists of N basic pixel units arranged continuously along a preset direction, wherein N is an integer greater than or equal to 1, and the value of N corresponds to the number of viewpoints in the three-dimensional display mode.

[0009] In some embodiments, the first substrate further includes multiple rows of scan lines and multiple columns of data lines; each row of sub-pixels corresponds to a scan line group consisting of two scan lines; the two parts of the same sub-pixel are respectively connected to different scan lines in the same scan line group and share the same data line; In response to the display panel being configured to operate in a two-dimensional display mode, the timing of the scan lines corresponding to each row of sub-pixels is the same, multiple scan line groups are scanned sequentially, and the timing of adjacent scan lines has an overlapping area. The signal of the data line is a periodic square wave signal, and the pulse width is a first preset value. In response to the display panel being configured to operate in a three-dimensional display mode, with the preset direction being the row direction; multiple scan lines are scanned line by line, and the timing of adjacent scan lines has an overlapping area; the data line signal is a periodic square wave signal, and the pulse width is a second preset value; the first preset value is twice the second preset value.

[0010] In some embodiments, the control circuit includes: The detection and judgment module is configured to sample the current viewpoint configuration information in real time and output data signals based on the viewpoint configuration information; The data latch unit includes a data input terminal, a clock input terminal, and an output terminal, and is configured to latch the data signal at the data input terminal to the output terminal on a single edge of the clock signal; The control module is connected to the output of the data latch unit and outputs viewpoint control signals based on the output status of the data latch unit.

[0011] In some embodiments, the initial sampling time of the detection and determination module precedes the single edge of the first high level of the clock signal.

[0012] In some embodiments, the working cycle of the control circuit includes a working phase and an initialization phase in sequence; in the initialization phase, the data signal output by the detection and determination module is a preset logic level, and the clock signal includes at least a high-level range; The control module is also configured as follows: In response to the fact that the output data of the data latch unit is the same during the working phase and is at the first logic level, a view control signal indicating the adjustment of the current view configuration information is output. In response to the fact that the output data of the data latch unit during the working phase includes at least one second logic level, a view control signal indicating the maintenance of the current view configuration information is output; the preset logic level is the second logic level.

[0013] In some embodiments, the data latch unit is a single unit, and the clock signal is a periodic square wave signal. During the operation phase, the clock signal includes at least two high-level intervals; or, There are multiple data latch units, each corresponding to a clock signal. During the operation phase, each clock signal includes a high-level interval, and the high-level intervals of any two clock signals are staggered in timing.

[0014] In some embodiments, the detection and determination module is further configured to: Viewpoint configuration information is sampled using a preset sampling method, and the corresponding data signal is output based on the sampling results at the preset period boundary within each preset period. The data signal remains valid within the preset period or is updated only at the preset period boundary. The preset period boundary includes either the start time or the end time of the preset period; the preset sampling method includes continuous sampling or sampling with a fixed sampling period.

[0015] The beneficial effects of this application are as follows: Unlike existing technologies, this application provides a display device including a display panel and a control circuit. The display panel includes multiple basic pixel units, each basic pixel unit including multiple sub-pixels of different colors; each sub-pixel includes two symmetrically arranged portions; the control circuit is configured to output a viewpoint control signal to the display panel in a three-dimensional display mode; the viewpoint control signal is used to indicate maintaining or adjusting current viewpoint configuration information, which includes viewpoint quantity information and / or viewpoint position information; wherein, in response to the display panel being configured to operate in a two-dimensional display mode, the two portions of each sub-pixel have the same refractive index; in response to the display panel being configured to operate in a three-dimensional display mode, the two portions of the same sub-pixel have different refractive indices, and within the same basic pixel unit, the portions corresponding to the positions of all sub-pixels have the same refractive index. In 2D mode, the two portions of a sub-pixel are merged into a single pixel for display. In 3D mode, the light from the two portions of the sub-pixel is refracted in different directions, forming parallax. Meanwhile, the number of sub-pixels within each basic pixel unit is fixed, ensuring stable viewpoint resolution and thus improving the viewpoint resolution of 3D displays. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.

[0017] Figure 1 This is a schematic diagram of the structure of an embodiment of the display device provided in this application; Figure 2 This is a side view structural diagram of an embodiment of the display panel provided in this application; Figure 3 This is a top view structural diagram of an embodiment of the display panel provided in this application; Figure 4 yes Figure 3 A schematic diagram of the structure of a basic pixel unit in one embodiment; Figure 5 This is a top view of another embodiment of the display panel provided in this application. Figure 6 This is a partial structural schematic diagram of the first embodiment of the dimming structure provided in this application; Figure 7 This is a partial structural schematic diagram of the second embodiment of the dimming structure provided in this application; Figure 8This is a partial structural schematic diagram of the third embodiment of the dimming structure provided in this application; Figure 9 This is a schematic diagram of the arrangement structure of the first part of the subgroup provided in the embodiments of this application; Figure 10 This is a schematic diagram of the arrangement structure of the first part in another embodiment of the subgroup provided in this application; Figure 11 This is a schematic diagram of the arrangement structure of the first part in another embodiment of the subgroup provided in this application; Figure 12 This is a timing diagram of an embodiment of data lines and scan lines in a two-dimensional display mode provided in this application. Figure 13 This is a timing diagram of an embodiment of data lines and scan lines in a three-dimensional display mode provided in this application. Figure 14 This is a schematic diagram of a module of an embodiment of the control circuit provided in this application; Figure 15 This is a schematic diagram of the working process of one embodiment of the control circuit provided in this application; Figure 16 This is a status association table of multiple data latching units provided in the embodiments of this application; Figure 17 This is a timing diagram of the clock signal, data signal, and data latch unit output signal in one working cycle provided in the embodiments of this application; Figure 18 This is a signal level flow diagram of the first data latch unit provided in this application embodiment at the end of the previous working cycle; Figure 19 yes Figure 18 The truth table corresponding to the first data latch unit in the middle; Figure 20 This is a signal level flow diagram of the first data latch unit provided in this application embodiment at the initial moment of the first preset period; Figure 21 yes Figure 20 The truth table corresponding to the first data latch unit in the middle; Figure 22 This is a signal level flow diagram of the first data latch unit provided in this application embodiment at the rising edge of the clock signal; Figure 23 yes Figure 22 The truth table corresponding to the first data latch unit in the middle; Figure 24 This is a timing diagram of the clock signal, data signal, and data latch unit output signal provided in an embodiment of this application during another working cycle.

[0018] Explanation of icon numbers: 100. Display panel; 101. Light-emitting side; 10. Basic pixel unit; 11. Subpixel; 110. Division; 111. First division; 112. Second division; 113. Division group; 114. First division group; 115. Second division group; 20. First substrate; 21. Scan line; 211. Scan line group; 22. Data line; 30. Second substrate; 40. Dimming structure; 41. Dimming layer; 42. Electrode pair; 420. Control electrode; 421. First control electrode; 422. Second control electrode; 50. Composite pixel unit; 60. Control circuit; 61. Detection and judgment module; 62. Data latch unit; 63. Control module; 200. Display device; CK, Clock signal; D, Data signal. Detailed Implementation

[0019] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0020] In the following description, specific details such as particular system architectures, interfaces, and technologies are presented for illustrative purposes rather than for limiting purposes, in order to provide a thorough understanding of this application.

[0021] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0022] The terms "first," "second," and "third" in this application are for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first," "second," or "third" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified. All directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of this application are only used to explain the relative positional relationships and movements between components in a specific orientation (as shown in the figures). If the specific orientation changes, the directional indications also change accordingly. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices.

[0023] In this document, the term "embodiment" means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0024] Please see Figures 1 to 5 , Figure 1 This is a schematic diagram of the structure of an embodiment of the display device provided in this application; Figure 2 This is a side view structural diagram of an embodiment of the display panel provided in this application. Figure 3 This is a top view schematic diagram of an embodiment of the display panel provided in this application. Figure 4 yes Figure 3 A schematic diagram of the structure of a basic pixel unit in one embodiment. Figure 5 This is a top view structural diagram of another embodiment of the display panel provided in this application.

[0025] This application provides a display panel 100. The display device 200 includes the display panel 100 and a control circuit 60. The display panel 100 includes a plurality of basic pixel units 10, and each basic pixel unit 10 includes a plurality of sub-pixels 11 of different colors. Each sub-pixel 11 includes two symmetrically arranged portions 110. The control circuit 60 is configured to output a viewpoint control signal to the display panel 100 in a three-dimensional display mode. The viewpoint control signal is used to indicate whether to maintain or adjust the current viewpoint configuration information, which includes viewpoint quantity information and / or viewpoint position information. In response to the display panel 100 being configured to operate in a two-dimensional display mode, the two portions 110 in each sub-pixel 11 have the same refractive index. In response to the display panel 100 being configured to operate in a three-dimensional display mode, the two portions 110 of the same sub-pixel 11 have different refractive indices, and within the same basic pixel unit 10, the portions 110 at corresponding positions in all sub-pixels 11 have the same refractive index.

[0026] In 2D mode, the two portions 110 of subpixel 11 are merged into a single pixel for display. In 3D mode, the light from the two portions 110 of subpixel 11 is refracted in different directions, creating parallax. Simultaneously, the number of subpixels 11 within each basic pixel unit 10 is fixed, ensuring stable viewpoint resolution and thus improving the viewpoint resolution of the 3D display.

[0027] In some embodiments, the display panel 100 further includes a first substrate 20 and a second substrate 30. The first substrate 20 is a driving substrate; the second substrate 30 is disposed opposite to the first substrate 20, and the light-emitting side 101 of the display panel 100 is located outside the second substrate 30; the second substrate 30 includes a dimming structure 40, the dimming structure 40 includes a plurality of dimming layers 41, and the dimming layers 41 have electric field-dependent refractive index characteristics; wherein, each portion 110 is provided with a unique dimming layer 41.

[0028] The driving substrate, also known as the array substrate, is used to provide driving circuits and electrical signal paths for sub-pixels 11.

[0029] For example, the display panel 100 may be a liquid crystal panel, and the second substrate 30 may be a counter substrate or a color filter substrate.

[0030] For example, the display panel 100 may be an organic light-emitting diode display panel 100 (OLED display panel 100) or an inorganic light-emitting diode display panel 100. The second substrate 30 is an encapsulation substrate.

[0031] The light-emitting side 101 of the display panel 100 is disposed on the side of the second substrate 30 away from the first substrate 20.

[0032] For example, multiple dimming layers 41 are spaced apart and configured to be independently controlled, so that each region can be independently controlled, thereby achieving spatial optical path modulation and reducing electro-optical crosstalk between adjacent regions.

[0033] The dimming layer 41 in the dimming structure 40 is made of a material with electric field-dependent refractive index characteristics, and the dimming layer 41 utilizes polymer electro-optic materials to achieve electro-optic effects. For example, a photoelectric material layer doped with organic electro-optic molecules such as azo or carbazole can be used.

[0034] When an electric field is applied to the dimming layer 41, the molecules will align in a direction along the electric field under the action of the perpendicular electric field (polarization process), which will cause the refractive index of the dimming layer 41 to change.

[0035] In two-dimensional display mode, no electric field is applied to the dimming layer 41, so the two portions 110 of each sub-pixel 11 have the same refractive index. In three-dimensional display mode, a vertical electric field is applied by the control electrode 420 to change the refractive index of the dimming layer 41, making the two portions 110 of each sub-pixel 11 have different refractive indices, thereby achieving parallax.

[0036] In 3D display mode, the refractive index of corresponding portions 110 within the same basic pixel unit 10 is ensured to be the same, so that each basic pixel unit 10 can stably form a viewpoint without changing the resolution. That is, within the same basic pixel unit 10, all first portions 111 have the same refractive index, and all second portions 112 have the same refractive index.

[0037] There are no restrictions on the color and number of sub-pixels 11 within the basic pixel unit 10; they can be selected according to actual needs.

[0038] The following describes a basic pixel unit 10 comprising three different colored sub-pixels 11, namely red, green and blue pixels.

[0039] In this design, the two parts 110 of the red pixel are represented as R1 and R2, the two parts 110 of the green pixel are represented as G1 and G2, and the two parts 110 of the blue pixel are represented as B1 and B2.

[0040] In some embodiments, the two portions 110 of each sub-pixel 11 are defined as a first portion 111 and a second portion 112, respectively. In each sub-pixel 11, the layout of the first portion 111 and the second portion 112 is identical. In each sub-pixel 11, the spatial position of the first portion 111 within the corresponding sub-pixel 11 is identical, and the spatial position of the second portion 112 within the corresponding sub-pixel 11 is identical. For example, as... Figure 5 As shown, the first portion 111 and the second portion 112 of each sub-pixel 11 are symmetrically distributed left and right, with the first portion 111 of all sub-pixels 11 on the left and the second portion 112 of all sub-pixels 11 on the right. For example, as... Figure 3 As shown, the first part 111 and the second part 112 in each sub-pixel 11 are symmetrically distributed vertically.

[0041] There are no restrictions on the shape of sub-pixel 11 here; it can be selected according to actual needs.

[0042] For example, sub-pixel 11 is a rectangle, and both portions 110 of sub-pixel 11 are rectangles and are symmetrically distributed along the midline of sub-pixel 11.

[0043] For example, sub-pixel 11 is a rectangle, and the two portions 110 of sub-pixel 11 are triangles, symmetrically arranged along the diagonal of sub-pixel 11.

[0044] A division 110 is configured with only one dimming layer 41.

[0045] Each basic pixel unit 10 includes two subgroups 113, each subgroup 113 consisting of corresponding subgroups 113 with the same spatial position. For example, in each basic pixel unit 10, all the first subgroups 111 form a first subgroup 114, and all the second subgroups 112 form a second subgroup 115.

[0046] The refractive index between the two subgroups 113 in each basic pixel unit 10 is configured to be independently controlled in order to facilitate parallax adjustment in three-dimensional display mode.

[0047] The multiple dimming layers 41 within the subgroup 113 can be configured to be controlled independently, or the multiple dimming layers 41 within the subgroup 113 can be configured to be controlled synchronously to simplify the control method of the dimming layers 41.

[0048] Please see Figures 1 to 8 , Figure 6 This is a partial structural schematic diagram of the first embodiment of the dimming structure provided in this application. Figure 7 This is a partial structural schematic diagram of the second embodiment of the dimming structure provided in this application. Figure 8 This is a partial structural schematic diagram of the third embodiment of the dimming structure provided in this application.

[0049] In some embodiments, the dimming structure 40 further includes a plurality of electrode pairs 42, each electrode pair 42 being disposed in a one-to-one correspondence with a dimming layer 41; two control electrodes 420 in the electrode pair 42 are respectively located on opposite sides of the thickness direction of the corresponding dimming layer 41; wherein the plurality of dimming layers 41 are patterned using the same material layer, and the control electrodes 420 located on the same side of the dimming layer 41 are patterned using the same conductive layer; or, in the direction of the second substrate 30, two control electrodes 420 located on the same side of the dimming layer 41 and arbitrarily adjacent are patterned using different conductive layers.

[0050] The thickness direction of the dimming layer 41 is perpendicular to the surface direction of the second substrate 30.

[0051] The two control electrodes 420 in the electrode pair 42 are located on opposite sides of the thickness direction of the dimming layer 41, forming a vertical electric field. Parallax adjustment is achieved by changing the refractive index of the dimming layer 41.

[0052] It should be understood that different electrode pairs 42 can be controlled synchronously, in zones, or independently.

[0053] The two control electrodes 420 of each electrode pair 42 are defined as the first control electrode 421 and the second control electrode 422, respectively. The first control electrode 421 is located on the side of the dimming layer 41 away from the first substrate 20.

[0054] The refractive index of the corresponding dimming layer 41 is adjusted by regulating the voltage between the first control electrode 421 and the second control electrode 422.

[0055] In some embodiments, such as Figure 6 As shown, multiple dimming layers 41 are patterned using the same material layer, and the control electrodes 420 located on the same side of the dimming layers 41 are patterned using the same conductive layer, which simplifies the fabrication process.

[0056] In other embodiments, such as Figure 7 and Figure 8 As shown, in the direction of the second substrate 30, two control electrodes 420 located on the same side of the dimming layer 41 and arbitrarily adjacent are formed using different conductive layer patterns.

[0057] For example, such as Figure 7 As shown, multiple dimming layers 41 are patterned using the same material layer. The first control electrode 421 corresponding to the dimming layer 41 in the first portion 111 is patterned using a conductive layer and is in contact with the corresponding dimming layer 41. The first control electrode 421 corresponding to the dimming layer 41 in the second portion 112 is patterned using another conductive layer and is spaced apart from the corresponding dimming layer 41. The second control electrode 422 corresponding to the dimming layer 41 in one of the first portion 111 and the second portion 112 is patterned using a conductive layer and is in contact with the corresponding dimming layer 41. The second control electrode 422 corresponding to the dimming layer 41 in the other portion 112 is patterned using another conductive layer and is spaced apart from the corresponding dimming layer 41.

[0058] For example, such as Figure 8 As shown, the dimming layer 41 configured in the first section 111 is formed by patterning a material layer, and the dimming layer 41 configured in the second section 112 is formed by patterning a different material layer, so that the dimming layers 41 configured in the first section 111 and the second section 112 are respectively arranged in different layers. The two control electrodes 420 in the electrode pair 42 are in contact with the corresponding dimming layers 41, so that the first control electrode 421 corresponding to the first section 111 and the first control electrode 421 corresponding to the second section 112 are respectively arranged in different layers, thereby achieving layered insulation.

[0059] In some embodiments, in the subgroup 113, adjacent control electrodes 420 located on the same side of the dimming layer 41 are insulated from each other and spaced apart, so as to independently control the refractive index of each subgroup 110. In other embodiments, in the subgroup 113, the control electrodes 420 located on the same side of the dimming layer 41 are electrically connected to each other, so as to synchronously control the refractive index of each dimming layer 41.

[0060] Insulation is achieved between the control electrodes 420 by setting an insulating layer.

[0061] The control methods of the first control electrode 421 and the second control electrode 422 in the subgroup 113 can be the same or different.

[0062] Please see Figures 1 to 11 , Figure 9 This is a schematic diagram of the arrangement structure of the first part of the subgroup provided in the embodiments of this application. Figure 10 This is a schematic diagram of the arrangement structure of the first part in another embodiment of the subgroup provided in this application. Figure 11This is a schematic diagram of the arrangement structure of another embodiment of the first part in the subgroup provided in the embodiments of this application.

[0063] For example, such as Figure 9 As shown, in the subgroup 113, each first control electrode 421 is configured to be independently controlled, and each second control electrode 422 is interconnected to form a block structure or a mesh structure.

[0064] For example, such as Figure 10 As shown, in the subgroup 113, each first control electrode 421 is configured to be independently controlled, and each second control electrode 422 is configured to be independently controlled, so that each subgroup 110 is configured to be independently controlled.

[0065] For example, such as Figure 11 As shown, in the subgroup 113, each first control electrode 421 is interconnected to form a whole layer structure or a mesh structure, and each second control electrode 422 is interconnected to form a whole layer structure or a mesh structure.

[0066] In some embodiments, in response to the display panel 100 being configured to operate in a three-dimensional display mode, the display panel 100 includes a plurality of composite pixel units 50 arranged in an array (see...). Figure 3 Each composite pixel unit 50 consists of N basic pixel units 10 arranged continuously along a preset direction, where N is an integer greater than or equal to 1, and the value of N corresponds to the number of viewpoints in the three-dimensional display mode.

[0067] In some embodiments, the arrangement direction of the sub-pixels 11 in the basic pixel unit 10 is the same as the arrangement direction of the basic pixel unit 10 in the composite pixel unit 50. In other embodiments, the arrangement direction of the sub-pixels 11 in the basic pixel unit 10 intersects with the arrangement direction of the basic pixel unit 10 in the composite pixel unit 50.

[0068] For example, in the basic pixel unit 10, a plurality of sub-pixels 11 are arranged along a preset direction.

[0069] For example, with one viewpoint, there is one basic pixel unit 10 in the composite pixel unit 50, and the refractive indices of the first subgroup 114 and the second subgroup 115 in the basic pixel unit 10 are different. In some embodiments, when there is one viewpoint, the refractive indices of the first subgroup 114 and the second subgroup 115 of each basic pixel unit 10 are all the same; in other embodiments, when there is one viewpoint, the refractive indices of the first subgroup 114 and / or the refractive indices of the second subgroup 115 in different basic pixel units 10 may be different. For example, the refractive indices of the first subgroup 114 in adjacent or closely spaced basic pixel units 10 may be the same, while the refractive indices of the first subgroup 114 in more distant basic pixel units 10 may be different.

[0070] For example, there are multiple viewpoints. In the composite pixel unit 50, there are multiple basic pixel units 10. The refractive indices of the first subgroups 114 in different basic pixel units 10 are different, the refractive indices of the second subgroups 115 in different basic pixel units 10 are different, and the refractive indices of the first subgroups 114 and the second subgroups 115 in a single basic pixel unit 10 are different.

[0071] In some embodiments, the refractive indices of each subgroup 113 are configured to be controlled independently to optimize the display effect. For example, when there is only one viewpoint, the refractive indices of the first subgroup 114 in different basic pixel units 10 may be different. For instance, the refractive index of the first subgroup 111 in the basic pixel unit 10 in the middle display area of ​​the display panel 100 and the refractive index of the first subgroup 111 in the basic pixel unit 10 in the edge display area of ​​the display panel 100 need to have a slight difference due to the viewing angle. Adjusting the refractive index of the dimming layer 41 by using independent control can optimize the display effect.

[0072] In other embodiments, the preset direction is the row direction. In each row of composite pixel units 50, the refractive index between the subgroups 113 is configured to be independently controlled. In each column of composite pixel units 50, the refractive index between each first subgroup 114 and the refractive index between each second subgroup 115 are configured to be synchronously controlled to simplify the control method.

[0073] One basic pixel unit 10 in each composite pixel unit 50 corresponds to one viewpoint.

[0074] By setting the value of N to the number of viewpoints in 3D display mode, the display panel 100 can dynamically adjust the number of viewpoints according to the number of viewers or scene requirements without reducing the resolution. Because the size of each basic pixel unit 10 and the number of sub-pixels 11 are fixed, the change in the number of viewpoints is achieved only by adjusting the arrangement of the basic pixel units 10, rather than changing the internal structure of the units.

[0075] Please see Figure 1 , Figure 12 and Figure 13 , Figure 12 This is a timing diagram of an embodiment of data lines and scan lines in a two-dimensional display mode provided in this application. Figure 13 This is a timing diagram of an embodiment of data lines and scan lines in a three-dimensional display mode provided in this application.

[0076] In some embodiments, the first substrate 20 further includes multiple rows of scan lines 21 and multiple columns of data lines 22; each row of sub-pixels 11 corresponds to a scan line group 211 consisting of two scan lines 21; two portions 110 of the same sub-pixel 11 are respectively connected to different scan lines 21 in the same scan line group 211 and share the same data line 22; in response to the display panel 100 being configured to operate in a two-dimensional display mode, the timing of the scan lines 21 corresponding to each row of sub-pixels 11 is the same, multiple scan line groups 211 are scanned sequentially, and the timing of adjacent scan lines 21 has an overlapping area, the signal of the data line 22 is a periodic square wave signal, and the pulse width is a first preset value; in response to the display panel 100 being configured to operate in a three-dimensional display mode, and the preset direction is the row direction; multiple rows of scan lines 21 are scanned row by row, and the timing of adjacent scan lines 21 has an overlapping area, the signal of the data line 22 is a periodic square wave signal, and the pulse width is a second preset value; the first preset value is twice the second preset value.

[0077] The n scan lines 21 are represented as Gate1 to Gaten. The signal on the data line 22 is represented as Data.

[0078] By setting the pulse width of the data line 22 in the two-dimensional display mode to twice that in the three-dimensional display mode, the sub-pixel 11 is fully charged in the two-dimensional display mode, maintaining high-resolution display quality. In the three-dimensional display mode, the scan line 21 is scanned line by line in combination with a timing overlap design to prevent display abnormalities caused by scanning misalignment. At the same time, the pulse width of the data line 22 is shortened to make parallax generation more accurate and achieve the effect of separating light from the left and right eyes.

[0079] Please see Figures 13 to 15 , Figure 13 This is a schematic diagram of the structure of an embodiment of the display device provided in this application. Figure 14 This is a schematic diagram of a module of one embodiment of the control circuit provided in this application. Figure 15This is a schematic diagram of the working process of one embodiment of the control circuit provided in this application.

[0080] In some embodiments, the control circuit 60 includes a detection and determination module 61, a data latching unit 62, and a control module 63. The detection and determination module 61 is configured to sample the current viewpoint configuration information in real time and output a data signal D (see...) based on the viewpoint configuration information. Figure 17 The data latch unit 62 includes a data input terminal, a clock input terminal, and an output terminal, configured to latch on clock signal CK (see...). Figure 18 The single edge of the data input terminal latches the data signal D to the output terminal; the control module 63 is connected to the output terminal of the data latch unit 62 and outputs the view control signal based on the output state of the data latch unit 62.

[0081] The data input terminal of the data latch unit 62 is used to receive the data signal D, and the clock input terminal is used to receive the clock signal CK.

[0082] The current viewpoint configuration information can be obtained using methods such as infrared cameras. There are no restrictions on the method used to sample the current viewpoint configuration information; the choice can be made based on actual needs.

[0083] Viewpoint quantity information includes, but is not limited to, changes in the number of viewers.

[0084] Viewpoint location information includes, but is not limited to, changes in the viewer's position.

[0085] There is a correspondence between the viewpoint control signals and the viewpoint configuration information.

[0086] In some embodiments, the viewpoint configuration information includes viewpoint quantity information, and the viewpoint control signal is used to indicate whether to maintain the current number of viewpoints (i.e., the number of viewpoints remains unchanged) or to adjust the current number of viewpoints.

[0087] In other embodiments, the viewpoint configuration information includes viewpoint position information, and the viewpoint control signal is used to indicate whether to maintain the current viewpoint position (i.e., the viewpoint position remains unchanged) or to adjust the current viewpoint position.

[0088] In some other embodiments, such as Figure 15As shown, the viewpoint configuration information includes viewpoint quantity information and viewpoint position information. The viewpoint control signals include a first viewpoint control signal and a second viewpoint control signal. The first viewpoint control signal is used to indicate whether to maintain the current number of viewpoints or adjust the current number of viewpoints. The second viewpoint control signal is used to indicate whether to maintain the current viewpoint position or adjust the current viewpoint position. The data latching unit 62 is divided into two groups. The first group of data latching units 62 is used to latch the data signal D output based on the viewpoint quantity information to the output terminal, and the control module 63 outputs the first viewpoint control signal. The second group of data latching units 62 is used to latch the data signal D output based on the viewpoint position information to the output terminal, and the control module 63 outputs the second viewpoint control signal. The number of data latching units 62 in each group of data latching units 62 is at least one.

[0089] A single edge can be either a rising edge or a falling edge.

[0090] For example, the data latch unit 62 is configured to latch the data signal D at the data input terminal to the output terminal at the rising edge of the clock signal CK, and the initial sampling time of the detection and judgment module 61 is ahead of the first high-level start time of the clock signal CK, so as to avoid the omission of initial sampling data and affect the accuracy of the viewpoint control signal.

[0091] For example, the data latch unit 62 is configured to latch the data signal D at the data input terminal to the output terminal on the falling edge of the clock signal CK, and the initial sampling time of the detection and judgment module 61 is ahead of the first high-level termination time of the clock signal CK, so as to avoid the omission of initial sampling data and affect the accuracy of the viewpoint control signal.

[0092] In some embodiments, the initial sampling time of the detection and determination module 61 precedes the single edge of the first high level of the clock signal CK.

[0093] The data latch unit 62 is configured to latch the data signal D at the data input terminal to the output terminal at the rising edge of the clock signal CK, so the initial sampling time of the detection and judgment module 61 is ahead of the rising edge of the first high level of the clock signal CK.

[0094] The data latch unit 62 is configured to latch the data signal D at the data input terminal to the output terminal at the falling edge of the clock signal CK, so the initial sampling time of the detection and judgment module 61 is ahead of the falling edge of the first high level of the clock signal CK.

[0095] For example, the initial sampling time of the detection and judgment module 61 is ahead of the rising edge of the first high level of the clock signal CK.

[0096] In some embodiments, the working cycle of the control circuit 60 includes a working phase and an initialization phase in sequence; in the initialization phase, the data signal D output by the detection and determination module 61 is a preset logic level, and the clock signal CK includes at least a high-level range; wherein, the control module 63 is further configured to: in response to the data output of the data latch unit 62 being the same and at a first logic level during the working phase, output a view control signal indicating adjustment of the current view configuration information; in response to the data output of the data latch unit 62 including at least one second logic level during the working phase, output a view control signal indicating maintenance of the current view configuration information; the preset logic level is the second logic level.

[0097] One of the first logic level and the second logic level is high, and the other is low.

[0098] During the initialization phase, the data signal D output by the detection and judgment module 61 is at a preset logic level, and the clock signal CK includes at least a high-level interval, so that the data signal D output by the data latch unit 62 during the initialization phase is at a preset logic level, and the preset logic level is the second logic level, thereby realizing the initialization of the control circuit 60.

[0099] In some embodiments, the detection and determination module 61 is further configured to detect the number of viewers in real time and output the corresponding number of target viewpoints, and compare the number of target viewpoints with the number of viewpoints currently in use.

[0100] The target number of viewpoints refers to the number of viewpoints that should be supported, determined based on the viewer detection results. The number of currently used viewpoints refers to the number of viewpoints that are currently actually configured on the display panel.

[0101] Specifically, if the number of target viewpoints is less than the number of currently used viewpoints, the detection and judgment module 61 is configured to: output a first logic level in response to at least one viewer not being in a viewing state; and output a second logic level in response to all viewers being in a viewing state.

[0102] If the number of target viewpoints is greater than the number of currently used viewpoints, the detection and judgment module 61 is configured to: output a first logic level in response to all viewers being in a viewing state; and output a second logic level in response to at least one viewer not being in a viewing state.

[0103] In different work cycles, based on the relationship between the number of target viewpoints and the number of viewpoints currently in use, the meanings represented by the first logic level and the second logic level can be interchanged.

[0104] For example, if the number of target viewpoints is less than the number of currently used viewpoints, the first logic level is high and the second logic level is low. A high level indicates that at least one viewer is not currently watching, while a low level indicates that all viewers are currently watching. When all data latch units 62 output the first logic level, it indicates that there are continuously non-viewers during this working phase, and the current viewpoint configuration information is adjusted to reduce the current number of viewpoints. When all data latch units 62 output the second logic level, it indicates that there are instances where all viewers are currently watching during this working phase, and the current viewpoint configuration information is maintained.

[0105] If the number of target viewpoints is greater than the number of currently used viewpoints, the first logic level is high and the second logic level is low. A high level indicates that all viewers are in a viewing state, while a low level indicates that at least one viewer is not in a viewing state. When all data latch units 62 output the first logic level, it indicates that viewers are continuously in a viewing state during this working phase, and the current viewpoint configuration information is adjusted to increase the current number of viewpoints. When all data latch units 62 output a value including the second logic level, it indicates that there are viewers who are not in a viewing state during this working phase, and the current viewpoint configuration information is maintained.

[0106] It should be noted that, in this application, "viewers continuously in a viewing state during the working phase" means that each sampling result during the working phase indicates that the viewer is in a viewing state. "Viewers continuously not in a viewing state during the working phase" means that each sampling result during the working phase indicates that at least one viewer is not in a viewing state.

[0107] The detection and determination module 61 can consist of one or more units, without limitation, and can be selected according to actual needs. For example, the unit in the detection and determination module 61 used to determine the relationship between the number of target viewpoints and the number of currently used viewpoints can be implemented using the internal structure of a system-on-a-chip or a timing controller. The unit in the detection and determination module 61 used to monitor the viewer's viewing status in real time can be an image acquisition unit (such as an infrared camera).

[0108] The control circuit 60's working cycle division and the data latch unit 62's output state accumulation judgment mechanism ensure that the adjustment of viewpoint configuration information occurs under stable conditions. This effectively prevents fluctuations in viewpoint configuration information caused by frequent viewer turning, maintains the stability of display resolution, improves the continuity of 3D display effects, and avoids display defects and resolution degradation caused by frequent adjustments to viewpoint configuration information. For example, in a multi-viewer scenario, if one person intermittently turns away from the view due to interference, the data latch unit 62 output will not all be at the first logic level. The control module 63 will output a viewpoint control signal indicating that the current viewpoint configuration information is maintained, thus avoiding display defects or poor display effects caused by frequent adjustments to viewpoint configuration information. That is, the control circuit 60 of this application is used to determine whether to adjust the viewpoint based on the stability judgment of the accumulation judgment mechanism when the number of target viewpoints differs from the number of currently used viewpoints, in order to avoid frequent switching caused by instantaneous interference. Viewpoint adjustment is not triggered every time the number of viewpoints changes; viewpoint switching is only performed when the change in the number of viewpoints meets the stability condition.

[0109] In some embodiments, the data latch unit 62 is a single unit, and the clock signal CK is a periodic square wave signal. During the working phase, the clock signal CK includes at least two high-level intervals.

[0110] The periodic square wave clock signal CK contains at least two high-level intervals, and the state accumulation judgment is achieved by latching data with a single edge of the clock signal CK.

[0111] In other embodiments, there are multiple data latch units 62, each corresponding to a clock signal CK; during the working phase, each clock signal CK includes a high-level interval, and the high-level intervals of any two clock signals CK are staggered in timing.

[0112] Each data latch unit 62 corresponds to an independent clock signal CK, and their high-level intervals are staggered in timing to ensure that each data latch unit 62 receives the data signal D at different times. Stable adjustment is achieved through the cumulative judgment of the output states of multiple data latch units 62, avoiding misjudgments caused by a single viewer's brief absence of viewing. Multiple data latch units 62 are activated sequentially.

[0113] In some embodiments, the detection and determination module 61 is further configured to: sample viewpoint configuration information in a preset sampling method, and output a corresponding data signal D based on the sampling result of the preset period boundary in each preset period, wherein the data signal D remains valid in the preset period or is updated only at the preset period boundary; the preset period boundary includes either the start time or the end time of the preset period; the preset sampling method includes continuous sampling or sampling with a fixed sampling period.

[0114] The detection and judgment module 61 acquires viewpoint configuration information in real time through a preset sampling method. This sampling method can be continuous sampling to achieve high-frequency monitoring, such as sampling once every millisecond based on eye-tracking technology to capture instantaneous changes in viewing status; or a fixed sampling period, such as sampling once every 50 milliseconds, can be used to reduce computational load.

[0115] Within a preset period, the data signal D corresponding to the sampling result based on the preset period boundary is output. The data signal D remaining valid within the preset period can be understood as follows: a value is sampled at the preset period boundary and continuously output throughout a complete preset period, regardless of how the sampling result changes within that preset period. Specifically, at the end of each preset period, the current viewpoint configuration information is sampled, and the data signal D corresponding to the current sampling result is continuously output in the next preset period; or, at the beginning of each preset period, the current viewpoint configuration information is sampled, and the data signal D corresponding to the current sampling result is continuously output within the current preset period. That is, during the working phase, the output of the data signal D is continuous in time.

[0116] Within a preset period, the sampling results based on the preset period boundary are output as a corresponding data signal D. The fact that data signal D is only updated at the preset period boundary can be understood as the new value of the output data signal D changing only at the instant the preset period switches (i.e., at the boundary). In other words, during the working phase, the output of data signal D is discrete in time.

[0117] The data signal D remains valid within a preset period, or is updated only at the boundaries of the preset period (such as the start or end point of the period), for example, the signal value is refreshed at the end of each preset period. In the embodiments, continuous sampling can be used in conjunction with a high sampling rate to capture instantaneous changes in the observed state, or a fixed period sampling, such as a 50-millisecond interval, can be used to reduce the computational load.

[0118] By controlling the sampling frequency and the timing of data signal D updates, misjudgments caused by brief interference are avoided, providing a reliable input state for the data latch unit 62.

[0119] The high-level range of the clock signal CK during the working phase overlaps at least partially with the corresponding preset period in timing, so that multiple data latch units 62 receive the data signal D at preset period intervals and latch the data signal D at the data input terminal to the output terminal at a single edge of the clock signal CK.

[0120] For example, the duration of the initialization phase in each work cycle is equal to the duration of the preset cycle, so as to sample the current viewpoint configuration information at equal intervals.

[0121] For example, the initialization phase also includes a low-level interval, which lags behind the high-level interval in timing, to ensure that when the previous working cycle enters the current working cycle, both the clock signal CK and the data signal D can be at a low level, thus better realizing signal initialization.

[0122] The duration of the high level of the clock signal CK during the working phase can be equal to or unequal to the duration of the high level interval during the initialization phase. There are no strict restrictions here; the choice can be made according to actual needs.

[0123] For example, the duration of the high-level interval in the clock signal CK during its operating phase is equal to the duration of a preset period.

[0124] Please see Figures 1 to 24 , Figure 16 This is a status association table of multiple data latching units provided in the embodiments of this application. Figure 17 This is a timing diagram of the clock signal, data signal, and data latch unit output signal provided in an embodiment of this application during one working cycle. Figure 18 This is a signal level flow diagram of the first data latch unit provided in this application embodiment at the end of the previous working cycle. Figure 19 yes Figure 18 The truth table corresponding to the first data latch unit in the middle, Figure 20 This is a signal level flow diagram of the first data latch unit provided in this application embodiment at the initial moment of the first preset period. Figure 21 yes Figure 20 The truth table corresponding to the first data latch unit in the middle, Figure 22 This is a signal level flow diagram of the first data latch unit provided in this application embodiment at the rising edge of the clock signal. Figure 23 yes Figure 22 The truth table corresponding to the first data latch unit in the middle, Figure 24 This is a timing diagram of the clock signal, data signal, and data latch unit output signal provided in an embodiment of this application during another working cycle.

[0125] The following explanation mainly uses multiple data latch units 62, configured to latch the data signal D at the data input terminal to the output terminal on the rising edge of the clock signal CK, and the viewpoint configuration signal including the viewpoint quantity information as an example.

[0126] In some embodiments, the data latch unit 62 includes three NOT gates, four AND gates, and four NOR gates. The three NOT gates are defined as NOT gate 1, NOT gate 2, and NOT gate 3, respectively. The four AND gates are defined as AND gate 1, AND gate 2, AND gate 3, and AND gate 4, respectively. The four NOR gates are defined as NOR gate 1, NOR gate 2, NOR gate 3, and NOR gate 4, respectively.

[0127] The input of NOT gate 1 receives the data signal D, and the output of NOT gate 1 is connected to the first input of AND gate 1.

[0128] The input of NOT gate 2 receives the clock signal CK. The output of NOT gate 2 is connected to the second input of AND gate 1 and the first input of AND gate 2.

[0129] Connect the output of AND gate 1 and the first input of NOR gate 1.

[0130] The second input terminal of AND gate 2 receives the data signal D, and the output terminal of AND gate 2 is connected to the second input terminal of NOR gate 2.

[0131] The second input terminal of NOR gate 1 is connected to the output terminal of NOR gate 2. The output terminal of NOR gate 1 is connected to the first input terminal of NOR gate 2, the input terminal of NOT gate 3, and the second input terminal of AND gate 4, respectively.

[0132] The output of NOT gate 3 is connected to the first input of AND gate 3.

[0133] The second input of AND gate 3 receives the clock signal CK, and the output of AND gate 3 is connected to the first input of NOR gate 3.

[0134] The first input of AND gate 4 receives the clock signal CK, and the output of AND gate 4 is connected to the second input of NOR gate 4.

[0135] The second input terminal of NOR gate 3 is connected to the output terminal of NOR gate 4, and the output terminal of NOR gate 3 is connected to the first input terminal of NOR gate 4, and serves as the output terminal of data latch unit 62.

[0136] In other embodiments, the data latch unit 62 may also have other structures.

[0137] For example, the control module 63 is an internal module of the system-on-a-chip or timing controller.

[0138] For example, the control module 63 is integrated into a system-on-a-chip or a timing controller.

[0139] The following description uses a set of data latch units 62 as an example. The data latch unit 62 adopts a D flip-flop structure and uses the rising edge of the clock signal CK to implement the timing control of state latching during the working phase.

[0140] Specifically, taking a first logic level as high and a second logic level as low, where a high level represents at least one viewer not watching and a low level represents all viewers watching, as an example, the process involves sampling the current viewpoint configuration information at the end of each preset cycle and continuously outputting the data signal D corresponding to the sampling result in the next preset cycle.

[0141] For example, in a single work cycle, three people are viewing the device in 3D display mode. One person, due to external interference, frequently turns around and is not actively viewing. During the work phase, multiple data latch units 62 output signals that are all high, adjusting the current viewpoint configuration information.

[0142] Specifically, such as Figures 17 to 19 As shown, at the end of the previous work cycle, the data signal D is low and the clock signal CK is low. All data latch units 62 output signals are low.

[0143] If a viewer is detected to be in an unwatched state at the end of the previous work cycle, then during the first preset period t1 of the current work cycle, the data signal D will be continuously output at a high level, and the clock signal CK will be at a low level. All data latch units 62 will output signals at a low level.

[0144] The duration of the high-level interval of the clock signal CK during the working phase is equal to the duration of a preset period. Multiple data latch units 62 are sequentially activated at preset intervals. Taking the first data latch unit 62 as an example.

[0145] like Figure 20 and Figure 21 As shown, at the start of the first preset cycle t1 within the working phase, the data signal D is high, the clock signal CK is low, and the output signal of the first data latch unit 62 is low. The output signals of the remaining data latch units 62 are low.

[0146] like Figure 22 and Figure 23 As shown, if the viewer remains in an unviewed state, the data signal D continues to be high during the second preset period t2. Triggered by the rising edge of the corresponding clock signal CK, the first data latch unit 62 outputs a high signal. The remaining data latch units 62 output low signals.

[0147] Then, during the working phase, after the clock signal CK transitions from high to low, the output signal of the first data latch unit 62 remains unchanged (i.e., during the data latching state), and continues to be at a high level.

[0148] During the initialization phase, the data signal D is at a low level. Triggered by the rising edge of the corresponding clock signal CK, the output signal of the first data latch unit 62 is initialized to a low level.

[0149] That is, all three data latch units 62 output high level to adjust the current viewpoint configuration information.

[0150] For example, such as Figure 24As shown, in another working cycle, during the working phase, not all of the output signals of multiple data latch units 62 are at a high level, maintaining the current viewpoint configuration information.

[0151] The timing sequence of the initial period of each work cycle is the same, and the timing sequence of the initialization phase of each work cycle is also the same, as described above, and will not be repeated here.

[0152] During the first two preset cycles of the working phase (i.e., t1 and t2), the viewer remains in a viewing state, the data signal D is high, and the clock signal CK is low. All data latch units 62 output signals are low.

[0153] At the end of the second preset period t2, it is detected that all viewers are in viewing mode, and the data signal D is at a low level during the third preset period t3. Triggered by the rising edge of the clock signal CK, the output of the third data latch unit 62 is low. Then, during the working phase, after the clock signal CK corresponding to the third data latch unit 62 transitions from high to low, the output signal of the third data latch unit 62 remains unchanged and continues to be at a low level.

[0154] At the end of the third preset period t3, a viewer is detected to be in an unwatching state. Data signal D is high during the fourth preset period t4. Triggered by the rising edge of clock signal CK, the fourth data latch unit 62 outputs a high level. Then, during the working phase, after the clock signal CK corresponding to the fourth data latch unit 62 transitions from high to low, the output signal of the fourth data latch unit 62 remains unchanged and continues to be high.

[0155] That is, the four data latch units 62 output high level, high level, low level and high level in sequence, and the output is not all high level, so as to maintain the current view configuration information.

[0156] The output signals of the multiple data latch units 62 are sequentially represented as Output1, Output2, Output3, Output4, etc.

[0157] Multiple clock signals CK are sequentially represented as CK1, CK2, CK3, CK4, and so on.

[0158] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0159] The above are merely embodiments of this application and do not limit the scope of patent protection of this application. Any equivalent structural or procedural changes made using the content of this application’s specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the scope of patent protection of this application.

Claims

1. A display device, characterized in that, include: The display panel includes multiple basic pixel units, each of which includes multiple sub-pixels of different colors; each sub-pixel includes two symmetrically arranged portions. The control circuit is configured to output a viewpoint control signal to the display panel in a three-dimensional display mode; the viewpoint control signal is used to indicate whether to maintain or adjust the current viewpoint configuration information, which includes viewpoint quantity information and / or viewpoint position information. In response to the display panel being configured to operate in a two-dimensional display mode, the refractive indices of the two portions in each sub-pixel are the same; In response to the display panel being configured to operate in a three-dimensional display mode, the two portions of the same sub-pixel have different refractive indices, and within the same basic pixel unit, the portions corresponding to the positions in all the sub-pixels have the same refractive index.

2. The display device according to claim 1, characterized in that, The display panel also includes: The first substrate is a driving substrate; The second substrate is disposed opposite to the first substrate, and the light-emitting side of the display panel is located outside the second substrate; the second substrate includes a dimming structure, the dimming structure includes a plurality of dimming layers, and the dimming layers have electric field-dependent refractive index characteristics. Each of the aforementioned portions is configured with a unique dimming layer.

3. The display device according to claim 2, characterized in that, The dimming structure further includes multiple electrode pairs, each corresponding to a dimming layer; the two control electrodes in each electrode pair are located on opposite sides of the thickness direction of the dimming layer; wherein... Multiple dimming layers are patterned using the same material layer, and the control electrodes located on the same side of the dimming layers are patterned using the same conductive layer; or, On the surface direction of the second substrate, two control electrodes located on the same side of the dimming layer and arbitrarily adjacent to each other are formed using different conductive layer patterns.

4. The display device according to claim 1, characterized in that, In response to the display panel being configured to operate in a three-dimensional display mode, the display panel includes a plurality of composite pixel units arranged in an array; each composite pixel unit consists of N basic pixel units arranged continuously along a preset direction, wherein N is an integer greater than or equal to 1, and the value of N corresponds to the number of viewpoints in the three-dimensional display mode.

5. The display device according to claim 2, characterized in that, The first substrate further includes multiple rows of scan lines and multiple columns of data lines; each row of sub-pixels corresponds to a scan line group consisting of two scan lines; the two portions of the same sub-pixel are respectively connected to different scan lines in the same scan line group and share the same data line; In response to the display panel being configured to operate in a two-dimensional display mode, the timing of the scan lines corresponding to each row of sub-pixels is the same, multiple scan line groups are scanned sequentially, and the timing of adjacent scan lines has an overlapping area. The signal of the data line is a periodic square wave signal, and the pulse width is a first preset value. In response to the display panel being configured to operate in a three-dimensional display mode, and the preset direction being the row direction; multiple rows of the scan lines are scanned line by line, and the timing of adjacent scan lines has an overlapping area, the signal of the data line is a periodic square wave signal, and the pulse width is a second preset value; the first preset value is twice the second preset value.

6. The display device according to claim 1, characterized in that, The control circuit includes: The detection and judgment module is configured to sample the current viewpoint configuration information in real time and output data signals based on the viewpoint configuration information; A data latch unit includes a data input terminal, a clock input terminal, and an output terminal, configured to latch the data signal at the data input terminal to the output terminal on a single edge of a clock signal; The control module is connected to the output terminal of the data latch unit and outputs the viewpoint control signal based on the output state of the data latch unit.

7. The display device according to claim 6, characterized in that, The initial sampling time of the detection and judgment module is ahead of the single edge time of the first high level of the clock signal.

8. The display device according to claim 7, characterized in that, The working cycle of the control circuit includes a working phase and an initialization phase in sequence; in the initialization phase, the data signal output by the detection and judgment module is a preset logic level, and the clock signal includes at least a high level range; The control module is further configured as follows: In response to the fact that the output data of the data latch unit is the same and is at the first logic level during the working phase, the view control signal indicating the adjustment of the current view configuration information is output. In response to the data output of the data latch unit during the said working phase including at least one second logic level, the view control signal indicating the maintenance of the current view configuration information is output; the preset logic level is the second logic level.

9. The display device according to claim 8, characterized in that, The data latch unit is single, and the clock signal is a periodic square wave signal. During the operating phase, the clock signal includes at least two high-level intervals; or, There are multiple data latch units, and each data latch unit corresponds to a clock signal. During the working phase, each clock signal includes a high-level interval, and the high-level intervals of any two clock signals are staggered in timing.

10. The display device according to claim 6, characterized in that, The detection and determination module is also configured to: Viewpoint configuration information is sampled using a preset sampling method, and the corresponding data signal is output based on the sampling results at the preset period boundary within each preset period, wherein the data signal remains valid within the preset period or is updated only at the preset period boundary; The preset period boundary includes either the start time or the end time of the preset period; the preset sampling method includes continuous sampling or sampling with a fixed sampling period.

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