Driver device and method of driving display panel

Abstract

The invention provides a driver device and a method of driving a display panel. The driver device is configured to drive the display panel to display an image. The driver device includes a memory circuit, a processor circuit, and a source driver circuit. The storage circuit stores image processing parameters. A processor circuit receives input frame data and a selection signal indicating that the input frame data is in a first sub-pixel rendering format. A processor circuit processes input frame data in accordance with a portion of image processing parameters selected in accordance with a selection signal to produce output frame data. The source driving circuit receives first frame data in a sub-pixel arrangement format from the processor circuit, and generates a data voltage according to the first frame data to drive sub-pixels of the display panel. Sub-pixels of the display panel are arranged in a sub-pixel arrangement format.

Description

Technical Field

[0001] This invention relates to a driver device and a method for driving a display panel. Background Technology

[0002] Current image processing techniques are based on true-color images. Therefore, sub-pixel rendered (SPR) images need to be converted to true-color images, and then converted back to SPR images after image processing. The conversion from true-color to SPR is irreversible, while converting from SPR back to true-color results in image distortion and increased blurriness. Furthermore, conversion to true-color increases data volume, requires additional data storage space, and increases computational and power consumption. Summary of the Invention

[0003] The present invention provides a driver device and a method for driving a display panel, which can directly process input frame data without converting the input frame data into true color format.

[0004] Embodiments of the present invention provide a driver device configured to drive a display panel to display an image. The driver device includes a storage circuit, a processor circuit, and a source driver circuit. The storage circuit stores image processing parameters. The processor circuit receives input frame data and a selection signal, the selection signal indicating that the input frame data is in a first subpixel rendering format. The processor circuit processes the input frame data according to a portion of the image processing parameters, a portion of which is selected according to the selection signal, to generate output frame data. The source driver circuit receives the first frame data in a subpixel arrangement format from the processor circuit and generates a data voltage based on the first frame data to drive the subpixels of the display panel. The subpixels of the display panel are arranged in a subpixel arrangement format.

[0005] Embodiments of the present invention provide a method for driving a display panel. The method includes: selecting a portion of image processing parameters according to a selection signal, wherein the selection signal indicates that input frame data is a first subpixel rendering format; processing the input frame data according to a portion of the image processing parameters to generate output frame data, wherein the output frame data is a subpixel arrangement format; and generating a data voltage according to the first frame data corresponding to the output frame data to drive the subpixels of the display panel, wherein the subpixels of the display panel are arranged in a subpixel arrangement format.

[0006] To make the foregoing better understood, several embodiments accompanied by drawings are described in detail below. Attached Figure Description

[0007] Figure 1 This is a block diagram of a display device according to an embodiment of the present invention.

[0008] Figure 2 This is a block diagram of a display device according to another embodiment of the present invention.

[0009] Figure 3 This is a schematic diagram of SPR format conversion according to an embodiment of the present invention.

[0010] Figure 4 This is a block diagram of a display device according to another embodiment of the present invention.

[0011] Figure 5 This is a schematic diagram of scaling operations according to an embodiment of the present invention.

[0012] Figure 6 This is a schematic diagram of the distribution of the distance and weight model according to an embodiment of the present invention.

[0013] Figure 7 This is a block diagram of a display device according to another embodiment of the present invention.

[0014] Figure 8 and Figure 9 This is a schematic diagram of an image filtering operation according to an embodiment of the present invention.

[0015] Figure 10 This is a block diagram of a display device according to another embodiment of the present invention.

[0016] Figure 11 This is a block diagram of a display device according to another embodiment of the present invention.

[0017] Figure 12 This is a block diagram of a display device according to another embodiment of the present invention.

[0018] Figure 13 This is a block diagram of a display device according to another embodiment of the present invention.

[0019] Figure 14 This is a flowchart of the steps of a method for driving a display panel according to an embodiment of the present invention.

[0020] Explanation of icon numbers

[0021] 100, 200, 400, 700, 1000, 1100, 1200, 1300: Display devices

[0022] 110, 210, 410, 710, 1010, 1110, 1210, 1310: Driver devices

[0023] 112: Storage circuit

[0024] 114, 214, 414, 714, 1014, 1114, 1214, 1314: Processor circuit

[0025] 116, 216, 416, 716, 1016, 1116, 1216, 1316: Source drive circuit

[0026] 120, 220, 420, 720, 1020, 1120, 1220, 1320: Display panel

[0027] 142: First circuit block

[0028] 144: Second Circuit Block

[0029] 146: Third Circuit Block

[0030] 148: Fourth Circuit Block

[0031] 300: Repeating pixel arrangement unit

[0032] D1, D1_1: Input frame data

[0033] D2, D2_1, D2_2, D3_1, D4_1: Output frame data

[0034] D2_0, D2_2: First frame data

[0035] S1: Selection signal

[0036] S100, S110, S120: Steps

[0037] VD: Data Voltage Detailed Implementation

[0038] The following embodiments are provided to describe the present disclosure in detail, but the present disclosure is not limited to the provided embodiments, and the provided embodiments can be suitably combined. The terms "coupling" or "connecting" as used in this specification (including the claims) may refer to any direct or indirect connection. For example, "the first device is coupled to the second device" should be interpreted as "the first device is directly connected to the second device" or "the first device is indirectly connected to the second device through other devices or connecting members." Additionally, the term "signal" may refer to current, voltage, charge, temperature, data, electromagnetic waves, or any one or more signals.

[0039] Figure 1 This is a block diagram of a display device according to an embodiment of the present invention. (Reference) Figure 1 The display device 100 includes a driver device 110 and a display panel 120. The driver device 110 is coupled to the display panel 120. The driver device is configured to drive the display panel 120 to display an image.

[0040] The driver device 110 includes a storage circuit 112, a processor circuit 114, and a source drive circuit 116. The processor circuit 114 is coupled to the storage circuit 112. The source drive circuit 116 is coupled to the processor circuit 114.

[0041] Storage circuit 112 is configured to store image processing parameters. These parameters may include, for example, parameters for processing image filtering, image resolution, image brightness, image spectral distribution, image differences, image correlation, image color depth, image refresh rate, and / or image display mode, but the invention is not limited thereto. Furthermore, image processing parameters may also include parameters suitable for SPR format conversion. Regarding image resolution, scaling is an image processing technique used to increase or decrease image resolution. When the input image differs from the display resolution, scaling is used to adjust the image to match the display resolution. Therefore, storage circuit 112 can store parameters for scaling operations. Additionally, storage circuit 112 can also store parameters for image filtering.

[0042] Processor circuit 114 is configured to receive input frame data D1 and selection signal S1. Selection signal S1 indicates that input frame data D1 is in a first SPR format. Processor circuit 114 is further configured to process input frame data D1 according to a portion of image processing parameters to generate output frame data D2. Output frame data D2 is a second SPR format that is the same as or different from the first SPR format. A portion of the image processing parameters can be selected according to selection signal S1.

[0043] The source drive circuit 116 is configured to receive output frame data D2 (first frame data) in a subpixel arrangement format from the processor circuit 114. The source drive circuit 116 is further configured to generate a data voltage VD based on the output frame data D2 to drive the subpixels of the display panel 120. In this embodiment, the subpixels of the display panel 120 are arranged in a subpixel arrangement format.

[0044] In this embodiment, the display panel 120 is a small to medium-sized panel. The processor circuit 114 and the source drive circuit 116 can be integrated into a single chip to perform image processing functions or display driving functions.

[0045] The display panel 120 has a subpixel rendering arrangement or a true color arrangement. Each pixel of the true color panel includes three subpixels: red, green, and blue. Each pixel of the SPR panel includes any two subpixels of red, green, and blue. The arrangement of the display panel 120 is not intended to limit the invention.

[0046] In this embodiment, the host outputs input frame data D1 to the processor circuit 114 in a first SPR format. The purpose of outputting SPR frame data is to reduce the amount of data transmitted. In this embodiment, the host receives the input frame data D1 in the first SPR format and processes it directly without converting it to true color format. In other words, the processor circuit 114 does not perform an SPR format inverse conversion on the input frame data D1 before processing it according to the selected image processing parameters. An SPR format inverse conversion is the operation of converting frame data from SPR format to true color format.

[0047] about Figure 1 In the hardware structure of the components in the embodiments, the processor circuit 114 may include a processor with computing capabilities. Alternatively, the processor circuit 114 may be designed using a hardware description language (HDL) or any other digital circuit design method familiar to those skilled in the art, and may be implemented as hardware circuitry using a field-programmable gate array (FPGA), a complex programmable logic device (CPLD), or an application-specific integrated circuit (ASIC). Furthermore, the structures of the storage circuit 112, processor circuit 114, source drive circuit 116, and display panel 120 can be adequately taught, advised, and described with reference to general knowledge of the relevant art.

[0048] Figure 2 This is a block diagram of a display device according to another embodiment of the present invention. Figure 3 This is a schematic diagram of SPR format conversion according to an embodiment of the present invention. (Reference) Figure 2 and Figure 3 The processor circuit 214 processes the input frame data D1_1 of the first SPR format SPR1 to generate output frame data D2_2 of the second SPR format SPR2, which serves as the first frame data. The second SPR format SPR2 is different from the first SPR format SPR1. The output frame data D2_2 of the second SPR format SPR2 is configured to drive the display panel 220 having the second SPR arrangement format SPR2.

[0049] Processor circuit 214 includes a first circuit block 142 for processing input frame data D1_1 according to selected image processing parameters suitable for SPR format conversion. The first circuit block 142 performs SPR format conversion on the input frame data D1_1, thus converting the input frame data D1_1 into output frame data D22. In this embodiment, processor circuit 214 does not perform SPR format inverse conversion on the input frame data D1_1 before the SPR format conversion. The selected image processing parameters suitable for SPR format conversion are selected from a storage circuit according to a selection signal S1. For simplicity, Figure 2 The storage circuit is not shown in the figure.

[0050] The selected image processing parameters suitable for SPR format conversion are configured to generate multiple output pixel data of output frame data D2_2. The output pixel data corresponds to... Figure 3 The repeating pixel arrangement unit 300 in the display panel 220 includes m by n pixels, where m and n are positive integers. Figure 3 The repeating pixel arrangement unit 300 in the image has m=2 and n=6, but the present invention is not limited thereto.

[0051] Specifically, taking the red input data ri,j and the red output data Ri,j as an example, Figure 3 This demonstrates the SPR format conversion for the red channel. A distance and weight model is defined for the red input data ri,j and the red output data Ri,j. The distance and weight model allows the calculation of a set of weights for a given sub-pixel and its neighboring sub-pixels. This set of weights can then be used to determine the red output data Ri,j in a weighting formula. For example, the red output data R1,1,R1,2,R1,4,R1,5 are calculated using the following weighting formula:

[0052] R 1，1 =c0·r 0，0 +c1·r 0，2 +c2·r 1，1 +c3·r 2，0 +c4·r 2，2

[0053] R 1,2 =c5·r 0，2 +c6·r 1，1 +c7·r 1，3 +c8·r 2.2

[0054] R 1,4 =c9·r 0，4 +c 10 ·r 1，3 +c 11 ·r 1，5 +c 12 ·r2，4

[0055] R 1,5 =c 13 ·r 0，4 +c 14 ·r 0,6 +c 15 ·r 1，5 +c 16 ·r 2，4 +c 17 ·r 2，6

[0056] Where C0~C 17 It is the weight value, r 0,0 ~r 2,6 This is the input data for adjacent sub-pixels. The red output data is R. 2,0 R 2,1 R 2,3 R 2,4 R 2,6 It can be calculated in a similar way. Generally speaking, the red output data R i,j The closer to the red input data r i，j The larger the weight value, the better. The data R is output in red. 1,1 For example, its closest input data r is red. 1，1 And the distance from the red input data r 2,2 Since it is the furthest, its weight value c2 is greater than its weight value c4. The number of neighboring sub-pixels used for weight calculation is not limited to 4 or 5; it can be freely increased by adjusting the distance and weight model and assigning appropriate weight values.

[0057] In this embodiment, considering that the arrangement of sub-pixels is periodic, once the red output data R of the repeating pixel arrangement unit 300 is obtained... i,j The remaining subpixels can be obtained by referencing the repeating pixel arrangement unit 300. Furthermore, the SPR format conversion of the green and blue channels can be performed in a similar manner.

[0058] Figure 4 This is a block diagram of a display device according to another embodiment of the present invention. Figure 5 This is a schematic diagram of scaling operations according to an embodiment of the present invention. Figure 6 This is a schematic diagram of the distance and weight model distribution according to an embodiment of the present invention. (Reference) Figures 4 to 6 The processor circuit 414 processes the input frame data D1_1 of the first SPR format SPR1 to generate output frame data D2_1 of the first SPR format SPR1 as the first frame data. The output frame data D2_1 of the first SPR format SPR1 is configured to drive the display panel 420 having the first SPR arrangement format SPR1.

[0059] The processor circuit 414 includes a second circuit block 144 to perform a scaling operation on the input frame data D1_1 of the first SPR format SPR1 according to selected image processing parameters to obtain the output frame data D2_1 of the first SPR format SPR1. The selected image processing parameters include scaling parameters. The input frame data D1_1 of the first SPR format SPR1 corresponds to a first image size, and the output frame data D2_1 of the first SPR format SPR1 corresponds to a second image size. The second image size is different from the first image size. In this embodiment, the processor circuit 414 does not perform an SPR format inverse conversion on the input frame data D1_1 before the scaling operation.

[0060] The scaling parameters include weight values ​​determined by the positional distance between the positions of multiple adjacent input pixel data of input frame data D1_1 and the positions of output pixel data of output frame data D2_1.

[0061] Specifically, with Figure 5 The input data I shown i，j and output data O i，j For example, let's take input data I as an example. i，j and output data O i，j Definition as follows Figure 6 The distance and weight model is shown. The distance and weight model allows you to calculate a set of weights for a given sub-pixel and its neighboring sub-pixels. This set of weights can be used to determine the output data O in the weighting formula. i，j For example, output data O using the following weighted formula. 1,1 :

[0062] 0 1，1 =c′0·I 0，0 +c′1·I 1，1 +c′2·I 2，0 +c′3·I 0,2

[0063] c′0+c′1+c′2+c′3=1

[0064] Where c′0~c′3 are weight values, I 0,0 I 1，1 I 2,0 I 0,2 This is the input data for adjacent sub-pixels. Other output data can be calculated in a similar way. Generally, the output data O i,j The closer to the input data I i，j The larger the weight value, the better. The number of neighboring sub-pixels used for weight calculation is not limited to 4; it can be freely increased by adjusting the distance and weight model and assigning appropriate weight values.

[0065] Figure 7 This is a block diagram of a display device according to another embodiment of the present invention. Figure 8 and Figure 9 This is a circuit block diagram of an image filtering operation according to an embodiment of the present invention. (Reference) Figures 7 to 9 Because of the triangular arrangement data format ( Figure 8 (b) and the actual layout of subpixels on the display panel ( Figure 8 Slightly different from (a), it is necessary to rearrange the coefficients to match the data format after sampling the coefficients from the actual layout.

[0066] Processor circuit 714 processes input frame data D1_1 of first SPR format SPR1 to generate output frame data D2_1 of first SPR format SPR1 as the first frame data. The output frame data D2_1 of first SPR format SPR1 is configured to drive display panel 720 having first SPR arrangement SPR1.

[0067] The processor circuit 714 includes a third circuit block 146, which performs an image filtering operation on the input frame data D1_1 of the first SPR format SPR1 according to the selected image processing parameters to obtain the output frame data D2_1 of the first SPR format SPR1. The selected image processing parameters include filtering parameters. In this embodiment, the processor circuit 714 does not perform SPR format inverse conversion on the input frame data D1_1 before the image filtering operation.

[0068] Image filtering involves convolving an image with a specified matrix to achieve effects such as blurring, sharpening, or feature detection. Some common image filtering types include: low-pass filters, high-pass filters, sharpening, edge detection, and edge smoothing.

[0069] Taking a low-pass filter as an example, such as Figure 8 As shown in (c), this is the output data R. i,j Define the distance and weight model. Figure 8 (d) shows the weight matrix h3 of the low-pass filter. The weight matrix h3 includes weights based on the data of multiple adjacent output pixels R. 0,1 R 0,3 R 0,4 R 1,1 R 1,4 R 2,1 R 2,3 R 2,4 Position and output pixel data R of output frame data D2_1 1,2 The weight value determined by the positional spacing, such as Figure 8 The dashed square 800 in (b) is shown.

[0070] The weight matrix h3 obtained by the above method can be used as a low-pass filter for the input frame data D1_1. For example... Figure 9As shown, the red output data R 1,1 R 1,3 R 1,5 Calculated using the following weighted formula:

[0071] R 1,1 =c0·r 0,0 +c1·r 0,2 +c2·r 1,1 +c3·r 2,0 +c4·r 2,2

[0072] R 1,3 =c0·r 0,2 +c1·r 0,4 +c2·r 1,3 +c3·r 2,2 +c4·r 2,4

[0073] R 1,5 =c0·r 0,4 +c1·r 0，6 +c2·r 1,5 +c3·r 2,4 +c4·r 2,6

[0074] Where c0~C4 are weight values, r 0,0 ~r 2,6 The input data consists of neighboring sub-pixels. Other output data can be calculated in a similar manner. The weight matrices of other image filters, such as high-pass filters and / or sharpness, can be obtained using a similar method.

[0075] Figure 10 This is a block diagram of a display device according to another embodiment of the present invention. (Reference) Figure 4 and Figure 10 The display device 1000 in this embodiment and Figure 4 The display device 400 is similar, with the main difference being that the processor circuit 1014 is further configured to perform SPR format conversion on the output frame data D3_1 of the first SPR format SPR1 to generate the first frame data D2_2 of the second SPR format SPR2, which is the subpixel arrangement format of the display panel 1020. Specifically, the processor circuit 1014 further includes a first circuit block 142 to perform SPR format conversion on the output frame data D3_1, thus converting the output frame data D3_1 into the first frame data D2_2.

[0076] Figure 11 This is a block diagram of a display device according to another embodiment of the present invention. (Reference) Figure 4 and Figure 11 The display device 1100 in this embodiment and Figure 4 The display device 400 is similar, with the main difference being that the processor circuit 1114 is further configured to perform an SPR format inverse conversion on the output frame data D3_1 of the first SPR format SPR1 to generate a first frame data D2_0 of true color format RGB, which is the subpixel arrangement format of the display panel 1120. Specifically, the processor circuit 1114 further includes a fourth circuit block 148 to perform an SPR format inverse conversion on the output frame data D3_1, thus converting the output frame data D3_1 into the first frame data D2_0.

[0077] Figure 12 This is a block diagram of a display device according to another embodiment of the present invention. (Reference) Figure 7 and Figure 12 The display device 1200 in this embodiment and Figure 7 The display device 700 is similar, with the main difference being that the processor circuit 1214 is further configured to perform SPR format conversion on the output frame data D4_1 of the first SPR format SPR1 to generate the first frame data D2_2 of the second SPR format SPR2, which is the subpixel arrangement format of the display panel 1220. Specifically, the processor circuit 1214 further includes a first circuit block 142 to perform SPR format conversion on the output frame data D4_1, thus converting the output frame data D4_1 into the first frame data D2_2.

[0078] Figure 13 This is a block diagram of a display device according to another embodiment of the present invention. (Reference) Figure 7 and Figure 13 The display device 1300 in this embodiment and Figure 7 The display device 700 is similar, with the main difference being that the processor circuit 1314 is further configured to perform an SPR format inverse conversion on the output frame data D4_1 of the first SPR format SPR1 to generate a first frame data D2_0 of true color format RGB, which is the subpixel arrangement format of the display panel 1320. Specifically, the processor circuit 1314 further includes a fourth circuit block 148 to perform an SPR format inverse conversion on the output frame data D4_1, thus converting the output frame data D4_1 into the first frame data D2_0.

[0079] Figure 14 This is a flowchart illustrating the steps of a method for driving a display panel according to an embodiment of the present invention. (Refer to...) Figure 1 and Figure 14 In this embodiment, the method for driving the display panel is at least suitable for Figure 1 The present invention is not limited to the display device 100.

[0080] Taking display device 100 as an example, in step S100, processor circuit 114 selects a portion of image processing parameters from storage circuit 112 according to selection signal S1. Selection signal S1 indicates that input frame data D1 is in a first SPR format. In step S110, processor circuit 114 processes input frame data D1 according to a portion of the image processing parameters to generate output frame data D2, wherein output frame data D2 is in a subpixel arrangement format. In step S120, source drive circuit 116 generates data voltage VD according to output frame data D2 to drive the subpixels of display panel 120, wherein the subpixels of display panel 120 are arranged in the same subpixel arrangement format. Therefore, before processing input frame data D1 according to the selected image processing parameters, processor circuit 114 does not perform SPR format inversion on input frame data D1.

[0081] The method for driving the display panel in this embodiment of the invention is as follows: Figures 1 to 13 Sufficient teaching, suggestions and implementation instructions have been provided in the examples shown, and therefore will not be repeated here.

[0082] In summary, in the embodiments of the present invention, SPR images can be processed directly without conversion to true-color images. Image processing is performed in the SPR domain, and transformations and operations are performed with reference to the positions of subpixels. Therefore, distortions that may occur during format conversion can be prevented, and meaningless operations are avoided. Furthermore, the transmission of SPR data can reduce the bandwidth of the transmission interface, such as a Mobile Industry Processor Interface (MIPI), thereby reducing the power consumption of the display device. Additionally, the application processor can transmit low-resolution images, which are then restored by the driver device, further reducing power consumption.

[0083] Those skilled in the art will be able to make various modifications and variations to the disclosed embodiments without departing from the scope or spirit of this disclosure. In view of the foregoing, it is intended that this disclosure cover modifications and variations, provided that such modifications and variations fall within the scope of the following claims and their equivalents.

Claims

1. A driver device configured to drive a display panel to display an image, the driver device comprising: Storage circuitry configured to store image processing parameters; A processor circuit, coupled to the storage circuit, and configured to receive input frame data and a selection signal, the selection signal indicating that the input frame data is in the first subpixel rendering (SPR) format; The input frame data is processed according to a portion of the image processing parameters to generate output frame data, wherein a portion of the image processing parameters is selected according to the selection signal; as well as A source drive circuit, coupled to the processor circuit and configured to receive a first frame of data in a subpixel arrangement format from the processor circuit; and to generate a data voltage based on the first frame of data to drive the subpixels of the display panel, wherein the subpixels of the display panel are arranged in the subpixel arrangement format.

2. The driver device of claim 1, wherein the processor circuit does not perform SPR format inverse conversion on the input frame data before processing the input frame data according to the selected image processing parameters.

3. The driver device of claim 1, wherein the processor circuit processes the input frame data of the first SPR format according to selected image processing parameters suitable for SPR format conversion to generate the output frame data of the second SPR format as the first frame data, wherein the second SPR format is different from the first SPR format.

4. The driver device of claim 3, wherein selected image processing parameters adapted for the SPR format conversion are configured to generate a plurality of output pixel data of the output frame data, wherein the plurality of output pixel data corresponds to a repeating pixel arrangement unit, and the repeating pixel arrangement unit comprises m by n pixels of the display panel, wherein m and n are positive integers.

5. The driver device of claim 1, wherein the processor circuitry is further configured to perform an SPR format inverse conversion on the output frame data of the first SPR format to generate the first frame data in true color format, the true color format being the subpixel arrangement format of the display panel.

6. The driver device of claim 1, wherein the processor circuitry is further configured to perform an SPR format conversion on the output frame data in the first SPR format to generate the first frame data in a second SPR format, the second SPR format being the subpixel arrangement format of the display panel.

7. The driver device of claim 1, wherein the selected image processing parameters include scaling parameters, and the processor circuit performs a scaling operation on the input frame data of the first SPR format according to the scaling parameters to obtain the output frame data of the first SPR format, wherein the input frame data of the first SPR format corresponds to a first image size, and the output frame data of the first SPR format corresponds to a second image size, the second image size being different from the first image size.

8. The driver device of claim 7, wherein the scaling parameter includes a weight value determined based on the distance between the positions of a plurality of adjacent input pixel data of the input frame data and the positions of output pixel data of the output frame data.

9. The driver device of claim 7, wherein the processor circuitry is further configured to perform an SPR format conversion on the output frame data in the first SPR format to generate the first frame data in a second SPR format, the second SPR format being the subpixel arrangement format of the display panel.

10. The driver device of claim 1, wherein the selected image processing parameters include filtering parameters, and the processor circuit performs an image filtering operation on the input frame data of the first SPR format according to the filtering parameters to obtain the output frame data of the first SPR format.

11. The driver device of claim 10, wherein the processor circuitry is further configured to perform an SPR format conversion on the output frame data in the first SPR format to produce the first frame data in a second SPR format, the second SPR format being the subpixel arrangement format of the display panel.

12. A method for driving a display panel, the method comprising: A portion of the image processing parameters are selected based on a selection signal, wherein the selection signal indicates that the input frame data is in first subpixel rendering (SPR) format; The input frame data is processed according to a portion of the image processing parameters to generate output frame data, wherein the output frame data is in a subpixel arrangement format; as well as A data voltage is generated based on a first frame of data corresponding to the output frame data to drive the sub-pixels of the display panel, wherein the sub-pixels of the display panel are arranged in the sub-pixel arrangement format.

13. The method for driving a display panel according to claim 12, further comprising: Before processing the input frame data according to the selected image processing parameters, the input frame data is not subjected to SPR format inverse conversion.

14. The method for driving a display panel according to claim 12, wherein the step of processing the input frame data according to a portion of the image processing parameters to generate the output frame data comprises: The input frame data in the first SPR format is processed according to selected image processing parameters suitable for SPR format conversion to produce the output frame data in the second SPR format as the first frame data, wherein the second SPR format is different from the first SPR format.

15. The method for driving a display panel according to claim 14, The selected image processing parameters suitable for the SPR format conversion are configured to generate multiple output pixel data of the output frame data. The plurality of output pixel data corresponds to a repeating pixel arrangement unit, and the repeating pixel arrangement unit includes m by n pixels of the display panel, where m and n are positive integers.

16. The method for driving a display panel according to claim 12, further comprising: The output frame data in the first SPR format is subjected to SPR format inverse conversion to generate the first frame data in true color format, wherein the true color format is the sub-pixel arrangement format of the display panel.

17. The method for driving a display panel according to claim 12, further comprising: The output frame data in the first SPR format is converted to SPR format to generate the first frame data in the second SPR format, wherein the second SPR format is the subpixel arrangement format of the display panel.

18. The method of driving a display panel according to claim 12, wherein the selected image processing parameters include scaling parameters, and the step of processing the input frame data according to a portion of the image processing parameters to generate the output frame data includes: A scaling operation is performed on the input frame data of the first SPR format according to the scaling parameters to obtain the output frame data of the first SPR format, wherein the input frame data of the first SPR format corresponds to a first image size, and the output frame data of the first SPR format corresponds to a second image size, the second image size being different from the first image size.

19. The method of driving a display panel according to claim 18, wherein the scaling parameter includes a weight value determined based on the distance between the positions of a plurality of adjacent input pixel data of the input frame data and the positions of output pixel data of the output frame data.

20. The method for driving a display panel according to claim 18, further comprising: The output frame data in the first SPR format is converted to SPR format to generate the first frame data in the second SPR format, wherein the second SPR format is the subpixel arrangement format of the display panel.

21. The method for driving a display panel according to claim 12, wherein the selected image processing parameters include filtering parameters, and the step of processing the input frame data according to a portion of the image processing parameters to generate the output frame data includes: Image filtering is performed on the input frame data in the first SPR format according to the filtering parameters to obtain the output frame data in the first SPR format.

22. The method for driving a display panel according to claim 21, further comprising: The output frame data in the first SPR format is converted to SPR format to generate the first frame data in the second SPR format, wherein the second SPR format is the subpixel arrangement format of the display panel.

Images