Data transmission method, device and system
By optimizing the sequence design of pilot symbols and training symbols, the problem that existing technologies cannot adapt to optical communication scenarios above 800Gbps has been solved, improving signal recovery quality and reducing transmission redundancy.
Patent Information
- Application Number
- CN202411098027.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-09
- Publication Date
- 2026-02-10
AI Technical Summary
The existing transmission symbol sequences are not suitable for high-speed optical communication scenarios above 800Gbps and have transmission redundancy issues.
By using pilot symbols and training symbols of a specific sequence, it is ensured that the sidelobe values of the periodic autocorrelation function of pilot symbols in the same polarization direction and the cross-correlation function values of the periodic cross-correlation function of pilot symbols in different polarization directions are all no greater than 0.4. Combined with the A value under different symbol mapping methods, the signal recovery quality is optimized.
It improves the quality of signal recovery at the receiving end, reduces transmission redundancy, and is suitable for high-speed optical communication scenarios above 800Gbps.
Smart Images

Figure CN121508675A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of communication technology, and in particular to a data transmission method, apparatus and system. Background Technology
[0002] Driven by 5G, cloud computing, big data, and artificial intelligence, high-speed optical transmission networks are developing towards higher capacity, packetization, and intelligence. Coherent optical communication systems utilize the amplitude, phase, polarization, or frequency of light waves to carry information. To combat optical signal distortion caused by dispersion, polarization-related impairments, noise, nonlinear effects, and other factors during transmission and to maintain long-distance transmission, coherent optical communication systems typically incorporate pre-designed symbol sequences into the transmitted symbol sequence to facilitate the receiver's recovery of the transmitted symbols.
[0003] The existing transmission symbol sequences are mainly used in 400Gbps or 800Gbps scenarios and cannot adapt to future scenarios of 800Gbps and above (including 1.2Tbps, 1.6Tbps, etc.). Summary of the Invention
[0004] This application provides a data transmission method, apparatus, and system that enables the transmission symbol sequence to be applied in 800Gbps scenarios and reduces transmission redundancy.
[0005] In a first aspect, this application provides a data transmission method, the method comprising: acquiring a data frame including multiple subframes, and transmitting the data frame; wherein, in one polarization direction, each subframe includes 226 pilot symbols, the sequences of the 226 pilot symbols in the X-polarization direction and the Y-polarization direction are respectively:
[0006]
[0007]
[0008] In the scheme shown in this application, the sequence of pilot symbols described above is used such that the normalized amplitude of the sidelobe value of the periodic autocorrelation function of pilot symbols in the same polarization direction is no greater than 0.4, and the normalized amplitude of the periodic cross-correlation function value of pilot symbols in different polarization directions is no greater than 0.4. Thus, the sequence autocorrelation and cross-correlation characteristics of the pilot symbols are both good, and the combination of training symbols and pilot symbols can also satisfy DC balance, which is beneficial to improving the possibility of signal recovery at the receiver and improving the quality of the recovered signal, thereby making it suitable for scenarios above 800Gbps.
[0009] It should be understood that the 226 pilot symbols can also be arranged in two polarization directions as shown in Table 2 or Table 3. The autocorrelation and cross-correlation characteristics of each possible pilot symbol sequence are good. The combination of training symbols and pilot symbols can also satisfy DC balance, which is conducive to improving the possibility of signal recovery at the receiver and improving the quality of the recovered signal.
[0010] In one alternative, when the data frame uses 16QAM symbol mapping, A equals 3 or -3; when the data frame uses quadrature phase shift keying (QPSK) symbol mapping, A equals 1 or -1.
[0011] In the scheme shown in this application, the value of A is different under different symbol mapping methods, and the value of A can make the sensitivity of training symbols or pilot symbols better.
[0012] In one alternative approach, each subframe also includes 11 training symbols in one polarization direction;
[0013] The sequences of the training symbols are respectively in the X and Y polarization directions as follows:
[0014] polarization direction Sequence of training symbols X polarization direction -A+Aj,A+Aj,-A+Aj,A+Aj,-A-Aj,A+Aj,-A-Aj,-A-Aj,A+Aj,A-Aj,A-Aj Y-polarization direction -A-Aj,-A-Aj,A-Aj,-A+Aj,-A+Aj,A+Aj,-A-Aj,-A+Aj,A-Aj,A+Aj,A-Aj
[0015] Secondly, this application provides a data transmission method, which includes receiving a first data frame transmitted through a channel and then a second data frame. The first data frame includes multiple subframes, and each subframe includes 226 pilot symbols in one polarization direction. The sequences of the 226 pilot symbols in the X-polarization direction and the Y-polarization direction are as follows:
[0016]
[0017]
[0018] In the scheme shown in this application, the sequence of pilot symbols described above is used such that the normalized amplitude of the sidelobe values of the periodic autocorrelation function of pilot symbols in the same polarization direction is no greater than 0.4, and the normalized amplitude of the periodic cross-correlation function values of pilot symbols in different polarization directions is no greater than 0.4. Thus, the sequence autocorrelation and cross-correlation characteristics of the pilot symbols are both good, and the combination of training symbols and pilot symbols can also satisfy DC balance, which is beneficial to improving the possibility of signal recovery at the receiver and improving the quality of the recovered signal.
[0019] It should be understood that the 226 pilot symbols can also be arranged in two polarization directions as shown in Table 2 or Table 3. The autocorrelation and cross-correlation characteristics of each possible pilot symbol sequence are good. The combination of training symbols and pilot symbols can also satisfy DC balance, which is conducive to improving the possibility of signal recovery at the receiver and improving the quality of the recovered signal.
[0020] In one alternative, when the data frame uses 16QAM symbol mapping, A equals 3 or -3; when the data frame uses QPSK symbol mapping, A equals 1 or -1.
[0021] In one alternative approach, each subframe also includes 11 training symbols in one polarization direction;
[0022] The sequences of the training symbols are respectively in the X and Y polarization directions as follows:
[0023] polarization direction Sequence of training symbols X polarization direction -A+Aj,A+Aj,-A+Aj,A+Aj,-A-Aj,A+Aj,-A-Aj,-A-Aj,A+Aj,A-Aj,A-Aj Y-polarization direction -A-Aj,-A-Aj,A-Aj,-A+Aj,-A+Aj,A+Aj,-A-Aj,-A+Aj,A-Aj,A+Aj,A-Aj
[0024] Thirdly, this application provides a data transmission apparatus, including: a processing unit and a sending unit; the processing unit is used to: perform processing to acquire a data frame; the sending unit is used to: send the data frame.
[0025] Fourthly, this application provides a data transmission apparatus, comprising: a receiving unit; the receiving unit is configured to: receive a second data frame transmitted through a channel from a first data frame.
[0026] Fifthly, this application provides a chip for performing the methods described in the first aspect, the second aspect, the optional mode of the first aspect, or the optional mode of the second aspect.
[0027] In a sixth aspect, this application provides an optical module, the optical module including a processor and an interface, the interface being used for transmitting and receiving signals, and the processor being used to perform the method as described in the first aspect or any optional method of the first aspect.
[0028] In a seventh aspect, this application provides a transmitting device, which includes a host-side device and an optical module as described in the sixth aspect, wherein the optical module is used to convert an electrical signal from the host-side device into an optical signal and transmit the optical signal.
[0029] Eighthly, this application provides an optical module including a processor and an interface, the interface being used for transmitting and receiving signals, and the processor being used to perform the method described in the second aspect or any optional method of the second aspect.
[0030] In a ninth aspect, this application provides a receiving device, which includes a host-side device and an optical module as described in the eighth aspect, wherein the optical module is used to convert a received optical signal into an electrical signal and transmit the electrical signal to the host-side device.
[0031] In a tenth aspect, this application provides a communication system comprising: a transmitting device as described in the seventh aspect and a receiving device as described in the ninth aspect, wherein the transmitting device is configured to transmit a signal to the receiving device. Attached Figure Description
[0032] Figure 1 This is a schematic diagram of a communication system provided in an exemplary embodiment of this application;
[0033] Figure 2(a) is a schematic diagram of an implementation of a transmitter DSP processor provided in an exemplary embodiment of this application;
[0034] Figure 2(b) is a schematic diagram of another implementation of the originating DSP processor provided in an exemplary embodiment of this application;
[0035] Figure 2(c) is a schematic diagram of another implementation of the originating DSP processor provided in an exemplary embodiment of this application;
[0036] Figure 2(d) is a schematic diagram of another implementation of the originating DSP processor provided in an exemplary embodiment of this application;
[0037] Figure 3 A schematic diagram of a data transmission method provided for an exemplary embodiment of this application;
[0038] Figure 4 A schematic diagram of the structure of a data frame provided as an exemplary embodiment of this application;
[0039] Figure 5 A schematic diagram of the structure of a subframe in a data frame provided as an exemplary embodiment of this application;
[0040] Figure 6 A constellation diagram mapping schematic provided as an exemplary embodiment of this application;
[0041] Figure 7(a) is a schematic diagram of a first pilot symbol generation structure provided in an exemplary embodiment of this application;
[0042] Figure 7(b) is a schematic diagram of a second pilot symbol generation structure provided in an exemplary embodiment of this application;
[0043] Figure 7(c) is a schematic diagram of a third pilot symbol generation structure provided in an exemplary embodiment of this application;
[0044] Figure 8 A schematic diagram illustrating the determination of pilot symbols provided for an exemplary embodiment of this application;
[0045] Figure 9 Another schematic diagram of determining pilot symbols provided for an exemplary embodiment of this application;
[0046] Figure 10 A schematic diagram of a data transmission apparatus provided as an exemplary embodiment of this application;
[0047] Figure 11 Another schematic diagram of the data transmission apparatus provided as an exemplary embodiment of this application;
[0048] Figure 12 A schematic diagram of the structure of an optical module provided in an exemplary embodiment of this application;
[0049] Figure 13 A schematic diagram of the structure of a transmitting device provided in an exemplary embodiment of this application;
[0050] Figure 14 This is a schematic diagram of the structure of a receiving device provided for an exemplary embodiment of this application. Detailed Implementation
[0051] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.
[0052] This application provides a data transmission method, apparatus, and system with low transmission redundancy and good correlation of the added preset symbol sequence, which is beneficial to improving the quality of the recovered signal at the receiving end and can be well applied to various coherent transmission scenarios.
[0053] It should be noted that the terms "first," "second," etc., in this application specification, claims, and the accompanying drawings are used to distinguish similar objects, not to limit a specific order or sequence. It should be understood that the above terms can be used interchangeably where appropriate so that the embodiments described in this application can be implemented in a sequence other than that described in this application. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to these processes, methods, products, or devices.
[0054] Figure 1 This is a schematic diagram of a communication system used in an embodiment of this application. Figure 1As shown, at the transmitting end, the source provides the data stream to be transmitted. The Forward Error Correction (FEC) encoder receives this data stream and performs FEC encoding on it. The codeword information obtained by combining the parity bits and information bits is sent to the transmitting end's Digital Signal Processing (DSP) processor for framing, and then transmitted through the channel to the receiving end. At the receiving end, after receiving the distorted signal caused by noise or other impairments in the channel, it is sent to the receiving end's DSP processor for dispersion compensation, synchronization, phase recovery, and other operations. Then, it is decoded by the FEC decoder to recover the original data and send it to the destination. This framing process can also be called DSP framing.
[0055] Figure 2(a) is a schematic diagram of one implementation of the transmitting DSP processor in an embodiment of this application. As shown in Figure 2(a), in one possible implementation, the transmitting DSP processor performs dual-polarization symbol mapping on the received data sequence. Typically, the received data sequence is information and a check sequence obtained through FEC encoding. Dual-polarization symbol mapping includes symbol mapping and polarization distribution. The symbol mapping method is Quadrature Amplitude Modulation (QAM). Typically, QAM modulation (also known as symbol mapping) involves symbol mapping multiple input bits to obtain multiple QAM symbols, and polarization distribution of multiple QAM symbols to obtain multiple dual-polarization (DP) symbols, i.e., DP-QAM symbols, such as DP-4QAM (also known as dual-polarization quadrature phase shift keying, DP-QPSK), DP-16QAM, DP-32QAM, and DP-64QAM, etc. It should be understood that this symbol mapping typically uses Gray mapping, mapping multiple bits to one QAM symbol; this symbol mapping is also simply called Gray mapping. For ease of explanation, the two polarization directions will be uniformly referred to as the X-polarization direction and the Y-polarization direction, respectively, where the X-polarization direction and the Y-polarization direction are orthogonal to each other. It should be understood that the X-polarization direction and the Y-polarization direction are not two specified polarization directions, but rather two arbitrarily orthogonal polarization directions. Furthermore, the transmitting DSP processor performs the following framing processing on a certain number of dual-polarization symbols: specifically, it obtains a pre-framing dual-polarization symbol sequence containing multiple dual-polarization symbols; inserts a frame alignment word sequence (FAWSequence) and a training symbol sequence in the X-polarization direction and the Y-polarization direction, respectively; and retains at least one of the reserved symbol sequences and the pilot symbol sequence, resulting in a post-framing dual-polarization symbol sequence. This inserted symbol sequence can also be called a preset symbol sequence.
[0056] In this embodiment, the pre-framing dual-polarization symbol is also called the payload symbol, which includes FEC-encoded information and parity bits, and the resulting symbol (called the information symbol and parity symbol) is obtained through symbol mapping. The pre-framing dual-polarization symbol sequence is called a data frame, also known as a frame or DSP frame. For ease of explanation, this embodiment uniformly refers to the pre-framing dual-polarization symbol sequence as a data frame. Frame synchronization symbols are used for frame synchronization alignment, training symbols are used for link training, pilot symbols are used for carrier phase recovery, and reserved symbols are used for future use and innovation. The values of reserved symbols can be known and unchanging, or they can be randomized; the values of reserved symbols can also be called patterns. In some specific embodiments, the DSP frame contains multiple subframes, and this DSP frame is called a super-frame. In other specific embodiments, the DSP frame can also be called a multi-frame, the reserved symbols can also be called fixed stuff (FS), and the frame synchronization symbol can also be called a multi-frame alignment signal (MFAS).
[0057] It should be noted that the inserted symbol sequences are not exactly the same in the X-polarization and Y-polarization directions. That is, at at least one position, the values of the symbols inserted in the X-polarization and Y-polarization directions are different. This avoids the problem of the receiver being unable to distinguish between the two polarization directions during actual transmission. For example, if the sequence of 8 training symbols in the X-polarization direction is -A-Aj, -A+Aj, A-Aj, A+Aj, -A-Aj, -A+Aj, A-Aj, A+Aj, then the sequence of 8 training symbols in the Y-polarization direction cannot be exactly the same; it can be -A+Aj, -A-Aj, A-Aj, A+Aj, -A-Aj, -A+Aj, A-Aj, A+Aj.
[0058] It should be understood that a dual-polarization symbol can be represented by two symbols, one located in the X-polarization direction and the other in the Y-polarization direction. Each symbol can be represented by a complex number. For example, a symbol obtained using 16QAM modulation can be represented by any one of the following 16 complex numbers: ±1±1j, ±1±3j, ±3±1j, and ±3±3j, where ± indicates a positive or negative value, such as ±3 representing 3 or -3. Here, j represents the imaginary unit. For another example, a symbol obtained using QPSK modulation can be represented by any one of the following four complex numbers: ±1±1j. In some scenarios, the imaginary unit may also be represented by other symbols such as i, which is not limited here. In the embodiments of this application, the imaginary unit is uniformly represented by j. In some specific applications, the real and imaginary parts may be normalized, but the essence remains unchanged.
[0059] It should be noted that a sequence with N0 dual-polarization symbols can be completely represented by two complex sequences of length N0, one representing the symbol in the X-polarization direction and the other representing the symbol in the Y-polarization direction. Each complex sequence of length N0 is represented by a sequence of N0 real parts (also called the I-path sequence) and a sequence of N0 imaginary parts (also called the Q-path sequence), where N0 is an integer greater than 1. Therefore, there are four different types of sequences, including the X-polarization I-path (in-phase component) sequence, the X-polarization Q-path (quadrature-phase component) sequence, the Y-polarization I-path sequence, and the Y-polarization Q-path sequence. The X-polarization I-path sequence is also called the X... I The component, the Q-path sequence in the X polarization direction, is also called X. Q The component, the Y-polarization direction I-path sequence, is also called the Y component. I The component, the Q-path sequence in the Y-polarization direction, is also called the Y-axis. Q Quantity.
[0060] It should be noted that after dual-polarization symbol mapping and framing operations, a dual-polarization symbol data stream to be transmitted is obtained. This stream can be represented by two symbol data streams: the first is the symbol data stream in the X-polarization direction, and the second is the symbol data stream in the Y-polarization direction. Alternatively, a dual-polarization symbol data stream can also be represented by four data streams, where the first is the data stream corresponding to the I-path component in the X-polarization direction (referred to as X...). I The second data stream is the data stream of the Q-path component in the X-polarization direction corresponding to the dual-polarization symbol stream (abbreviated as X). oThe data streams are as follows: the third stream is the data stream corresponding to the I-path component in the Y-polarization direction of the dual-polarization symbol stream (referred to as the YI data stream); the fourth stream is the data stream corresponding to the Q-path component in the Y-polarization direction of the dual-polarization symbol stream (referred to as the Y...). Q (Data flow).
[0061] It should be understood that in the dual-polarization symbol mapping and framing operation shown in Figure 2(a), framing (also known as DSP framing) is performed after dual-polarization symbol mapping, that is, framing is performed on the symbol level. Below are schematic diagrams of several other possible implementations of the originating DSP processor, where framing is performed before dual-polarization symbol mapping, that is, framing is performed on the bit level.
[0062] Figure 2(b) is a schematic diagram of another implementation of the transmitting DSP processor in this application. As shown in Figure 2(b), framing is performed before dual-polarization symbol mapping. Specifically, a pre-framing bit sequence containing multiple bits is obtained, a preset bit sequence is inserted, and dual-polarization symbol mapping is performed to obtain a post-framing dual-polarization symbol sequence. The preset bit sequence is then processed by dual-polarization symbol mapping to obtain a preset symbol sequence, which is also referred to as the bits corresponding to the preset symbol sequence. It should be understood that the post-framing dual-polarization symbol sequence obtained by using the implementation shown in Figure 2(b) is the same as the post-framing dual-polarization symbol sequence obtained by using the implementation shown in Figure 2(a).
[0063] Figure 2(c) is a schematic diagram of another embodiment of the transmitting DSP processor in this application. As shown in Figure 2(c), framing is performed before dual-polarization symbol mapping. Specifically, two pre-framing bit sequences containing multiple bits are obtained respectively. A first preset bit sequence and a second preset bit sequence are inserted into the first and second pre-framing bit sequences respectively, and dual-polarization symbol mapping is performed to obtain a post-framing dual-polarization symbol sequence. The first preset bit sequence is symbol mapped to obtain a preset symbol sequence in the X-polarization direction, and the second preset bit sequence is symbol mapped to obtain a preset symbol sequence in the Y-polarization direction. The first preset bit sequence is also called the bit corresponding to the preset symbol sequence in the X-polarization direction, and the second preset bit sequence is also called the bit corresponding to the preset symbol sequence in the Y-polarization direction. It should be understood that the post-framing dual-polarization symbol sequence obtained by the pre-framing bit sequence using the embodiment shown in Figure 2(c) is the same as the post-framing dual-polarization symbol sequence obtained by the embodiment shown in Figure 2(a).
[0064] Figure 2(d) is a schematic diagram of another embodiment of the originating DSP processor in this application. As shown in Figure 2(d), framing is performed before dual-polarization symbol mapping. Specifically, four pre-framing bit sequences containing multiple bits are obtained respectively. A first preset bit sequence, a second preset bit sequence, a third preset bit sequence, and a fourth preset bit sequence are inserted into the first, second, third, and fourth pre-framing bit sequences, respectively, and dual-polarization symbol mapping is performed to obtain the post-framing dual-polarization symbol sequence. The first preset bit sequence is symbol mapped to obtain the I-path component of the preset symbol sequence in the X-polarization direction, the second preset bit sequence is symbol mapped to obtain the Q-path component of the preset symbol sequence in the X-polarization direction, the third preset bit sequence is symbol mapped to obtain the I-path component of the preset symbol sequence in the Y-polarization direction, and the fourth preset bit sequence is symbol mapped to obtain the Q-path component of the preset symbol sequence in the Y-polarization direction. The first preset bit sequence is also called the preset symbol sequence in the X-polarization direction. I The bits corresponding to the components, this second preset bit sequence, also known as the preset symbol sequence, is in X. Q The bits corresponding to the components, this third preset bit sequence, also known as the preset symbol sequence, are in Y. I The bits corresponding to the components, this fourth preset bit sequence, also known as the preset symbol sequence, is in Y. Q The bits corresponding to the components. It should be understood that the framed dual-polarization symbol sequence obtained by using the implementation shown in Figure 2(d) before framing is the same as the framed dual-polarization symbol sequence obtained by using the implementation shown in Figure 2(a).
[0065] It should be noted that this application does not limit the specific framing method adopted by the sending DSP processor. In addition to the framing methods described in Figures 2(a), 2(b), 2(c), and 2(d), other similar framing methods are also applicable to this scheme, and will not be described in detail here.
[0066] In some specific applications, the first subframe in the data frame is designated as a first-type subframe. This first-type subframe includes pre-framing symbols, training symbols, pilot symbols, frame synchronization symbols, and reserved symbols. Typically, in this first-type subframe, the training symbols precede the frame synchronization symbols, the frame synchronization symbols precede the reserved symbols, and the reserved symbols precede the pre-framing symbols. The data frame also includes at least one second-type subframe, which includes pre-framing symbols, training symbols, and pilot symbols. Typically, in this second-type subframe, the training symbols precede the pre-framing symbols.
[0067] Figure 3 This is a schematic diagram of a data transmission method according to an embodiment of this application. Figure 3As shown, the data transmission method includes the following steps.
[0068] 101. The sending end obtains the data frame.
[0069] It should be noted that this application does not limit the specific implementation method of generating data frames. For example, the dual-polarization symbol mapping and framing method described in Figures 2(a), 2(b), 2(c), or 2(d) can be used. Of course, other similar dual-polarization symbol mapping and framing methods are also applicable to this scheme, and will not be described in detail here. It should be understood that a data frame includes symbols in two polarization directions. The structure of the data frame is similar in both polarization directions. For example, a data frame includes a symbol sequence in the X polarization direction and a symbol sequence in the Y polarization direction. The structure of the data frame will be described below using one polarization direction as an example.
[0070] Figure 4 This is a schematic diagram of a data frame structure in an embodiment of this application. For example... Figure 4 As shown, the data frame contains N SF There are N subframes, each containing N S Each subframe contains T training symbols and M pilot symbols, N symbols. SF N S T and M are all integers greater than 0. The training symbol sequence consisting of the T training symbols is also simply called the training sequence. The pilot symbol sequence consisting of the M pilot symbols is also simply called the pilot sequence. This subframe mainly includes two types: one type of subframe includes frame synchronization symbols, which is usually the first subframe, and the other subframes are the second type of subframes.
[0071] Figure 5 This is a schematic diagram of a subframe structure in a data frame according to an embodiment of this application. For example... Figure 5 As shown in example (a), the first type of subframe contains T training symbols and M pilot symbols, one of which is both a training symbol and a pilot symbol. Here, T and M are integers greater than 0. The first T symbols in the first type of subframe are training symbols, which can be used for link training and subframe synchronization. Typically, the first symbol of the subframe (the symbol at the starting position) is both a training symbol and a pilot symbol; however, it is also possible that any one of the first T symbols is both a training symbol and a pilot symbol, which is not limited in this application. Furthermore, in the first type of subframe, every N g The symbol at a fixed position in the symbol set is the pilot symbol, used for carrier phase recovery. For example, Figure 5 Example (a) shows the per N g The first symbol in the set of symbols is the pilot symbol. In some specific applications, the integer N... g The values are 32, 64, 96, or 128. After T training symbols, N is the number of symbols. FAWA frame synchronization symbol is used for synchronization between superframes (also known as multiple frames). Furthermore, in N... FAW After each frame synchronization symbol, there is usually N. RES The reserved symbols can be set aside for future uses, and can also be located within one of multiple second-type subframes; this application does not impose any limitations on either. Wherein, N g N FAW and N RES All are integers greater than 0.
[0072] like Figure 5 As shown in example (b), the second type of subframe contains T training symbols and M pilot symbols, where one symbol is both a training symbol and a pilot symbol. In the second type of subframe, the first T symbols are training symbols, and every N... g The symbol at a fixed position among the symbols is the pilot symbol. Typically, in the second type of subframe, apart from the training symbols and pilot symbols, the remaining symbols are pre-frame (payload) symbols.
[0073] It should be understood that, such as Figure 5 The data frame structure shown has a total number of symbols in one polarization direction. The T training symbols and M pilot symbols combined in each subframe are not T+M. Since the first symbol is both a pilot and a training symbol, the total number of symbols needs to be reduced by 1. That is, the total number of symbols in each subframe is N. TP = T+M-1 symbols. Each training symbol and each pilot symbol takes the value of one of four complex numbers: -A-Aj, -A+Aj, A-Aj, and A+Aj, where A is a non-zero real number and j represents the imaginary unit. Here, Aj can also be written as A×j. It should be noted that the data frame contains N... SF There are N subframes, containing a total of N SF ×T training symbols and N SF ×M pilot symbols. The N SF ×T training symbols and N SF ×M pilot symbols combined into a total of N SF ×N Tp The symbols satisfy direct current balance. That is, the N... SF ×N Tp The sum of the symbols is 0. More specifically, in one polarization direction, the N SF ×N TP The sum of the real parts of the complex numbers corresponding to each symbol is 0, and the sum of the imaginary parts is also 0, which can achieve DC balance and help improve the quality of the signal recovered by the receiver.
[0074] In some specific applications, 16QAM symbol mapping is used, and the 16 constellation points (also called symbols) on the corresponding 16QAM constellation diagram take values of {±1±1j, ±1±3j, ±3±1j, ±3±3j}. For example... Figure 6 As shown in example (a), the four outermost constellation points in the constellation diagram are represented by hollow circles, namely -3-3j, -3+3j, 3-3j, and 3+3j, and the four innermost constellation points are represented by vertical circles, namely -1-1j, -1+1j, 1-1j, and 1+1j. Figure 6 Example (b) provides a specific symbol mapping method for 16QAM. A 16QAM symbol in the X-polarization direction or the Y-polarization direction is obtained by mapping 4 bits. For example, 0000 is mapped to -3-3j, 0101 is mapped to -1-1j, 0010 is mapped to -3+3j, 0111 is mapped to -1+1j, 1010 is mapped to 3+3j, 1111 is mapped to 1+1j, 1000 is mapped to 3-3j, and 1101 is mapped to 1-1j.
[0075] Typically, for the 16QAM symbol mapping described above, A = 3 or -3 is selected to ensure good sensitivity of the training symbols or pilot symbols. For QPSK symbol mapping, the four constellation points (also called symbols) on the constellation diagram are set to {±1±1j}, and A = 1 or -1 is selected.
[0076] 102. The sending end sends a data frame to the receiving end.
[0077] The data frames sent by the transmitting end will be transmitted to the receiving end through the channel. In some possible scenarios, the dual polarization symbols in the data frame will be converted from digital to analog (DAC) to obtain four analog signals, corresponding to the I component signal in the X polarization direction, the Q component signal in the X polarization direction, the I component signal in the Y polarization direction, and the Q component signal in the Y polarization direction, respectively, and then transmitted to the receiving end through optical fiber.
[0078] 103. The receiving end performs signal processing on the received data frames.
[0079] It should be understood that the data frame received by the receiving end has been transmitted through the channel, which can be understood as a distorted signal affected by noise or other impairments in the channel. In other words, the data frame received by the receiving end is different from the data frame sent by the sending end. For example, the data frame received by the receiving end is not aligned with the data frame sent by the sending end, and the receiving end needs to perform frame synchronization based on frame synchronization symbols or training symbols. The specific operations of the receiving end after receiving the data frame are not described in detail in this application; please refer to [reference needed]. Figure 1The system architecture diagram shown illustrates, for example, signal processing performed by the receiving-end DSP processor on the received data frames, including operations such as dispersion compensation, synchronization, and phase recovery.
[0080] It should be noted that in some specific applications, for the sake of hardware simplicity, at least one subframe of the data frame contains M pilot symbols generated by a target polynomial and a seed. Several possible methods for generating the M pilot symbols are described below.
[0081] Typically, the M pilot symbols in the X-polarization direction are generated by the target polynomial and the seed in the X-polarization direction; the M pilot symbols in the Y-polarization direction are generated by the target polynomial and the seed in the Y-polarization direction. In this embodiment, the same generating polynomial (also called the target polynomial) can be used for pilot symbols in two orthogonal polarization directions. However, since the seeds used in the two polarization directions are different, the M pilot symbols obtained in the two polarization directions are not exactly the same.
[0082] Figure 7(a) is a schematic diagram of the first pilot symbol generation structure in the embodiment of this application. The target polynomial is a 10th-order polynomial, which can be expressed as: x 10 +a9×x 9 +a8×x 8 +a7×x 7 +a6×x 6 +a5×x 5 +a4×x 4 +a3×x 3 +a2×x 2 +a1×x+1. Where a9...a1 can take the values 0 or 1.
[0083] It should be noted that an algebraic expression composed of the addition (or subtraction) of several monomials is called a polynomial. Each monomial in a polynomial is called a term of the polynomial, and the degree of the highest term among these monomials is the degree of the polynomial. The number of terms in a polynomial refers to the number of the monomials with non-zero coefficients; for example, the number of terms in the 10th-order polynomial mentioned above is equal to the number of non-zero terms in a9...a1 plus 2.
[0084] In some specific applications, the number of non-zero terms in a9...a1 is no greater than 6, meaning the number of terms in the target polynomial is greater than or equal to 2 and less than or equal to 8, resulting in lower hardware implementation complexity. As shown in Figure 7(a), each box can be considered a storage unit, and the number of storage units is the same as the number of bits in the preloaded seed. That is, each storage unit is used to input the corresponding bit in the seed. For example, if the seed length is 10 bits, it can be represented in binary as b9, b8, b7, b6, b5, b4, b3, b2, b1, b0, then 10 corresponding storage units are used. Of course, the seed can also be represented in hexadecimal or decimal. When it is used in operation with the target polynomial, it needs to be converted to binary form. For example, 0110111000 is represented as 0x1B8 in hexadecimal and 440 in decimal.
[0085] It should be noted that the polynomial x 10 +a9×x 9 +a8×x 8 +a7×x 7 +a6×x 6 +a5×x 5 +a4×x 4 +a3×x 3 +a2×x 2 +a1×x+1 can be written as x^10+a9×(x^9)+a8×(x^8)+a7×(x^7)+a6×(x^6)+a5×(x^5)+a4×(x^4)+a3×(x^3)+a2×(x^2)+a1×x+1. It should be understood that x can also be written as x^1.
[0086] Figure 7(b) is a schematic diagram of the second pilot symbol generation structure in an embodiment of this application. The target polynomial is a 9th-order polynomial, which can be expressed as: x 9 +a8×x 8 +a7×x 7 +a6×x 6 +a5×x 5 +a4×x 4 +a3×x 3 +a2×x 2 +a1×x+1. Where a8...a1 can take values of 0 or 1. In some specific applications, the number of non-zero terms in a8...a1 is no greater than 6, meaning the number of terms in the target polynomial is greater than or equal to 2 and less than or equal to 8, resulting in lower hardware implementation complexity. As shown in Figure 7(b), the seed length is 9 bits, which can be represented in binary as b8, b7, b6, b5, b4, b3, b2, b1, b0. Of course, the seed can also be represented in hexadecimal or decimal, but it needs to be converted to binary form when operating with the target polynomial.
[0087] Figure 7(c) is a schematic diagram of the third pilot symbol generation structure in the embodiment of the present application. The target polynomial is an 11th-order polynomial, and this 8th-order polynomial can be expressed as: x 11 +a 10 ×x 10 +a9×x 9 +a8×x 8 +a7×x 7 +a6×x 6 +a5×x 5 +a4×x 4 +a3×x 3 +a2×x 2 +a1×x + 1. Where a 10 ...a1 can take values of 0 or 1. In some specific applications, the number of non-zero values in a 10 ...a1 is not greater than 6, that is, the number of terms of the target polynomial is greater than or equal to 2 and less than or equal to 8, making the hardware implementation complexity relatively low. As shown in Figure 7(c), the seed length is 11 bits, and in binary form, it can be expressed as b 10 , b9, b8, b7, b6, b5, b4, b3, b2, b1, b0. Of course, the seed can also be represented in hexadecimal or decimal form, and it needs to be converted to binary form when operating with the target polynomial.
[0088] In Figures 7(a), 7(b), and 7(c), for the scenario of generating M pilot symbols in one polarization direction, a bit sequence b0, b1, b2,...b 2M-1 including 2×M bits is obtained according to the target polynomial and the seed. The above bit sequence is also called a Pseudo Random Binary Sequence (PRBS). The bit sequence generated by using a 9th-order polynomial is also called PRBS9, the bit sequence generated by using a 10th-order polynomial is also called PRBS10, and the bit sequence generated by using an 11th-order polynomial is also called PRBS11. Every 2 consecutive bits in the bit sequence b0, b1, b2,...b 2M-1 are denoted as b 2t , b 2t+1 (0 ≤ t < M). The two bits b 2t , b 2t+1 are used to map to one pilot symbol among the M pilot symbols. At this time, b 2t and b 2t+1 are mapped to a symbol (2b 2t - 1)A + (2b 2t+1 - 1)Aj, 0 ≤ t < M.
[0089] It should be noted that the symbol (2b) 2t -1)A+(2b 2t+1 -1) Aj can also be any of the symbols on the constellation diagram of the modulation format being used. It can be any four symbols in the region between the outermost four symbols and the innermost four symbols of the constellation diagram. In this case, the noise and sensitivity of the training and pilot symbols are generally low, but the peak-to-average power ratio is relatively low. Taking 16QAM as an example, the 16 symbols on the 16QAM constellation diagram take values of {±1±1j, ±1±3j, ±3±1j, ±3±3j}, and the real number A satisfies 1≤A≤3. The specific value of the real number A can be selected according to the actual application scenario to achieve a good trade-off between the peak-to-average power ratio, noise, and sensitivity of the training and pilot symbols. For example, the real number... The values of the pilot symbols and training symbols are... Additionally, when the 16 symbols on the 16QAM constellation diagram are power normalized and their values are... The real number A can take values that satisfy For example, real numbers The values of the pilot symbols and training symbols are...
[0090] In this embodiment of the application, the coefficients a in the polynomial can be designed... i The values of are used to determine the target polynomial and the seed, ensuring that the generated pilot symbols exhibit good autocorrelation characteristics in both X-polarized and Y-polarized symbol sequences, and good cross-correlation characteristics in both polarizations. Specifically, when the target polynomial is a 9th-order polynomial, 1 ≤ i ≤ 8; when the target polynomial is a 10th-order polynomial, 1 ≤ i ≤ 9; and when the target polynomial is an 11th-order polynomial, 1 ≤ i ≤ 10. In particular, the normalized amplitude of the sidelobe values of the periodic autocorrelation function of the symbol sequences in both polarization directions is no greater than a preset value T0, and the normalized amplitude of the periodic cross-correlation function values of the symbol sequences in both polarization directions is no greater than a preset value T1.
[0091] The following describes N in the data frame from two aspects. SF ×T training symbols and N SF ×M pilot symbols combined into a total of N SF ×N TP The symbols satisfy the DC balance method, where N TP =T+M-1.
[0092] Consider N TP The sum of T and M is even, meaning T+M is odd. Typically, in one polarization direction, the T training symbols and M pilot symbols in each subframe combine to form a total of N. TP =T+M-1 symbols satisfy DC balance. At this time, N in the data frame SF×T training symbols and N SF ×M pilot symbols combined into a total of N SF ×N TP The symbol also satisfies DC balance. It should be understood that the N... TP The sum of the symbols is 0. More specifically, the N TP The sum of the real parts of the complex numbers corresponding to each symbol is 0, and the sum of their imaginary parts is also 0. This achieves DC balance, which is beneficial for improving the quality of the recovered signal at the receiving end. Consider N... TP If T is even, then T is even and M is odd, or T is odd and M is even.
[0093] Considering T=11 and M=226, the sequence of T=11 training symbols in each subframe is shown in Table 1 below.
[0094] Table 1
[0095] polarization direction Sequence of training symbols X polarization direction -A+Aj,A+Aj,-A+Aj,A+Aj,-A-Aj,A+Aj,-A-Aj,-A-Aj,A+Aj,A-Aj,A-Aj Y-polarization direction -A-Aj,-A-Aj,A-Aj,-A+Aj,-A+Aj,A+Aj,-A-Aj,-A+Aj,A-Aj,A+Aj,A-Aj
[0096] Considering T=11, M=226, and the pilot symbols in each subframe are M=226 (as shown in one row of Table 2), the normalized amplitude of the sidelobe values of the periodic autocorrelation function of pilot symbols in the same polarization direction is no greater than 0.3, and the normalized amplitude of the periodic cross-correlation function values of pilot symbols in different polarization directions is no greater than 0.3. The pilot symbols provided in Table 2 exhibit good sequence autocorrelation and cross-correlation characteristics. Combining training symbols and pilot symbols can also satisfy DC balance, which is beneficial for improving the signal recovered at the receiver and enhancing the quality of the recovered signal.
[0097] Table 2
[0098]
[0099]
[0100]
[0101]
[0102]
[0103]
[0104]
[0105]
[0106]
[0107]
[0108]
[0109]
[0110]
[0111]
[0112]
[0113]
[0114]
[0115]
[0116]
[0117]
[0118]
[0119]
[0120]
[0121]
[0122]
[0123]
[0124]
[0125]
[0126]
[0127]
[0128]
[0129]
[0130]
[0131]
[0132]
[0133]
[0134]
[0135]
[0136]
[0137]
[0138]
[0139]
[0140]
[0141]
[0142]
[0143]
[0144]
[0145]
[0146]
[0147]
[0148]
[0149]
[0150]
[0151]
[0152]
[0153]
[0154]
[0155]
[0156]
[0157]
[0158]
[0159]
[0160]
[0161]
[0162]
[0163]
[0164]
[0165]
[0166]
[0167]
[0168]
[0169]
[0170]
[0171]
[0172]
[0173]
[0174]
[0175]
[0176]
[0177]
[0178]
[0179]
[0180]
[0181]
[0182]
[0183]
[0184]
[0185]
[0186]
[0187]
[0188]
[0189]
[0190]
[0191]
[0192]
[0193]
[0194]
[0195]
[0196]
[0197]
[0198]
[0199]
[0200]
[0201]
[0202]
[0203]
[0204]
[0205]
[0206]
[0207]
[0208]
[0209]
[0210]
[0211]
[0212]
[0213]
[0214]
[0215]
[0216]
[0217]
[0218]
[0219]
[0220]
[0221]
[0222]
[0223] Table 2 corresponds to 10th-order polynomials and 11th-order polynomials.
[0224] In some alternative applications, when the 226 pilot symbols are one row from Table 3 below, the normalized amplitude of the sidelobe values of the periodic autocorrelation function of pilot symbols in the same polarization direction is no greater than 0.4, and the normalized amplitude of the periodic cross-correlation function values of pilot symbols in different polarization directions is no greater than 0.4. The pilot symbols provided in Table 3 have good sequence autocorrelation and cross-correlation characteristics. The combination of training symbols and pilot symbols can also satisfy DC balance, which is beneficial to improving the signal recovered at the receiver and improving the quality of the recovered signal. Table 3 can correspond to a 10th-order polynomial.
[0225] Table 3
[0226]
[0227]
[0228]
[0229]
[0230]
[0231]
[0232]
[0233]
[0234]
[0235]
[0236]
[0237]
[0238]
[0239]
[0240]
[0241]
[0242]
[0243]
[0244]
[0245]
[0246]
[0247]
[0248]
[0249]
[0250]
[0251]
[0252]
[0253]
[0254]
[0255]
[0256]
[0257]
[0258]
[0259]
[0260]
[0261]
[0262]
[0263]
[0264]
[0265]
[0266]
[0267]
[0268]
[0269]
[0270]
[0271]
[0272]
[0273]
[0274]
[0275] It should be noted that in Tables 2 and 3, the autocorrelation and cross-correlation of the pilot symbol sequences are both relatively good, which is beneficial for the receiver to recover the signal.
[0276] In an alternative approach, considering the 226 pilot sequences as row 11 in Table 2, their generator polynomial is the 11th-order polynomial x^11 + x^10 + x^9 + x^7 + 1, the seed for the X-polarization direction is 0x2DA, and the seed for the Y-polarization direction is 0x56C. The generation process for the 226 pilot symbols can be found in [reference needed]. Figure 8 To understand.
[0277] like Figure 8As shown, in the X-polarization direction, the input polarization seed is 0x2DA, which is converted to a binary sequence of 01011011010. If two consecutive bits of 1 and 0 are output in sequence, the pilot symbol in the X-polarization direction is A-Aj; if two consecutive bits of 0 are output in sequence, the pilot symbol in the X-polarization direction is -A-Aj; if two consecutive bits of 1 are output in sequence, the pilot symbol in the X-polarization direction is A+Aj; if two consecutive bits of 0 are output in sequence, the pilot symbol in the X-polarization direction is -A+Aj. And so on, resulting in 226 pilot symbols in the X-polarization direction.
[0278] like Figure 8 As shown, in the Y-polarization direction, the input polarization seed is 0x56C, which is converted to a binary sequence of 10101101100. If two consecutive bits are output as 1 and 0, the pilot symbol in the Y-polarization direction is A-Aj; if two consecutive bits are output as 0, the pilot symbol in the Y-polarization direction is -A-Aj; if two consecutive bits are output as 1, the pilot symbol in the Y-polarization direction is A+Aj; and if two consecutive bits are output as 0, the pilot symbol in the Y-polarization direction is -A+Aj. This process continues, resulting in 226 pilot symbols in the Y-polarization direction.
[0279] The pilot symbol sequence provided in this embodiment has a normalized amplitude of the sidelobe value of the periodic autocorrelation function of pilot symbols in the same polarization direction that is no greater than 0.3, and a normalized amplitude of the periodic cross-correlation function value of pilot symbols in different polarization directions that is no greater than 0.3. Both autocorrelation and cross-correlation characteristics are good, and the combination of training symbols and pilot symbols can also satisfy DC balance, which is beneficial for improving the signal recovered at the receiver and improving the quality of the recovered signal.
[0280] In another alternative approach, considering row 55 of the 226 pilot sequence list 3, its generator polynomial is a 10th-order polynomial: x^10 + x^7 + x^6 + x^5 + x^4 + x^3 + x^2 + x^1 + 1. The seed for the X-polarization direction is 0x06A, and the seed for the Y-polarization direction is 0x0C8. The generation process of the 226 pilot symbols can be found in [reference needed]. Figure 9 To understand.
[0281] like Figure 9As shown, in the X-polarization direction, the input polarization seed is 0x06A, which is converted to a binary sequence of 000110 1010. If two consecutive bits are output as 1 and 0, the pilot symbol in the X-polarization direction is A-Aj; if two consecutive bits are output as 0, the pilot symbol in the X-polarization direction is -A-Aj; if two consecutive bits are output as 1, the pilot symbol in the X-polarization direction is A+Aj; and if two consecutive bits are output as 0, the pilot symbol in the X-polarization direction is -A+Aj. This process continues, resulting in 226 pilot symbols in the X-polarization direction.
[0282] like Figure 9 As shown, in the Y-polarization direction, the input polarization seed is 0x0C8, which, after conversion to binary, is 001100 1000. If two consecutive bits are output as 1 and 0, the pilot symbol in the Y-polarization direction is A-Aj; if two consecutive bits are output as 0, the pilot symbol in the Y-polarization direction is -A-Aj; if two consecutive bits are output as 1, the pilot symbol in the Y-polarization direction is A+Aj; and if two consecutive bits are output as 0, the pilot symbol in the Y-polarization direction is -A+Aj. This process continues, resulting in 226 pilot symbols in the Y-polarization direction.
[0283] The pilot symbol sequence provided in this embodiment has a normalized amplitude of the sidelobe value of the periodic autocorrelation function of pilot symbols in the same polarization direction that is no greater than 0.3, and a normalized amplitude of the periodic cross-correlation function value of pilot symbols in different polarization directions that is no greater than 0.3. Both autocorrelation and cross-correlation characteristics are good, and the combination of training symbols and pilot symbols can also satisfy DC balance, which is beneficial for improving the signal recovered at the receiver and improving the quality of the recovered signal.
[0284] Figure 10 This is a schematic diagram of a data transmission device according to an embodiment of this application. The data transmission device is applied at the transmitting end, such as... Figure 10 As shown, the data transmission device includes a processing unit 201 and a transmitting unit 202. The processing unit 201 is used to acquire a data frame comprising multiple subframes and generate multiple pilot symbols included in the subframes; optionally, it is also used to generate training symbols; specific implementations have been described in previous embodiments and will not be repeated here. The transmitting unit 202 is used to perform the action of transmitting the data frame in the above embodiments.
[0285] Figure 11 This is a schematic diagram of another structure of the data transmission device in an embodiment of this application. This data transmission device is applied at the receiving end, such as... Figure 11As shown, the data transmission device includes a receiving unit 302, which receives a second data frame transmitted through a channel from a first data frame. The first data frame has multiple subframes, consistent with the data frame with multiple subframes in the sending end; this will not be described further in this embodiment. Optionally, the data transmission device further includes a first processing unit 301, which performs decoding and other operations.
[0286] It should be understood that Figure 10 and Figure 11 The provided data transmission device can also be implemented in other ways. For example, the unit division in the above device is only a logical functional division, and there may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system. In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or they can be independent physical units, or two or more functional units can be integrated into one processing unit. The integrated units described above can be implemented in hardware or in the form of software functional units.
[0287] Figure 12 This is a schematic diagram of one structure of the optical module in an embodiment of this application. Figure 12 As shown, the optical module includes a processor 401 and an interface 402. The interface 402 can be a transceiver or an input / output interface, used to receive signals from other devices and transmit them to the processor 401, or to send signals from the processor 401 to other devices. Optionally, the optical module may also include a memory 403, which stores program instructions and data.
[0288] In one possible scenario, the optical module is applied at the transmitting end, and the processor 401 is used to acquire a data frame including multiple subframes, and to generate multiple pilot symbols included in the subframes based on the target polynomial and seed given in the above embodiments; optionally, it is also used to generate training symbols; specific implementation methods have been described in previous embodiments, and will not be repeated here. For example, the processor 401 includes Figure 10 The processing unit 201 is shown. As an example, the processor 401 performs the operations in the above embodiment to obtain a data frame and sends the data frame through interface 402. In this example, interface 402 can specifically refer to an electrical interface. As another example, the processor 401 performs the operations in the above embodiment to obtain a data frame. The modulator in the optical module performs signal processing such as electro-optic conversion based on the data frame to obtain an optical signal, and then sends the optical signal through interface 402. In this example, interface 402 can specifically refer to an optical interface.
[0289] In another possible scenario, the optical module is applied to the receiving end, and the processor 401 is used to execute the operations of the receiving unit 302 in the above embodiment. In other words, the processor 401 includes... Figure 11 The first processing unit 301 is shown. As an example, the interface receives an optical signal transmitted through the channel. The demodulator in the optical module performs signal processing such as photoelectric conversion on the optical signal to obtain a data frame. The processor 401 performs the operations described in the above embodiments on this data frame. In this example, the interface 402 specifically refers to an optical interface. As another example, the demodulator in the optical module performs signal processing such as photoelectric conversion on the received optical signal to obtain a data frame, and transmits the data frame to the processor 401 through the interface 402. The processor 401 performs the operations described in the above embodiments on this data frame. In this example, the interface 402 specifically refers to an electrical interface.
[0290] Typically, an optical module consists of optoelectronic devices, a processor, and an interface. The optoelectronic devices include transmitting and receiving devices. The transmitting end of the optical module converts electrical signals into optical signals and transmits them through optical fibers. The receiving end of the optical module receives the optical signals and converts them back into electrical signals.
[0291] It should be noted that the types of optical modules in this application embodiment include, but are not limited to, normal optical modules, near package optics (NPO) modules, and co-packaged optics (CPO) modules. Normal optical modules can perform functions including, but not limited to, digital signal processing (DSP) and clock data recovery (CDR). For example, a normal optical module converts analog signals to digital signals, performs DSP on the digital signals, and then converts them back to analog signals before sending them to the host device. Because DSP requires retiming, a normal optical module can also be called a retimed module. Normal optical modules connect to the host device via an attachment unit interface (AUI). NPO and CPO modules do not have pluggable physical packages and are closer to the host device. NPO and CPO modules can also be called optical engines. NPO or CPO technology is a technology that "packages" the host device (or host chip) and the optical engine. When NPO technology is used to encapsulate the host-side device and the optical engine, the optical engine can be called an NPO module. When CPO technology is used to encapsulate the host-side device and the optical engine, the optical engine can be called a CPO module.
[0292] Figure 13 This is a schematic diagram of the structure of a transmitting device in an embodiment of this application. Figure 13 As shown, the transmitting device includes a host-side device 501 and an optical module 502. The host-side device 501 transmits electrical signals to the optical module 502, which converts the electrical signals into optical signals and transmits them through a channel. For example, the host-side device 501 may specifically be a switch, router, or server. This transmitting device can be a communication device that includes the host-side device 501 and the optical module 502. It should also be understood that the transmitting devices in this embodiment are named based on the data flow direction and do not limit the function of the device; for example, the transmitting device may also have a receiving function.
[0293] Figure 14 This is a schematic diagram of the structure of a receiving device in an embodiment of this application. Figure 14 As shown, the receiving device includes a first host-side device 601 and a first optical module 602. The first optical module 602 is used to convert the received optical signal into an electrical signal and send the electrical signal to the first host-side device 601. For example, the first host-side device 601 may specifically be a switch, router, or server. The receiving device can be a communication device that includes the first host-side device 601 and the first optical module 602. It should also be understood that the receiving device in this embodiment is named based on the data flow direction and does not limit the function of the device. For example, the receiving device may also have a transmitting function.
[0294] This application also provides an Optical Transport Network (OTN) device, which includes line-side equipment and client-side equipment. The client-side equipment may also be referred to as a tributary-side equipment in some scenarios. The line-side equipment includes a processor and an interface. In one possible scenario, the OTN device is used at the transmitting end, and the processor is used to execute the operation of step 101 in the above embodiment. In another possible scenario, the OTN device is used at the receiving end, and the processor is used to execute the operation of step 103 in the above embodiment. The interface can be a transceiver or an input / output interface, used to receive signals from other devices besides the line-side equipment and transmit them to the processor, or to send signals from the processor to other devices besides the line-side equipment.
[0295] This application also provides a chip. The chip integrates circuitry for implementing the functions of the processor 401 described above, and one or more interfaces. As an example, the chip integrates a memory. As another example, when the chip does not integrate a memory, it can be connected to an external memory via the interface. The chip can perform the method steps of any one or more of the foregoing embodiments. Alternatively, the chip can implement the actions performed by the processing and transmission device in the foregoing embodiments based on program code stored in the memory.
[0296] As an example, the chip in the embodiments of this application can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. A general-purpose processor can be a microprocessor, any conventional processor, or a processing circuit that implements a specific function.
[0297] This application also provides a computer-readable storage medium including a program or instructions that, when run on a computer, cause the method performed as described in the above method embodiments to be implemented.
[0298] It should be understood that the processor mentioned in the embodiments of this application can be implemented in hardware or software. When implemented in hardware, the processor can be a logic circuit, integrated circuit, etc. When implemented in software, the processor can be a general-purpose processor that reads software code stored in memory. The memory can exist independently and be connected to the processor, or the memory can be integrated with the processor.
[0299] As an example, the processor in the embodiments of this application can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. A general-purpose processor can be a microprocessor, any conventional processor, or a processing circuit that implements a specific function.
[0300] In embodiments of this application, the memory may be random access memory (RAM), flash memory, read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), registers, hard disks, portable hard disks, CD-ROMs, or any other form of storage medium known in the art. An exemplary storage medium is coupled to a processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium may also be a component of the processor. The processor and storage medium may reside in an ASIC. Additionally, the ASIC may reside in a network device or a terminal device. Alternatively, the processor and storage medium may exist as discrete components in the network device or terminal device.
[0301] In the above embodiments, it can be implemented entirely or partially by software, hardware, firmware, or any combination thereof.
[0302] When implemented in hardware, the data transmission method provided in this application embodiment may be implemented without reading software code or instructions. For example, it may be implemented by CPU, DSP, ASIC, FPGA, other programmable logic devices, transistor logic devices, hardware components, or any combination thereof.
[0303] When implemented using software, it can be implemented entirely or partially in the form of a computer program product. A computer program product includes one or more computer programs or instructions. When the computer program or instructions are loaded and executed on a computer, all or part of the processes or functions of the embodiments of this application are performed. The computer can be a general-purpose computer, a special-purpose computer, a computer network, a network device, a terminal device, or other programmable device. The computer program or instructions can be stored in or transmitted through a computer-readable storage medium. The computer-readable storage medium can be any available medium that a computer can access, or a data storage device such as a server integrating one or more available media. The available medium can be a magnetic medium, such as a floppy disk, hard disk, or magnetic tape; it can also be an optical medium, such as a Digital Versatile Disc (DVD); or it can be a semiconductor medium, such as a solid-state disk (SSD).
[0304] Finally, it should be noted that the above are merely exemplary embodiments of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A method for data transmission, characterized in that, The method includes: Acquire a data frame comprising multiple subframes and send the data frame; In one polarization direction, each subframe includes 226 pilot symbols, and the sequences of these 226 pilot symbols in the X-polarization direction and the Y-polarization direction are as follows: 。 2. The method according to claim 1, characterized in that, When the data frame uses 16QAM symbol mapping, A equals 3 or -3; when the data frame uses quadrature phase shift keying (QPSK) symbol mapping, A equals 1 or -1.
3. The method according to claim 1 or 2, characterized in that, In one polarization direction, each subframe also includes 11 training symbols; The sequence of training symbols in the X-polarization direction and the Y-polarization direction are as follows: 。 4. A data transmission method, characterized in that, include: The system receives a second data frame transmitted through the channel from the first data frame. The first data frame comprises multiple subframes, each subframe containing 226 pilot symbols in one polarization direction. The sequences of the 226 pilot symbols in the X-polarization and Y-polarization directions are as follows: 。 5. The method according to claim 4, characterized in that, When the data frame uses 16QAM symbol mapping, A equals 3 or -3; when the data frame uses quadrature phase shift keying (QPSK) symbol mapping, A equals 1 or -1.
6. The method according to claim 4 or 5, characterized in that, In one polarization direction, each subframe also includes 11 training symbols; The sequence of training symbols in the X-polarization direction and the Y-polarization direction are as follows: 。 7. A data transmission device, characterized in that, include: Processing unit and sending unit; The processing unit is used to: perform the processing of acquiring data frames; The sending unit is used to send the data frame.
8. A data transmission device, characterized in that, include: Receiving unit; The receiving unit is used to: receive the second data frame transmitted through the channel from the first data frame.
9. A chip, characterized in that, The chip is used to perform the method as described in any one of claims 1 to 6.
10. An optical module, characterized in that, The optical module includes a processor and an interface, the interface being used for transmitting and receiving signals, and the processor being used for performing the method as described in any one of claims 1 to 3.
11. A transmitting device, characterized in that, The transmitting device includes a host-side device and an optical module as described in claim 10, wherein the optical module is used to convert electrical signals from the host-side device into optical signals and transmit the optical signals.
12. An optical module, characterized in that, The optical module includes a processor and an interface, the interface being used for transmitting and receiving signals, and the processor being used for performing the method as described in any one of claims 4-6.
13. A receiving device, characterized in that, The receiving device includes a host-side device and an optical module as described in claim 12, wherein the optical module is used to convert the received optical signal into an electrical signal and send the electrical signal to the host-side device.
14. A communication system, characterized in that, include: The transmitting device as claimed in claim 11 and the receiving device as claimed in claim 13, wherein the transmitting device is configured to transmit a signal to the receiving device.