Cache control method and cache control device

Abstract

The invention relates to a cache control method and a cache control device. The method comprises the following steps: receiving a data packet sent by at least one data source; the data packet comprises a command part and a data part; storing the command part into a command queue corresponding to the corresponding data source; splitting the data part of each data packet into at least two data groups, and storing data blocks in each data group into corresponding data queues; each data queue comprises data blocks in at least two data packets sent by the same data source, and the data blocks in the at least two data packets are spliced; and storing the commands in the command queue and the data blocks in each data queue into a memory based on the transmission channel. By adopting the method, the data transmission efficiency can be improved.

Description

Technical Field

[0001] This application relates to the field of network communication technology, and in particular to a cache control method and a cache control device. Background Technology

[0002] The doubling of network performance generation by generation is due to the improvement of manufacturing process. However, the improvement of network performance requires the synchronous increase of clock speed and bus width. Due to the limitations of manufacturing process, clock speed cannot be increased proportionally. The only way to achieve network performance adaptation is to increase bus width.

[0003] Currently, physical channels are generally provided according to business needs. However, with the increase in business volume and the emergence of multi-host scenarios, the number of physical channels is increasing. Allocating one physical channel to each business can lead to severe congestion, thereby reducing data transmission efficiency.

[0004] Therefore, improving data transmission efficiency in multi-channel, high-bandwidth scenarios has become an urgent technical problem to be solved. Summary of the Invention

[0005] Therefore, it is necessary to provide a cache control method and cache control device that can improve data transmission efficiency in multi-channel, high-bandwidth scenarios to address the aforementioned technical problems.

[0006] Firstly, this application provides a cache control method, including:

[0007] Receive data packets sent by at least one data source; the data packets include a command portion and a data portion;

[0008] Store the command portion in the command queue corresponding to the relevant data source;

[0009] The data portion of each data packet is split into at least two data groups, and the data blocks in each data group are stored in the corresponding data queue; each data queue includes data blocks from at least two data packets sent from the same data source, and the data blocks in at least two data packets are concatenated together;

[0010] Based on the transmission channel, commands in the command queue and data blocks in each data queue are stored in memory.

[0011] In one embodiment, storing the commands in the command queue and the data blocks in each data queue into memory includes:

[0012] According to the first arbitration mechanism, the commands in the command queues corresponding to each data source are stored into memory in sequence; and,

[0013] According to the second arbitration mechanism, the data blocks in each data queue are stored into memory in sequence;

[0014] The first arbitration mechanism and the second arbitration mechanism represent the storage priority order.

[0015] In one embodiment, the above-mentioned method of storing data blocks from each data queue into memory sequentially according to the second arbitration mechanism includes:

[0016] The second arbitration mechanism determines the data priority order among data queues with the same transmission channel in each data source.

[0017] Data blocks from each data queue are stored in memory according to their data priority, and then the data blocks in memory are grouped together.

[0018] In one embodiment, the above-described packet assembly process for data blocks in memory includes:

[0019] Get the packet identifier, data block identifier, and command identifier of each data block in memory;

[0020] Data blocks and commands are grouped together based on packet identifiers, data block identifiers, and command identifiers.

[0021] In one embodiment, the method further includes:

[0022] A third arbitration mechanism is used to determine the scheduling priority order of each command in memory;

[0023] Data packets are sent based on the command and the data in memory, according to the scheduling priority order.

[0024] In one embodiment, the above-mentioned use of a third arbitration mechanism to determine the scheduling priority order of various commands in memory includes:

[0025] A third arbitration mechanism is used to determine the scheduling priority order of commands from different data sources on the same transmission channel;

[0026] A third arbitration mechanism is used to determine the scheduling priority order of commands for each transmission channel.

[0027] In one embodiment, the method further includes:

[0028] For each transmission channel, obtain the first number of times the data packet corresponding to each data source is sent, and the second number of times the total number of data packets sent by the transmission channel is sent.

[0029] If the first number of transmissions corresponding to at least one data source is greater than the first threshold, and the second number of transmissions is greater than the second threshold, then a backpressure message is sent to at least one data source; the backpressure message is used to instruct at least one data source to stop sending data packets through the transmission channel.

[0030] Secondly, this application also provides a cache control device, comprising:

[0031] A receiving module is used to receive data packets sent by at least one data source; the data packets include a command part and a data part;

[0032] The first storage module is used to store the command portion into the command queue corresponding to the corresponding data source;

[0033] The second storage module is used to split the data portion of each data packet into at least two data groups, and store the data blocks in each data group into the corresponding data queue; each data queue includes data blocks from at least two data packets sent from the same data source, and the data blocks in the at least two data packets are spliced ​​together.

[0034] The third storage module is used to store commands in the command queue and data blocks in each data queue into memory based on the transmission channel.

[0035] In one embodiment, the third storage module includes:

[0036] The first storage unit is specifically used to sequentially store commands from the command queues corresponding to each data source into the memory according to the first arbitration mechanism; and

[0037] The second storage unit is specifically used to store data blocks from each data queue into the memory in sequence according to the second arbitration mechanism; wherein the first arbitration mechanism and the second arbitration mechanism represent the storage priority order.

[0038] In one embodiment, the second storage unit is further configured to determine the data priority order among data queues with the same transmission channel in each data source according to the second arbitration mechanism; store the data blocks in each data queue into memory according to the data priority order; and perform packet assembly processing on the data blocks in memory.

[0039] The aforementioned cache control method and cache control device, after receiving a data packet sent by at least one data source, first split the data packet into a command part and a data part. For the command part, it is directly stored in the command queue of the corresponding data source. For the data part, it needs to be split into at least two data groups again. When storing the data blocks in the two data groups into the data queue, the data blocks in the at least two data groups are concatenated. The space occupancy rate of the concatenated data queue is significantly increased, so the transmission efficiency is greatly improved when the data queue with high space occupancy rate is transmitted to memory. Attached Figure Description

[0040] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0041] Figure 1 This is a diagram illustrating the application environment of a cache control method in one embodiment;

[0042] Figure 2 This is a flowchart illustrating a cache control method in one embodiment;

[0043] Figure 3 This is a schematic diagram of a multi-channel access method for cache control in one embodiment;

[0044] Figure 4 This is a schematic diagram illustrating the splitting of a data packet into two data groups in one embodiment;

[0045] Figure 5 This is a schematic diagram illustrating how multiple data packets are split into two data groups in one embodiment;

[0046] Figure 6 This is a schematic diagram illustrating the process of concatenating multiple data packets in one embodiment;

[0047] Figure 7 This is a flowchart illustrating the cache control method in another embodiment;

[0048] Figure 8 This is a flowchart illustrating the cache control method in another embodiment;

[0049] Figure 9 This is a flowchart illustrating the cache control method in another embodiment;

[0050] Figure 10 This is a flowchart illustrating the cache control method in another embodiment;

[0051] Figure 11 This is a flowchart illustrating the cache control method in another embodiment;

[0052] Figure 12 This is a schematic diagram of a memory output channel in one embodiment;

[0053] Figure 13 This is a flowchart illustrating the cache control method in another embodiment;

[0054] Figure 14 This is a schematic diagram of channel resource management in one embodiment;

[0055] Figure 15 This is a flowchart illustrating the cache control method in another embodiment;

[0056] Figure 16 This is a structural block diagram of a cache control device in one embodiment. Detailed Implementation

[0057] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0058] The doubling of network performance generation by generation is due to the improvement of manufacturing process. However, the improvement of network performance requires the synchronous increase of clock speed and bus width. Due to the limitations of manufacturing process, clock speed cannot be increased proportionally. The only way to achieve network performance adaptation is to increase bus width.

[0059] Currently, physical channels are typically provided according to business needs. However, with increasing business volume and the emergence of multi-host scenarios, the number of physical channels is growing rapidly. Allocating only one physical channel to each business can lead to severe congestion, thereby reducing data transmission efficiency. Therefore, improving data transmission efficiency in multi-channel, high-bandwidth scenarios has become an urgent technical problem to be solved. Based on this, this application provides a cache control method aimed at solving this problem.

[0060] The cache control method provided in this application embodiment can be applied to, for example, Figure 1In the application environment shown, the application environment includes a data storage system 102 and a server 104. The data storage system 102 stores the data that the server 104 needs to process. The data storage system 102 can be integrated onto the server 104 or placed on a cloud or other network server. The data storage system 102 includes a data storage structure, into which data can be stored. The data storage structure can be a circular queue, a memory array, a storage array, a hash chain, or a hash table, etc. The server 104 can be a standalone physical server, a server cluster or distributed system composed of multiple physical servers, or a cloud server providing cloud computing services.

[0061] When server 104 receives data packets from other data sources, it can store the data packets in data storage system 102. When other nodes request corresponding data packets from data storage system 102, server 104 can send the corresponding data packets from data storage system 102 to other nodes.

[0062] In other possible implementations, the cache control method provided in this application embodiment can also be applied to a terminal. The terminal can be, but is not limited to, various personal computers, laptops, smartphones, tablets, IoT devices, and portable wearable devices. IoT devices can be smart speakers, smart TVs, smart air conditioners, smart in-vehicle devices, etc. Portable wearable devices can be smartwatches, smart bracelets, head-mounted devices, etc.

[0063] In one exemplary embodiment, such as Figure 2 As shown, a cache control method is provided, which is applied to... Figure 1 Taking server 104 as an example, the explanation includes:

[0064] S201, Receive a data packet sent by at least one data source; the data includes a command portion and a data portion.

[0065] In this context, a data source refers to the original source or system that provides data. A data source can be any entity that stores, generates, or transmits data. For example, a data source can be an engine (ENG), which refers to a data sending unit that is strongly related to processing business.

[0066] A data packet typically consists of a command portion and a data portion. The command portion carries control information such as the length of the data packet and the length of the command header (CHL). The data portion is the physical part of the data packet, carrying the actual data that the data packet is intended to transmit.

[0067] In this embodiment, at least one data source can send data packets to the server. After receiving the data packets, the server can split the data packets to obtain the command part and the data part of the data packets.

[0068] S202. Store the command portion in the command queue corresponding to the data source.

[0069] The command queue is a structure specifically used to store commands. It should be noted that a separate command queue can be allocated for each data source.

[0070] In this embodiment, after splitting the data packet into a command portion and a data portion, the command portion of the data packet can be stored in the command queue corresponding to the data source. See also Figure 3 The command portion (CMD) of data packets sent by data source ENG 0 can be stored in the command queue corresponding to data source ENG 0, and the command portion (CMD) of data packets sent by data source ENG 1 can be stored in the command queue corresponding to data source ENG 1. It should be noted that... Figure 3 The part to the right of CMD shown in the diagram is the command queue.

[0071] S203. Divide the data portion of each data packet into at least two data groups, and store the data blocks in each data group into the corresponding data queue; each data queue includes data blocks from at least two data packets sent by the same data source, and the data blocks in the at least two data packets are spliced ​​together.

[0072] Each data group includes at least one data block. For example, the data portion of data packet 1 is divided into five data blocks: data block 1-1, data block 1-2, data block 1-3, data block 1-4, and data block 1-5. These five data blocks are located sequentially in data group 1 and data group 2. See [reference needed]. Figure 4 Data blocks in data group 1 include data block 1-1, data block 1-3, and data block 1-5, while data blocks in data group 2 include data block 1-2 and data block 1-4. It should be noted that data block 1-1 represents the first segment of data packet 1, data block 1-2 represents the second segment of data packet 1, and so on for the other data blocks.

[0073] Here, a data queue refers to a structure specifically used for storing data. It should be noted that at least one data queue can be allocated to each data source. Please see below. Figure 3 Two data queues were allocated to data source ENG1. It should be noted that... Figure 3 The data queue is the part to the right of data group D0 and data group D1 shown in the figure.

[0074] In this embodiment, after splitting the data packet into a command portion and a data portion, the data portion can be further divided into at least two data groups, each data group including at least one data block. The data blocks in each data group are then stored in the corresponding data queue. It should be noted that when storing the data blocks in the data groups into the corresponding data queues, the data blocks in each data group may come from different data packets. In the data queue, data blocks from different data packets can be concatenated to increase the space utilization of the data blocks in the data queue. This, in turn, increases the space utilization of the channel when the data blocks in the data queue are transmitted to memory through the channel, thereby improving data transmission efficiency.

[0075] The following section details the process of concatenating data blocks from different data packets in the data queue. In the data queue, there may be more than one data packet sent from the same data source; for example, see [link to relevant documentation]. Figure 5 In the case of 5 data packets sent by data source ENG 0, data packet 1 includes 5 data blocks: data block 1-1, data block 1-2, data block 1-3, data block 1-4, and data block 1-5; data packet 2 includes 4 data blocks: data block 2-1, data block 2-2, data block 2-3, and data block 2-4; data packet 3 includes 5 data blocks: data block 3-1, data block 3-2, data block 3-3, data block 3-4, and data block 3-5; data packet 4 includes 1 data block 4-1; and data packet 5... If there is one data block 5-1, and the number of data groups is two, namely data group D0 and data group D1, then the data blocks included in data group D0 are: data block 1-2, data block 1-4, data block 2-2, data block 2-4, data block 3-2, and data block 3-4. The data blocks included in data group D1 are: data block 1-1, data block 1-3, data block 1-5, data block 2-1, data block 2-3, data block 3-1, data block 3-3, data block 3-5, data block 4-1, and data block 5-1.

[0076] Furthermore, when storing data blocks from data groups D0 and D1 into the data queue, the data blocks from data groups D0 and D1 can be concatenated. The concatenated data queue can be found in [reference needed]. Figure 6 As shown, compared to the data blocks in the unassembled data group D0 and data group D1, the space occupancy rate of the assembled data queue is significantly increased, thus greatly improving the data transmission efficiency based on the larger space occupancy rate.

[0077] S204. Based on the transmission channel, store the commands in the command queue and the data blocks in each data queue into memory.

[0078] In this embodiment, after storing the command portion to the command queue and the data portion to the data queue, the commands in the command queue can be stored in memory based on the command transmission channel corresponding to the command queue, and the data blocks in the data queue can be stored in memory based on the data transmission channel corresponding to each data queue.

[0079] Optionally, in complex cases, each data source corresponds to one command queue and at least two data queues. Therefore, when storing commands from multiple command queues into memory, the commands in multiple command queues can be arbitrated to determine a target command queue. The command in the target command queue is then stored into memory. Further, the commands from the other command queues besides the target command queue are arbitrated again, and so on, until all commands in each command queue are stored into memory.

[0080] Similarly, when storing data blocks from multiple data queues into memory, the commands in the multiple data queues can be arbitrated based on the number of data transmission channels. The number of data blocks in the target data queues that are equal to the number of data transmission channels can be arbitrated, and then the data blocks in the target data queues can be stored into memory. Further, the data blocks in the other data queues besides the data in the target data queues can be arbitrated again, and so on, until all the data blocks in each data queue are stored into memory.

[0081] In this embodiment, after receiving a data packet sent by at least one data source, the data packet is first split into a command part and a data part. For the command part, it is directly stored in the command queue of the corresponding data source. For the data part, it needs to be split into at least two data groups again. When storing the data blocks in the two data groups into the data queue, the data blocks in the at least two data groups are concatenated. The space occupancy rate of the concatenated data queue is significantly increased, so the transmission efficiency is greatly improved when the data queue with high space occupancy rate is transmitted to memory.

[0082] In this embodiment, in the above Figure 2 Based on the illustrated embodiment, the detailed process of storing commands in the command queue and data blocks in each data queue into memory will be explained. In an exemplary embodiment, such as Figure 7 As shown, the above S204 includes:

[0083] S301. According to the first arbitration mechanism, the commands in the command queues corresponding to each data source are stored into memory in sequence.

[0084] The first arbitration mechanism refers to the mechanism for prioritizing the transmission of commands in the command queues corresponding to multiple data sources. The first arbitration mechanism can be a load balancing scheduling mechanism.

[0085] In this embodiment, after storing the command portion corresponding to the data packets sent by each data source into the command queue, the transmission priority order of the commands in the command queue corresponding to each data source can be determined based on the first arbitration mechanism, and then the commands in the command queue corresponding to each data source can be stored into memory based on the priority order of the commands.

[0086] For example, please continue to see Figure 3 If there are two data sources, ENG0 and ENG1, then after storing the command portion of the data packet into the command queues corresponding to data sources RNG0 and ENG1, a command can be arbitrated from the command queues corresponding to either data source RNG0 or ENG1 based on the first arbitration mechanism. For example, if the command queue corresponding to data source ENG1 is arbitrated, then the command in the command queue corresponding to data source ENG1 can be stored in memory through the command transmission channel first. Next, the command in the command queue corresponding to data source ENG0 can be stored in memory through the command transmission channel.

[0087] S302. Store the data blocks in each data queue into memory in sequence according to the second arbitration mechanism; wherein the first arbitration mechanism and the second arbitration mechanism represent the storage priority order.

[0088] The second arbitration mechanism refers to a mechanism for prioritizing the transmission of data in multiple data queues. The second arbitration mechanism can be a balanced scheduling mechanism.

[0089] In this embodiment, after storing the data portion corresponding to the data packets sent by each data source into the data queue, the transmission priority order of the data in each data queue can be determined based on the second arbitration mechanism, and then the data in each data queue can be stored into memory based on the data priority order.

[0090] For example, please continue to see Figure 3If there are two data sources, ENG0 and ENG1, with ENG0 corresponding to two data queues and ENG1 also corresponding to two data queues, resulting in a total of four data queues, data from any one of these four data queues can be arbitrated based on the second arbitration mechanism. For example, if data corresponding to data group D0 in the data queue corresponding to data source ENG1 is arbitrated, then the data corresponding to data group D0 in the data queue corresponding to data source ENG1 can be stored in memory through the data transmission channel. Next, data from any one of the remaining three data queues can be arbitrated. For example, if data corresponding to data group D0 in the data queue corresponding to data source ENG0 is arbitrated, then the data corresponding to data group D0 in the data queue corresponding to data source ENG0 can be stored in memory through the data transmission channel, and so on, until all data in all four data queues has been stored in memory.

[0091] Optionally, a method for sequentially storing data from each data queue into memory based on a second arbitration mechanism is also provided below; see [link to relevant documentation]. Figure 8 The aforementioned S302 includes:

[0092] S3021. Determine the data priority order among data queues with the same transmission channel in each data source according to the second arbitration mechanism.

[0093] In this context, "data queues with the same transmission channel" refers to data queues where data is transmitted through the same data transmission channel. For example, please see [link to previous section]. Figure 3 The data queues of data group D0 corresponding to data source ENG0 and data group D0 corresponding to data source ENG1 are transmitted through the same data transmission channel. The data queues of data group D1 corresponding to data source ENG0 and data group D1 corresponding to data source ENG1 are also transmitted through the same data transmission channel.

[0094] In this embodiment, for multiple data queues transmitted through the same transmission channel, the transmission priority order of data in the multiple data queues can be determined based on the second arbitration mechanism. For example, continuing from the previous example, for the data queue of data group D0 corresponding to data source ENG0 and the data queue of data group D0 corresponding to data source ENG1, the second arbitration mechanism can be used to determine the data queue of data group D0 corresponding to one data source. For example, the data queue of data group D0 corresponding to data source ENG0 is determined, and then the data in the data queue of data group D0 corresponding to data source ENG0 is transferred to memory. Then, the data in the data queue of data group D0 corresponding to data source ENG1 is transferred to memory.

[0095] Similarly, for the data queues of data group D1 corresponding to data source ENG0 and data group D1 corresponding to data source ENG1, a data queue corresponding to data source D1 can be determined from the data queues of data group D1 corresponding to data source ENG0 and data group D1 corresponding to data source ENG1 based on the second arbitration mechanism. For example, the data queue of data group D1 corresponding to data source ENG0 can be determined, and then the data in the data queue of data group D1 corresponding to data source ENG0 can be transferred to memory. Then, the data in the data queue of data group D1 corresponding to data source ENG1 can be transferred to memory.

[0096] It should be noted that the process of determining the data priority order between different transmission channels can be carried out in parallel. Continuing the previous example, while arbitrating a data queue corresponding to data group D0 from data queues of data group D0 corresponding to data source ENG0 and data queues of data group D0 corresponding to data source ENG1, a data queue corresponding to data group D1 corresponding to data source ENG0 and data queues of data group D1 corresponding to data source ENG1 can also be arbitrated.

[0097] S3022. Store the data blocks in each data queue into memory according to the data priority order, and perform packet assembly processing on the data blocks in memory.

[0098] Packet assembly refers to the process of sorting the data blocks in the received data packet according to their order to obtain a complete data packet.

[0099] In this embodiment, after determining the data priority order as described above, data blocks in each data queue can be stored in memory based on the data transmission channel, and the data blocks in memory can be grouped according to the order of the received data packets to obtain the grouped data packets.

[0100] Optionally, a circular storage queue can be used to assemble data blocks in memory. For example, after the target data block is pre-stored in the circular storage queue, if other data blocks need to be stored in the circular storage queue, they can be stored in the circular storage queue according to the difference between the position of other data blocks in the data packet and the position of the target data block in the data packet, until the circular storage queue is full, and the assembled data packet is obtained.

[0101] In this embodiment, a two-level strategy of command-level sequential arbitration and data-level co-channel arbitration is adopted to quickly order lightweight commands into the database, and then write co-channel data according to priority and stagger the peak times. Packet assembly is completed while writing to memory, so that high-priority data can preempt bandwidth in real time and avoid head blocking. Finally, continuous, aligned, and directly DMA-enabled whole packet data is output, which significantly reduces CPU copy and interrupt overhead and realizes low latency, high throughput, and easy expansion of multi-source data aggregation.

[0102] In this embodiment, in the above Figure 8 Based on the illustrated embodiment, the detailed process of assembling data blocks in memory will be explained. In an exemplary embodiment, such as Figure 9 As shown, the above S3022 includes:

[0103] S401. Obtain the packet identifier, data block identifier, and command identifier of each data block in memory.

[0104] Among them, the packet identifier indicates which packet the data block comes from, the data block identifier indicates the order of the data block in the packet, the command identifier corresponds to the packet identifier, and the command identifier indicates the identifier of the command part in the packet.

[0105] In this embodiment, after storing the data blocks and commands of the data packets sent by each data source into memory, the data packet identifier, data block identifier, and command identifier of each data block in memory can be obtained.

[0106] S402. Assemble data blocks and commands into packets based on packet identifiers, data block identifiers, and command identifiers.

[0107] In this embodiment, after obtaining the data packet identifier, data block identifier, and command identifier, data blocks and commands can be grouped into packets based on the data packet identifier, data block identifier, and command identifier.

[0108] For example, please see Figure 6After receiving data packet 1 from data source ENG0 and splitting it into 5 data blocks, the order of each data block in data packet 1 is recorded. When each data block in data packet 1 is stored in memory, the corresponding data block's identifier is updated to the storage identifier. Once all data block identifiers in data packet 1 have been updated to the storage identifier, it indicates that data packet 1 has been successfully assembled. For example, after splitting data packet 1 into 5 data blocks (data block 1-1, data block 1-2, data block 1-3, data block 1-4, and data block 1-5), the order of data block 1-1, data block 1-2, and data block 1-3 is recorded. The order of data blocks 1-4 and 1-5 is as follows: when data block 1-2 is stored in memory, its identifier can be updated to the storage identifier; when data block 1-3 is stored in memory, its identifier can be updated to the storage identifier. This process continues until the identifiers of data blocks 1-1, 1-2, 1-3, 1-4, and 1-5 are all updated to the storage identifier. After this, the data portion of data packet 1 is assembled. Then, based on the data packet identifier and the command identifier, the command identifier corresponding to data packet 1 and the data portion of data packet 1 are grouped together to obtain the grouped data packet.

[0109] It should be noted that, in order to reduce the overall system latency, the command can be entered into the PIPELINE first, processed, and then the data aligned according to a fixed delay.

[0110] In this embodiment, by extracting the data packet identifier, data block identifier, and command identifier of the corresponding command from the data blocks in memory, the system can automatically reassemble the scattered data blocks and commands into complete service frames during the packet assembly stage, avoiding out-of-order, missing blocks, or duplicate packets, achieving zero-copy, zero-error closed-loop reassembly, and significantly improving the data retrieval accuracy and processing efficiency of downstream modules.

[0111] In this embodiment, in the above Figures 2-9 Based on the illustrated embodiment, the detailed process of sending data in memory to the next node can be further explained. In an exemplary embodiment, such as Figure 10 As shown, the above method also includes:

[0112] S205. A third arbitration mechanism is used to determine the scheduling priority order of each command in memory.

[0113] The third arbitration mechanism refers to the mechanism for prioritizing the transmission of various commands in memory. The third arbitration mechanism can be a load balancing mechanism.

[0114] In this embodiment, for each command in memory, the first target command can be determined directly from multiple commands in memory based on the third arbitration mechanism, and then the second target command can be determined from other commands besides the first target command based on the third arbitration mechanism, and so on, until all commands in memory have been traversed to obtain the scheduling priority order of each command in memory.

[0115] Optionally, a specific implementation method for determining the scheduling priority order of various commands in memory using a third arbitration mechanism is also provided below, see [link to implementation details]. Figure 11 That is, the above-mentioned S205 also includes:

[0116] S2051. A third arbitration mechanism is used to determine the scheduling priority order of commands from different data sources on the same transmission channel.

[0117] The third arbitration mechanism can be a business selection scheduling strategy, such as the round-robin (RR) algorithm.

[0118] In this embodiment, after storing multiple commands in memory, the scheduling priority order of commands from different data sources on the same transmission channel can be determined based on the data source from which the commands are sent and the transmission channel through which the commands are transmitted to memory.

[0119] See Figure 12 Command CMD1 originates from data source 0 and is transmitted through command transmission channel 0. Command CMD2 originates from data source 1 and is transmitted through command transmission channel 0. Command CMD3 originates from data source 0 and is transmitted through command transmission channel 1. Command CMD4 originates from data source 1 and is transmitted through command transmission channel 1. Command CMD5 originates from data source 0 and is transmitted through command transmission channel 2. Command CMD6 originates from data source 1 and is transmitted through command transmission channel 2. For commands on the same command transmission channel (e.g., command transmission channel 0), CMD1 and CMD2 can be determined through a third arbitration mechanism. For example, if CMD1 is determined, the scheduling priority order of the commands is CMD1, then CMD2.

[0120] It should be noted that the arbitration method for commands on other command transmission channels is the same as that for commands on command transmission channel 0.

[0121] S2052. A third arbitration mechanism is adopted to determine the scheduling priority order of commands corresponding to each transmission channel.

[0122] The third arbitration mechanism can be a service selection scheduling strategy, such as a bandwidth balancing strategy, to perform differential weighted round-robin (DWRR) scheduling to ensure that the bandwidth of all channels is transmitted and the allocation of configured weights is satisfied.

[0123] In this embodiment, after arbitrating the scheduling priority order of the same command transmission channel, the scheduling priority order of the same command transmission channel is arbitrated again using a third arbitration mechanism to obtain the scheduling priority order of the commands corresponding to each transmission channel.

[0124] Following the previous example, please continue to see... Figure 12 If command transmission channel 0 arbitrates CMD1, command transmission channel 1 arbitrates CMD3, and command transmission channel 2 arbitrates CMD5, then this embodiment can further arbitrate CMD1, CMD3, and CMD5 to obtain an arbitration result, such as CMD1. Furthermore, for the remaining CMD3 and CMD5, arbitration can be performed again to determine the scheduling priority order of CMD3 and CMD5, thereby obtaining the scheduling priority order of each command in memory.

[0125] This establishes the scheduling priority order of each command in memory.

[0126] S206. Send data packets based on commands and data in memory according to scheduling priority order.

[0127] In this embodiment, after determining the scheduling priority order of commands, the data corresponding to the commands can be retrieved from memory according to the scheduling priority order of commands, and then sent to the data packet based on the commands and the data in memory.

[0128] In this embodiment, a third arbitration mechanism is introduced to re-prioritize commands from different data sources within the same channel, thus unifying the channel-level and source-level priorities. High-priority commands and their associated data are output first, which avoids low-priority commands occupying the bus for a long time and ensures that critical service packets are launched on time, achieving deterministic low latency and simultaneous improvement in bandwidth utilization for both command and data links.

[0129] In this embodiment, in the above Figures 2-9 Based on the illustrated embodiment, the detailed process of the backpressure operation for each channel can be further explained. In an exemplary embodiment, such as Figure 13 As shown, the above method also includes:

[0130] S207. For each transmission channel, obtain the first number of times each data source sends data packets through each channel, and the second number of times the transmission channel sends a total of data packets.

[0131] In this embodiment, the backpressure operation of each transmission channel can also be described. For any transmission channel that is transmitting commands or data, the first number of times the data packets corresponding to each data source under that transmission channel are sent, and the second number of times the total data packets under that transmission channel are sent are obtained.

[0132] For example, see Figure 14 Eng0_CHL0 represents the count of data source ENG0 using transport channel CHL0, and Eng1_CHL0 represents the count of data source ENG1 using transport channel CHL0; CHL0 TH represents the overall resource level of the configured transport channel CHL0. For transport channel CHL0, it is necessary to obtain the number of data packets sent from each data source through transport channel CHL0. If both ENG0 and ENG1 have sent data packets through transport channel CHL0, then it is necessary to count the first number of times ENG0 sends data packets through transport channel CHL0, the first number of times ENG1 sends data packets through transport channel CHL0, and the second number of times a total number of data packets are sent through transport channel CHL0.

[0133] S208. If the first number of transmissions corresponding to at least one data source is greater than the first threshold, and the second number of transmissions is greater than the second threshold, then a backpressure message is sent to at least one data source; the backpressure message is used to instruct at least one data source to stop sending data packets through the transmission channel.

[0134] In this embodiment, if the first number of transmissions corresponding to at least one data source is greater than the first threshold and the second number of transmissions is greater than the second threshold, a backpressure message is sent to at least one data source to instruct at least one data source to stop sending data packets through the transmission channel.

[0135] In this embodiment, by real-time statistics of the number of packets sent by each data source in a single channel and the total number of packets sent by the channel, once a data source exceeds its limit and the channel as a whole approaches the congestion threshold, a backpressure message is immediately sent back to the data source to stop sending packets. This not only prevents individual data sources from occupying the channel bandwidth, but also avoids downstream buffer overflow and packet loss, achieving rapid self-healing at the channel level and ensuring fairness.

[0136] In one embodiment, see Figure 15 It also provides a cache control method, including:

[0137] T1. Receive data packets sent by at least one data source; the data packets include a command portion and a data portion;

[0138] T2. Store the command portion in the command queue corresponding to the data source;

[0139] T3. Divide the data portion of each data packet into at least two data groups, and store the data blocks in each data group into the corresponding data queue; each data queue includes data blocks from at least two data packets sent from the same data source, and the data blocks in at least two data packets are concatenated together;

[0140] T4. According to the first arbitration mechanism, the commands in the command queues corresponding to each data source are stored into memory in sequence;

[0141] T5. Determine the data priority order among data queues with the same transmission channel in each data source according to the second arbitration mechanism;

[0142] T6. Store the data blocks in each data queue into the memory according to the data priority order, and obtain the data packet identifier, data block identifier and command identifier of each data block in the memory;

[0143] T7. Assemble data blocks and commands into packets based on packet identifiers, data block identifiers, and command identifiers;

[0144] T8. Use a third arbitration mechanism to determine the scheduling priority order of commands from different data sources on the same transmission channel;

[0145] T9. A third arbitration mechanism is used to determine the scheduling priority order of commands for each transmission channel;

[0146] T10. Send data packets based on commands and data in memory, according to scheduling priority.

[0147] It should be noted that the descriptions of T1-T10 above can be found in the relevant descriptions in the above embodiments, and their effects are similar, so they will not be repeated here.

[0148] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0149] Based on the same inventive concept, this application also provides a cache control device for implementing the cache control method described above. The solution provided by this device is similar to the implementation described in the above method; therefore, the specific limitations in one or more cache control device embodiments provided below can be found in the limitations of the cache control method described above, and will not be repeated here.

[0150] In one exemplary embodiment, such as Figure 16 As shown, a buffer control device is provided, comprising: a receiving module 10, a first storage module 11, a second storage module 12, and a third storage module 13, wherein:

[0151] The receiving module 10 is used to receive data packets sent by at least one data source; the data packets include a command part and a data part.

[0152] The first storage module 11 is used to store the command portion into the command queue corresponding to the corresponding data source.

[0153] The second storage module 12 is used to split the data portion of each data packet into at least two data groups and store the data blocks in each data group into the corresponding data queue; each data queue includes data blocks from at least two data packets sent from the same data source, and the data blocks in the at least two data packets are spliced ​​together.

[0154] The third storage module 13 is used to store commands in the command queue and data blocks in each data queue into memory based on the transmission channel.

[0155] In one exemplary embodiment, the third storage module 13 described above includes:

[0156] The first storage unit is specifically used to sequentially store commands from the command queues corresponding to each data source into the memory according to the first arbitration mechanism; and...

[0157] The second storage unit is specifically used to store data blocks from each data queue into memory in sequence according to the second arbitration mechanism; the first arbitration mechanism and the second arbitration mechanism represent the storage priority order.

[0158] In an exemplary embodiment, the second storage unit is further configured to determine the data priority order among data queues with the same transmission channel in each data source according to the second arbitration mechanism; store the data blocks in each data queue into memory according to the data priority order; and perform packet assembly processing on the data blocks in memory.

[0159] In an exemplary embodiment, the second storage unit is further configured to acquire the data packet identifier, data block identifier, and command identifier of each data block in memory; and to assemble the data blocks and commands into packets based on the data packet identifier, data block identifier, and command identifier.

[0160] In one exemplary embodiment, the above-described apparatus further includes;

[0161] The determination module is used to determine the scheduling priority order of each command in memory using a third arbitration mechanism;

[0162] The sending module is used to send data packets based on commands and data in memory, according to the scheduling priority order.

[0163] In one exemplary embodiment, the above-described determining module includes:

[0164] The first determining unit is specifically used to determine the scheduling priority order of commands from different data sources on the same transmission channel using a third arbitration mechanism.

[0165] The second determining unit is specifically used to determine the scheduling priority order of commands corresponding to each transmission channel using a third arbitration mechanism.

[0166] In one exemplary embodiment, the above-described apparatus further includes;

[0167] The acquisition module is used to acquire, for each transmission channel, the first number of times the data packet corresponding to each data source is sent, and the second number of times the total data packets are sent by the transmission channel.

[0168] The sending module is configured to send a backpressure message to at least one data source if the first number of transmissions corresponding to at least one data source is greater than a first threshold and the second number of transmissions is greater than a second threshold; the backpressure message is used to instruct at least one data source to stop sending data packets through the transmission channel.

[0169] Each module in the aforementioned cache control device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in the processor of a computer device in hardware form or independent of it, or stored in the memory of the computer device in software form, so that the processor can call and execute the operations corresponding to each module.

[0170] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0171] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0172] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A cache control method, characterized in that, The method includes: Receive data packets sent by at least one data source; the data packets include a command portion and a data portion; The command portion is stored in the command queue corresponding to the relevant data source; The data portion of each data packet is split into at least two data groups, and the data blocks in each data group are stored in the corresponding data queue; each data queue includes data blocks from at least two data packets sent from the same data source, and the data blocks in the at least two data packets are spliced ​​together. Based on the transmission channel, the commands in the command queue and the data blocks in each of the data queues are stored in memory.

2. The method according to claim 1, characterized in that, The step of storing the commands in the command queue and the data blocks in each data queue into memory includes: According to the first arbitration mechanism, the commands in the command queues corresponding to each of the data sources are sequentially stored into the memory; and, According to the second arbitration mechanism, the data blocks in each of the data queues are stored into the memory in sequence; Wherein, the first arbitration mechanism and the second arbitration mechanism represent the storage priority order.

3. The method according to claim 2, characterized in that, The step of storing data blocks from each of the data queues into the memory sequentially according to the second arbitration mechanism includes: The data priority order among data queues with the same transmission channel in each of the data sources is determined according to the second arbitration mechanism; The data blocks in each data queue are stored in the memory according to the data priority order, and the data blocks in the memory are then packaged.

4. The method according to claim 3, characterized in that, The process of assembling data blocks in memory includes: Obtain the packet identifier, data block identifier, and command identifier of each data block in the memory; Data blocks and commands are grouped together based on the data packet identifier, the data block identifier, and the command identifier.

5. The method according to any one of claims 1-4, characterized in that, The method further includes: A third arbitration mechanism is used to determine the scheduling priority order of each command in the memory; Data packets are sent based on the command and the data in memory, according to the scheduling priority order.

6. The method according to claim 5, characterized in that, The method of using a third arbitration mechanism to determine the scheduling priority order of each command in memory includes: The third arbitration mechanism is used to determine the scheduling priority order of commands from different data sources on the same transmission channel; The third arbitration mechanism is used to determine the scheduling priority order of commands for each transmission channel.

7. The method according to any one of claims 1-4, characterized in that, The method further includes: For each transmission channel, obtain the first number of times the data packet corresponding to each data source is sent, and the second number of times the total number of data packets sent by the transmission channel is sent. If the first number of transmissions corresponding to at least one data source is greater than a first threshold, and the second number of transmissions is greater than a second threshold, then a backpressure message is sent to the at least one data source; the backpressure message is used to instruct the at least one data source to stop sending data packets through the transmission channel.

8. A cache control device, characterized in that, include: A receiving module is used to receive data packets sent by at least one data source; the data packets include a command portion and a data portion; The first storage module is used to store the command portion into the command queue corresponding to the corresponding data source; The second storage module is used to split the data portion of each data packet into at least two data groups, and store the data blocks in each data group into a corresponding data queue; each data queue includes data blocks from at least two data packets sent from the same data source, and the data blocks in the at least two data packets are spliced ​​together. The third storage module is used to store commands in the command queue and data blocks in each of the data queues into memory based on the transmission channel.

9. The apparatus according to claim 8, characterized in that, The third storage module includes: The first storage unit is specifically used to sequentially store commands from the command queues corresponding to each of the data sources into the memory according to the first arbitration mechanism; and The second storage unit is specifically used to store data blocks from each of the data queues into the memory in sequence according to the second arbitration mechanism; wherein the first arbitration mechanism and the second arbitration mechanism represent the storage priority order.

10. The apparatus according to claim 9, characterized in that, The second storage unit is further configured to determine the data priority order among data queues with the same transmission channel in each of the data sources according to the second arbitration mechanism; store the data blocks in each data queue into the memory according to the data priority order; and perform packet assembly processing on the data blocks in the memory.

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