Network-on-chip atomic operation architecture and method with optimized power consumption
By employing a collaborative strategy involving the scheduling module, resource wake-up control module, AI bandwidth prediction module, and operation merging module, the high power consumption and low resource utilization issues in the on-chip network atomic operation architecture are resolved, achieving power optimization and performance improvement.
Patent Information
- Application Number
- CN202511536275.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-27
- Publication Date
- 2026-02-10
AI Technical Summary
Existing on-chip network atomic operation architectures have shortcomings in power consumption optimization, resulting in high chip power consumption, low resource utilization, and serious energy consumption from repeated transmission of similar operations.
By employing a collaborative strategy involving a coordinated scheduling module, a resource wake-up control module, an AI bandwidth prediction module, and an operation merging module, resources can be woken up on demand, bandwidth can be dynamically allocated, and similar operations can be merged, thereby optimizing power consumption.
Significantly reduces chip power consumption, improves resource utilization efficiency, ensures the security and response speed of atomic operations, and enhances chip concurrency performance.
Smart Images
Figure CN121509370A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of network-on-chip, in particular to a power consumption optimized network-on-chip atomic operation architecture and method. BACKGROUND
[0002] As the core architecture of multi-node data interaction and resource collaboration of multi-core heterogeneous chips, the atomic operation mechanism is a key technology to ensure the safety and consistency of multi-node concurrent access, and its architecture design and execution method directly affect the power consumption and performance of the chip. The current atomic operation architecture and implementation scheme of NoC have significant deficiencies in power consumption optimization, mainly in the following aspects:
[0003] Firstly, in order to ensure the response speed of atomic operation, the traditional architecture needs to keep all nodes, storage controllers, lock management modules and other core components in the NoC in a full-time active state, even if multiple components are not involved in the current atomic operation, static power consumption is still generated, resulting in high chip power consumption, especially in low-concurrency atomic operation scenarios, the problem of power waste is more prominent.
[0004] Secondly, atomic operation requests have randomness and burstiness, and existing schemes will statically reserve a large amount of NoC bandwidth resources for atomic operation transmission in order to deal with possible lock competition, multi-node access conflict and other situations. When the atomic operation request frequency is low, the reserved bandwidth is idle for a long time, resulting in low resource utilization and further exacerbating power waste.
[0005] Finally, for multiple atomic operations of the same type in the same critical section (such as "Fetch-and-Add" operations on the same memory block by multiple nodes), the traditional atomic operation adopts a processing scheme of "processing one by one and transmitting one by one", and each operation request needs to independently complete the whole process of "request initiation-routing forwarding-lock occupation-execution-result feedback-lock release", resulting in a large number of repeated atomic operation request packet transmissions in the NoC link, not only occupying additional bandwidth, but also increasing the dynamic power consumption of each module, which restricts the performance improvement of the chip. SUMMARY
[0006] The technical task of the present application is to solve the above problems, and provide a power consumption optimized network-on-chip atomic operation architecture and method, which can realize power consumption optimization, significantly reduce chip power consumption and improve resource utilization efficiency on the premise of ensuring atomic operation safety and response speed.
[0007] The technical solution adopted by the present application to solve its technical problems is:
[0008] A power consumption optimized network-on-chip atomic operation architecture, comprising:
[0009] A cooperative scheduling module is responsible for analyzing atomic operation requests, state monitoring, and cross-module instruction scheduling.
[0010] A resource wake-up control module is configured to realize on-demand activation and dormancy of the NoC components according to the scheduling instructions, so as to avoid static power consumption waste caused by full-time activation.
[0011] An AI bandwidth prediction module is configured to dynamically predict atomic operation bandwidth demand based on historical data, so as to realize dynamic allocation of bandwidth and avoid waste caused by static reservation.
[0012] An operation merging module is configured to merge the same atomic operations in the same critical section, so as to reduce repeated transmission and processing overhead.
[0013] An on-chip network node is configured to identify operations that need atomicity protection according to upper-layer service requirements, trigger atomic operation requests, encapsulate key information of the atomic operations into atomic operation request packets according to a NoC communication protocol, and send the generated request packets to a source node router through a network interface between the node and the router, and then forward the request packets to a target router.
[0014] The architecture realizes power consumption optimization from three dimensions of resource activation, bandwidth allocation, and operation processing through the cooperative strategy of “on-demand resource wake-up + dynamic bandwidth allocation + same operation merging”, significantly reduces chip power consumption, and improves resource utilization efficiency on the premise of guaranteeing atomic operation safety and response speed.
[0015] Further, the cooperative scheduling module specifically includes:
[0016] A request analysis unit is configured to analyze information in the atomic operation request packet, including target resource ID, operation type, task priority and the like, so as to clearly define operation targets and requirements, and provide a basis for subsequent cooperative scheduling of the modules.
[0017] A state monitoring unit is configured to collect node information in real time, including atomic operation request frequency, operation type, bandwidth occupancy and the like, encapsulate the information into an atomic operation state packet, and feed back the packet to the AI bandwidth prediction module, so as to update historical data of an LSTM prediction model and improve prediction accuracy.
[0018] A scheduling instruction generation and distribution unit is configured to generate targeted scheduling instructions based on the analysis result of the atomic operation request packet and the state monitoring data, and direct the instructions to corresponding modules, so as to guarantee efficient linkage of the modules.
[0019] Further, the resource wake-up control module specifically includes:
[0020] The wake-up signal generation unit receives the wake-up instruction of the cooperative scheduling module, determines a routing path based on a shortest path routing algorithm according to the target resource and the topology position of the node where the target resource is located parsed by the cooperative scheduling module, generates a directional wake-up signal, and the components that are not woken up remain in a low-power sleep mode.
[0021] The sleep recovery unit receives the sleep instruction of the cooperative scheduling module after the atomic operation is executed, sends a sleep signal to the woken-up components after a delay set time, and makes the components return to a low-power state; if a new atomic operation request of the same target resource is detected within the set time, the wake-up state is extended to avoid the additional overhead generated by frequent wake-up / sleep.
[0022] Further, the wake-up signal generation unit generates a directional wake-up signal according to the target resource and the topology position of the node where the target resource is located parsed by the cooperative scheduling module, and only wakes up the router of each node on the routing path, the atomic operation processing module of the target resource, and the lock management module.
[0023] The sleep recovery unit reserves a possible subsequent similar operation time after a delay set time.
[0024] Further, the AI bandwidth prediction module specifically includes:
[0025] The LSTM prediction unit receives and parses the atomic operation state package sent by the cooperative scheduling module, takes historical data in a past set time as input, the historical data including atomic operation request frequency, operation type, bandwidth occupancy rate and the like, adopts a long short-term memory neural network (LSTM) method, and predicts the number of atomic operation requests and bandwidth demand in a future set time;
[0026] The bandwidth allocation unit dynamically adjusts the NoC bandwidth allocation strategy according to the prediction result, increases the atomic operation bandwidth occupancy ratio when the predicted atomic operation request frequency is high, reduces the atomic operation bandwidth occupancy ratio when the predicted atomic operation request frequency is low, releases the bandwidth to other services such as data transmission, and at the same time, reserves a certain emergency bandwidth to cope with sudden high-concurrency atomic operation requests.
[0027] Further, the LSTM prediction unit takes historical data in the past 1 ms as input, and predicts the number of atomic operation requests and bandwidth demand in a future 200 ns set time.
[0028] Further, the operation merging module specifically includes:
[0029] Operation identification unit: real-time monitoring of the router passed atomic operation request packet, extracting target critical section address, operation type (such as Fetch-and-Add, Compare-and-Swap, etc.) and other information, when detecting the same critical section, the same type of atomic operation request (time window is set to 10ns, avoid long delay merging), mark it as a pending operation to be merged;
[0030] Merging execution unit: parameter integration (such as multiple "Fetch-and-Add1" operations are merged into "Fetch-and-Add N", N is the total number of operations) for the marked pending operation to be merged, generate batch atomic operation request packet instead of the original multiple independent request packet for transmission and execution; after execution, the execution result is split into N result packets, and according to the original operation of the initiator node, the corresponding result is returned to each source node.
[0031] The application also claims a power consumption optimized on-chip network atomic operation method, which is based on the above-mentioned on-chip network atomic operation architecture, and the execution process of the method is as follows:
[0032] (1) Atomic operation request packet generation and analysis:
[0033] The source node generates an atomic operation request packet (including target resource ID, operation type, task priority, etc.) according to the business requirements, and sends the generated request packet to the source node router through the network interface; the cooperative scheduling module in the router receives the request packet, and the request analysis unit of the module analyzes the information in the packet, and generates a wake-up instruction to send to the resource wake-up control module after the analysis is completed;
[0034] (2) Wake up resources on demand:
[0035] The resource wake-up control module receives the wake-up instruction, and the wake-up signal generation unit thereof determines the routing path based on the shortest path routing algorithm according to the NoC topology coordinates of the target resource, generates directional wake-up signals to the routers of each node (such as routers R1 and R2 from source node A to target node B) on the routing path, the atomic operation processing module and the lock management module of the target resource, only activate the above components, and other irrelevant components remain dormant;
[0036] (3) Dynamic bandwidth allocation:
[0037] The LSTM prediction unit of the AI bandwidth prediction module takes historical data including atomic operation request frequency, operation type, bandwidth occupancy rate, etc. collected by the state monitoring unit of the collaborative scheduling module in a set time in the past as input to predict the number of atomic operation requests and bandwidth demand in a set time in the future; the bandwidth allocation unit dynamically adjusts bandwidth allocation according to the prediction result: if the atomic operation request frequency is predicted to be high, the atomic operation bandwidth occupancy ratio is increased; if the atomic operation request frequency is predicted to be low, the atomic operation bandwidth occupancy ratio is decreased; at the same time, a certain emergency bandwidth is reserved to cope with sudden high-concurrency atomic operation requests;
[0038] (4) Same operation merging:
[0039] The operation recognition unit of the operation merging module monitors atomic operation request packets passing through the router in real time, and when multiple atomic operation request packets of the same critical section and operation type are detected within a set time window, the operation merging unit merges multiple operations into a batch atomic operation request packet to replace the original multiple independent packets and records the original initiating node ID, and transmits the batch atomic operation request packet to the target node through the allocated atomic operation bandwidth;
[0040] (5) Atomic operation execution and result feedback:
[0041] After the atomic operation processing module of the target resource receives the batch request packet, it initiates a lock application to the lock management module: if the lock is in an occupied state, the operation request is cached to the local FIFO and waits for the lock to be released for retry; if the lock is in an idle state, the lock management module marks the lock as occupied and returns a lock success signal to the atomic operation processing module; after receiving the lock success signal, the atomic operation processing module executes the corresponding atomic operation process according to the atomic operation type, and splits the execution result into multiple result packets and routes them back to the source nodes according to the recorded original initiating node ID; after receiving the result packet, the source node sends an operation completion confirmation signal to the collaborative scheduling module;
[0042] (6) Resource dormancy and parameter update:
[0043] After receiving the operation completion confirmation signal, the collaborative scheduling module sends a dormancy instruction to the resource wake-up control module; during the countdown of the dormancy delay timer (50 ns) of the resource wake-up control module, if no new request for the same target resource is detected, the resource wake-up control module sends a dormancy signal to the routers of each node on the awakened routing path, the atomic operation processing module and the lock management module of the target resource, and each component returns to a low-power state; at the same time, the state monitoring unit of the collaborative scheduling module encapsulates the data of this operation (such as atomic operation type, bandwidth occupancy rate, etc.) into an atomic operation state packet and sends it to the AI bandwidth prediction module to update the historical data of the LSTM prediction model and improve the prediction accuracy of the subsequent prediction; the operation merging module clears the to-be-merged operation records in the current time window and waits for the next batch of request packets.
[0044] The application also claims a chip provided with the on-chip network architecture.
[0045] The application also claims an electronic device comprising the on-chip network.
[0046] Compared with the prior art, the power consumption optimized on-chip network atomic operation architecture and method has the following beneficial effects:
[0047] The power consumption optimization fundamentally solves the problems of high resource full-time activation power consumption, static reserved bandwidth waste and similar operation repeated transmission energy consumption in the traditional atomic operation scheme. Through the on-demand resource wake-up mechanism, static power consumption generated by irrelevant components being fully active is avoided, and chip power consumption is reduced. Through the LSTM bandwidth prediction and dynamic allocation strategy, the idle waste of static reserved bandwidth is eliminated, and resource utilization is improved. Through the similar operation merging scheme, the transmission of repeated request packets of NoC links is reduced, the module dynamic power consumption is reduced, while the safety, consistency and response speed of atomic operations are guaranteed, and the chip concurrency performance is improved. BRIEF DESCRIPTION OF DRAWINGS
[0048] Figure 1 is the power consumption optimized on-chip network atomic operation architecture diagram provided by an embodiment of the application;
[0049] Figure 2 is the power consumption optimized on-chip network atomic operation flow diagram provided by an embodiment of the application. DETAILED DESCRIPTION
[0050] The application will be further described below in combination with specific embodiments.
[0051] The application embodiment provides a power consumption optimized on-chip network atomic operation architecture, as Figure 1 The power consumption optimized on-chip network atomic operation overall architecture is shown, which is composed of a cooperative scheduling module, a resource wake-up control module, an AI bandwidth prediction module, an operation merging module and an on-chip network node.
[0052] 1. Cooperative scheduling module:
[0053] The cooperative scheduling module is the core decision hub of the architecture and the key to the linkage and coordination of various modules, and is mainly responsible for parsing atomic operation request, state monitoring and cross-module instruction scheduling. It includes the following three parts:
[0054] (1) Request analysis unit: analyze the target resource ID, operation type, task priority and other information in the atomic operation request packet to determine the operation target and demand, and provide a basis for subsequent cooperative scheduling of various modules.
[0055] (2) State monitoring unit: Real-time collection of atomic operation request frequency, operation type, bandwidth occupancy rate and other information of each node, encapsulation as "atomic operation state package", feedback to AI bandwidth prediction module, for updating historical data of LSTM prediction model, improving prediction accuracy.
[0056] (3) Dispatching instruction generation and distribution unit: Based on atomic operation request package analysis result and state monitoring data, generate targeted dispatching instructions and direct them to the corresponding modules to ensure efficient linkage of each module.
[0057] 2、Resource wake-up control module:
[0058] The resource wake-up control module is responsible for implementing on-demand activation and dormancy of NoC components according to the dispatching instructions, avoiding static power waste caused by full-time activity. It includes the following two parts:
[0059] (1) Wake-up signal generation unit: Receive the "wake-up" instruction from the collaborative scheduling module, determine the routing path based on the shortest path routing algorithm according to the target resources and their topological positions in the node parsed by the collaborative scheduling module, generate directional wake-up signals (only wake up the routers of each node on the routing path, atomic operation processing modules and lock management modules of target resources), and the components that are not awakened remain in low-power sleep mode.
[0060] (2) Dormancy recovery unit: After the atomic operation is executed, receive the "dormancy" instruction from the collaborative scheduling module, delay 50ns (reserve possible subsequent similar operation time) and send the dormancy signal to the awakened components to restore them to low-power state; if a new atomic operation request for the same target resource is detected within 50ns, extend the wake-up state to avoid additional overhead caused by frequent wake-up / sleep.
[0061] 3、AI bandwidth prediction module:
[0062] The AI bandwidth prediction module can dynamically predict atomic operation bandwidth demand based on historical data, realize dynamic allocation of bandwidth, and avoid waste caused by static reservation. It includes the following two parts:
[0063] (1) LSTM prediction unit: Receive and analyze the "atomic operation state package" sent by the collaborative scheduling module, use the historical data of atomic operation request frequency, operation type, bandwidth occupancy rate within the past 1ms as input, and use the long short-term memory neural network (LSTM) method to predict the number of atomic operation requests and bandwidth demand within the next 200ns.
[0064] (2) Bandwidth allocation unit: dynamically adjust the NoC bandwidth allocation strategy according to the prediction result, when the predicted atomic operation request frequency is high, increase the atomic operation bandwidth proportion; when the predicted atomic operation request frequency is low, reduce the atomic operation bandwidth proportion, and release the bandwidth to data transmission and other services. At the same time, a certain emergency bandwidth is reserved to deal with sudden high-concurrency atomic operation requests.
[0065] 4. Operation merging module:
[0066] The operation merging module is used to merge the same atomic operations in the same critical section, and reduce the repeated transmission and processing overhead. It includes the following two parts:
[0067] (1) Operation identification unit: real-time monitoring of atomic operation request packets passing through the router, extracting target critical section address, operation type (such as Fetch-and-Add, Compare-and-Swap, etc.) and other information, when detecting the same critical section, the same type of atomic operation request (the time window is set to 10ns to avoid too long merging delay), mark it as "to-be-merged operation".
[0068] (2) Merging execution unit: parameter integration (such as merging multiple "Fetch-and-Add1" operations into "Fetch-and-Add N", N is the total number of operations) for the marked "to-be-merged operation", generate a "batch atomic operation request packet" to replace the original multiple independent request packets for transmission and execution. After execution, the execution result is split into N result packets, and the corresponding results are returned to each source node according to the original operation initiation node.
[0069] 5. Network on chip node:
[0070] The network on chip node can identify the operations that need atomicity protection according to the upper layer service demand, trigger atomic operation request, encapsulate the key information of atomic operation as "atomic operation request packet" according to the NoC communication protocol, send the generated request packet to the source node router through the network interface between the node and the router, and route and forward to the target router.
[0071] The embodiment of the application also provides a power consumption optimized network on chip atomic operation method, which is realized based on the power consumption optimized network on chip atomic operation architecture described in the above embodiment, and the execution process of the method is as follows:
[0072] (I) Atomic operation request packet generation and analysis:
[0073] The source node generates an atomic operation request packet (containing target resource ID, operation type, task priority, etc.) according to the service requirement, and sends the generated request packet to the source node router through the network interface. After the cooperative scheduling module in the router receives the request packet, the "request analysis unit" analyzes the information in the packet, and generates a "wake-up" instruction after the analysis is completed and sends it to the resource wake-up control module.
[0074] (II) Wake-up resources on demand:
[0075] The resource wake-up control module receives the "wake-up" instruction, and its "wake-up signal generation unit" determines the routing path based on the shortest path routing algorithm according to the NoC topology coordinates of the target resource, generates directional wake-up signals to the routers of each node on the routing path (such as routers R1 and R2 from source node A to target node B), the atomic operation processing module and the lock management module of the target resource, and only activates the above components, and other irrelevant components remain dormant.
[0076] (III) Dynamic bandwidth allocation:
[0077] The "LSTM prediction unit" of the AI bandwidth prediction module takes the historical data of atomic operation request frequency, operation type, and bandwidth occupancy rate collected by the "state monitoring unit" of the cooperative scheduling module in the past 1 ms as input, and predicts the number of atomic operation requests and bandwidth demand in the future 200 ns. The "bandwidth allocation unit" dynamically adjusts the bandwidth allocation according to the prediction results: if the predicted atomic operation request frequency is high, increase the atomic operation bandwidth occupancy ratio; if the predicted atomic operation request frequency is low, reduce the atomic operation bandwidth occupancy ratio. At the same time, a certain amount of emergency bandwidth is reserved to cope with sudden high-concurrency atomic operation requests.
[0078] (IV) Similar operation merging:
[0079] The "operation identification unit" of the operation merging module monitors the atomic operation request packets passing through the router in real time. Within a 10 ns time window, when multiple atomic operation request packets of the same critical section and operation type are detected, the "merge execution unit" merges multiple operations into a "batch atomic operation request packet" to replace the original multiple independent packets and records the original initiating node ID, and transmits it to the target node through the allocated atomic operation bandwidth.
[0080] (V) Atomic operation execution and result feedback:
[0081] After receiving the "batch request packet," the atomic operation processing module for the target resource initiates a lock request to the lock management module. If the lock is already occupied, the operation request is cached in a local FIFO and retried after the lock is released. If the lock is idle, the lock management module marks the lock as "occupied" and returns a "lock successful" signal to the atomic operation processing module. Upon receiving the "lock successful" signal, the atomic operation processing module executes the corresponding atomic operation process according to the atomic operation type. After completion, it splits the execution result into multiple result packets and routes the corresponding result packets back to each source node according to the recorded original initiating node ID. After receiving the result packets, the source nodes send an "operation completion confirmation" signal to the collaborative scheduling module.
[0082] (vi) Resource hibernation and parameter updates:
[0083] After receiving the "operation completion confirmation" signal, the collaborative scheduling module sends a "sleep" command to the resource wake-up control module. If no new request for the same target resource is detected within the 50ns countdown of the resource wake-up control module's sleep delay timer, it sends sleep signals to the routers on the already woken-up routing path, the atomic operation processing module of the target resource, and the lock management module. All components then return to a low-power state. Simultaneously, the collaborative scheduling module's status monitoring unit encapsulates the data of this operation (such as atomic operation type, bandwidth utilization, etc.) into an "atomic operation status packet" and sends it to the AI bandwidth prediction module to update the historical data of the LSTM prediction model and improve subsequent prediction accuracy. The operation merging module clears the records of operations to be merged within the current time window and waits for the next batch of request packets.
[0084] This method can be applied to the on-chip network (NoC) interconnect architecture of products such as multi-core heterogeneous chips, high-performance computing chips, and AI acceleration chips. As a core atomic operation support module, it ensures the secure scheduling and power consumption optimization of competitive resources such as computing unit ports, on-chip storage blocks, and cross-core links within the chip.
[0085] This technology can enhance the company's core technological strength in the NoC (No Core) technology field and strengthen its competitiveness in the multi-core heterogeneous chip market. Simultaneously, it lays the foundation for future technological innovation and patent layout in the NoC field, helping the company seize the commanding heights of multi-core chip interconnect technology and ensure its long-term competitive advantage.
[0086] This invention also provides a chip having the power-optimized on-chip network atomic operation architecture described in the above embodiments.
[0087] The present invention also claims an electronic device comprising the power-optimized on-chip network described in the above embodiments.
[0088] Through the specific embodiments described above, those skilled in the art can easily implement the present invention. However, it should be understood that the present invention is not limited to the specific embodiments described above. Based on the disclosed embodiments, those skilled in the art can arbitrarily combine different technical features to achieve different technical solutions.
[0089] Except for the technical features described in the specification, all other technologies are known to those skilled in the art.
Claims
1. A power-optimized on-chip network atomic operation architecture, characterized in that, include: The collaborative scheduling module is responsible for parsing atomic operation requests, status monitoring, and cross-module instruction scheduling. The resource wake-up control module is used to activate and hibernate NoC components on demand according to scheduling instructions; The AI bandwidth prediction module is used to dynamically predict the bandwidth requirements of atomic operations based on historical data, thereby enabling dynamic bandwidth allocation. The operation merging module is used to merge similar atomic operations within the same critical region. The on-chip network node is used to identify operations that require atomicity protection based on the upper-layer business requirements, trigger atomic operation requests, encapsulate the key information of the atomic operation into an atomic operation request packet according to the NoC communication protocol, and send the generated request packet to the source node router through the network interface between the node and the router, and then forward it to the target router.
2. The power-optimized on-chip network atomic operation architecture according to claim 1, characterized in that, The collaborative scheduling module specifically includes: Request parsing unit: Parses the information in the atomic operation request packet, including the target resource ID, operation type, and task priority information, to clarify the operation goal and requirements, and to provide a basis for subsequent coordinated scheduling of various modules; Status monitoring unit: Collects information from each node in real time, including atomic operation request frequency, operation type, and bandwidth utilization information, encapsulates it into atomic operation status packets, and feeds them back to the AI bandwidth prediction module to update the historical data of the LSTM prediction model; Scheduling instruction generation and distribution unit: Based on the parsing results of atomic operation request packets and status monitoring data, it generates targeted scheduling instructions and distributes them to the corresponding modules.
3. The power-optimized on-chip network atomic operation architecture according to claim 1, characterized in that, The resource wake-up control module specifically includes: Wake-up signal generation unit: Receives the wake-up command from the cooperative scheduling module, determines the routing path based on the shortest path routing algorithm according to the target resource and the topological location of the node parsed by the cooperative scheduling module, generates a directional wake-up signal, and keeps unwakeable components in low-power sleep mode. Sleep Recovery Unit: After the atomic operation is completed, it receives the sleep instruction from the cooperative scheduling module, delays for a set time, and sends a sleep signal to the awakened components to restore them to a low-power state. If a new atomic operation request for the same target resource is detected within the set time, the wake-up state is extended to avoid the additional overhead caused by frequent wake-up / sleep.
4. The power-optimized on-chip network atomic operation architecture according to claim 3, characterized in that, The wake-up signal generation unit generates a directional wake-up signal based on the target resource and its topological location parsed by the cooperative scheduling module, which wakes up only the routers, atomic operation processing modules and lock management modules of each node on the routing path; The sleep recovery unit has a set delay time to allow time for possible subsequent similar operations.
5. The power-optimized on-chip network atomic operation architecture according to claim 1, characterized in that, The AI bandwidth prediction module specifically includes: LSTM prediction unit: Receives and parses atomic operation status packets sent by the cooperative scheduling module. It takes historical data within a set time period as input, including atomic operation request frequency, operation type, and bandwidth utilization data. It uses a long short-term memory neural network method to predict the number of atomic operation requests and bandwidth requirements within a set time period in the future. Bandwidth Allocation Unit: Dynamically adjusts the NoC bandwidth allocation strategy based on prediction results. When the predicted frequency of atomic operation requests is high, the proportion of atomic operation bandwidth is increased; when the predicted frequency of atomic operation requests is low, the proportion of atomic operation bandwidth is reduced, and the released bandwidth is allocated to other services. At the same time, emergency bandwidth is reserved to cope with sudden high-concurrency atomic operation requests.
6. The power-optimized on-chip network atomic operation architecture according to claim 5, characterized in that, The LSTM prediction unit uses historical data from the past 1ms as input to predict the number of atomic operation requests and bandwidth requirements within a set time period of 200ns in the future.
7. The power-optimized on-chip network atomic operation architecture according to claim 1, characterized in that, The operation merging module specifically includes: Operation identification unit: Real-time monitoring of atomic operation request packets passing through the router, extracting target critical section address and operation type information, and marking atomic operation requests of the same critical section and type as operations to be merged when they are detected; Merging Execution Unit: Integrates parameters of marked operations to be merged, generates batch atomic operation request packets to replace the original multiple independent request packets for transmission and execution; after execution, the execution result is split into N result packets, and the corresponding result is sent back to each source node according to the original operation initiating node.
8. A power-optimized on-chip network atomic operation method, characterized in that, This method is implemented based on the on-chip network atomic operation architecture described in any one of claims 1 to 7, and the execution process of this method is as follows: (1) Generation and parsing of atomic operation request packets: The source node generates an atomic operation request packet based on business requirements and sends the generated request packet to the source node router through the network interface. After receiving the request packet, the collaborative scheduling module in the router parses the information in the packet with its request parsing unit. After parsing, it generates a wake-up command and sends it to the resource wake-up control module. (2) On-demand resource activation: When the resource wake-up control module receives the wake-up command, its wake-up signal generation unit determines the routing path based on the NoC topology coordinates of the target resource and the shortest path routing algorithm. It then generates directional wake-up signals to the routers, atomic operation processing modules, and lock management modules of each node on the routing path, activating only the aforementioned components while keeping other unrelated components dormant. (3) Dynamic bandwidth allocation: The LSTM prediction unit of the AI bandwidth prediction module uses historical data collected by the status monitoring unit of the collaborative scheduling module over a past set time period, including atomic operation request frequency, operation type, and bandwidth utilization, as input to predict the number of atomic operation requests and bandwidth requirements within a future set time period. The bandwidth allocation unit dynamically adjusts the bandwidth allocation based on the prediction results: if the predicted atomic operation request frequency is high, the proportion of atomic operation bandwidth is increased; if the predicted atomic operation request frequency is low, the proportion of atomic operation bandwidth is decreased; at the same time, emergency bandwidth is reserved to cope with sudden high-concurrency atomic operation requests. (4) Merging similar operations: The operation identification unit of the operation merging module monitors the atomic operation request packets passing through the router in real time. When multiple atomic operation request packets with the same critical section and operation type are detected within a set time window, the merging execution unit merges the multiple operations into a batch atomic operation request packet to replace the original multiple independent packets and records the original initiating node ID. The packet is then transmitted to the target node through the allocated atomic operation bandwidth. (5) Atomic operation execution and result feedback: After receiving the batch request packet, the atomic operation processing module of the target resource initiates a lock request to the lock management module: if the lock is in an occupied state, the operation request is cached in the local FIFO and retried after the lock is released; if the lock is in an idle state, the lock management module marks the lock as occupied and returns a lock success signal to the atomic operation processing module. After receiving the lock success signal, the atomic operation processing module executes the corresponding atomic operation process according to the atomic operation type. After completion, it splits the execution result into multiple result packets and routes the corresponding result packets back to each source node according to the recorded original initiating node ID. After receiving the result packets, the source nodes send an operation completion confirmation signal to the collaborative scheduling module. (6) Resource hibernation and parameter updates: After receiving the operation completion confirmation signal, the collaborative scheduling module sends a sleep command to the resource wake-up control module. If no new request for the same target resource is detected within the countdown of the sleep delay timer of the resource wake-up control module, a sleep signal is sent to the routers of each node on the awakened routing path, the atomic operation processing module of the target resource, and the lock management module, and each component returns to a low-power state. At the same time, the status monitoring unit of the collaborative scheduling module encapsulates the data of this operation into an atomic operation status packet and sends it to the AI bandwidth prediction module to update the historical data of the LSTM prediction model and improve the subsequent prediction accuracy. The operation merging module clears the records of operations to be merged in the current time window and waits for the next batch of request packets.
9. A chip, characterized in that, The chip has an on-chip network architecture as described in any one of claims 1 to 7.
10. An electronic device, characterized in that, The electronic device includes a network-on-a-chip as claimed in any one of claims 1 to 7.