Method and apparatus for reconfigurable multi-stage system reliability analysis
By determining the initial node set and connectivity verification in a reconfigurable multi-stage system, and transforming it into a graph model path search, the path feasibility problem in RMS reliability analysis is solved, and efficient reliability calculation is achieved.
Patent Information
- Application Number
- CN202511583917.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-31
- Publication Date
- 2026-02-13
AI Technical Summary
Existing technologies are insufficient for effectively analyzing the reliability of reconfigurable multi-stage systems (RMS). Traditional methods face the state space explosion problem and fail to adequately consider the sequential disconnection constraints between stages when dealing with large-scale multi-stage systems.
By determining the initial set of the system graph model, including the set of connected nodes, the set of unverified connected nodes, and the set of nodes that are not directly connected, connectivity verification and path elimination are performed, transforming the problem into a path search problem of the graph model, and analyzing the reliability of the reconfigurable multi-stage system.
It effectively solves the path feasibility problem in RMS reliability analysis, avoids directly traversing all system states, and improves computational efficiency and accuracy.
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Figure CN121524733A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of reliability analysis, in particular to a method and device for reconfigurable multi-stage system reliability analysis. BACKGROUND
[0002] System reliability generally refers to the ability / probability of a system to complete a specified function within a specified time and under a specified working condition. System reliability analysis refers to the ability of a system to complete a specified function within a specified time and under a specified condition through a series of technical measures during system design, development and operation.
[0003] Modern critical mission systems often need to dynamically adjust the structure in multi-stage tasks to adapt to task requirements. Such systems are called RMS. The reliability analysis of RMS faces two major challenges: dynamicity and path coupling. Traditional reliability analysis methods can be divided into two categories: state enumeration method (such as fault tree, Markov chain) and graph optimization method (such as binary decision diagram, sequential decision diagram). The former is difficult to handle large-scale multi-stage systems due to the state space explosion problem. The latter calculates the connected reliability through the minimum path set or network flow model, but does not fully consider the sequential non-connected constraints between stages, and is not suitable for RMS.
[0004] At present, there is an urgent need for a method that can analyze the reliability of RMS. SUMMARY
[0005] In order to solve the technical problem that the prior art lacks a method capable of analyzing the reliability of RMS, the embodiments of the present application provide a method and device for reconfigurable multi-stage system reliability analysis. The technical solution is as follows:
[0006] On the one hand, a method for reconfigurable multi-stage system reliability analysis is provided, the method comprising: S1, determining an initial set of system graph models, the initial set being used to describe the state of the system graph model, the initial set comprising a first node set C, a second node set U and a third node set I, the nodes in the first node set C being connected nodes, the nodes in the second node set U being nodes directly connected to the connected nodes and not verified for connectivity, and the nodes in the third node set I being nodes not directly connected to the connected nodes; S2, selecting a first node from the second node set U and verifying the connectivity of the first node with the nodes in the first node set C, and adding the first node that cannot be connected to the fifth node set according to the connectivity verification result, and deleting the first node that cannot be connected from the second node set U and adding the remaining nodes in U to the fourth node set The first connected node is added to the first node set C, and the working path containing the first unconnected node is removed from the system. The second node set U is updated based on the current first node set C. S3. Execute S2 multiple times until the second node set U is empty, and mark the remaining working paths as valid working paths. S4. Based on the effective working path, analyze the reliability of the reconfigurable multi-stage system.
[0007] Optionally, the system diagram model is ,in It is a set of nodes. It is a set of edges.
[0008] Optionally, the step of adding the first node that cannot be connected to the fifth node set based on the connectivity verification result is performed. ,include: pass For the fifth node set An update is performed, where j=1 indicates that the first node selected from the second node set U is connected to a node in the first node set C. This indicates that the first n-1 nodes selected from the second node set U are not connected to any nodes in the first node set C, while the nth node is connected to any node in the first node set C. This represents the updated fifth node set. , This represents the fifth node set before the update. , Let C represent the set of the first nodes after the first node is added. Let C represent the first node set before the first node is added, h represent the number of elements in the first node set C, i represent the number of first graph models verified by h elements, and j represent the number of second graph models verified by i first graph models.
[0009] Optionally, removing the inaccessible first node from the second node set U includes: Through formula The goal is to remove the first, inaccessible node from the second node set U, where... To delete the second node set U after the first node that is not connected, Let U be the set of second nodes preceding the first node that cannot be connected, and I be the set of third nodes. This is the fourth node set.
[0010] Optionally, the method for reliability analysis of reconfigurable multi-stage systems provided in this embodiment of the invention further includes: For any shared component, if a node in any stage of the shared component is determined to be an unreachable first node, then all nodes in all subsequent stages of the shared component are determined to be unreachable first nodes, and the unreachable first node corresponding to the shared component is added to the fifth node set. .
[0011] Optionally, analyzing the reliability of the reconfigurable multi-stage system based on the effective working path includes: The reliability of the reconfigurable multi-stage system is calculated using the following formula: ,in, u The stage the system is in. Indicates the first u Number of effective work paths in a phase Indicates the first v The collection of components contained in the path. Indicates the first k Class components in the first u The inherent survival probability within the time span of the stage.
[0012] Optionally, the components in the system follow the same lifecycle distribution at each stage.
[0013] On the other hand, an apparatus for reliability analysis of reconfigurable multi-stage systems is also provided. This apparatus for supply chain warehousing and logistics decision-making is used to implement the method for reliability analysis of reconfigurable multi-stage systems provided in the embodiments of the present invention. The apparatus includes: The determination module is used to determine the initial set of the system graph model. The initial set is used to describe the state of the system graph model. The initial set includes a first node set C, a second node set U, and a third node set I. The nodes in the first node set C are connected nodes. The nodes in the second node set U are nodes that are directly connected to the connected nodes but whose connectivity has not been verified. The nodes in the third node set I are nodes that are not directly connected to the connected nodes. The verification module is used to select a first node from the second node set U and perform connectivity verification with nodes in the first node set C. Based on the connectivity verification result, the first node that cannot be connected is added to the fifth node set. The first node that cannot be connected is removed from the second node set U, and the remaining nodes in U are added to the fourth node set. The first connected node is added to the first node set C, and the working path containing the first unconnected node is removed from the system. The second node set U is updated based on the current first node set C. The marking module is used to execute the verification module multiple times until the second node set U is empty, and then mark the remaining working paths as valid working paths. The analysis module is used to analyze the reliability of the reconfigurable multi-stage system based on the effective working path.
[0014] On the other hand, an apparatus for reliability analysis of reconfigurable multi-stage systems is also provided, the apparatus comprising: processor; A memory storing computer-readable instructions, which, when executed by the processor, implement the method provided in the embodiments of the present invention.
[0015] On the other hand, a computer-readable storage medium is also provided, wherein program code is stored in the computer-readable storage medium, and the program code can be called by a processor to execute the method provided in the embodiments of the present invention.
[0016] The beneficial effects of the technical solutions provided in the embodiments of the present invention include at least the following: In this embodiment of the invention, an initial set of the system graph model is determined in step S1. This initial set describes the state of the system graph model and includes a first node set C, a second node set U, and a third node set I. Nodes in the first node set C are connected nodes. Nodes in the second node set U are nodes directly connected to the connected nodes but whose connectivity has not been verified. Nodes in the third node set I are nodes not directly connected to the connected nodes. Step S2 involves selecting a first node from the second node set U and verifying its connectivity with nodes in the first node set C. Based on the connectivity verification result, the first node that cannot be connected is added to a fifth node set. The first node that cannot be connected is removed from the second node set U, and the remaining nodes in U are added to the fourth node set. S2 involves adding the first connected node to the first node set C, removing working paths that contain the inaccessible first node, and updating the second node set U based on the current first node set C. S3 involves executing S2 multiple times until the second node set U is empty, marking the remaining working paths as valid working paths. Based on these valid working paths, the reliability of the reconfigurable multi-stage system is analyzed. This transforms the probabilistic enumeration problem in traditional reliability analysis into a path search problem in a graph model, avoiding direct traversal of all system states. This ensures path feasibility during reliability calculations. Attached Figure Description
[0017] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0018] Figure 1 This is a flowchart of a method for reliability analysis of a reconfigurable multi-stage system provided by an embodiment of the present invention; Figure 2 This is a schematic diagram of an RMS model structure provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of an implementation procedure for calculating a connected path provided by an embodiment of the present invention; Figure 4 This is a reliability curve provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of the structure of an apparatus for reliability analysis of a reconfigurable multi-stage system provided in an embodiment of the present invention; Figure 6 This is a schematic diagram of the structure of a device for reliability analysis of a reconfigurable multi-stage system provided in an embodiment of the present invention. Detailed Implementation
[0019] The technical solution of the present invention will now be described with reference to the accompanying drawings.
[0020] In embodiments of the present invention, words such as "exemplarily," "for example," etc., are used to indicate that something is an example, illustration, or description. Any embodiment or design described as "exemplary" in the present invention should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of the word "exemplary" is intended to present the concept in a concrete manner. Furthermore, in embodiments of the present invention, the meaning expressed by "and / or" can be both, or either one.
[0021] In the embodiments of this invention, the terms "image" and "picture" may sometimes be used interchangeably. It should be noted that, without emphasizing the distinction between them, they convey the same meaning. Similarly, the terms "of," "corresponding (relevant)," and "corresponding" may sometimes be used interchangeably. It should be noted that, without emphasizing the distinction between them, they convey the same meaning.
[0022] In this embodiment of the invention, sometimes a subscript such as W1 may be mistakenly written as a non-subscript form such as W1. When the difference is not emphasized, the meaning they express is the same.
[0023] To make the technical problems, technical solutions and advantages of the present invention clearer, a detailed description will be given below in conjunction with the accompanying drawings and specific embodiments.
[0024] To address the technical problem of existing technologies lacking a method for risk control that comprehensively considers inventory costs, transportation efficiency, and equipment failures in the supply chain, embodiments of the present invention provide a method and apparatus for supply chain warehousing and logistics decision-making. The technical solution is as follows:
[0025] To address the technical problem of the lack of methods for analyzing the reliability of RMS in existing technologies, embodiments of the present invention provide a method and apparatus for reliability analysis of reconfigurable multi-stage systems. The technical solution is as follows:
[0026] On the one hand, a method for reliability analysis of reconfigurable multi-stage systems is provided, such as... Figure 1 As shown, the method includes: S1. Determine the initial set of the system graph model. The initial set is used to describe the state of the system graph model. The initial set includes a first node set C, a second node set U, and a third node set I. The nodes in the first node set C are connected nodes. The nodes in the second node set U are nodes that are directly connected to the connected nodes but whose connectivity has not been verified. The nodes in the third node set I are nodes that are not directly connected to the connected nodes.
[0027] S2. Select a first node from the second node set U and perform connectivity verification with the nodes in the first node set C. Based on the connectivity verification result, add the first node that cannot be connected to the fifth node set. The first node that cannot be connected is removed from the second node set U, and the remaining nodes in U are added to the fourth node set. The system adds the first connected node to the first node set C, removes working paths in the system that contain the first unconnectable node, and updates the second node set U based on the current first node set C.
[0028] S3. Execute S2 multiple times until the second node set U is empty, and mark the remaining working paths as valid working paths.
[0029] S4. Based on the effective working path, analyze the reliability of the reconfigurable multi-stage system.
[0030] Optionally, the system diagram model is ,in It is a set of nodes. It is a set of edges, and the system state vector is defined as follows: , where the connected node x n=1, node x that is directly connected to the connected node but whose connectivity has not been verified. n =0, node x that is not directly connected to the connected node. n =2.
[0031] Optionally, the step of adding the first node that cannot be connected to the fifth node set based on the connectivity verification result is performed. ,include: pass For the fifth node set An update is performed, where j=1 indicates that the first node selected from the second node set U is connected to a node in the first node set C. This indicates that the first n-1 nodes selected from the second node set U are not connected to any nodes in the first node set C, while the nth node is connected to any node in the first node set C. This represents the updated fifth node set. , This represents the fifth node set before the update. , Let C represent the set of the first nodes after the first node is added. Let C represent the first node set before the first node is added, h represent the number of elements in the first node set C, i represent the number of first graph models verified by h elements, and j represent the number of second graph models verified by i first graph models.
[0032] in, h , i , j The sequence used to represent the graph, where h represents the number of elements in the first node set C. When the number of elements in C increases by 1, it is uncertain whether the newly added node is a node or not. Which node, so that the number of elements in a C is... h The graphical model can verify multiple h The first diagram model with +1, now using... i Distinguishing these first-graph models can help identify the added elements in C. Based on this, it's also possible for C to have a number of elements... h Multiple first-graph models already exist; at this point, using... j To distinguish the different second graph models verified by these multiple first graph models, j is also used to represent the added elements in C.
[0033] Optionally, removing the inaccessible first node from the second node set U includes: Through formula The goal is to remove the first, inaccessible node from the second node set U, where... To delete the second node set U after the first node that is not connected, Let U be the set of second nodes preceding the first node that cannot be connected, and I be the set of third nodes. This is the fourth node set.
[0034] Optionally, the method for reliability analysis of reconfigurable multi-stage systems provided in this embodiment of the invention further includes: For any shared component, if a node in any stage of the shared component is determined to be an unreachable first node, then all nodes in all subsequent stages of the shared component are determined to be unreachable first nodes, and the unreachable first node corresponding to the shared component is added to the fifth node set. .
[0035] Optionally, analyzing the reliability of the reconfigurable multi-stage system based on the effective working path includes: The reliability of the reconfigurable multi-stage system is calculated using the following formula: ,in, u The stage the system is in. Indicates the first u Number of effective work paths in a phase Indicates the first v The collection of components contained in the path. Indicates the first k Class components in the first u The inherent survival probability within the time span of the stage.
[0036] Optionally, the components in the system follow the same lifecycle distribution at each stage.
[0037] In some implementations, given a graph model ,make It is a set of nodes. It is a set of edges. The initial set includes a first node set C, a second node set U, and a third node set I. The nodes in the first node set C are connected nodes, the nodes in the second node set U are nodes directly connected to the connected nodes but whose connectivity has not been verified, and the nodes in the third node set I are nodes not directly connected to the connected nodes. V = C ∪ U ∪ I .
[0038] In some implementations, the choice is to use h To indicate the category of UPG, use q Represents the number of connected nodes, based on h = qClassify disconnected paths, where m and n identify different subsets of nodes or node indices. When h≠0, select sequentially. h = q-1 of U Add the first node in h = q First node set C Based on the connectivity verification results, the first node that cannot be connected is added to the fifth node set. The system removes the first node that cannot be connected from the second node set U, adds the first node that is connected to the first node set C, removes the working path in the system that contains the first node that cannot be connected, and updates the second node set U based on the current first node set C, that is, selects the node that is directly connected to the connected node and whose connection has not been verified based on the nodes in the current first node set C.
[0039] Disconnected node set Updated as follows: If j=1, it means the first node is connected, i.e., the first possible path from h=q-1 to h=q. U The first node selected is directly added to the connected node set. C Disconnected node set No new nodes are added, and h=q-1 Same; if j≠1, it means the first n-1 nodes are not connected to the new node. Joined .
[0040] In practical applications, it can be achieved through For the fifth node set An update is performed, where j=1 indicates that the first node selected from the second node set U is connected to a node in the first node set C. This indicates that the first n-1 nodes selected from the second node set U are not connected to any nodes in the first node set C, while the nth node is connected to any node in the first node set C. This represents the updated fifth node set. , This represents the fifth node set before the update. , Let C represent the set of the first nodes after the first node is added. Let C represent the first node set before the first node is added, h represent the number of elements in the first node set C, i represent the number of first graph models verified by h elements, and j represent the number of second graph models verified by i first graph models. For any shared component, if a node in any stage of the shared component is determined to be an unconnectable first node, then all nodes in all subsequent stages of the shared component are determined to be unconnectable first nodes, and the unconnectable first node corresponding to the shared component is added to the fifth node set. .
[0041] In some implementations, node set U According to the node set C Update using a backtracking method. For the node set... U The update is as follows: Among the nodes directly connected to the connected nodes, remove the non-connected nodes and nodes that cannot be connected to the current set. C Directly connected but not connected nodes.
[0042] In practical applications, it can be done through formulas The goal is to remove the first, inaccessible node from the second node set U, where... To delete the second node set U after the first node that is not connected, Let U be the set of second nodes preceding the first node that cannot be connected, and I be the set of third nodes. This is the fourth node set.
[0043] In some implementations, the reliability of the reconfigurable multi-stage system is calculated using the following formula: ,in, u The stage the system is in. Indicates the first u Number of effective work paths in a phase Indicates the first v The collection of components contained in the path. Indicates the first k Class components in the first u The inherent survival probability within the time span of the stage.
[0044] The following will combine Figure 2 The RMS shown further describes the embodiments of the present invention.
[0045] The components follow the same lifecycle distribution across all stages, and the component types and distribution are shown in Table 1. The durations of stages 1, 2, and 3 are 10 hours, 90 hours, and 100 hours, respectively.
[0046] Table 1
[0047] In practical applications, firstly, the ternary set C / U / I of the graphical model is determined. For example... Figure 3 As shown, when the number of connected nodes is 0, i.e., h=0, C 0,1,1 U is an empty set. 0,1,1 ={1}, I 0,1,1 ={2,…,9}.
[0048] Furthermore, select the first node from the second node U and add it to the first node set C. Then, based on the first node set C, determine the first node that cannot be connected. When h=2, if select... x 1 If U is added to the first node set C, then U 2,1,1 ={3,4}; if selected x 2 Adding C, then U 2,1,2 ={2,4}.
[0049] Further update the fifth node set. When h=1, the only node in U will be... x 1 Add to the first node set C, for When h=2, ,Will x 1 Add the first node set C and x 2 Add the first node set C corresponding to , They are respectively 、{2}.
[0050] Furthermore, when the fifth node set When a new node is added, it indicates that the node is no longer connectable. If the component corresponding to the node is a shared component, then that component cannot be connected in subsequent stages. Scenarios where shared components are not feasible should be excluded, and the nodes of these shared components in subsequent stages should also be added to the fifth node set. Update the connectivity path. For example, when h=3, New nodes added x 3 Then, the same as using shared component B x 4 If the path fails, it becomes infeasible and should be excluded from further discussion.
[0051] U is updated using backtracking, such as when h=1. for , When h=3, U 3,1,2={3,5,6} , Repeat the loop until U is an empty set, thus obtaining all valid working paths.
[0052] Furthermore, the reliability curve is calculated using the effective working path, as shown below. Figure 4 As shown.
[0053] On the other hand, such as Figure 5 As shown, the present invention also provides an apparatus for reliability analysis of reconfigurable multi-stage systems. The apparatus is used to implement the method for reliability analysis of reconfigurable multi-stage systems provided in the embodiments of the present invention. The apparatus includes: The determination module 501 is used to determine the initial set of the system graph model. The initial set is used to describe the state of the system graph model. The initial set includes a first node set C, a second node set U, and a third node set I. The nodes in the first node set C are connected nodes. The nodes in the second node set U are nodes that are directly connected to the connected nodes but whose connectivity has not been verified. The nodes in the third node set I are nodes that are not directly connected to the connected nodes. Verification module 502 is used to select a first node from the second node set U and perform connectivity verification with nodes in the first node set C, and add the first node that cannot be connected to the fifth node set according to the connectivity verification result. The system removes the first node that cannot be connected from the second node set U, adds the first node that is connected to the first node set C, and eliminates the working path in the system that contains the first node that cannot be connected. The marking module 503 is used to execute the verification module multiple times until the second node set U is an empty set, and then mark the remaining working paths as valid working paths. Analysis module 504 is used to analyze the reliability of the reconfigurable multi-stage system based on the effective working path.
[0054] On the other hand, an apparatus for reliability analysis of reconfigurable multi-stage systems is also provided, the apparatus comprising: processor; A memory storing computer-readable instructions, which, when executed by the processor, implement the method provided in the embodiments of the present invention.
[0055] On the other hand, a computer-readable storage medium is also provided, wherein program code is stored in the computer-readable storage medium, and the program code can be called by a processor to execute the method provided in the embodiments of the present invention.
[0056] The beneficial effects of the technical solutions provided in the embodiments of the present invention include at least the following: This invention transforms the probabilistic enumeration problem in traditional reliability analysis into a path search problem using a graph model, avoiding direct traversal of all system states. This ensures path feasibility during reliability calculations.
[0057] Figure 6 This is a schematic diagram of the structure of a device for reliability analysis of a reconfigurable multi-stage system provided in an embodiment of the present invention, as shown below. Figure 6 As shown, optionally, the device 610 for reliability analysis of a reconfigurable multi-stage system may include a first processor 2001.
[0058] Optionally, the device 610 for reliability analysis of reconfigurable multi-stage systems may also include a memory 2002 and a transceiver 2003.
[0059] The first processor 2001, memory 2002, and transceiver 2003 can be connected via a communication bus.
[0060] The following is combined Figure 6 The various components of the device 610 used for reliability analysis of reconfigurable multi-stage systems are described in detail below: The first processor 2001 is the control center of the device 610 used for reliability analysis of the reconfigurable multi-stage system. It can be a single processor or a collective term for multiple processing elements. For example, the first processor 2001 can be one or more central processing units (CPUs), application-specific integrated circuits (ASICs), or one or more integrated circuits configured to implement embodiments of the present invention, such as one or more digital signal processors (DSPs), or one or more field-programmable gate arrays (FPGAs).
[0061] Optionally, the first processor 2001 can perform various functions of the device 610 for reconfigurable multi-stage system reliability analysis by running or executing software programs stored in the memory 2002 and calling data stored in the memory 2002.
[0062] In a specific implementation, as one example, the first processor 2001 may include one or more CPUs, for example... Figure 6 CPU0 and CPU1 are shown in the diagram.
[0063] In a specific implementation, as one example, the device 610 for reliability analysis of reconfigurable multi-stage systems may also include multiple processors, for example... Figure 6 The first processor 2001 and the second processor 2004 are shown in the diagram. Each of these processors can be a single-core processor or a multi-core processor. Here, a processor can refer to one or more devices, circuits, and / or processing cores used to process data (such as computer program instructions).
[0064] The memory 2002 is used to store the software program that executes the present invention, and is controlled by the first processor 2001 to execute it. The specific implementation method can be referred to the above method embodiment, and will not be repeated here.
[0065] Optionally, the memory 2002 may be a read-only memory (ROM) or other type of static storage device capable of storing static information and instructions, random access memory (RAM) or other type of dynamic storage device capable of storing information and instructions, or electrically erasable programmable read-only memory (EEPROM), compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital universal optical discs, Blu-ray discs, etc.), magnetic disk storage media or other magnetic storage devices, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer, but not limited thereto. The memory 2002 may be integrated with the first processor 2001 or may exist independently, and may be accessed via the interface circuit of the device 610 for reconfigurable multi-stage system reliability analysis. Figure 6 (Not shown in the image) is coupled to the first processor 2001, and this embodiment of the invention does not specifically limit this.
[0066] The transceiver 2003 is used to communicate with network devices or with terminal devices.
[0067] Alternatively, transceiver 2003 may include a receiver and a transmitter. Figure 6 (Not shown separately). The receiver is used to implement the receiving function, and the transmitter is used to implement the transmitting function.
[0068] Alternatively, the transceiver 2003 can be integrated with the first processor 2001 or exist independently, and can be connected via the interface circuit of the device 610 for reliability analysis of reconfigurable multi-stage systems. Figure 6 (Not shown in the image) is coupled to the first processor 2001, and this embodiment of the invention does not specifically limit this.
[0069] It should be noted that, The structure of the device 610 for reconfigurable multi-stage system reliability analysis shown in the figure does not constitute a limitation on the router. Actual devices for reconfigurable multi-stage system reliability analysis may include more or fewer components than shown, or combine certain components, or have different component arrangements.
[0070] Furthermore, the technical effects of the device 610 used for reliability analysis of reconfigurable multi-stage systems can be referenced from the technical effects of the supply chain warehousing and logistics decision-making method described in the above method embodiments, and will not be repeated here.
[0071] It should be understood that the first processor 2001 in the embodiments of the present invention may be a central processing unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc.
[0072] It should also be understood that the memory in the embodiments of the present invention can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of random access memory (RAM) are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate synchronous DRAM (DDR SDRAM), enhanced synchronous DRAM (ESDRAM), synchronous linked DRAM (SLDRAM), and direct rambus RAM (DR RAM).
[0073] The above embodiments can be implemented, in whole or in part, by software, hardware (such as circuits), firmware, or any other combination thereof. When implemented using software, the above embodiments can be implemented, in whole or in part, as a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, all or part of the processes or functions described in the embodiments of the present invention are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, motor drive, or data center to another website, computer, motor drive, or data center via infrared, microwave, or other means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a motor drive or data center that includes one or more sets of available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium. A semiconductor medium can be a solid-state drive.
[0074] It should be understood that the term "and / or" in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. A and B can be singular or plural. Additionally, the character " / " in this article generally indicates an "or" relationship between the preceding and following related objects, but it can also represent an "and / or" relationship. Please refer to the context for a more accurate understanding.
[0075] In this invention, "at least one" means one or more, and "more than one" means two or more. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of a single item or a plurality of items. For example, at least one of a, b, or c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be a single item or multiple items.
[0076] It should be understood that, in various embodiments of the present invention, the order of the above-mentioned process numbers does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.
[0077] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.
[0078] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the devices, apparatuses, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.
[0079] In the several embodiments provided by this invention, it should be understood that the disclosed devices, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.
[0080] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.
[0081] In addition, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.
[0082] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, a motor driver, or a network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.
[0083] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.
Claims
1. A method for reliability analysis of reconfigurable multi-stage systems, characterized in that, The method includes: S1. Determine the initial set of the system graph model. The initial set is used to describe the state of the system graph model. The initial set includes a first node set C, a second node set U, and a third node set I. The nodes in the first node set C are connected nodes. The nodes in the second node set U are nodes that are directly connected to the connected nodes but whose connectivity has not been verified. The nodes in the third node set I are nodes that are not directly connected to the connected nodes. S2. Select a first node from the second node set U and perform connectivity verification with the nodes in the first node set C. Based on the connectivity verification result, add the first node that cannot be connected to the fifth node set. The first node that cannot be connected is removed from the second node set U, and the remaining nodes in U are added to the fourth node set. The first connected node is added to the first node set C, and the working path containing the first unconnected node is removed from the system. The second node set U is updated based on the current first node set C. S3. Execute S2 multiple times until the second node set U is empty, and mark the remaining working paths as valid working paths. S4. Based on the effective working path, analyze the reliability of the reconfigurable multi-stage system.
2. The method according to claim 1, characterized in that, The system diagram model is as follows: ,in It is a set of nodes. It is a set of edges.
3. The method according to claim 1, characterized in that, The first node that cannot be connected is added to the fifth node set based on the connectivity verification result. ,include: pass For the fifth node set An update is performed, where j=1 indicates that the first node selected from the second node set U is connected to a node in the first node set C. This indicates that the first n-1 nodes selected from the second node set U are not connected to any nodes in the first node set C, while the nth node is connected to any node in the first node set C. This represents the updated fifth node set. , This represents the fifth node set before the update. , Let C represent the set of the first nodes after the first node is added. Let C represent the first node set before the first node is added, h represent the number of elements in the first node set C, i represent the number of first graph models verified by h elements, and j represent the number of second graph models verified by i first graph models.
4. The method according to claim 1, characterized in that, The step of removing the inaccessible first node from the second node set U includes: Through formula The goal is to remove the first, inaccessible node from the second node set U, where... To delete the second node set U after the first node that is not connected, Let U be the set of second nodes preceding the first node that cannot be connected, and I be the set of third nodes. This is the fourth node set.
5. The method according to claim 1, characterized in that, Also includes: For any shared component, if a node in any stage of the shared component is determined to be an unreachable first node, then all nodes in all subsequent stages of the shared component are determined to be unreachable first nodes, and the unreachable first node corresponding to the shared component is added to the fifth node set. .
6. The method according to claim 1, characterized in that, The reliability analysis of the reconfigurable multi-stage system based on the effective working path includes: The reliability of the reconfigurable multi-stage system is calculated using the following formula: ,in, u The stage the system is in. Indicates the first u Number of effective work paths in a phase Indicates the first v The collection of components contained in the path. Indicates the first k Class components in the first u The inherent survival probability within the time span of the stage.
7. The method according to claim 6, characterized in that, The components in the system follow the same lifecycle distribution at each stage.
8. An apparatus for reliability analysis of a reconfigurable multi-stage system, wherein the apparatus is used to implement the method for reliability analysis of a reconfigurable multi-stage system as described in any one of claims 1-7, characterized in that, The device includes: The determination module is used to determine the initial set of the system graph model. The initial set is used to describe the state of the system graph model. The initial set includes a first node set C, a second node set U, and a third node set I. The nodes in the first node set C are connected nodes. The nodes in the second node set U are nodes that are directly connected to the connected nodes but whose connectivity has not been verified. The nodes in the third node set I are nodes that are not directly connected to the connected nodes. The verification module is used to select a first node from the second node set U and perform connectivity verification with nodes in the first node set C. Based on the connectivity verification result, the first node that cannot be connected is added to the fifth node set. The first node that cannot be connected is removed from the second node set U, and the remaining nodes in U are added to the fourth node set. The first connected node is added to the first node set C, and the working path containing the first unconnected node is removed from the system. The second node set U is updated based on the current first node set C. The marking module is used to execute the verification module multiple times until the second node set U is empty, and then mark the remaining working paths as valid working paths. The analysis module is used to analyze the reliability of the reconfigurable multi-stage system based on the effective working path.
9. An apparatus for reliability analysis of reconfigurable multi-stage systems, characterized in that, The device used for reliability analysis of reconfigurable multi-stage systems includes: processor; A memory storing computer-readable instructions that, when executed by the processor, implement the method as described in any one of claims 1 to 7.
10. A computer-readable storage medium, characterized in that, The computer-readable storage medium contains program code that can be invoked by a processor to execute the method as described in any one of claims 1 to 7.