Data-driven multi-objective radio frequency circuit layout optimization design method based on hierarchical encoding

Abstract

The application discloses a data-driven multi-objective radio frequency circuit layout optimization design method based on hierarchical coding and belongs to the field of radio frequency circuit layout optimization design. The application uses a data-driven multi-objective optimization method based on hierarchical coding to solve the radio frequency circuit layout optimization design problem, adopts a multi-level collaborative coding mode to code the circuit layout, and compared with a traditional mode of directly optimizing the XY coordinates of each component, fundamentally avoids component overlapping, simplifies the optimization process, exponentially reduces the search space, and improves the optimization efficiency; a large language model (LLM) is used to collaboratively generate offspring, realizes the transformation from "random variation" to "intelligent creation", helps the optimization algorithm to jump out of the local optimum point, significantly accelerates the convergence speed of the algorithm, and can quickly find an excellent circuit layout scheme meeting the multi-objective requirements.

Description

Technical Field

[0001] This invention belongs to the field of radio frequency circuit optimization design, specifically relating to a data-driven multi-objective radio frequency circuit layout optimization design method based on hierarchical coding. Background Technology

[0002] In the field of radio frequency (RF) circuit design (typically referring to high-frequency, microwave, and even millimeter-wave circuits), device layout design directly determines the circuit's performance, stability, and manufacturability. Its challenges far exceed those of ordinary digital or low-frequency analog circuits. In low-frequency circuits, wires are considered ideal, meaning their resistance is zero. However, in the RF field, every trace, via, and pin is not simply a conductor; they exhibit significant parasitic inductance, capacitance, or resistance. These distributed parameters interact with active / passive devices, thereby altering the circuit's impedance and frequency response. RF signal transmission requires a continuous characteristic impedance (typically 50 ohms) throughout the entire transmission path from source to load. Any point of impedance discontinuity will cause signal reflection. Device layout directly determines the length, shape, and coupling of transmission lines to other components, thus affecting impedance.

[0003] The main task of RF circuit device placement is to control and optimize the electromagnetic field distribution in the circuit by precisely planning the position, orientation, and interconnection of components within a limited board space, thereby ensuring signal integrity and achieving the preset RF performance. For example, sensitive low-noise amplifiers must be strictly physically isolated from powerful power amplifiers to prevent strong signals from interfering with weak signals; at the same time, components of the impedance matching network (such as inductors and resistors) must be placed close to the amplifier and connected using precisely controlled microstrip lines to ensure that RF signals are transmitted efficiently with characteristic impedance, avoiding signal reflection and power loss caused by impedance mismatch.

[0004] Therefore, the layout design of RF circuit devices must consider the following key points: Grounding design, no longer simply connecting to a copper sheet, because RF circuits require a low-impedance, continuous, and complete ground plane. It is essential to ensure the shortest ground return path, avoid crossing splits, and ensure the correct use of grounding vias; Power decoupling, because power lines are also channels for noise and RF signals to enter. The placement order (large capacitors filter low frequencies, small capacitors filter high frequencies) and distance (small capacitors must be extremely close to the chip's power pins) of decoupling capacitors directly affect their effectiveness. The inductance of power lines must also be minimized; Thermal management, because RF power devices (such as power amplifiers) typically generate a lot of heat. If the heat dissipation path is not smooth, it will lead to increased junction temperature and performance parameter drift, which in the long run will reduce reliability or even burn out the device. Heat dissipation holes and heat sinks need to be placed under the device; Space and isolation, within a limited space, potentially interfering circuit modules (such as transmit chains, receive chains, local oscillators, and digital clocks) must be effectively isolated.

[0005] With the continuous development of computer technology, intelligent methods are increasingly being applied to the optimization design of radio frequency (RF) circuit layout. However, most existing methods focus on using neural networks for modeling, learning, and prediction, or do not use multi-objective optimization algorithms to simultaneously balance multiple objectives. Although many intelligent simulation tools can assist in the simulation analysis of RF circuit layout, they still rely heavily on the intervention and adjustment of human experience, resulting in significant development investment and long development cycles for RF circuit layout design.

[0006] The aforementioned methods, such as using neural networks for modeling, learning, and prediction, and the intervention and adjustment of intelligent simulation tools based on human experience, have problems such as large errors between the predicted and actual results, inability to consider multiple conflicting objectives simultaneously, or the need for significant manual labor to adjust the intelligent simulation tools. Summary of the Invention

[0007] The purpose of this invention is to provide a data-driven multi-objective RF circuit layout optimization design method based on hierarchical coding, in order to solve the problems of existing RF circuit layout optimization design methods that require manual adjustment of intelligent simulation tool parameters, cannot take into account multiple conflicting objectives, and do not fully utilize the data obtained from intelligent simulation tools for dynamically building optimization models, thereby improving the efficiency of RF circuit layout optimization design.

[0008] The technical solution adopted in this invention is as follows:

[0009] A data-driven multi-objective RF circuit layout optimization design method based on hierarchical coding, the method comprising:

[0010] Step 1: Determine the RF circuit layout structure based on domain knowledge and requirements, and determine the performance indicators of the RF circuit as optimization targets.

[0011] Step 2: Parameterize the RF circuit layout and encode it into a data structure suitable for multi-objective intelligent optimization algorithms using a multi-level collaborative coding method;

[0012] Step 3: Initialize N individuals representing different RF circuit parameter layouts;

[0013] Step 4: Fitness evaluation based on simulator: Use intelligent simulation tools to obtain the performance index results of the target from N individuals;

[0014] Step 5: Use heuristic operators and large language model (LLM) to collaboratively generate new circuit parameterized layout offspring; for N individuals in the current population, half of the offspring are generated through heuristic operators, and the other half are generated through large language model generation operators.

[0015] Step 6: Use intelligent simulation tools and proxy models alternately to evaluate fitness;

[0016] Step 7: Update the best individual in the current file based on Pareto Optimization;

[0017] Step 8: Creation or updating of the proxy model; If the proxy model has not yet been built, first build the proxy model, initialize multiple proxy models, and then use the data samples previously obtained through the intelligent simulation tool for model learning and training to form the initial proxy model; If the proxy model has already been built, then start updating the proxy model;

[0018] Step 9: If the optimal circuit layout scheme in the current file does not meet the performance indicators specified by the user, repeat steps 3-9; if the iteration termination condition is met, obtain the final RF circuit layout scheme from the file for the user's final decision.

[0019] Furthermore, the performance metrics include wiring length, power consumption, thermal density, area, cost, signal integrity, and stability.

[0020] Furthermore, step 5 is detailed as follows:

[0021] Step 5.1: Half of the offspring are generated through heuristic operators: randomly select N / 2 parent individuals and perform offspring generation operators on them to generate N / 2 offspring.

[0022] Step 5.2: The other half of the offspring is generated by the Large Language Model (LLM) generator: Based on the M elite individuals with the highest fitness selected from the current population; the most relevant successful cases are retrieved from the domain-related RF circuit layout history database according to the current optimization objective, and structured prompt words are constructed and then input into the LLM. The LLM understands the prompt words and generates N / 2 sets of layout codes. After verifying their format and validity, they are used as the other N / 2 offspring.

[0023] Furthermore, the multi-level collaborative coding method includes a macro-micro hierarchical structure:

[0024] Macro-level encoding defines the location and size information of at least one functional area; micro-level encoding defines the relative layout order of the components contained within the functional area; finally, a fixed decoding rule maps the macro-level encoding and micro-level encoding to the final physical layout.

[0025] Furthermore, the macroscopic hierarchical encoding first divides the entire circuit board into several rectangular functional areas according to the logic function of the circuit; for each functional area, the coordinates of the starting point of the lower left corner of the rectangle, the width and height of the area, and the number of components contained in the area are recorded.

[0026] The micro-level coding defines the relative arrangement order of components within each functional area;

[0027] The decoding rules automatically fill the rectangular area defined by the macroscopic level with the microscopic component sequence in a top-to-bottom, left-to-right order, combined with the preset component spacing.

[0028] Furthermore, the intelligent simulation tool specifically refers to a method that uses the API interface in the tool to directly call or otherwise input specific RF circuit layout structure parameters and obtain performance indicators.

[0029] Furthermore, the Pareto dominance-based approach includes the classic Pareto dominance method, the ε-domination method, the L-optimal difference dominance method, the L-optimal sum dominance method, or any method for comparing multidimensional variables.

[0030] Furthermore, the surrogate model includes a radial basis function neural network with variable kernel function and a feedforward fully connected neural network with different activation functions in the hidden layers.

[0031] Furthermore, the heuristic operators include genetic algorithms, particle swarm optimization algorithms, or annealing algorithms.

[0032] In summary, due to the adoption of the above technical solution, the beneficial effects of the present invention are:

[0033] 1. Fundamentally avoids component overlap and simplifies the optimization process: Compared with the traditional method of directly optimizing the XY coordinates of each component, the hierarchical encoding of this invention decomposes the optimization problem; the optimization algorithm only searches at the high-level functional area level; since the relative positions of components within the area are determined by fixed decoding rules, this mechanism avoids physical position overlap between components from the design point of view, eliminating the need for costly collision detection and position adjustment during the optimization process, and greatly simplifying the complexity of fitness evaluation.

[0034] 2. Exponentially reduced search space and improved optimization efficiency: The encoding method of this invention significantly reduces the number of variables to be optimized, thereby achieving dimensionality reduction of the search space. For example, for a circuit containing 100 components, traditional methods require optimization of 200 independent coordinate variables. However, in this invention, if it is divided into 5 functional regions, the optimization algorithm may only need to process 20 macroscopic region variables (5 regions × [X, Y, W, H]). The search space decreases exponentially, which makes it easier for the optimization algorithm to escape local optima, converge faster, and significantly improve the possibility of finding the globally optimal layout scheme.

[0035] 3. The large language model (LLM) is used to collaboratively generate offspring, realizing the transformation from "random mutation" to "intelligent creation": Traditional heuristic operators are essentially random searches based on mathematical rules, lacking an understanding of the inherent design language of circuit layout; this invention introduces LLM as a generation operator, which, by analyzing elite individuals and historical data, can learn layout patterns that are difficult to describe with explicit rules in expert designs. Based on this, it can generalize and generate layout schemes that are structurally novel but logically reasonable, helping the optimization algorithm to escape local optima, thereby significantly accelerating the convergence speed of the algorithm and finding excellent circuit layout schemes that meet multiple objectives more quickly. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 This is a schematic diagram illustrating the processing steps of a data-driven multi-objective RF circuit layout optimization design method based on hierarchical coding provided by the present invention;

[0038] Figure 2 This is a schematic diagram of a data-driven online optimization module for multi-objective circuit layout in an embodiment of the present invention;

[0039] Figure 3 This is a schematic diagram illustrating the process of generating offspring using heuristic operators and a large language model (LLM) in an embodiment of the present invention. Detailed Implementation

[0040] To make the objectives, technical solutions, and advantages of the present invention clearer, the embodiments of the present invention will be described in further detail below with reference to the accompanying drawings.

[0041] This invention provides a data-driven multi-objective RF circuit layout optimization design method based on hierarchical coding. The method includes: determining a suitable RF circuit layout structure based on domain knowledge and requirements to achieve the specific functions required by the circuit; parameterizing and encoding the RF circuit layout into a data structure suitable for multi-objective intelligent optimization algorithms using a multi-level collaborative coding approach; initializing N individuals representing different parameterized RF circuit layouts, where the component layout positions are variables to be optimized; fitness evaluation based on a simulator; generating new parameterized circuit layout offspring using heuristic operators and a Large Language Model (LLM); fitness evaluation based on a simulator or surrogate model; updating the optimal profile; creating or updating the surrogate model; and repeating the above steps to obtain the final optimal RF circuit layout scheme. This invention employs a data-driven multi-objective optimization method based on hierarchical coding to solve the problem of radio frequency circuit layout optimization design. It uses a multi-level collaborative coding approach to encode the circuit layout, which, compared with the traditional method of directly optimizing the XY coordinates of each component, fundamentally avoids component overlap, simplifies the optimization process, and thus exponentially reduces the search space and improves optimization efficiency. It also uses a large language model (LLM) to collaboratively generate offspring, realizing the transformation from "random mutation" to "intelligent creation," helping the optimization algorithm to escape local optima, thereby significantly accelerating the convergence speed of the algorithm and enabling it to find excellent circuit layout schemes that meet multi-objective requirements more quickly.

[0042] As one possible implementation, see Figure 1 The data-driven multi-target radio frequency circuit layout optimization design method based on hierarchical coding provided in this embodiment of the invention includes the following steps:

[0043] Step 1: Determine a suitable RF circuit layout structure based on domain knowledge and requirements to achieve the specific functions required by the circuit; and identify the key performance indicators that need to be considered in the RF circuit as optimization targets.

[0044] As one possible implementation, this embodiment, based on knowledge of RF circuitry, determines that a circuit layout for converting RF signals to digital signals needs to be designed. This circuit includes a DC source, filter, digitally controlled attenuator, amplifier, switch, power divider, RF sampling chip, digital signal processing, etc. With the circuit structure determined, adjustments to the layout and position of each component are needed to improve signal integrity and stability, and reduce the overall heat density of the circuit.

[0045] Step 2: The RF circuit layout is parameterized and encoded into a data structure suitable for multi-objective intelligent optimization algorithms using a multi-level collaborative coding method.

[0046] In this embodiment, the layout positions of each component to be optimized are parameterized and encoded. This encoding method follows a two-level (macro-micro) hierarchical structure:

[0047] The macroscopic hierarchical coding (functional area layer) is used to define the location and size information of at least one functional area: First, according to the logical function of the circuit (such as RF front-end, digital control, power management, etc.), the entire circuit board is divided into several rectangular functional areas; in the coding, the location of individual components is not directly defined, but the macroscopic attributes of these functional areas are defined; for each functional area, the (X,Y) coordinates of its lower left corner, the width W, the height H, and the number of components K contained in the area are recorded; these parameters [X,Y,W,H,K] constitute the macroscopic hierarchical coding, which is the main search and optimization variable of the multi-objective optimization algorithm.

[0048] Micro-level coding (component sequence layer) is used to define the relative layout order of components contained within the functional area: within each functional area, a relative arrangement order of components is defined; for example, if a region contains components A, B, and C, the micro-coding can define their arrangement order as [A, C, B]. This order is preset based on domain knowledge (such as signal flow direction, heat source isolation, etc.) and can also be used as part of optimization.

[0049] Coordinate decoding rules (from encoding to layout): A complete encoding (containing macroscopic parameters and microscopic sequences of all regions) is mapped to the final physical layout through a fixed decoding rule; this rule automatically fills the microscopic component sequence into the rectangular area defined by the macroscopic level in the order of "from top to bottom and from left to right" and in combination with the preset component safety spacing.

[0050] Example is as follows.

[0051] Suppose a circuit contains two functional regions: Region 1 (RF front-end), containing 4 components (A, B, C, D), with macroscopic encoding [X1, Y1, W1, H1, 4] and microscopic sequence [A, B, C, D]; Region 2 (digital section), containing 3 components (E, F, G), with macroscopic encoding [X2, Y2, W2, H2, 3] and microscopic sequence [E, F, G]. The optimization algorithm will primarily adjust 8 variables [X1, Y1, W1, H1] and [X2, Y2, W2, H2] to find the optimal region layout. Once these variables are determined, the specific coordinates of the 7 components are automatically generated according to the decoding rules, without direct algorithmic intervention, thus ensuring that components within the regions do not overlap.

[0052] Then, the circuit layout scheme is updated through a data-driven multi-objective circuit layout online optimization module, such as... Figure 2 As shown, it includes the following steps.

[0053] Step 3: Initialize N individuals representing different RF circuit parameterized layouts.

[0054] In this embodiment, based on the encoding structure selected in step 2, core components are selected according to the RF circuit signal flow. Starting from the core components and proceeding to all components in the circuit, N sets of circuit component layouts are randomly generated, with each component layout representing an individual in the initial population. The randomization generation algorithm must satisfy basic circuit constraints (such as being located within the circuit board area).

[0055] Step 4: Simulator-based fitness evaluation. The results of the target circuit performance of interest are obtained from N individuals using intelligent simulation tools.

[0056] In this embodiment, intelligent simulation tools such as ADS can be used for fitness evaluation. The specific process is as follows:

[0057] Step 4.1: Construct a parametric layout template: First, construct a parametric circuit layout template in the ADS layout environment; in this template, the physical positions of each component (such as X and Y coordinates) are not fixed values, but are defined by layout variables; for example, the position of a capacitor can be controlled by variables C1_X and C1_Y.

[0058] Step 4.2: Update variables and drive simulation via script: An external optimization program (e.g., written using MATLAB or Python) is responsible for executing the evolutionary algorithm. Each time an individual is evaluated, the program writes the specific layout parameter values ​​represented by the individual's encoding (i.e., the hierarchical encoding generated in step 2) into a variable definition file that ADS can read, or directly passes them as parameters to the simulation command of ADS.

[0059] Step 4.3, Invoking the Electromagnetic Field Simulator: The script then invokes ADS's electromagnetic field (EM) simulator (such as Momentum or FEM) in command-line mode; the simulator loads the layout template with updated variable values ​​and performs high-precision electromagnetic and thermal simulations on it.

[0060] Step 4.4 Automatic Result Analysis: After the simulation is completed, the optimization script will automatically parse the simulation result files (such as S-parameter datasets, heat distribution maps, etc.), extract the performance indicators of interest (e.g., S21 at a specific frequency, VSWR within the band, maximum chip temperature, etc.), and combine these indicators into the fitness value of the individual for subsequent evolutionary processes.

[0061] Step 5: Use heuristic operators and Large Language Model (LLM) to collaboratively generate new circuit parameterized layout offspring. For example... Figure 3 As shown, for N individuals in the current population, two different strategies are used to generate N offspring:

[0062] Step 5.1: Half of the offspring are generated using traditional heuristic operators: randomly select N / 2 parent individuals and perform traditional offspring generation operators on them, such as simulated binary crossover and polynomial mutation in genetic algorithms, to generate N / 2 offspring; these operators are good at performing fine-grained searches in the neighborhood space of existing solutions.

[0063] Step 5.2: The other half of the offspring is generated using a specific Large Language Model (LLM) generator: Based on the top fitness individuals selected from the current population and the most relevant successful cases retrieved from the domain-related RF circuit layout history database according to the current optimization objective, structured cue words are constructed and then input into the LLM. The LLM understands the cue words and generates N / 2 sets of layout codes. After verifying their format and validity, these codes are used as the other N / 2 offspring.

[0064] In this embodiment, the specific process of generating half of the offspring using the LLM generation operator is as follows:

[0065] Step 5.2.1, Data Preparation and Context Building: First, select the M elite individuals with the highest fitness from the current population; at the same time, retrieve successful layout cases most relevant to the current optimization goal (e.g., "reducing heat density") from the domain-related RF circuit layout history database.

[0066] Step 5.2.2, Structured Prompt Engineering: Construct the prepared data into a structured prompt and input it into the large language model. This prompt includes the following parts: Role setting, instructing the LLM to act as an "experienced RF circuit layout expert"; Task description, explicitly instructing the LLM that "your task is to generate new circuit layout codes with higher 'signal integrity' and lower 'heat density' potential based on the given excellent layout cases"; Excellent case input, using the codes of M selected elite individuals and retrieved historical successful cases as examples for context learning, along with their performance metrics, in the following format: "Elite Layout 1: [Encoded Real Number String], Performance: [Signal Integrity Value, Heat Density Value]"; Generation instructions, requiring the LLM to generate N / 2 new encoded real number strings that are similar to but not exactly the same as the examples, and that conform to the encoding rules (e.g., numerical range, vector dimension).

[0067] Step 5.2.3, LLM Generation and Decoding Verification: Based on the prompt words, LLM understands the inherent patterns and high-dimensional relationships in the excellent layout encoding and generates N / 2 sets of new encodings; after receiving these encodings, the program first performs format and validity verification to ensure that the values ​​are within the legal range and the structure is complete; the verified encodings are confirmed as valid offspring and used as the other half of the required offspring data.

[0068] Step 6: Fitness evaluation based on simulator or surrogate model. If the number of evolutionary iterations is even, the fitness is evaluated using a surrogate model; if the number of evolutionary iterations is odd, the fitness is evaluated using a real intelligent simulation tool.

[0069] In this embodiment, the surrogate model and the real circuit layout intelligent simulator need to be used alternately for fitness evaluation. This is because the simulation speed of the circuit layout intelligent simulator is relatively slow, and given a fixed total time, it is impossible to improve the entire circuit layout optimization design process through a large number of function evaluations. Therefore, a surrogate model is constructed using historical simulation data to replace some of the operations for evaluating the signal integrity, stability, and thermal density performance of the offspring new circuit layout.

[0070] Step 7: Update the optimal profile. Update the optimal individual in the current profile based on Pareto dominance.

[0071] In this embodiment, the optimal individual is updated using a Pareto dominance-based approach. The method used to compare the magnitudes of two multidimensional variables includes, but is not limited to: the classic Pareto dominance method, the ε-dominance method, the L-optimal difference dominance method, the L-optimal sum dominance method, or any method for comparing multidimensional variables.

[0072] Step 8: Creation or Update of the Proxy Model. If the proxy model has not yet been built, it will be built first, multiple proxy models will be initialized, and then the data samples previously obtained through the intelligent simulation tool will be used for model learning and training to form the initial proxy model; if the proxy model has already been built, the update of the proxy model will begin.

[0073] In this embodiment, the surrogate model includes, but is not limited to, radial basis function neural networks with variable kernel functions and feedforward fully connected neural networks with different hidden layer activation functions. The creation process of the surrogate model is as follows:

[0074] Step 8.1, Model Selection and Data Partitioning: Select multiple models, including fully connected neural networks, as candidate proxy models; divide the existing simulation data sample set into training set and test set according to a ratio of, for example, 8:2. The training set will be used for model training and validation, while the test set will be used to finally evaluate the generalization ability of the model.

[0075] Step 8.2, Hyperparameter Optimization and Model Training: For each candidate model, define a set of key hyperparameters to be optimized (e.g., for neural networks, this includes learning rate, number of hidden layers, number of neurons, regularization coefficient λ, etc.); train the model on the training set using K-fold cross-validation; during cross-validation, find the hyperparameter combination that minimizes the validation error (e.g., mean squared error MSE) on the validation set using methods such as grid search or Bayesian optimization; the model's loss function consists of a performance prediction error term and a regularization term to prevent overfitting.

[0076] Step 8.3 Final Model Determination: For each candidate model, retrain on the complete training set using the optimal hyperparameters found during training to obtain the final model; then, evaluate all the final trained models on an independent test set, select the model that performs best on the test set (e.g., with the smallest mean squared error) as the surrogate model for final deployment, and complete its initial construction.

[0077] In this embodiment, the update process of the surrogate model is as follows: In subsequent evolutionary iterations, when new data samples are obtained through a real simulator, these new samples are added to the training set; subsequently, incremental learning or transfer learning techniques can be used to fine-tune the original model parameters, thereby retaining historical knowledge while quickly adapting to the new data distribution and smoothly updating the model parameters.

[0078] Step 9: If the optimal circuit layout scheme in the current file does not meet the performance indicators specified by the user, repeat steps 3-9; if the iteration termination condition is met, obtain the final RF circuit layout scheme from the file for the user's final decision.

[0079] In this embodiment, the Pareto threshold front of the chip obtained through the above steps is composed of a set of non-dominant circuit layout performance index values. It is obtained by optimizing and solving the above-mentioned surrogate model and circuit simulator through a multi-objective optimization method. The multi-objective optimization method includes data optimization method or multi-objective evolutionary optimization method, such as multi-objective genetic algorithm or multi-objective particle swarm optimization algorithm.

[0080] In this embodiment, the performance of circuit layout optimization includes: wiring length, power consumption, heat density, area, cost, signal integrity and stability, etc.

[0081] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

[0082] The above descriptions are merely some embodiments of the present invention. Those skilled in the art can make various modifications and improvements without departing from the inventive concept of the present invention, and these all fall within the scope of protection of the present invention.

Claims

1. A data-driven multi-objective RF circuit layout optimization design method based on hierarchical coding, characterized in that, Includes the following steps: Step 1: Determine the RF circuit layout structure based on domain knowledge and requirements, and determine the performance indicators of the RF circuit as optimization targets. Step 2: Parameterize and encode the RF circuit layout using a multi-level cooperative coding method into a data structure suitable for multi-objective intelligent optimization algorithms; the multi-level cooperative coding method includes a macro-micro hierarchical structure: The macro-level coding defines the location and size information of at least one functional area; The micro-level encoding defines the relative layout order of the components contained within the functional area; finally, a fixed decoding rule maps the macro-level encoding and micro-level encoding to the final physical layout. The macroscopic hierarchical coding first divides the entire circuit board into several rectangular functional areas according to the logic function of the circuit; for each functional area, the coordinates of the starting point of the lower left corner of the rectangle, the width and height of the area, and the number of components contained in the area are recorded. The micro-level coding defines the relative arrangement order of components within each functional area; The decoding rules automatically fill the micro-level component sequence into the rectangular area defined by the macro-level, in order from top to bottom and from left to right, combined with the preset component spacing. Step 3, Initialization N Individuals representing different parameterized layouts of radio frequency circuits; Step 4, Simulator-based fitness evaluation: N Individuals use intelligent simulation tools to obtain the target's performance index results; Step 5: Use heuristic operators and a large language model (LLM) to collaboratively generate new circuit parameterized layout offspring; for the current population... N One individual, half of the offspring are generated through heuristic operators, and the other half are generated through large language model generation operators; Step 6: Use intelligent simulation tools and proxy models alternately to evaluate fitness; Step 7: Update the best individual in the current file based on Pareto dominance; Step 8: Creation or updating of the proxy model; If the proxy model has not yet been built, first build the proxy model, initialize multiple proxy models, and then use the data samples previously obtained through the intelligent simulation tool for model learning and training to form the initial proxy model; If the proxy model has already been built, then start updating the proxy model; Step 9: If the optimal circuit layout scheme in the current file does not meet the performance indicators specified by the user, repeat steps 3-9; if the iteration termination condition is met, obtain the final RF circuit layout scheme from the file for the user's final decision.

2. The data-driven multi-objective RF circuit layout optimization design method based on hierarchical coding according to claim 1, characterized in that, The performance metrics include wiring length, power consumption, heat density, area, cost, signal integrity, and stability.

3. The data-driven multi-objective RF circuit layout optimization design method based on hierarchical coding according to claim 1, characterized in that, Step 5 is described in detail below: Step 5.1: Half of the offspring are generated using a heuristic operator: randomly selected. N Two parent individuals are used to perform the offspring generation operator, thereby generating... N / 2 offspring; Step 5.2: The other half of the offspring is generated using the Large Language Model (LLM) generator: based on the highest fitness selected from the current population. M An elite individual; The most relevant successful cases are retrieved from the domain-related historical database of RF circuit layouts according to the current optimization objective. Structured cue words are then constructed and input into the LLM (Local Management Module). The LLM interprets and generates the desired results based on these cue words. N / 2 sets of layout codes, after format and validity validation, are used as the required additional N / 2 offspring.

4. A data-driven multi-objective RF circuit layout optimization design method based on hierarchical coding according to any one of claims 1-3, characterized in that, The intelligent simulation tool is specifically a method that uses the API interface in the tool to directly call or otherwise input specific RF circuit layout parameters and obtain performance indicators.

5. The data-driven multi-objective RF circuit layout optimization design method based on hierarchical coding according to claim 4, characterized in that, The Pareto dominance-based approach includes the classic Pareto dominance method, the ε-domination method, the L-optimal difference dominance method, the L-optimal sum dominance method, or any method used to compare multidimensional variables.

6. The data-driven multi-objective RF circuit layout optimization design method based on hierarchical coding according to claim 5, characterized in that, The surrogate model includes a radial basis function neural network with variable kernel function and a feedforward fully connected neural network with different activation functions in the hidden layers.

7. The data-driven multi-objective RF circuit layout optimization design method based on hierarchical coding according to claim 6, characterized in that, The heuristic operators include genetic algorithms, particle swarm optimization algorithms, or annealing algorithms.

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