Negative pole piece, preparation method, secondary battery and electric device
By setting a silicon interface layer on the metal anode layer and utilizing SiOx material and alternating silicon-oxygen and silicon dioxide layers, the problem of dendrite growth in the metal anode was solved, achieving high cycle stability and high capacity of the battery.
Patent Information
- Application Number
- CN202511703340.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-06-01
- Publication Date
- 2026-02-13
AI Technical Summary
During cycling, metal anodes are prone to dendrite formation, which can lead to diaphragm puncture and safety accidents. Moreover, existing technologies are unable to effectively inhibit their growth.
A silicon interface layer is set on the metal anode layer. The silicon interface layer is composed of SiOx material, and its composition and thickness are controlled by chemical vapor deposition. The silicon-oxygen layer and the silicon dioxide layer are alternately set to suppress dendrite growth.
It improves the cycle stability and capacity of the battery, reduces the probability of dendrite formation, reduces safety hazards, and enhances the overall performance of the battery.
Smart Images

Figure CN121528867A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of secondary battery technology, and in particular to a negative electrode sheet, a preparation method, a secondary battery, and an electrical device. Background Technology
[0002] In recent years, as secondary batteries have been widely used in energy storage power systems such as hydropower, thermal power, wind power and solar power plants, as well as in many fields such as power tools, electric bicycles, electric motorcycles, electric cars, military equipment, and aerospace, the market's performance requirements for secondary batteries have become increasingly higher.
[0003] Compared to graphite, a commonly used anode material, metal anodes (such as lithium metal) have lower potential and higher theoretical capacity, making them very promising anode materials. Summary of the Invention
[0004] In view of the problems existing in the background art, this application provides a negative electrode sheet, which aims to suppress the formation of dendrites on the metal electrode and improve the cycle stability of the battery.
[0005] A first aspect of this application provides a negative electrode sheet, comprising a metal layer and a silicon interface layer located on at least one side of the metal layer, the silicon interface layer comprising silicon of the general formula SiO. x The material is given by , where 0 ≤ x ≤ 2.
[0006] Compared to metal layers, silicon interface layers have a higher negative electrode potential, which can suppress dendrite formation and growth, thus improving battery cycle performance.
[0007] In any embodiment, the silicon interface layer comprises SiO₂. x The material is 0 < x < 2, and can be selected as 0.7 < x < 1.5.
[0008] During charge-discharge cycles, silicon-oxygen materials undergo lithiation, forming a large amount of irreversible Li4SiO4. This material has a Young's modulus as high as 8.81 GPa, which can suppress the growth of lithium dendrites through its high mechanical strength, thereby improving the cycle stability of the battery. Moreover, silicon-oxygen materials also possess a certain capacity, which can improve the battery's capacity level while simultaneously enhancing its cycle stability.
[0009] In any embodiment, the thickness of the silicon interface layer is 25 nm – 1000 nm, optionally 50 nm – 200 nm.
[0010] When the thickness of the silicon interface layer is within a suitable range, it can effectively protect the metal layer, suppress dendrite formation, reduce the decrease in conductivity, increase in resistance, and decrease in battery capacity caused by excessive silicon interface layer thickness, and also reduce the risk of brittle fracture of the negative electrode due to excessive thickness, thereby improving the overall performance of the battery.
[0011] In any embodiment, in the thickness direction of the silicon interface layer, the oxygen content of the silicon interface layer near the metal layer is lower than the oxygen content away from the metal layer. This lower oxygen content near the metal layer in the thickness direction of the silicon interface layer is beneficial for leveraging the characteristics of different materials, thereby achieving a comprehensive improvement in battery cycle stability and capacity.
[0012] In any embodiment, along the thickness direction of the silicon interface layer from near the metal layer to away from the metal layer, the silicon interface layer sequentially comprises a silicon layer and a silicon-oxygen layer, wherein the silicon layer comprises elemental silicon and the silicon-oxygen layer comprises silicon with the general formula SiO. x The material is given by , where 0 < x < 2.
[0013] The irreversible Li4SiO4 formed by the silicon oxide layer 622 during battery cycling not only inhibits lithium dendrite growth but also effectively solves the problem of high expansion rate of elemental silicon, giving full play to the high capacity characteristics of elemental silicon, so that the battery has a higher capacity level while having high cycle performance.
[0014] In any embodiment, along the thickness direction of the silicon interface layer from near the metal layer to away from the metal layer, the silicon interface layer sequentially comprises a silicon oxide layer and a silicon dioxide layer, wherein the silicon oxide layer comprises silicon oxide with the general formula SiO. x The material is given by , where 0 < x < 2.
[0015] Compared to silicon-oxygen materials, silicon dioxide layers can effectively suppress lithium dendrite growth even at low thicknesses. Adding a silicon dioxide layer on top of a silicon-oxygen layer allows full utilization of the surface porosity of the silicon-oxygen layer. Compared to directly depositing silicon dioxide on a metal layer, the surface porosity of the silicon-oxygen layer reduces its density, thus suppressing dendrite growth while minimizing the significant drop in conductivity caused by excessive silicon dioxide density. This improves battery cycle stability without causing a significant decrease in battery capacity.
[0016] In any embodiment, along the thickness direction of the silicon interface layer from near the metal layer to away from the metal layer, the silicon interface layer sequentially comprises a silicon layer, a silicon oxide layer, and a silicon dioxide layer, wherein the silicon layer comprises amorphous silicon, and the silicon oxide layer comprises silicon dioxide of the general formula SiO. x The material is given by , where 0 < x < 2.
[0017] The stacked arrangement of silicon, silicon oxide and silicon dioxide layers can not only give full play to the advantages of each layer, but also achieve a comprehensive improvement in battery cycle stability and capacity through the cooperation of each layer.
[0018] In any embodiment, the silicon interface layer sequentially comprises a SiOx1 layer, a SiOx2 layer, ..., a SiOx layer in the direction of silicon interface layer thickness from near the metal layer to far from the metal layer. n Layers, where 0 < x1 < x2 < ... < x n <2, n≥2.
[0019] The silicon interface layer has a high silicon content near the metal layer, which can fully utilize the material's high capacity characteristics; the oxygen content is high far from the metal layer, which increases the negative electrode potential and increases the content of generated Li4SiO4, which helps to suppress dendrite growth.
[0020] In any embodiment, the negative electrode sheet satisfies at least one of the following conditions: (i) The ratio of the thickness of the silicon layer to the thickness of the silicon oxide layer is 4-15; (ii) The thickness of the silicon layer is 10nm-100nm; (iii) The thickness of the silicon oxide layer is 25nm-150nm; (iv) The thickness of the silicon dioxide layer is 1 nm-10 nm.
[0021] In any embodiment, the metal layer includes at least one of lithium metal, lithium alloy, sodium metal, and sodium alloy.
[0022] In any embodiment, the silicon interface layer is prepared by at least one of chemical vapor deposition, atomic layer deposition, vapor deposition, and magnetron sputtering.
[0023] This application provides a method for preparing a negative electrode sheet, the method comprising: depositing a silicon interface layer on at least one side of a metal layer to prepare the negative electrode sheet, wherein the silicon interface layer comprises materials of the general formula SiO2. x The material is given by , where 0 ≤ x ≤ 2.
[0024] In any embodiment, the preparation method includes: introducing a gas containing a silicon source or a mixed gas containing an oxygen source and a silicon source, and preparing a silicon interface layer by chemical vapor deposition; optionally, the oxygen source includes N2O, and the silicon source includes SiH4.
[0025] Chemical vapor deposition (CVD) is used to prepare silicon interface layers. By adjusting the flow rates of the oxygen and silicon sources, the composition of the silicon interface layer can be controlled, resulting in higher cell fabrication efficiency. Compared to other preparation methods, the flow rates of the input materials are controllable, making it easier to precisely control the composition and thickness of the silicon interface layer.
[0026] In any embodiment, the preparation method includes: the volume flow rate ratio M of the introduced oxygen source to silicon source is 0 < M < 20, and the silicon interface layer includes a material with the general formula SiOx, where 0 < x < 2.
[0027] In any embodiment, during the preparation of the silicon interface layer, the ratio M of the oxygen source to the silicon source is increased, such that in the thickness direction of the silicon interface layer, the oxygen content near the metal layer is lower than the oxygen content away from the metal layer.
[0028] In any embodiment, the preparation method includes: introducing a silicon source for deposition; after deposition for a period of time, introducing an oxygen source and a silicon source to continue deposition, wherein the volumetric flow rate ratio M of the oxygen source and the silicon source is 0 < M < 20.
[0029] In any embodiment, the preparation method includes: introducing an oxygen source and a silicon source for deposition, wherein the volumetric flow rate ratio M of the oxygen source and the silicon source is 0 < M < 20; and after deposition for a period of time, increasing the volumetric flow rate ratio M of the oxygen source and the silicon source to not less than 20 for further deposition.
[0030] In any embodiment, the preparation method includes: introducing a silicon source for deposition; after deposition for a period of time, introducing an oxygen source and a silicon source for deposition, wherein the volumetric flow rate ratio M of the oxygen source and the silicon source is 0 < M < 20; after deposition for a period of time, increasing the ratio M of the oxygen source and the silicon source to not less than 20 for deposition.
[0031] In any embodiment, the preparation method includes: gradually increasing the volumetric flow rate ratio M of the oxygen source and the silicon source during the deposition process.
[0032] A third aspect of this application provides a secondary battery, including a negative electrode sheet prepared by the method of the first aspect or the method of the second aspect.
[0033] In any embodiment, the secondary battery includes an electrolyte, and the silicon interface layer is located between the electrolyte and the metal layer.
[0034] A fourth aspect of this application provides an electrical device including a secondary battery as described in the third aspect. Attached Figure Description
[0035] Figure 1 This is a schematic diagram of the negative electrode sheet according to one embodiment of this application; Figure 2 This is a schematic diagram of the negative electrode sheet according to one embodiment of this application; Figure 3 This is a schematic diagram of the negative electrode sheet according to one embodiment of this application; Figure 4 This is a schematic diagram of the negative electrode sheet according to one embodiment of this application; Figure 5 This is a schematic diagram of the negative electrode sheet according to one embodiment of this application; Figure 6 This is a schematic diagram of a secondary battery according to one embodiment of this application; Figure 7 yes Figure 6 An exploded view of a secondary battery according to an embodiment of this application is shown. Figure 8 This is a schematic diagram of an electrical device according to one embodiment of this application.
[0036] Figure label: 1 Battery pack; 2 Upper casing; 3 Lower casing; 4 Battery module; 5 Sodium-ion battery; 51 Housing; 52 Electrode assembly; 53 Cover plate; 6, 6-1, 6-2, 6-3, 6-4 Negative electrode sheets; 61 Metal layer; 62, 62-1, 62-2, 62-3, 62-4 Silicon interface layer; 621 Silicon layer; 622 Silicon oxide layer; 6221 SiO x1 Layer; 6222 SiO x2 Layer; 623 silicon dioxide layer. Detailed Implementation
[0037] The following detailed description, with appropriate reference to the accompanying drawings, discloses embodiments of the negative electrode sheet, preparation method, secondary battery, and electrical device of this application. However, unnecessary detailed descriptions may be omitted. For example, detailed descriptions of well-known matters and repetitive descriptions of practically identical structures may be omitted. This is to avoid unnecessarily lengthy descriptions and to facilitate understanding by those skilled in the art. Furthermore, the accompanying drawings and the following description are provided for the purpose of enabling those skilled in the art to fully understand this application and are not intended to limit the subject matter of the claims.
[0038] The "range" disclosed in this application is defined by a lower limit and an upper limit. A given range is defined by selecting a lower limit and an upper limit, which define the boundaries of a particular range. Ranges defined in this way can include or exclude endpoints and can be arbitrarily combined; that is, any lower limit can be combined with any upper limit to form a range. For example, if ranges of 60-120 and 80-110 are listed for a specific parameter, it is expected that ranges of 60-110 and 80-120 are also included. Furthermore, if minimum range values of 1 and 2 are listed, and if maximum range values of 3, 4, and 5 are listed, then the following ranges are all expected: 1-3, 1-4, 1-5, 2-3, 2-4, and 2-5. In this application, unless otherwise stated, the numerical range "ab" represents a shortened representation of any combination of real numbers between a and b, where a and b are real numbers. For example, the numerical range "0-5" indicates that all real numbers between "0-5" have been listed in this article; "0-5" is simply a shortened representation of these numerical combinations. Furthermore, when a parameter is stated as an integer ≥2, it is equivalent to disclosing that the parameter is, for example, an integer such as 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, etc.
[0039] Unless otherwise specified, all embodiments and optional embodiments of this application can be combined to form new technical solutions.
[0040] Unless otherwise specified, all technical features and optional technical features of this application may be combined to form new technical solutions.
[0041] Unless otherwise specified, all steps in this application may be performed sequentially or randomly, preferably sequentially. For example, the method includes steps (a) and (b), indicating that the method may include steps (a) and (b) performed sequentially, or it may include steps (b) and (a) performed sequentially. For example, the mention that the method may also include step (c) indicates that step (c) may be added to the method in any order. For example, the method may include steps (a), (b), and (c), or it may include steps (a), (c), and (b), or it may include steps (c), (a), and (b), etc.
[0042] Unless otherwise specified, the terms "comprising" and "including" as used in this application can be open-ended or closed-ended. For example, "comprising" and "including" can mean that other components not listed may also be included, or that only the listed components may be included.
[0043] Unless otherwise specified, the term "or" is inclusive in this application. For example, the phrase "A or B" means "A, B, or both A and B". More specifically, the condition "A or B" is satisfied by any of the following conditions: A is true (or exists) and B is false (or does not exist); A is false (or does not exist) and B is true (or exists); or both A and B are true (or exist).
[0044] Metal anodes are highly promising anode materials. Taking lithium metal as an example, it has the lowest voltage and a theoretical capacity of up to 3860 mAh / g, which is 10 times that of graphite anode materials. However, during cycling, metal anodes are prone to forming a large number of dendrites on the electrode surface, causing membrane puncture and resulting in direct contact and short circuit between the positive and negative electrodes, leading to serious safety accidents.
[0045] [Negative electrode plate] Based on this, such as Figure 1 As shown, this application provides a negative electrode 6, including a metal layer 61 and a silicon interface layer 62 located on at least one side of the metal layer 61. The silicon interface layer 62 comprises silicon oxide (SiO₂). x The material is given by , where 0 ≤ x ≤ 2.
[0046] The structure of the negative electrode sheet can be characterized by any method known in the art. As an example, the morphology of the ion-polished cross-section of the negative electrode sheet can be observed by scanning electron microscopy, and the material composition of the cross-section of the negative electrode sheet can be tested by energy dispersive spectroscopy.
[0047] In some embodiments, the metal layer 61 includes at least one of lithium metal, lithium alloy, sodium metal, and sodium alloy.
[0048] A lithium alloy is an alloy comprising lithium and at least one other metal. In some embodiments, the lithium content in the lithium alloy may be 90% by weight or higher, 95% by weight or higher, or 99% by weight or higher. For example, the lithium content in the lithium alloy may be 97 wt%, 97.5 wt%, 98 wt%, 98.5 wt%, 99.1 wt%, 99.3 wt%, 99.5 wt%, 99.7 wt%, or 99.9 wt%, etc. The lithium alloy may optionally include one or more of the following: lithium-copper alloy, lithium-indium alloy, lithium-zinc alloy, lithium-magnesium alloy, lithium-tin alloy, and lithium-silver alloy.
[0049] A sodium alloy is an alloy comprising sodium and at least one other metal. As a non-limiting example, a sodium alloy may be sodium with cesium, sodium with rubidium, or a mixture thereof.
[0050] In some embodiments, the silicon interface layer 62 comprises silicon, silicon dioxide, and a material of the general formula SiO2. xAt least one of the silicon-oxygen materials in the range of (0 < x < 2). It is understood that the above-mentioned materials can be located in the same layer or can be arranged in layers to form a silicon interface layer.
[0051] In some embodiments, the silicon interface layer 62 comprises silicon. In some embodiments, the silicon is amorphous silicon. Silicon has a higher electrode potential than lithium, which can reduce the probability of lithium dendrite formation by increasing the potential. Moreover, silicon has a larger negative electrode capacity than lithium, which can further improve the battery capacity.
[0052] In some embodiments, the silicon interface layer 62 comprises silicon of the general formula SiO x The silicon-oxygen material, where 0 < x < 2. In some embodiments, the silicon interface layer comprises a material of the general formula SiO. x The silicon-oxygen material, x can be selected as 0.1, 0.2, 0.3, 0.4, 0.5, 0.6, 0.7, 0.8, 0.9, 1, 1.1, 1.2, 1.3, 1.4, 1.5, 1.6, 1.7, 1.8, 1.9 or any value between them.
[0053] During charge-discharge cycles, silicon-oxygen materials undergo lithiation, forming a large amount of irreversible Li4SiO4. This material has a Young's modulus as high as 8.81 GPa, which can suppress the growth of lithium dendrites through its high mechanical strength, thereby improving the cycle stability of the battery. Moreover, silicon-oxygen materials also possess a certain capacity, which can improve the battery's capacity level while simultaneously enhancing its cycle stability.
[0054] In some embodiments, the silicon interface layer 62 comprises silicon of the general formula SiO x The silicon-oxygen material, where 0.7 < x < 1.5.
[0055] When the ratio of oxygen to silicon in silicon-oxygen materials is between 0.7 and 1.5, the materials possess both high specific capacity and low expansion rate, which is beneficial for further improving the cycle stability and capacity of the battery.
[0056] In some embodiments, the silicon interface layer 62 comprises silicon dioxide.
[0057] Silicon dioxide is a high-strength insulating material that provides almost no capacity. The Li4SiO4 generated during battery cycling is more dense and has higher mechanical strength. Compared with silicon-oxygen materials, it can more effectively suppress dendrite growth, stabilize the negative electrode structure, and improve the overall mechanical strength at low addition levels.
[0058] In summary, the silicon interface layer has a higher negative electrode potential than lithium metal, which can suppress the formation and growth of dendrites and improve the battery cycle performance.
[0059] In some embodiments, the thickness of the silicon interface layer 62 is 25 nm - 1000 nm, optionally 50 nm - 200 nm.
[0060] In some embodiments, the thickness of the silicon interface layer 62 may be selected as 25nm, 50nm, 75nm, 100nm, 125nm, 150nm, 175nm, 200nm or any value thereof.
[0061] The thickness of the silicon interface layer 62 is within a suitable range, which can effectively protect the metal layer 61 and suppress the formation of dendrites. It can also reduce the decrease in conductivity, increase in resistance, and decrease in battery capacity caused by excessive thickness of the silicon interface layer 62. Furthermore, it can reduce the risk of brittle fracture of the negative electrode 6 due to excessive thickness and improve the overall performance of the battery.
[0062] In some embodiments, in the thickness direction of the silicon interface layer, the oxygen content of the silicon interface layer near the metal layer is lower than the oxygen content away from the metal layer.
[0063] The oxygen content at different locations in the silicon interface layer can be measured using a combination of scanning electron microscopy (SEM) and energy dispersive spectroscopy (EDS). For example, a cross-sectional image along the thickness direction of the electrode is obtained using an SEM, and the relative distribution of oxygen at different locations in the negative electrode is measured using the line scan, area scan, or point scan modules of the EDS, thereby determining the oxygen content at different locations in the negative electrode.
[0064] In the thickness direction of the silicon interface layer, the oxygen content near the metal layer is lower than that far from the metal layer, which is beneficial to leveraging the characteristics of different materials and achieving a comprehensive improvement in battery cycle stability and capacity.
[0065] In some implementations, such as Figure 2 As shown, in the negative electrode 6-1, in the silicon interface layer thickness direction from near the metal layer 61 to away from the metal layer 61, the silicon interface layer 62-1 sequentially includes a silicon layer 621 and a silicon oxide layer 622. The silicon layer 621 includes elemental silicon, and the silicon oxide layer 622 includes silicon oxide with the general formula SiO2. x The material is given by , where 0 < x < 2.
[0066] In some implementations, elemental silicon includes crystalline silicon and amorphous silicon.
[0067] Crystalline silicon includes monocrystalline silicon and polycrystalline silicon. The atomic arrangement of crystalline silicon is similar to that of diamond, forming a long-range ordered structure. Amorphous silicon is composed of atoms with short-range order and long-range disorder, and the bonding between atoms is very similar to that of crystalline silicon, forming a covalent random network structure.
[0068] The irreversible Li4SiO4 formed by the silicon oxide layer 622 during battery cycling not only inhibits lithium dendrite growth but also effectively solves the problem of high expansion rate of elemental silicon, giving full play to the high capacity characteristics of elemental silicon, so that the battery has a higher capacity level while having high cycle performance.
[0069] In some implementations, such as Figure 3 As shown, in the negative electrode 6-2, in the silicon interface layer thickness direction from near the metal layer 61 to away from the metal layer 61, the silicon interface layer 62-2 sequentially includes a silicon oxide layer 622 and a silicon dioxide layer 623. The silicon oxide layer 622 includes silicon oxide with the general formula SiO2. x The material is given by , where 0 < x < 2.
[0070] In some embodiments, the silicon dioxide layer 623 comprises silicon dioxide.
[0071] Compared to silicon-oxygen materials, the silicon dioxide layer 623 can effectively suppress lithium dendrite growth even at a low thickness. Depositing the silicon dioxide layer 623 on the silicon-oxygen layer 622 allows full utilization of the surface porosity of the silicon-oxygen layer 622. Compared to directly depositing the silicon dioxide layer 623 on the metal layer 61, the surface porosity of the silicon-oxygen layer 622 allows for a decrease in the density of the silicon dioxide layer 623. This suppresses dendrite growth while reducing the significant decrease in conductivity caused by excessive density of the silicon dioxide layer 623, thus improving battery cycle stability without causing a significant drop in battery capacity.
[0072] In some implementations, such as Figure 4 As shown, in the negative electrode 6-3, in the silicon interface layer thickness direction from near the metal layer 61 to away from the metal layer 61, the silicon interface layer 62-3 sequentially includes a silicon layer 621, a silicon oxide layer 622, and a silicon dioxide layer 623. The silicon layer 621 includes elemental silicon, and the silicon oxide layer 622 includes silicon dioxide of the general formula SiO2. x The material is given by , where 0 < x < 2.
[0073] The stacked arrangement of silicon layer 621, silicon oxide layer 622 and silicon dioxide layer 623 can not only give full play to the advantages of each layer, but also achieve a comprehensive improvement in battery cycle stability and capacity level through the mutual cooperation of each layer.
[0074] In some embodiments, the silicon interface layer 62 sequentially comprises a SiOx1 layer, a SiOx2 layer, ..., a SiOx layer in the direction of thickness from near the metal layer 61 to away from the metal layer 61. n Layers, where 0 < x1 < x2 < ... < x n<2, n≥2. It is understandable that the oxygen content in silicon-oxygen materials can vary continuously or increase in stages. The silicon interface layer 62 has a high silicon content near the metal layer 61, which fully utilizes the material's high capacity; the oxygen content is high further away from the metal layer 61, increasing the negative electrode potential and increasing the content of generated Li4SiO4, which helps suppress dendrite growth.
[0075] In some implementations, such as Figure 5 As shown, in the negative electrode 6-4, in the silicon interface layer thickness direction from near the metal layer 61 to away from the metal layer 61, the silicon interface layer 62-4 sequentially includes a silicon layer 621, a SiOx1 layer 6221, a SiOx2 layer 6222 and a silicon dioxide layer 623. The silicon layer 621 includes elemental silicon, where 0 < x1 < x2 < 2.
[0076] In some implementations, the ratio of the thickness of the silicon layer to the thickness of the silicon oxide layer is 4-15.
[0077] In some embodiments, the ratio of the thickness of the silicon layer to the thickness of the silicon oxide layer can be selected as 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 or any value between them.
[0078] Controlling the ratio of silicon layer thickness to silicon oxide layer thickness within the above range can improve battery capacity while suppressing lithium dendrite growth and silicon material expansion through the high modulus of silicon oxide layer, thereby improving battery cycle stability and electrochemical performance.
[0079] In some implementations, the thickness of the silicon layer is 10nm-100nm.
[0080] In some implementations, the thickness of the silicon layer can be selected as 10nm, 20nm, 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, 90nm, 100nm or any value between them.
[0081] By controlling the thickness of the silicon layer within this range, the high capacity of elemental silicon can be fully utilized, and the negative impact of elemental silicon expansion on battery cycle performance can be reduced.
[0082] In some implementations, the thickness of the silicon oxide layer is 25nm-150nm.
[0083] In some embodiments, the thickness of the silicon oxide layer can be selected as 25nm, 30nm, 40nm, 50nm, 60nm, 70nm, 80nm, 90nm, 100nm, 110nm, 120nm, 130nm, 140nm, 150nm, 160nm, 170nm, 180nm, 190nm, 200nm or any value between these values.
[0084] By controlling the thickness of the silicon oxide layer within this range, dendrites can be effectively suppressed without sacrificing capacity, and the negative impact on lithium-ion conduction in the negative electrode can be minimized.
[0085] In some implementations, the thickness of the silicon dioxide layer is 1 nm to 10 nm.
[0086] In some embodiments, the thickness of the silicon dioxide layer is 1 nm, 2 nm, 3 nm, 4 nm, 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, 10 nm or any value between these values.
[0087] By controlling the thickness of the silicon dioxide layer within this range, dendrites can be effectively suppressed without having too many negative impacts on battery capacity and lithium-ion conduction in the negative electrode.
[0088] In some embodiments, the silicon interface layer is prepared by at least one of chemical vapor deposition, atomic layer deposition, vapor deposition, and magnetron sputtering.
[0089] Chemical vapor deposition (CVD) is a chemical vapor phase reaction growth method. Under different temperature fields and vacuum levels, a reaction source gas containing compounds or elements that constitute the thin film material is introduced into a reaction chamber containing a metal layer. Decomposition, desorption, and combination reactions occur at the interface between the metal layer and the gas phase, generating new solid substances that are deposited on the metal layer surface, forming a uniform thin film. By controlling parameters such as reaction temperature, composition, concentration, and pressure of the reaction source gas, the microstructure and composition of the thin film can be easily controlled, altering its mechanical and chemical properties to meet the performance requirements of the electrode under different conditions. CVD methods include, but are not limited to, electron cyclotron resonant microwave, plasma chemical vapor deposition, hot-filament plasma chemical vapor deposition, and radio frequency plasma chemical vapor deposition.
[0090] Atomic layer deposition (ALD) is a method that deposits materials onto a substrate surface layer by layer in the form of single-atom films.
[0091] Evaporation deposition refers to a method of heating the raw material to be deposited in an evaporation container, causing its atoms or molecules to vaporize and escape from the surface, forming a vapor stream that is incident on the surface of the material to be deposited, and condenses to form a solid film.
[0092] Magnetron sputtering is a physical coating method that uses DC diode sputtering under the control of a magnetic field.
[0093] A second aspect of this application provides a method for preparing a negative electrode sheet, the method comprising: depositing a silicon interface layer on at least one side of a metal layer to prepare the negative electrode sheet, the silicon interface layer comprising a silicon oxide layer having the general formula SiO₂. x The material is given by , where 0 ≤ x ≤ 2.
[0094] In some embodiments, the preparation method includes: introducing a gas containing a silicon source or a mixed gas containing an oxygen source and a silicon source, and preparing a silicon interface layer by chemical vapor deposition; optionally, the oxygen source includes N2O and the silicon source includes SiH4.
[0095] In some implementations, only a silicon source is introduced during the preparation of the silicon interface layer, and the volumetric flow rate ratio M of the oxygen source to the silicon source is 0, in order to prepare the silicon layer.
[0096] In some embodiments, the volumetric flow rate ratio M of the introduced oxygen source to silicon source is 0 < M < 20 to prepare a silicon-oxygen layer, wherein the silicon-oxygen layer comprises materials with the general formula SiO. x The material is given by , where 0 < x < 2.
[0097] In some embodiments, the volumetric flow rate ratio M of the introduced oxygen source to silicon source is greater than 20 to prepare a silicon dioxide layer.
[0098] Chemical vapor deposition (CVD) is used to prepare silicon interface layers. By adjusting the flow rates of the oxygen and silicon sources, the composition of the silicon interface layer can be controlled, resulting in higher cell fabrication efficiency. Compared to other preparation methods, the flow rates of the input materials are controllable, making it easier to precisely control the composition and thickness of the silicon interface layer.
[0099] In some embodiments, the preparation method includes: the volumetric flow rate ratio M of the introduced oxygen source to silicon source is 0 < M < 20, and the silicon interface layer includes a material with the general formula SiOx, where 0 < x < 2.
[0100] In some embodiments, the oxygen source to silicon source inlet ratio M is increased during the silicon interface layer preparation process, such that the oxygen content of the silicon interface layer near the metal layer is lower than the oxygen content away from the metal layer in the thickness direction of the silicon interface layer.
[0101] It is understandable that the ratio M of oxygen source to silicon source can be continuously increased to deposit a silicon interface layer with continuously changing composition; the ratio M of oxygen source to silicon source can also be increased in stages to give a certain thickness to a material with a fixed composition.
[0102] In some embodiments, the preparation method includes: introducing a silicon source for deposition; and after deposition for a period of time, introducing an oxygen source and a silicon source for deposition, wherein the volumetric flow rate ratio M of the oxygen source and the silicon source is 0 < M < 20.
[0103] In some embodiments, the preparation method includes: introducing an oxygen source and a silicon source for deposition, wherein the volumetric flow rate ratio M of the oxygen source and the silicon source is 0 < M < 20; and after deposition for a period of time, increasing the volumetric flow rate ratio M of the oxygen source and the silicon source to not less than 20 for further deposition.
[0104] In some embodiments, the preparation method includes: introducing a silicon source for deposition; after deposition for a period of time, introducing an oxygen source and a silicon source for deposition, wherein the volumetric flow rate ratio M of the oxygen source and the silicon source is 0 < M < 20; and after deposition for a period of time, increasing the ratio M of the oxygen source and the silicon source to greater than 20 for deposition.
[0105] In some embodiments, during the deposition process involving the introduction of oxygen and silicon sources, the volumetric flow rate ratio M of the oxygen and silicon sources is gradually increased to prepare multilayer SiO with different x values. x layer.
[0106] Chemical vapor deposition (CVD) can efficiently prepare silicon interface layers with different buffer potentials in a one-step process. By increasing the negative electrode potential, the probability of dendrite formation is reduced. At the same time, by adjusting the composition of the silicon interface layer, its mechanical strength is adjusted, further suppressing dendrite growth. It can also simultaneously deposit high-specific-capacity negative electrode materials, improving battery cycle performance while taking into account the battery's electrochemical performance.
[0107] [Positive electrode plate] The positive electrode includes a positive current collector and a positive electrode film layer disposed on at least one surface of the positive current collector, the positive electrode film layer including the positive electrode active material of the first aspect of this application.
[0108] As an example, the positive current collector has two surfaces opposite each other in its own thickness direction, and the positive electrode film layer is disposed on either or both of the two opposite surfaces of the positive current collector.
[0109] In some embodiments, the positive current collector may be a metal foil or a composite current collector. For example, aluminum foil may be used as the metal foil. The composite current collector may include a polymer substrate and a metal layer formed on at least one surface of the polymer substrate. The composite current collector may be formed by forming a metal material (aluminum, aluminum alloy, nickel, nickel alloy, titanium, titanium alloy, silver and silver alloy, etc.) on a polymer substrate (such as a substrate of polypropylene (PP), polyethylene terephthalate (PET), polybutylene terephthalate (PBT), polystyrene (PS), polyethylene (PE), etc.).
[0110] In some embodiments, the positive electrode active material may be a known battery positive electrode active material. As an example, the positive electrode active material may include at least one of the following materials: lithium phosphates with an olivine structure, lithium transition metal oxides, and their respective modified compounds. However, this application is not limited to these materials, and other conventional materials that can be used as battery positive electrode active materials may also be used. These positive electrode active materials may be used alone or in combination of two or more. Examples of lithium transition metal oxides include, but are not limited to, lithium cobalt oxides (such as LiCoO2), lithium nickel oxides (such as LiNiO2), lithium manganese oxides (such as LiMnO2, LiMn2O4), lithium nickel cobalt oxides, lithium manganese cobalt oxides, lithium nickel manganese oxides, and lithium nickel cobalt manganese oxides (such as LiNi). 1 / 3 Co 1 / 3 Mn 1 / 3 O2 (also known as NCM) 333 LiNi 0.5 Co 0.2 Mn 0.3 O2 (also known as NCM) 523 LiNi 0.5 Co 0.25 Mn 0.25 O2 (also known as NCM) 211 LiNi 0.6 Co 0.2 Mn 0.2 O2 (also known as NCM) 622 LiNi 0.8 Co 0.1 Mn 0.1 O2 (also known as NCM) 811 ), lithium nickel cobalt aluminum oxide (such as LiNi) 0.85 Co 0.15 Al 0.05 At least one of O2 and its modified compounds. Examples of lithium phosphates with an olivine structure include, but are not limited to, lithium iron phosphate (such as LiFePO4 (also referred to as LFP)), lithium iron phosphate and carbon composites, lithium manganese phosphate (such as LiMnPO4), lithium manganese phosphate and carbon composites, lithium manganese iron phosphate, and lithium manganese iron phosphate and carbon composites.
[0111] In some embodiments, the positive electrode film layer may optionally include a binder. As an example, the binder may include at least one selected from polyvinylidene fluoride (PVDF), polytetrafluoroethylene (PTFE), PVDF-tetrafluoroethylene-propylene terpolymer, PVDF-hexafluoropropylene-tetrafluoroethylene terpolymer, tetrafluoroethylene-hexafluoropropylene copolymer, and fluorinated acrylate resin.
[0112] In some embodiments, the positive electrode film may optionally include a conductive agent. As an example, the conductive agent may include at least one selected from superconducting carbon, acetylene black, carbon black, Ketjen black, carbon dots, carbon nanotubes, graphene, and carbon nanofibers.
[0113] In some embodiments, the positive electrode sheet can be prepared by dispersing the above-mentioned components for preparing the positive electrode sheet, such as positive active material, conductive agent, binder and any other components, in a solvent (e.g., N-methylpyrrolidone) to form a positive electrode slurry; coating the positive electrode slurry onto the positive electrode current collector, and then obtaining the positive electrode sheet after drying, cold pressing and other processes.
[0114] [Electrolytes] The electrolyte acts as a conductor of ions between the positive and negative electrodes. This application does not impose specific restrictions on the type of electrolyte; it can be selected according to requirements. For example, the electrolyte can be liquid, gel, or entirely solid.
[0115] In some embodiments, the electrolyte is an electrolyte solution. The electrolyte solution includes an electrolyte salt and a solvent.
[0116] In some embodiments, the electrolyte salt may be selected from at least one of lithium hexafluorophosphate, lithium tetrafluoroborate, lithium perchlorate, lithium hexafluoroarsenate, lithium bis(fluorosulfonyl)imide, lithium bis(trifluoromethanesulfonyl)imide, lithium trifluoromethanesulfonate, lithium difluorophosphate, lithium difluorooxalate borate, lithium dioxalate borate, lithium difluorodioxalate phosphate, and lithium tetrafluorooxalate phosphate.
[0117] In some embodiments, the solvent may be selected from at least one of ethylene carbonate, propylene carbonate, methyl ethyl carbonate, diethyl carbonate, dimethyl carbonate, dipropyl carbonate, methyl propyl carbonate, ethyl propyl carbonate, butyl carbonate, fluoroethylene carbonate, methyl formate, methyl acetate, ethyl acetate, propyl acetate, methyl propionate, ethyl propionate, propyl propionate, methyl butyrate, ethyl butyrate, 1,4-butyrolactone, sulfolane, dimethyl sulfone, methyl ethyl sulfone, and diethyl sulfone.
[0118] In some embodiments, the electrolyte may optionally include additives. For example, additives may include negative electrode film-forming additives, positive electrode film-forming additives, and may also include additives that can improve certain battery performance, such as additives that improve battery overcharge performance, additives that improve battery high-temperature or low-temperature performance, etc.
[0119] [Isolation membrane] In some embodiments, the secondary battery also includes a separator. This application does not impose any particular limitation on the type of separator; any known porous separator with good chemical and mechanical stability can be selected.
[0120] In some embodiments, the material of the separator can be selected from at least one of glass fiber, nonwoven fabric, polyethylene, polypropylene, and polyvinylidene fluoride. The separator can be a single-layer film or a multi-layer composite film, without particular limitation. When the separator is a multi-layer composite film, the materials of each layer can be the same or different, without particular limitation.
[0121] In some implementations, the positive electrode, negative electrode, and separator can be fabricated into an electrode assembly using a winding or stacking process.
[0122] A second aspect of this application provides a secondary battery, including a negative electrode sheet of any embodiment and / or a negative electrode sheet prepared by any embodiment of the preparation method.
[0123] In some embodiments, the secondary battery includes an electrolyte, and the silicon interface layer is located between the electrolyte and the metal layer.
[0124] In some embodiments, the secondary battery may include an outer packaging. This outer packaging may be used to encapsulate the electrode assembly and electrolyte described above.
[0125] In some embodiments, the outer packaging of the secondary battery can be a hard shell, such as a hard plastic shell, an aluminum shell, or a steel shell. The outer packaging of the secondary battery can also be a soft pack, such as a pouch. The material of the soft pack can be plastic; examples of plastics include polypropylene, polybutylene terephthalate, and polybutylene succinate.
[0126] This application does not impose any particular limitation on the shape of the secondary battery; it can be cylindrical, square, or any other arbitrary shape. For example, Figure 6 This is an example of a square-structured secondary battery 5.
[0127] In some implementations, refer to Figure 7 The outer packaging may include a housing 51 and a cover 53. The housing 51 may include a base plate and side plates connected to the base plate, the base plate and side plates forming a receiving cavity. The housing 51 has an opening communicating with the receiving cavity, and the cover 53 can be placed over the opening to close the receiving cavity. A positive electrode, a negative electrode, and a separator can be formed into an electrode assembly 52 using a winding or stacking process. The electrode assembly 52 is encapsulated within the receiving cavity. Electrolyte is immersed in the electrode assembly 52. The secondary battery 5 may contain one or more electrode assemblies 52, which can be selected by those skilled in the art according to specific practical needs.
[0128] In addition, this application also provides an electrical device, which includes at least one of the secondary battery, battery module, or battery pack provided in this application. The secondary battery, battery module, or battery pack can be used as a power source for the electrical device, or as an energy storage unit for the electrical device. The electrical device may include, but is not limited to, mobile devices (e.g., mobile phones, laptops, etc.), electric vehicles (e.g., pure electric vehicles, hybrid electric vehicles, plug-in hybrid electric vehicles, electric bicycles, electric scooters, electric golf carts, electric trucks, etc.), electric trains, ships and satellites, energy storage systems, etc.
[0129] As the electrical device, a secondary battery, battery module, or battery pack can be selected according to its usage requirements.
[0130] Figure 8 This is an example of an electrical device. The electrical device could be a pure electric vehicle, a hybrid electric vehicle, or a plug-in hybrid electric vehicle, etc.
[0131] Another example device could be a mobile phone, tablet, or laptop. These devices typically require a slim and lightweight design and can use a rechargeable battery as their power source.
[0132] Example The following describes embodiments of this application. The embodiments described below are exemplary and are only used to explain this application, and should not be construed as limiting this application. Where specific techniques or conditions are not specified in the embodiments, they are performed according to the techniques or conditions described in the literature in this field or according to the product instructions. Reagents or instruments used, unless otherwise specified, are all conventional products that can be obtained commercially.
[0133] I. Preparation Method Example 1 1) Preparation of positive electrode sheet The positive electrode active material is lithium nickel cobalt manganese oxide, the binder is polyvinylidene fluoride (PVDF), and the conductive agent is conductive carbon black (Super fluoride). P) According to the mass ratio of 96%:2%:2% in N A positive electrode slurry was prepared by uniformly mixing the materials in a methylpyrrolidone (NMP) solvent. This slurry was then coated onto an aluminum foil surface using an extrusion coating machine according to the required unit area mass of the positive electrode active material. After drying, the coated electrode sheet was cold-pressed using a cold press to obtain the final positive electrode sheet. The areal density of the positive electrode film was 0.224 g / 1540.25 mm². 2 .
[0134] 2) Preparation of negative electrode sheet A silicon interface layer was prepared on a 20µm thick lithium metal layer using plasma-enhanced chemical vapor deposition (PECVD) to serve as the negative electrode.
[0135] Ar, SiH4, and N2O were introduced to perform chemical vapor deposition on a lithium metal layer, with a N2O to SiH4 volumetric flow rate ratio of 1:2, a deposition time of 1.25 min, a thickness of 25 nm, and a silicon-oxygen layer containing SiOx with a value of 1.
[0136] 3) Preparation of electrolyte In an argon atmosphere glove box with a water content of <10ppm, ethylene carbonate (EC), carbonate (PC), and dimethyl carbonate (DMC) were mixed in a mass ratio of EC:PC:DMC=3:3:3. Then, LiPF6 was added to the mixed organic solvent and stirred until homogeneous to obtain an electrolyte. The concentration of LiPF6 in the electrolyte was 1mol / L.
[0137] 4) Separating membrane Polyethylene film (PE diaphragm) is used as the separation membrane.
[0138] 5) Battery manufacturing The positive electrode, separator, and negative electrode are stacked in sequence, with the separator positioned between the positive and negative electrodes to provide isolation. They are then wound to obtain a bare cell. The bare cell is placed in an outer package, infused with prepared electrolyte, and sealed for formation to obtain a lithium-ion battery.
[0139] The preparation method of Example 2 is similar to that of Example 1, except that the preparation method of the negative electrode sheet in Example 2 is as follows: Ar, SiH4, and N2O were introduced to perform chemical vapor deposition on a lithium metal layer, with a N2O to SiH4 volumetric flow rate ratio of 1:2, a deposition time of 2.5 min, a thickness of 50 nm, and a silicon-oxygen layer containing SiOx with a value of 1.
[0140] The preparation method of Example 3 is similar to that of Example 1, except that the preparation method of the negative electrode sheet in Example 3 is as follows: Ar, SiH4, and N2O were introduced to perform chemical vapor deposition on a lithium metal layer, with a N2O to SiH4 volumetric flow rate ratio of 1:2, a deposition time of 7.5 min, a thickness of 150 nm, and a silicon-oxygen layer containing SiOx with an x value of 1.
[0141] The preparation method of Example 4 is similar to that of Example 1, except that the preparation method of the negative electrode sheet in Example 4 is as follows: A silicon interface layer was prepared on a 20µm thick lithium metal layer using plasma-enhanced chemical vapor deposition (PECVD) to serve as the negative electrode.
[0142] Ar, SiH4, and N2O were introduced to deposit on a lithium metal layer, with a volumetric flow rate ratio of N2O to SiH4 of 1:2, a deposition time of 10 min, and a thickness of 200 nm.
[0143] The preparation method of Example 5 is similar to that of Example 1, except that the preparation method of the negative electrode sheet in Example 5 is as follows: A silicon interface layer was prepared on a 20µm thick lithium metal layer using plasma-enhanced chemical vapor deposition (PECVD) to serve as the negative electrode.
[0144] Ar, SiH4, and N2O were introduced to deposit on a lithium metal layer, with a volumetric flow rate ratio of N2O to SiH4 of 1:2, a deposition time of 50 min, and a thickness of 1000 nm.
[0145] The preparation method of Example 6 is similar to that of Example 1, except that the preparation method of the negative electrode sheet in Example 6 is as follows: A silicon interface layer was prepared on a 20µm thick lithium metal layer using plasma-enhanced chemical vapor deposition (PECVD) to serve as the negative electrode.
[0146] Ar, SiH4, and N2O were introduced to deposit on a lithium metal layer, with a gas flow rate ratio of N2O to SiH4 of 20:1, a deposition time of 0.5 min, a thickness of 5 nm, and the deposited material included silicon dioxide.
[0147] The preparation method of Example 7 is similar to that of Example 1, except that the preparation method of the negative electrode sheet in Example 7 is as follows: A silicon interface layer was prepared on a 20µm thick lithium metal layer using plasma-enhanced chemical vapor deposition (PECVD) to serve as the negative electrode.
[0148] Ar, SiH4, and N2O were introduced to deposit a lithium metal layer, with the N2O to SiH4 gas flow rate ratio of 1:2, the deposition time of 7.5 min, the thickness of 150 nm, and the x value of 1. Increase the N2O gas flow rate so that the N2O to SiH4 gas flow rate ratio is 20:1, the deposition time is 0.5 min, the thickness is 5 nm, and the deposit includes silicon dioxide.
[0149] The preparation method of Example 8 is similar to that of Example 1, except that the preparation method of the negative electrode sheet in Example 8 is as follows: A silicon interface layer was prepared on a 20µm thick lithium metal layer using plasma-enhanced chemical vapor deposition (PECVD) to serve as the negative electrode.
[0150] In the initial deposition stage, only SiH4 and Ar are introduced. The amorphous Si film is directly deposited on the lithium metal anode by the dissociation of SiH4 by plasma in high vacuum. The deposition time is 1 min and the thickness is 10 nm. Ar, SiH4, and N2O were introduced to deposit a lithium metal layer, with a N2O to SiH4 gas flow rate ratio of 1:2, a deposition time of 7.5 min, and a thickness of 150 nm. The deposited SiO2... x Material, x value is 1; Increase the N2O gas flow rate so that the N2O to SiH4 gas flow rate ratio is 20:1, the deposition time is 0.5 min, the deposited layer is a silicon dioxide layer, and the deposition thickness is 5 nm.
[0151] The preparation method of Example 9 is similar to that of Example 1, except that the preparation method of the negative electrode sheet in Example 9 is as follows: A silicon interface layer was prepared on a 20µm thick lithium metal layer using plasma-enhanced chemical vapor deposition (PECVD) to serve as the negative electrode.
[0152] In the initial deposition stage, only SiH4 and Ar are introduced. The amorphous Si film is directly deposited on the lithium metal anode by the dissociation of SiH4 by plasma in high vacuum. The deposition time is 1 min and the thickness is 10 nm. Continue introducing Ar, SiH4, and N2O for deposition. The N2O to SiH4 volumetric flow rate ratio is 1:2, and deposition lasts for 1 minute. Then, the N2O flow rate is increased to a 2:1 ratio, and deposition continues for 1 minute. Next, the N2O flow rate is increased to a 5:1 ratio, and deposition continues for 1 minute. Then, the N2O flow rate is increased to an 8:1 ratio, and deposition continues for 1 minute. Finally, the N2O flow rate is increased to a 11:1 ratio, and deposition continues for 1 minute. Next, the N2O flow rate is increased to a 14:1 ratio, and deposition continues for 1 minute. Finally, the N2O flow rate is increased to a 17:1 ratio, and deposition continues for 1 minute. Finally, the N2O flow rate is increased to an 18:1 ratio, and deposition continues for 0.5 minutes.
[0153] Increase the N2O gas flow rate so that the N2O to SiH4 gas flow rate ratio is 20:1, and the deposition time is 0.5 min.
[0154] The preparation method of Example 10 is similar to that of Example 1, except that the preparation method of the negative electrode sheet in Example 10 is as follows: A silicon interface layer was prepared on a 20µm thick lithium metal layer using plasma-enhanced chemical vapor deposition (PECVD) to serve as the negative electrode.
[0155] Ar, SiH4, and N2O were introduced for deposition, with the N2O to SiH4 gas flow rate ratio being 1:2 and the deposition time being 2.5 min. A 50 nm SiOx thin film was prepared on the upper layer, with X being 1. Increase the gas flow rate of N2O to make the gas flow ratio of N2O to SiH4 greater than 20:1, ensuring that the generated material is SiO2, the deposition time is 0.5 min, and the outermost layer is deposited as a 5 nm SiO2 thin film.
[0156] The preparation method of Example 11 is similar to that of Example 1, except that the preparation method of the negative electrode sheet in Example 11 is as follows: A silicon interface layer was prepared on a 20µm thick lithium metal layer using plasma-enhanced chemical vapor deposition (PECVD) to serve as the negative electrode.
[0157] In the initial deposition stage, only SiH4 and Ar are introduced. The amorphous Si film is directly deposited on the lithium metal anode by the dissociation of SiH4 by plasma in high vacuum. The deposition time is 10 min and the thickness is 100 nm. Ar, SiH4, and N2O were introduced to deposit a lithium metal layer, with a N2O to SiH4 gas flow rate ratio of 1:2, a deposition time of 2.5 min, and a thickness of 50 nm. The deposited SiO2... x Material, x value is 1; Increase the N2O gas flow rate so that the N2O to SiH4 gas flow rate ratio is 20:1, the deposition time is 0.5 min, the deposited layer is a silicon dioxide layer, and the deposition thickness is 5 nm.
[0158] The preparation method of Example 12 is similar to that of Example 1, except that the preparation method of the negative electrode sheet in Example 12 is as follows: A silicon interface layer was prepared on a 20µm thick lithium metal layer using plasma-enhanced chemical vapor deposition (PECVD) to serve as the negative electrode.
[0159] In the initial deposition stage, only SiH4 and Ar are introduced. The amorphous Si film is directly deposited on the lithium metal anode by the dissociation of SiH4 by plasma in high vacuum. The deposition time is 10 min and the thickness is 100 nm. Ar, SiH4, and N2O were introduced to deposit a lithium metal layer, with a N2O to SiH4 gas flow rate ratio of 1:2, a deposition time of 2.5 min, and a thickness of 50 nm. The deposited SiO2... x Material, x value is 1.
[0160] Comparative Example 1 In Comparative Example 1, a lithium metal layer was used as the negative electrode, and other aspects were the same as in Example 1. The specific capacity of the negative electrode in this battery was 3860 mAh / g.
[0161] II. Testing Methods 1) Capacity retention rate during room temperature cycling At 25°C, the lithium-ion secondary battery was first charged at a constant current of 1C (the current value required to completely discharge the theoretical capacity within 1 hour) to a voltage of 3.65V, then charged at a constant voltage of 3.65V to a current of 0.05C. After resting for 5 minutes, the lithium-ion secondary battery was discharged at a constant current of 1C to a voltage of 2.5V. This constitutes one charge-discharge cycle, and the discharge capacity of this cycle is the discharge capacity of the first cycle. The lithium-ion secondary battery was subjected to multiple charge-discharge cycles using the above method, and the discharge capacity of the 500th cycle was measured.
[0162] The capacity retention rate of a lithium secondary battery after 500 cycles = (discharge capacity of the 500th cycle / discharge capacity of the first cycle) × 100%.
[0163] 2) Negative electrode potential The test method for the negative electrode potential is referenced in CN115825765A. A brief test method includes: Prepare a reference electrode.
[0164] The copper wire was soaked in concentrated sulfuric acid for 50 minutes, then rinsed three times with deionized water, and finally rinsed three times with ethanol and dried to remove the oxide layer on the surface of the copper wire. The oxide layer was then observed under a CCD to determine if it had been completely removed. If not, the process was repeated until the oxide layer was completely removed. The diameter of the copper wire was approximately 6 micrometers (μm).
[0165] Preparation of three electrodes The materials prepared in the above steps are assembled into a stacked battery in the following order: positive electrode, separator, negative electrode, separator, reference electrode, separator, and positive electrode.
[0166] Lithium plating of the reference electrode Connect the positive electrode of the battery to the reference electrode and charge the battery with a current of 20 microamps (μA) for two hours to deposit lithium on the side of the reference electrode closest to the positive electrode. Similarly, connect the negative electrode of the battery to the reference electrode and charge the battery with a current of 20 μA for two hours to deposit lithium on the side of the reference electrode closest to the negative electrode. The entire lithium plating process is now complete.
[0167] Verification of three electrodes Use a multimeter to measure the positive and negative electrode voltages V1, the positive electrode voltage V2 and the reference electrode voltage V3. If V1 = V2 + V3, the three electrodes of the cell are normal and the next test can be performed. Otherwise, the three electrodes should be remade.
[0168] Monitor the first potential of the negative electrode and the second potential of the reference electrode.
[0169] During the charging and discharging process of the battery, the first potential of the negative electrode and the second potential of the reference electrode are monitored. At 25 degrees Celsius (°C), the cell is charged to 4.2V at a constant current of 1 / 3C, left to stand for 5 minutes, and then discharged to 2.8V at 1 / 3C. During this process, the first potential of the negative electrode and the second potential of the reference electrode are detected in real time, thereby realizing real-time monitoring of the negative electrode potential of the cell.
[0170] 3) Negative electrode specific capacity test The prepared lithium metal anode was punched to a 14mm sheet in a glove box. The water and oxygen content in the glove box was less than 0.5ppm. A CR2025 positive electrode shell was used to assemble coin cells. After the successfully assembled coin cells were allowed to stand for 24 hours, a Newway testing platform was used, with the charge / discharge voltage range set to 2.5V-4.2V and the test temperature controlled at 25℃. The theoretical specific capacity was set to 3860mAh / g. Then, the cells were discharged at 0.05C to 2.5V, allowed to stand for 5 minutes, charged at 0.05C to 4.2V, and then charged at a constant voltage until the current cutoff was 0.01C. After standing for 30 minutes, the cells were discharged at 0.05C to 2.5V. The capacity at this step is the battery capacity. Dividing this capacity by the mass of the anode active material gives the specific capacity of the anode.
[0171] III. Analysis of Test Results for Each Embodiment and Comparative Example Batteries for each embodiment and comparative example were prepared according to the above method, and various performance parameters were measured. The results are shown in Table 1 below.
[0172] Table 1
[0173] As can be seen from Examples 1-5, when the thickness of the silicon interface layer is 25 nm – 1000 nm, lithium metal has a higher negative electrode potential, which can suppress dendrite growth and further improve the cycle stability of the battery. When the thickness of the silicon interface layer is 50 nm – 200 nm, the battery simultaneously exhibits high cycle stability and specific capacity.
[0174] As can be seen from the comparison of Examples 3, 8-9 and Examples 2, 10-12, in the thickness direction of the silicon interface layer, the oxygen content of the silicon interface layer near the metal layer is lower than that far from the metal layer. Compared with the silicon interface layer containing a single component, it can further optimize the overall performance of the battery, including cycle stability and specific capacity.
[0175] As can be seen from the comparison between Example 9 and Example 8, the gradual change in the content of the silicon oxide layer can further improve the cycle stability and specific capacity of the battery.
[0176] It should be noted that this application is not limited to the above-described embodiments. The above embodiments are merely examples, and any embodiments with the same structure and effect as the technical concept within the scope of this application are included in the technical scope of this application. Furthermore, various modifications that can be conceived by those skilled in the art to the embodiments, and other ways of constructing by combining some of the constituent elements of the embodiments, without departing from the spirit of this application, are also included in the scope of this application.
Claims
1. A negative electrode sheet, characterized in that, It includes a metal layer and a silicon interface layer located on at least one side of the metal layer, the silicon interface layer comprising a silicon of the general formula SiO. x The material, wherein 0≤x≤2, has an oxygen content in the silicon interface layer near the metal layer that is lower than the oxygen content away from the metal layer in the thickness direction of the silicon interface layer.
2. The negative electrode sheet according to claim 1, characterized in that, The silicon interface layer comprises SiO₂. x The material is 0 < x < 2, and can be selected as 0.7 < x < 1.
5.
3. The negative electrode sheet according to claim 1 or 2, characterized in that, The thickness of the silicon interface layer is 25 nm – 1000 nm.
4. The negative electrode sheet according to any one of claims 1 to 3, characterized in that, The thickness of the silicon interface layer is 50 nm-200 nm.
5. The negative electrode sheet according to any one of claims 1 to 4, characterized in that, Along the thickness direction of the silicon interface layer from near the metal layer to away from the metal layer, the silicon interface layer sequentially comprises a silicon layer and a silicon-oxygen layer, the silicon layer comprising elemental silicon, and the silicon-oxygen layer comprising silicon of the general formula SiO. x The material is given by , where 0 < x < 2.
6. The negative electrode sheet according to any one of claims 1 to 4, characterized in that, Along the thickness direction of the silicon interface layer from near the metal layer to away from the metal layer, the silicon interface layer sequentially comprises a silicon oxide layer and a silicon dioxide layer, wherein the silicon oxide layer comprises silicon oxide with the general formula SiO. x The material is given by , where 0 < x < 2.
7. The negative electrode sheet according to any one of claims 1 to 4, characterized in that, Along the thickness direction of the silicon interface layer from near the metal layer to away from the metal layer, the silicon interface layer sequentially comprises a silicon layer, a silicon oxide layer, and a silicon dioxide layer. The silicon layer comprises amorphous silicon, and the silicon oxide layer comprises silicon dioxide of the general formula SiO. x The material is given by , where 0 < x < 2.
8. The negative electrode sheet according to any one of claims 1 to 7, characterized in that, Along the thickness direction of the silicon interface layer from near the metal layer to far away from the metal layer, the silicon interface layer sequentially includes a SiOx1 layer, a SiOx2 layer, ..., a SiOx layer. n Layers, where 0 < x1 < x2 < ... < x n <2, n≥2.
9. The negative electrode sheet according to any one of claims 1 to 8, characterized in that, The negative electrode sheet satisfies at least one of the following conditions: (i) The ratio of the thickness of the silicon oxide layer to the thickness of the silicon layer is 4-15; (ii) The thickness of the silicon layer is 10nm-100nm; (iii) The thickness of the silicon oxide layer is 25nm-150nm; (iv) The thickness of the silicon dioxide layer is 1 nm-10 nm.
10. The negative electrode sheet according to any one of claims 1 to 9, characterized in that, The metal layer includes at least one of lithium metal, lithium alloy, sodium metal, and sodium alloy.
11. The negative electrode sheet according to any one of claims 1 to 10, characterized in that, The silicon interface layer is prepared by at least one of chemical vapor deposition, atomic layer deposition, vapor deposition, and magnetron sputtering.
12. A method for preparing a negative electrode sheet according to claim 1, characterized in that, The preparation method includes: depositing a silicon interface layer on at least one side of the metal layer to prepare the negative electrode sheet, wherein the silicon interface layer comprises SiO₂. x The material is given by , where 0 ≤ x ≤ 2.
13. The preparation method according to claim 12, characterized in that, The preparation method includes: The silicon interface layer is prepared by chemical vapor deposition by introducing a gas containing a silicon source or a mixture of a gas containing an oxygen source and a silicon source; optionally, the oxygen source includes N2O and the silicon source includes SiH4.
14. The preparation method according to claim 13, characterized in that, The preparation method includes: The volumetric flow rate ratio M of the oxygen source and the silicon source is 0 < M < 20, and the silicon interface layer comprises a material with the general formula SiOx, where 0 < x < 2.
15. The preparation method according to any one of claims 13 or 14, characterized in that, During the preparation of the silicon interface layer, the ratio M of oxygen source to silicon source is increased, such that in the thickness direction of the silicon interface layer, the oxygen content near the metal layer is lower than the oxygen content away from the metal layer.
16. The preparation method according to any one of claims 12 to 15, characterized in that, The preparation method includes: Deposition is performed by introducing the silicon source; After a period of deposition, the oxygen source and the silicon source are introduced to continue deposition, wherein the volumetric flow rate ratio M of the oxygen source and the silicon source is 0 < M < 20.
17. The preparation method according to any one of claims 12 to 15, characterized in that, The preparation method includes: Deposition is performed by introducing the oxygen source and the silicon source, wherein the volumetric flow rate ratio M of the oxygen source and the silicon source is 0 < M < 20; After deposition for a period of time, the volumetric flow rate ratio M of the oxygen source and the silicon source is increased to not less than 20 for deposition.
18. The preparation method according to any one of claims 12 to 15, characterized in that, The preparation method includes: Deposition is performed by introducing the silicon source; After deposition for a period of time, the oxygen source and the silicon source are introduced to continue deposition, wherein the volumetric flow rate ratio M of the oxygen source and the silicon source is 0 < M < 20. After deposition for a period of time, the ratio M of the oxygen source and the silicon source is increased to not less than 20 for deposition.
19. The preparation method according to any one of claims 12 to 18, characterized in that, The preparation method includes: During the deposition process involving the introduction of the oxygen source and the silicon source, the volumetric flow rate ratio M of the oxygen source and the silicon source is gradually increased.
20. A secondary battery, characterized in that, Includes the negative electrode sheet according to any one of claims 1 to 12, and / or the negative electrode sheet prepared by the preparation method according to any one of claims 13 to 19.
21. The secondary battery according to claim 20, characterized in that, The secondary battery includes an electrolyte, and the silicon interface layer is located between the electrolyte and the metal layer.
22. An electrical appliance, characterized in that, Includes the secondary battery as described in claim 20 or 21.
Citation Information
Patent Citations
Battery cell lithium precipitation detection method and device and battery management system
CN115825765A