Chopper and dynamic element matched synchronous input rail-to-rail high impedance instrumentation amplifier

Abstract

The application proposes a chopping and dynamic element matching synchronous input rail-to-rail high-impedance instrument amplifier, adopts an AC coupling ripple rejection loop combined with a constant gain rail-to-rail input transconductance based on common mode detection architecture, a chopping and dynamic element matching synchronous SCPS method, reduces the influence of switch dynamic resistance on input impedance by synchronously controlling the switching logic of chopping switch and dynamic element, and simultaneously adopts an AC coupling ripple rejection loop RRL to offset the offset current generated by input transconductance and feedback transconductance, thereby effectively suppressing ripple voltage; the constant gain rail-to-rail input transconductance based on common mode detection is used to achieve rail-to-rail input and constant transconductance, thereby ensuring amplification precision; the application proposes an innovative architecture of "AC coupling ripple rejection loop + constant gain rail-to-rail input transconductance based on common mode detection", which, combined with SCPS technology, can realize the design of a chopping and dynamic element matching synchronous input rail-to-rail high-impedance instrument amplifier.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electronic instruments, in particular to a high-impedance instrument amplifier with synchronous chopping and dynamic element matching input rail-to-rail. BACKGROUND

[0002] An instrumentation amplifier (IA) is a core device in the field of high-precision signal sensing such as temperature and bioelectricity, and its performance directly determines the fidelity of signal acquisition. In view of the core requirements of low noise and low offset, the existing technical solutions have the following key bottlenecks:

[0003] (1) Input impedance limitation of chopping technology: The traditional chopping technology separates the signal and the low-frequency noise offset voltage through modulation-demodulation, which can effectively reduce the offset voltage and low-frequency noise interference. However, the periodic switching of the input stage chopping switch will introduce a dynamic resistance, which forms a parallel equivalent impedance with the input signal path, resulting in a significant decrease in the input impedance of the IA. Although the dynamic element matching technology is used to set the chopping frequency to an integer multiple of the dynamic element matching frequency to optimize the gain error, the input impedance improvement effect is limited to doubling the original basis, and there is a magnitude gap with the GΩ order input impedance required by high-impedance signal sources such as biosensors, resulting in impedance mismatch between the signal source and the amplifier, causing signal attenuation and distortion, and failing to meet the requirements of impedance matching for high-precision signal acquisition.

[0004] (2) Ripple suppression problem of SCPS technology: Synchronous chopping and port swapping (SCPS) technology can greatly improve the input impedance, but the output ripple of the IA needs to be suppressed. The traditional scheme suppresses the ripple by embedding a filter in the signal path, but this scheme has the following defects: 1) During the sampling stage of the filter, due to the discretization processing of the signal, noise folding phenomenon will be introduced, which causes low-frequency noise to be modulated into the signal bandwidth. 2) It will introduce a phase shift at the chopping frequency, and when this scheme is applied to a closed-loop feedback system, the phase shift superposition will reduce the system phase margin, which is easy to cause self-oscillation, resulting in unstable circuit, and a complex frequency compensation network needs to be designed additionally. 3) It is difficult to align the chopping frequency, and additional complex circuits are needed to keep the filter frequency and the chopping frequency consistent, otherwise the ripple suppression effect will be reduced.

[0005] The prior art cannot simultaneously meet the comprehensive performance requirements of IA for low noise, low mismatch, high input impedance and stable ripple suppression. Therefore, the application proposes a new type of input rail-to-rail high impedance instrument amplifier with chopping and dynamic element matching synchronization technology, which adopts an AC coupling ripple suppression loop to replace the filter to meet the ripple suppression requirement in the chopping and dynamic element matching synchronization technology, thereby simultaneously meeting the IA performance requirements of low noise, low mismatch and high input impedance. Further, in order to expand the input range of IA to expand its use scenarios, a constant gain rail-to-rail input transconductance based on common mode detection is introduced as the input stage and feedback stage of IA. SUMMARY

[0006] The application proposes an input rail-to-rail high impedance instrument amplifier with chopping and dynamic element matching synchronization, and proposes an innovative architecture of "AC coupling ripple suppression loop + constant gain rail-to-rail input transconductance based on common mode detection" to address the above-mentioned core defects of the prior art. The ripple suppression requirement brought by SCPS is met by relying on the RRL loop, and the rail-to-rail input and constant amplification accuracy are achieved with the help of the Const_GM unit, so that the design of the input rail-to-rail high impedance instrument amplifier with chopping and dynamic element matching synchronization can be realized.

[0007] The application adopts the following technical solutions.

[0008] The input rail-to-rail high impedance instrument amplifier with chopping and dynamic element matching synchronization adopts an AC coupling ripple suppression loop combined with a constant gain rail-to-rail input transconductance based on common mode detection architecture, and uses SCPS technology to realize input rail-to-rail chopping and dynamic element matching synchronization. Based on the chopping and dynamic element matching synchronization SCPS method, the switching logic of the chopping switch and the dynamic element is synchronously controlled to reduce the influence of the switching dynamic resistance on the input impedance, and the input impedance of the IA is improved to the GΩ order of magnitude to meet the impedance matching requirement of the high impedance signal source. At the same time, the AC coupling ripple suppression loop RRL is used to replace the traditional filter, the mismatch current generated by the input transconductance and the feedback transconductance is offset, the ripple voltage is effectively suppressed, and no additional noise is introduced. The constant gain rail-to-rail input transconductance GM1 and GM2 based on common mode detection are used to achieve rail-to-rail input and constant transconductance to ensure amplification accuracy.

[0009] The AC coupling ripple rejection loop of the architecture: 1) the AC coupling ripple rejection loop adopts a continuous operation mode, without additional design of a sample-and-hold module, saving an additional signal path, reducing the chip area and power consumption, and without a sampling process, without folding noise; 2) the ripple rejection effect is determined by the AC coupling ripple rejection loop itself, without the need for aligning the chopping frequency, so that an additional complex circuit is not needed to keep the notch frequency and the chopping frequency consistent, so as to guarantee the required ripple rejection effect; 3) by reducing the bandwidth of the AC coupling ripple rejection loop to less than 1 / 10 of the chopping frequency, the loop only forms effective filtering for the ripple frequency component; at the same time, the transconductance value of the transconductance unit in the loop is reduced, according to the positive correlation characteristic of transconductance and noise density, the noise contribution of the loop itself is reduced, finally the ripple rejection effect is enhanced while avoiding additional interference to the noise performance of the original circuit; 4) no phase shift is introduced at the chopping frequency, when the AC coupling ripple rejection loop is used in an instrument amplifier for chopping and dynamic element matching synchronization technology, no impact on the stability of the circuit is caused, and the difficulty of frequency stability compensation is reduced.

[0010] The constant gain rail-to-rail input transconductance based on common-mode detection of the architecture adopts a complementary structure of a NMOS differential pair and a PMOS differential pair in parallel, which operate in a sub-threshold region, and a bias circuit thereof uses a constant transconductance technology to realize GNDA+V thn to VDDA-|V thp , where V thn and V thp are threshold voltages of the NMOS and the PMOS respectively.

[0011] The concept and structure of the input rail-to-rail high-impedance instrument amplifier include: a chopping and dynamic element matching synchronization switch module SCPS, an AC coupling ripple rejection loop RRL, an input transconductance GM1, a feedback transconductance GM2, an impedance stage GM_R, an output stage GM3, a chopping switch CH2, a Miller compensation capacitor C 1a , a Miller compensation capacitor C 1b , and a resistance voltage division feedback network.

[0012] The signal input of the input rail-to-rail high-impedance instrument amplifier is specifically: after the external differential signal VIN is connected, it is modulated into a high-frequency signal by the SCPS switch module, and the signal is input to the input transconductance GM1, and the GM1 converts the signal into a corresponding current signal;

[0013] The signal amplification and output of the input rail-to-rail high-impedance instrument amplifier are specifically: the GM2 provides a feedback transconductance, the GM_R converts the current signal into a voltage signal, and the GM3 output stage of the ClassAB structure enhances the load capacity, and the Miller compensation capacitor C 1a and the Miller compensation capacitor C 1bTo ensure system stability, the overall gain of the IA is set by a resistor voltage divider feedback network.

[0014] The ripple suppression of the input rail-to-rail high impedance instrumentation amplifier is specifically achieved by: generating a compensation current I in the RRL loop. RRL To offset the offset current I output from GM1 and GM2 GM1 I GM2 To reduce ripple voltage, the Const_GM unit provides a constant transconductance bias for GM1 and GM2, thereby achieving rail-to-rail input range.

[0015] In the input rail-to-rail high impedance instrumentation amplifier, its chopper and dynamic element matching synchronous chopper switching module, through the switching logic of synchronous chopper and dynamic element matching, significantly reduces the impact of the switching dynamic impedance on the input impedance, raising the input impedance to the GΩ level, achieving a high impedance target that is difficult to achieve with existing technologies.

[0016] In the input rail-to-rail high-impedance instrumentation amplifier, its AC coupling ripple suppression loop RRL is one of the core innovations that replaces traditional filters to meet the ripple suppression requirements of SCPS. Its specific circuit connection is as follows: RRL consists of a sensing capacitor C... 3a and C 3b Chopper CH3, RRL_CB cascode buffer, C int Composed of integrating capacitor and RRL_GM for transconductance compensation; power node VDDA is M 2a M 2b M 5a and M 5b The source provides a positive power supply voltage; the output node OUT_AA is connected to M. 2a The drain, OUT_BB is connected to M. 1a The drain and OUT_CC are connected to M. 2b The drain and OUT_DD are also connected to M. 1b The drain; the input node IN+ is connected to C. 3a Coupled to M 8a The drain and input node IN- are connected via C. 3b Coupled to M 8b The drain; common-mode feedback node V CMFB Connect M 8a,b The gate;

[0017] Where M 1a With M 1b M 2a With M 2b This forms a differential input pair, and the bias voltage also controls M. 5a,b The gate potential of M6 is set, and the chopper switch CH1 is connected between the input and M6. 7a,bThe signal modulation is realized between the drain nodes, and the chopping switch CH2 is connected between M 5a,b The signal modulation is realized between the drain nodes, and the chopping switch CH2 is connected between M 6a,b The signal modulation is realized between the drain nodes, and the chopping switch CH2 is connected between M int The signal modulation is realized between the drain nodes, and the chopping switch CH2 is connected between M 7a The signal modulation is realized between the drain nodes, and the chopping switch CH2 is connected between M 7b The signal modulation is realized between the drain nodes, and the chopping switch CH2 is connected between M

[0018] The working method of the AC coupling ripple suppression loop RRL circuit is specifically as follows: the RRL first converts the ripple into a chopping frequency current through C 3a,b , and the current is demodulated into a direct current I CH3 after passing through CH3. The corresponding voltage is obtained by integrating I CH3 on C int , and the final value is I CH3 ×R RRL_CB , wherein R RRL_CB is the output impedance of RRL_CB on C int ; finally, the voltage is converted into I RRL by the transconductance circuit RRL_GM.

[0019] According to Kirchhoff's current law, the sum (I GM1 +I GM2 ) of the offset currents I GM1 and I GM2 output by GM1 and GM2 is offset by the compensation current I RRL generated by the RRL loop through negative feedback, to obtain the current I CH2 , and I CH2 charges and discharges C1 after being chopped by CH2. In combination with the chopping frequency fch and the capacitance value, the reduced ripple voltage is derived as follows in Formula 1.

[0020] Formula 1.

[0021] wherein f ch is the chopping frequency, R RRL_CB is the output impedance of RRL_CB, G RRL_GM is the transconductance of RRL_GM, C3 is the capacitance value of the sensing capacitor C 3a,b , and C1 is the capacitance value of the capacitor C1.

[0022] The output VOUT of IA is V ripple +VOP-VON; the chopping ripple V ripple superimposed on the output VOUT of IA mainly comes from the offset voltage of GM1 and GM2. When not passing through the RRL, the offset voltage is converted into an offset current through the transconductance, and the chopping chops the current. The chopped current charges and discharges the compensation capacitors C 1a and C1b Chopping and discharging,

[0023] The ripple voltage without RRL is ,

[0024] Where T ch is the chopping period, and RRL reduces the chopping ripple by times;

[0025] To suppress the influence of the chopping ripple on the output signal VOUT, the bandwidth of RRL needs to be lower than 1 / 10 of the chopping frequency, so C int is set to several pF, so that the GBW of RRL is reduced to several hundred Hz to filter the output signal after CH1 modulation; at the same time, to avoid the RRL itself introducing additional noise (especially the 1 / f noise of M 1a,b , M 2a,b , which is modulated twice by the chopping, will affect the low-frequency noise performance of the amplifier), the noise suppression and ripple suppression capabilities need to be balanced through parameter optimization; reducing the transconductance of M 1a,b , M 2a,b can effectively reduce the noise of RRL itself, thereby reducing the influence on the original circuit. However, reducing G M1，2 , the ripple suppression capability of RRL will also decrease. Therefore, M 1a,b is biased by using the same constant gain biasing circuit as GM1, and by setting the current values of the two tail currents at the input end, it is ensured that GM1 outputs sufficient compensation current while reducing its transconductance value, thereby reducing the noise contribution of RRL to IA. In summary, by reducing the bandwidth of RRL, increasing the output impedance of RRL_CB, and reducing the transconductance of RRL_GM, the ripple can be effectively suppressed while reducing the influence on the noise performance of the original circuit.

[0026] In the rail-to-rail high-impedance instrumentation amplifier, the constant gain rail-to-rail input transconductance GM1 and feedback transconductance GM2 based on common-mode detection are one of the core innovations to expand the input range of IA to rail-to-rail. Specifically, NMOS and PMOS differential pairs are connected in parallel, the NMOS differential pair is adapted to low common-mode voltage, and the PMOS differential pair is adapted to high common-mode voltage. The source of the NMOS tube is connected to the low potential, and the conduction needs to meet the requirement that the gate-source voltage VGS is close to the threshold voltage. When the input common-mode voltage is close to GNDA+V thn , the voltage difference between the gate and the source of the NMOS tube meets the conduction requirement and works normally.

[0027] The source of the PMOS tube is connected to the high potential, and the conduction needs to meet the requirement that the source-gate voltage VSG is slightly lower than the threshold voltage. When the input common-mode voltage is close to VDDA-|V thp |, the voltage difference between the source and the gate of the PMOS tube meets the conduction requirement.

[0028] The NMOS operating in the low common-mode voltage interval and the PMOS operating in the high common-mode voltage interval form a complement, and the two realize GNDA+V thn to VDDA-|V thp ; the rail-to-rail input voltage range of the transistors;

[0029] The Const_GM module perceives the input common-mode voltage level in real time through the common-mode detection unit, and when the input common-mode voltage is in the low interval, the tail current proportion of the NMOS differential pair is increased;

[0030] When the input common-mode voltage is in the high interval, the tail current proportion of the PMOS differential pair is increased, so that the total tail current of the NMOS and PMOS differential pairs is always constant, and according to the linear relationship between the sub-threshold MOS transistor transconductance and the drain current, the total transconductance of the differential pair in the rail-to-rail input range is ensured to be constant.

[0031] In the specific circuit and connection relationship of the amplifier transconductance part, it includes the constant transconductance unit Const_GM and the signal transconductance units GM1 and GM2; the constant transconductance bias unit Const_GM is structured as follows: the source of the PMOS transistor M5 is connected to the power supply VDDA, the gate is connected to the bias voltage Vbias, and the drain provides bias through the internal current mirror (M 6a,b —M 9a,b );

[0032] The input stage of the common-mode detection includes two pairs of differential pairs: the gates of the transistors M 12a , M 13a are connected to the positive input VIP, and the gates of the transistors M 12a , M 13b are connected to the negative input VIN; and finally the common-mode nodes VCP and VCN are outputted;

[0033] The transconductances GM1 and GM2 adopt the same symmetrical structure: each unit includes a PMOS common-source common-gate pair M 1a , M 1b , M 2a , M 2b ; the gates of the NMOS input pair M 1a , M 1b are connected to VIP and VIN respectively, the source level is connected to the drain of the tail current source M4 controlled by VCN, and the drain is connected to the output end output AA, CC of the common-source common-gate load; the gates of the PMOS input pair M 2a , M 2b are connected to VIP and VIN respectively, the source level is connected to the drain of the tail current source M3 controlled by VCP, and the drain is connected to the output end output BB, DD of the common-source common-gate load;

[0034] The circuit operation method of the input transconductance GM1 and the feedback transconductance GM2 is as follows: the input transconductance GM1 and the feedback transconductance GM2 both adopt a complementary structure of parallel connection of a NMOS differential pair and a PMOS differential pair operating in a sub-threshold region; meanwhile, the bias circuit of GM1 and GM2 uses a constant transconductance method to keep GM1 and GM2 constant in the range of GNDA+V thn to VDDA-|V thp , wherein V thn and V thp are the threshold voltages of NMOS and PMOS respectively.

[0035] When the gate-source voltage of the MOS transistor approaches its threshold voltage (slightly lower than the threshold voltage), the drain current formula of the MOS transistor operating in the sub-threshold region is as follows: formula 2; the derivation of formula 2 is as follows: formula 3; the input is composed of parallel connection of a NMOS differential pair and a PMOS differential pair, therefore, the input transconductance is the sum of the transconductance g mn of the NMOS and the transconductance g mp of the PMOS, and the formula 4 is as follows:

[0036] Formula 2;

[0037] Formula 3;

[0038] Formula 4;

[0039] wherein V TH is the threshold voltage of the MOS, and V T is the thermal voltage; according to formula 4, the transconductance of the MOS transistor operating in the sub-threshold region and the drain current are in linear relationship, therefore, as long as the total current of the input pair is kept constant, the total input transconductance remains unchanged, M 12a , M 12b , M 13a , M 13b The four input pair transistors realize input common-mode voltage detection, and perform current distribution of I N_ctrl and I P_ctrl according to VIN and VIP; the currents of the two branches will be copied to the tail current source in a certain proportion, so that the sum of the tail currents I N_ctrl and I P_ctrl is always a constant value; since the gm is in linear relationship with the sum of the currents, it remains unchanged in the common-mode range, as shown in formula 4, so that the transconductance of GM1 and GM2 remains constant in the input range of rail-to-rail.

[0040] The instrument amplifier is used in the measurement and amplification scene of high impedance weak signal source, including the temperature signal of thermocouple output, the bioelectric signal of electrocardiogram (ECG) and electroencephalogram (EEG), the weak current signal of photodetector output, etc. And through the constant gain rail-to-rail input transconductance based on common-mode detection, the IA can adapt to the common-mode voltage input scene of GNDA+V thn to VDDA-|V thp , which increases the application scene of the IA. Specifically, the application of thermal bridge, the front-end amplifier of high-precision digital-to-analog converter, electrocardiogram, sphygmomanometer, vital sign monitor and other medical devices; can be used as a general circuit in integrated circuits, compatible with Cadence, Pspice, Hspice and other integrated circuit platforms, and can design input chopper switches in the chopper instrument amplifier on various platforms, thereby optimizing the chopper instrument input impedance and chopper ripple. The impedance GM_R adopts a folded cascode structure. The output stage GM3 adopts a Class AB structure to expand the output voltage range and improve the load capacity; the Miller compensation is used between the input stage and the output stage circuit to ensure the stability of the whole IA;

[0041] The use method of the instrument amplifier comprises the following steps:

[0042] Step 1, signal input: connect the preprocessed differential signals of temperature, bioelectricity, etc. to the differential input end (VIN, VIP) of the IA; wherein the common-mode voltage of the preprocessed signal needs to be controlled within the interval of GNDA+V thn to VDDA-|V thp , to ensure that the input transconductors GM1 and GM2 always work in a constant transconductance state;

[0043] Step 2, impedance improvement and signal modulation: the chopper switches CH1a and CH1b are controlled by a synchronous clock signal to periodically switch and modulate the input signal; in this process, the SCPS technology will offset the influence of the switch dynamic resistance on the input impedance, so that the input impedance of the IA reaches the order of GΩ;

[0044] Step 3, signal amplification and output: the impedance stage GM_R converts the processed current signal into a voltage signal and transmits it to the output stage GM3; the Miller compensation capacitor (C 1a,b ) guarantees the stability of the system, the resistance feedback network sets the gain, and finally outputs the stable amplified signal;

[0045] Step 4, ripple suppression: the RRL loop generates a compensation current through negative feedback to offset the offset current output by GM1 and GM2, thereby reducing the ripple;

[0046] Step 5, constant transconductance control: through the common-mode detection unit Const_GM, the input common-mode voltage is detected, and I N_ctrl and I P_ctrlThe signal controls the tail current of the input transconductance, maintaining a constant transconductance within the rail-to-rail input range.

[0047] The advantages of this invention are:

[0048] (1) The AC-coupled ripple suppression loop (RRL) replaces the traditional filter, giving the instrumentation amplifier (IA) the following advantages: 1) Low circuit complexity. The AC-coupled ripple suppression loop does not require frequency alignment or additional calibration circuits. Compared with the traditional filter scheme used in SCPS, the AC-coupled ripple suppression loop of this invention greatly simplifies the circuit design. It reduces chip area and power consumption, improving the product's cost-effectiveness. 2) Low noise. The AC-coupled ripple suppression loop enhances the ripple suppression effect without introducing additional noise through parameter optimization, ensuring the original low noise characteristics of the instrumentation amplifier, achieving dual optimization of ripple and noise, and meeting the stringent requirements of high-precision signal amplification. 3) Optimized ripple suppression. The ripple suppression effect of the AC-coupled ripple suppression loop is determined by the loop characteristics. It does not require frequency alignment or additional calibration circuits, avoiding the performance degradation caused by frequency offset in traditional notch filters. It can work stably under different operating conditions, solving the hidden danger of unstable ripple suppression effect in traditional schemes.

[0049] (2) Wide input range. The constant gain rail-to-rail input transconductance based on common-mode detection achieves GNDA+V thn To VDDA-|V thp |The rail-to-rail input range.

[0050] (3) Overall performance synergistic optimization. SCPS technology breaks through the bottleneck of input impedance improvement through synchronous switching logic, laying the foundation for high impedance signal acquisition; RRL technology replaces the filter in the traditional SCPS technology scheme, suppressing ripple while avoiding the introduction of additional noise and stability problems; the two, together with the constant gain rail-to-rail input transconductance based on common-mode detection, enable IA to achieve GΩ-level input impedance while having low ripple, low noise characteristics and rail-to-rail input capability. SCPS technology solves the core problem of input impedance improvement, while the RRL loop specifically meets the ripple suppression requirements brought by SCPS technology, and the Const_GM unit ensures the amplification accuracy within the rail-to-rail input range through constant transconductance control. The three form a synergistically optimized overall architecture.

[0051] This invention is an innovation in high-precision instrumentation amplifiers with chopper and dynamic element matching synchronization, applicable to a wide range of precision signal amplification and monitoring fields. While retaining the high input impedance advantages of high-precision instrumentation amplifiers with chopper and dynamic element matching synchronization, this invention optimizes noise and chopper ripple, making it suitable for measuring and amplifying high-impedance weak signal sources, including temperature signals from thermocouples, bioelectrical signals such as electrocardiograms (ECG) and electroencephalograms (EEG), and weak current signals from photodetectors. Furthermore, by employing constant gain rail-to-rail input transconductance based on common-mode detection, the IA (Instrumentation Amplifier) ​​can be adapted to GNDA+V (Glass Array of GNDAs). thn To VDDA-|V thp The common-mode voltage input scenario expands the application scenarios of analog-to-analog converters (IA). Specific applications include thermobridge applications, front-end amplifiers for high-precision digital-to-analog converters, and medical equipment such as electrocardiographs, blood pressure monitors, and vital sign monitors.

[0052] This invention relates to an input rail-to-rail high-impedance instrumentation amplifier that synchronizes chopping and dynamic component matching. Its core innovation lies in the synergistic architecture of "SCPS technology + AC coupling ripple suppression loop (RRL) + constant gain rail-to-rail input transconductance based on common-mode detection (GM1, GM2)": SCPS technology overcomes the input impedance bottleneck of traditional chopping techniques, achieving GΩ-level input impedance; RRL replaces traditional filters, achieving stable ripple suppression without noise folding or frequency alignment requirements; and constant gain rail-to-rail input transconductance based on common-mode detection achieves GNDA+V. thn To VDDA-|V thp | Rail-to-rail input range. This invention avoids the ripple suppression defects of traditional filters and simultaneously features high input impedance, low ripple, and GNDA+V. thn To VDDA-|V thp With its rail-to-rail input range, it can be widely used in high-precision signal sensing fields such as temperature and biological sensors.

[0053] This invention, as a general-purpose circuit in integrated circuits, is compatible with multiple integrated circuit platforms such as Cadence, PSpice, and Hspice. It can be used to design input chopper switches in chopper instrumentation amplifiers on various platforms, thereby optimizing the input impedance and chopper ripple noise of the chopper instrument. Attached Figure Description

[0054] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments:

[0055] Appendix Figure 1 This is a schematic diagram of a high-precision instrumentation amplifier architecture with novel chopper and dynamic component matching synchronization in an embodiment of the present invention;

[0056] Appendix Figure 2is the specific circuit schematic diagram of the RRL AC coupling ripple rejection loop in the embodiment of the present application.

[0057] attached Figure 3 is the specific circuit schematic diagram of the input stage GM1 and the feedback stage GM2 and the constant gain bias thereof in the embodiment of the present application. DETAILED DESCRIPTION

[0058] The present example proposes an innovative architecture of "AC coupling ripple rejection loop + constant gain rail-to-rail input transconductance based on common-mode detection" to address the core defects of the prior art, and realizes a chopping and dynamic element matching synchronous input rail-to-rail high-impedance instrumentation amplifier by combining SCPS technology, and the specific technical solutions are as follows: 1) based on the chopping and dynamic element matching synchronous (SCPS) technology, the switching logic of the chopping switch and the dynamic element is synchronously controlled to reduce the influence of the switching dynamic resistance on the input impedance, and the input impedance of the IA is improved to the order of GΩ to meet the impedance matching requirements of the high-impedance signal source. 2) an AC coupling ripple rejection loop (RRL) is used to replace the traditional filter, which realizes effective suppression of ripple voltage by canceling the offset current generated by the input transconductance and the feedback transconductance, and does not introduce additional noise. 3) the constant gain rail-to-rail input transconductance (GM1, GM2) based on common-mode detection is used to achieve rail-to-rail input and constant transconductance, and to ensure the amplification accuracy.

[0059] As Figure 1 shown, the chopping and dynamic element matching synchronous input rail-to-rail high-impedance instrumentation amplifier, the instrumentation amplifier IA uses the architecture of AC coupling ripple rejection loop combined with constant gain rail-to-rail input transconductance based on common-mode detection, and uses SCPS technology to realize chopping and dynamic element matching synchronous input rail-to-rail; in this architecture, based on the chopping and dynamic element matching synchronous SCPS method, the switching logic of the chopping switch and the dynamic element is synchronously controlled to reduce the influence of the switching dynamic resistance on the input impedance, and the input impedance of the IA is improved to the order of GΩ to meet the impedance matching requirements of the high-impedance signal source, and at the same time, the AC coupling ripple rejection loop RRL is used to replace the traditional filter, which realizes effective suppression of ripple voltage by canceling the offset current generated by the input transconductance and the feedback transconductance, and does not introduce additional noise; and the constant gain rail-to-rail input transconductance GM1, GM2 based on common-mode detection is used to achieve rail-to-rail input and constant transconductance to ensure the amplification accuracy.

[0060] The AC coupling ripple rejection loop of the architecture: 1) the AC coupling ripple rejection loop adopts a continuous operation mode, without setting a sample-and-hold module, which saves an extra signal path, reduces the chip area and power consumption, and avoids folding noise due to no sampling process; 2) the ripple rejection effect is determined by the AC coupling ripple rejection loop itself, without needing to align the chopping frequency, so that an additional complex circuit is not needed to keep the notch frequency consistent with the chopping frequency, which can guarantee the required ripple rejection effect; 3) by reducing the bandwidth of the AC coupling ripple rejection loop to be much lower than the chopping frequency, the loop only forms effective filtering for the ripple frequency component; meanwhile, the transconductance value of the transconductance unit in the loop is reduced, and according to the positive correlation between the transconductance and the noise density, the noise contribution of the loop itself is reduced, so that the ripple rejection effect is enhanced while avoiding additional interference to the noise performance of the original circuit; 4) no phase shift is introduced at the chopping frequency, and when the AC coupling ripple rejection loop is used in an instrument amplifier for chopping and dynamic element matching synchronization technology, no impact is caused on the stability of the circuit, which reduces the difficulty of frequency stability compensation.

[0061] The constant gain rail-to-rail input transconductance based on common-mode detection of the architecture adopts a complementary structure of a NMOS differential pair and a PMOS differential pair in parallel, which operate in a sub-threshold region, and a bias circuit of the constant transconductance technology is used to realize GNDA+V thn to VDDA-|V thp , where V thn and V thp are the threshold voltages of the NMOS and the PMOS respectively.

[0062] The concept and structure of the input rail-to-rail high-impedance instrument amplifier are shown in Figure 1 , and the circuit modules include: a chopping and dynamic element matching synchronization switch module SCPS, an AC coupling ripple rejection loop RRL, an input transconductance GM1, a feedback transconductance GM2, an impedance stage GM_R, an output stage GM3, a chopping switch CH2, a Miller compensation capacitor C 1a , a Miller compensation capacitor C 1b and a resistance voltage dividing feedback network.

[0063] The signal input of the input rail-to-rail high-impedance instrument amplifier is specifically: external signals VIN and VIP are input to GM1 after being modulated by the SCPS switch module, and GM1 converts the voltage signal into a current signal;

[0064] The signal amplification and output of the input rail-to-rail high-impedance instrument amplifier are specifically: GM2 provides a feedback transconductance, GM_R converts the current signal into a voltage signal, and the output stage GM3 of the Class AB structure improves the load capacity, and the Miller compensation capacitor C 1a and the Miller compensation capacitor C 1bGuarantee system stability, the overall gain of IA is set by the resistor voltage division feedback network;

[0065] The ripple suppression of the input rail-to-rail high-impedance instrumentation amplifier is specifically: the RRL loop generates a compensation current I RRL , which offsets the offset currents I GM1 , I GM2 output by GM1 and GM2, reduces the ripple voltage, and provides a constant transconductance bias for GM1 and GM2 in the Const_GM unit, realizing the input range of rail-to-rail.

[0066] In the input rail-to-rail high-impedance instrumentation amplifier, the chopping and dynamic element matching synchronous chopping switch module greatly reduces the influence of switch dynamic impedance on input impedance through synchronous chopping and dynamic element matching switching logic, increases the input impedance to the order of GΩ, and realizes the high-impedance target that existing technologies cannot achieve.

[0067] In the input rail-to-rail high-impedance instrumentation amplifier, the AC coupling ripple suppression loop RRL is one of the core innovations to replace traditional filters to meet the ripple suppression requirements of SCPS. The specific circuit connection is as shown in Figure 2 . RRL is composed of sensing capacitors C 3a and C 3b , a chopper CH3, an RRL_CB common-source common-gate buffer, an integral capacitor C int , and an RRL_GM compensation transconductance. The source of M 2a , M 2b , M 5a , and M 5b is provided with a positive power voltage at the power supply node VDDA; the drain of M 2a is connected to the output node OUT_AA, the drain of M 1a is connected to the output node OUT_BB, the drain of M 2b is connected to the output node OUT_CC, and the drain of M 1b is also connected to the output node OUT_DD. The input node IN+ is coupled to the drain of M 3a through C 8a , and the input node IN- is coupled to the drain of M 3b through C 8b . The common-mode feedback node V CMFB is connected to the gate of M 8a,b .

[0068] Among them, M 1a and M 1b , M 2a and M 2b form a differential input pair, and the bias voltage also controls the gate potential of M 5a,b , M6. The chopping switch CH1 is connected between the input and M 7a,bSignal modulation is achieved between the drain nodes, and the chopper switch CH2 is connected to M. 5a,b Drain and M 6a,b Signal modulation is achieved between source nodes; C int It is an integrating capacitor, one end of which is coupled to M. 7a The source is coupled to M at the other end. 7b Source pole;

[0069] The specific working method of the AC coupling ripple suppression loop (RRL) circuit is as follows: The RRL first passes through C... 3a,b The ripple is converted into a current with a chopping frequency, which, after passing through CH3, is demodulated into a DC current I. CH3 I CH3 In C int Integrating the result yields the corresponding voltage, the final value of which is I. CH3 ×R RRL_CB , where R RRL_CB For RRL_CB in C int The output impedance is on; this voltage is converted to I via RRL_GM. RRL ;

[0070] According to Kirchhoff's current law, the offset current I output by GM1 and GM2 GM1 I GM2 The sum of (I) GM1 +I GM2 The compensation current I generated by the RRL loop RRL The current I is obtained by canceling out the negative feedback. CH2 I CH2 After being chopped by CH2, C1 is charged and discharged. Combining parameters such as chopping frequency fch and capacitance value, the reduced ripple voltage is derived as shown in Formula 1 below.

[0071] Formula 1;

[0072] Where f ch R is the chopping frequency. RRL_CB G is the output impedance of RRL_CB. RRL_GM C is the transconductance of RRL_GM, and C3 is the sensing capacitance C. 3a,b The capacitance value is C1, where C1 is the capacitance value of capacitor C1;

[0073] like Figure 1 As shown, the output of IA is VOUT=V ripple +VOP-VON; Chopper ripples superimposed on the IA output VOUT. ripple The offset voltages, primarily originating from GM1 and GM2, are converted into offset currents via transconductance before passing through the RRL. The chopper then chops this current, and the chopped current, within one chopping cycle, affects the compensation capacitor C.1a , C 1b Chopper is performed,

[0074] The ripple voltage without RRL is ,

[0075] Where T ch is the chopping period, and RRL reduces the chopping ripple by times;

[0076] To suppress the influence of the chopping ripple on the output signal VOUT, the bandwidth of RRL needs to be lower than 1 / 10 of the chopping frequency, so C int is set to several pF, so that the GBW of RRL is reduced to several hundred Hz to filter the output signal after CH1 modulation; at the same time, to avoid the RRL itself introducing additional noise (especially the 1 / f noise of M 1a,b , M 2a,b after twice chopping modulation, which will affect the low-frequency noise performance of the amplifier), the noise suppression and ripple suppression ability need to be balanced through parameter optimization; reducing the transconductance of M 1a,b , M 2a,b can effectively reduce the noise of RRL itself, thereby reducing the influence on the original circuit. However, reducing G M1，2 , the ripple suppression ability of RRL will also decrease. Therefore, M 1a,b is biased by using the same constant gain biasing circuit as GM1, and by setting the current values of the two tail currents at the input end, it is ensured that GM1 outputs sufficient compensation current while reducing its transconductance value, thereby reducing the noise contribution of RRL to IA. In summary, by reducing the bandwidth of RRL, increasing the output impedance of RRL_CB, and reducing the transconductance of RRL_GM, the ripple can be effectively suppressed while reducing the influence on the noise performance of the original circuit.

[0077] In the rail-to-rail high-impedance instrumentation amplifier, the constant gain rail-to-rail input transconductance GM1 and feedback transconductance GM2 based on common-mode detection are one of the core innovations to expand the input range of IA to rail-to-rail. Specifically, NMOS and PMOS differential pairs are connected in parallel, the NMOS differential pair is adapted to low common-mode voltage, and the PMOS differential pair is adapted to high common-mode voltage. The source of the NMOS tube is connected to the low potential, and the conduction needs to meet the requirement that the gate-source voltage VGS is close to the threshold voltage. When the input common-mode voltage is close to GNDA+V thn , the voltage difference between the gate and the source of the NMOS tube meets the conduction requirement and works normally.

[0078] The source of the PMOS tube is connected to the high potential, and the conduction needs to meet the requirement that the source-gate voltage VSG is slightly lower than the threshold voltage. When the input common-mode voltage is close to VDDA-|V thp |, the voltage difference between the source and the gate of the PMOS tube meets the conduction requirement.

[0079] The NMOS differential pair operating in the low common-mode voltage range and the PMOS differential pair operating in the high common-mode voltage range complement each other, and the two work together to achieve GNDA+V. thn To VDDA-|V thp | Rail-to-rail input voltage range;

[0080] The Const_GM module senses the input common-mode voltage level in real time through the common-mode detection unit. When the input common-mode voltage is in the low range, it increases the tail current ratio of the NMOS differential pair.

[0081] When the input common-mode voltage is in the high range, the tail current ratio of the PMOS differential pair is increased to keep the total tail current of the NMOS and PMOS differential pairs constant. Based on the linear relationship between the transconductance and leakage current of the MOS transistor in the subthreshold region, the total transconductance of the differential pair is kept constant in the rail-to-rail input range.

[0082] The specific circuit and connection relationship of the transconductance section of the amplifier are as follows: Figure 3 As shown. It includes a constant transconductance unit Const_GM and signal transconductance units GM1 and GM2; the structure of the constant transconductance bias unit Const_GM is as follows: the source of the PMOS transistor M5 is connected to the power supply VDDA, the gate is connected to the bias voltage Vbias, and the drain is an internal current mirror (M). 6a,b —M 9a,b Provides bias;

[0083] The input stage for common-mode detection contains two differential pairs: transistor M 12a M 13a The gate is connected to the positive input VIP, M 12a M 13b The gate is connected to the inverting input VIN; the final output common-mode nodes are VCP and VCN.

[0084] Transconductance GM1 and GM2 adopt the same symmetrical structure: each cell contains a PMOS cascode pair M. 1a M 1b M 2a M 2b NMOS input pair M 1a M 1b The gates are connected to VIP and VIN respectively, and the source is connected to the drain of the tail current source M4 controlled by VCN. The drain is connected to the output terminal of the common-source common-gate load, outputting AA and CC; the PMOS input is connected to M... 2a M 2b The gates are connected to VIP and VIN respectively, the source is connected to the drain of the tail current source M3 controlled by VCP, and the drain is connected to the output terminals of the common source cascode load to output BB and DD.

[0085] The specific operating method of the input transconductance GM1 and feedback transconductance GM2 is as follows: both input transconductance GM1 and feedback transconductance GM2 adopt a complementary structure of parallel NMOS differential pairs and PMOS differential pairs operating in the subthreshold region; at the same time, the bias circuits of GM1 and GM2 use a constant transconductance method to achieve the bias of GM1 and GM2 at GNDA+V. thn To VDDA-|V thp | Remains constant within the range, where V thn V thp These are the threshold voltages for NMOS and PMOS, respectively;

[0086] When the gate-source voltage of a MOSFET is close to its threshold voltage (slightly below the threshold voltage), the drain current formula for a MOSFET operating in the subthreshold region is as shown in Formula 2 below; Formula 3 is obtained by differentiating Formula 2; the input consists of NMOS differential pairs and PMOS differential pairs connected in parallel, therefore, the input transconductance is the transconductance g of the NMOS. mn and the transconductance g of PMOS mp The sum of these two values ​​yields the following formula 4;

[0087] Formula 2;

[0088] Formula 3;

[0089] Formula 4;

[0090] Where V TH V is the threshold voltage of the MOS. T Assuming the thermal voltage, according to Equation 4, the transconductance and leakage current of a MOSFET operating in the subthreshold region have a linear relationship. Therefore, as long as the total current of the input pair remains constant, the total input transconductance remains unchanged. Figure 3 As shown, M 12a M 12b M 13a M 13b Four input transistor pairs are used to detect the input common-mode voltage and perform I / O based on VIN and VIP. N_ctrl and I P_ctrl The current distribution is such that the current in the two branches is replicated to the tail current source in a certain proportion, so that the tail current I... N_ctrl and I P_ctrl The sum is always a constant; since gm is linearly related to the sum of currents, it remains unchanged in the common-mode range, as shown in Formula 4, so that the transconductance of GM1 and GM2 remains constant in the rail-to-rail input range.

[0091] The instrument amplifier is used in the measurement and amplification scene of high impedance weak signal source, including the temperature signal of thermocouple output, the bioelectric signal of electrocardiogram (ECG) and electroencephalogram (EEG), the weak current signal of photodetector output, etc. And through the constant gain rail-to-rail input transconductance based on common-mode detection, the IA can adapt to the common-mode voltage input scene of GNDA+V thn to VDDA-|V thp , which increases the application scene of the IA. Specifically, the application of thermal bridge, the front-end amplifier of high-precision digital-to-analog converter, electrocardiogram, sphygmomanometer, vital sign monitor and other medical devices; can be used as a general circuit in integrated circuits, compatible with Cadence, Pspice, Hspice and other integrated circuit platforms, and can design input chopper switches in the chopper instrument amplifier on various platforms, thereby optimizing the chopper instrument input impedance and chopper ripple. The impedance GM_R adopts a folded cascode structure. The output stage GM3 adopts a Class AB structure to expand the output voltage range and improve the load capacity; the Miller compensation is used between the input stage and the output stage circuit to ensure the stability of the whole IA;

[0092] The use method of the instrument amplifier comprises the following steps:

[0093] Step 1, signal input: connect the preprocessed differential signals of temperature, bioelectricity, etc. to the differential input end (VIN, VIP) of the IA; wherein the common-mode voltage of the preprocessed signal needs to be controlled within the interval of GNDA+V thn to VDDA-|V thp , so as to ensure that the input transconductances GM1 and GM2 always work in a constant transconductance state;

[0094] Step 2, impedance improvement and signal modulation: the chopper switches CH1a and CH1b are controlled by a synchronous clock signal to periodically switch and modulate the input signal; in this process, the SCPS technology offsets the influence of the dynamic resistance of the switch on the input impedance, so that the input impedance of the IA reaches the order of GΩ;

[0095] Step 3, signal amplification and output: the impedance stage GM_R converts the processed current signal into a voltage signal and transmits it to the output stage GM3; the Miller compensation capacitor (C 1a,b ) guarantees the stability of the system, the resistance feedback network sets the gain, and finally outputs the stable amplified signal;

[0096] Step 4, ripple suppression: the RRL loop generates a compensation current through negative feedback to offset the offset current output by GM1 and GM2, thereby reducing the ripple;

[0097] Step 5, constant transconductance control: through the common-mode detection unit Const_GM, the input common-mode voltage is detected, and I N_ctrl and I P_ctrlThe signal controls the tail current of the input transconductance, which keeps the transconductance constant over a wide input voltage range.

Claims

1. A chopped and dynamically element matched synchronous input rail-to-rail high-impedance instrumentation amplifier, characterized in that: The instrument amplifier IA adopts an AC coupling ripple rejection loop combined with a constant gain rail-to-rail input transconductance architecture based on common-mode detection, a synchronous chopping and dynamic element matching SCPS method, and reduces the influence of the switching dynamic resistance on the input impedance by synchronously controlling the switching logic of the chopping switch and the dynamic element, while adopting an AC coupling ripple rejection loop RRL to effectively suppress the ripple voltage by canceling the offset current generated by the input transconductance and the feedback transconductance; and achieves rail-to-rail input and constant transconductance based on constant gain rail-to-rail input transconductance based on common-mode detection, to ensure the amplification accuracy; The circuit module of the input rail-to-rail high-impedance instrument amplifier comprises: a chopping and dynamic element matching synchronous switch module SCPS, an alternating current coupling ripple suppression loop RRL, an input transconductance GM1, a feedback transconductance GM2, an impedance stage GM_R, an output stage GM3, a chopping switch CH2, a Miller compensation capacitor C 1a , a Miller compensation capacitor C 1b , and a resistance voltage division feedback network. The signal input of the input rail-to-rail high-impedance instrument amplifier is specifically: after the external differential signal VIN, VIP is connected, it is modulated into a high-frequency signal by the SCPS switch module, and the signal is input to the input transconductance GM1; GM1 converts it into a corresponding current signal; The signal amplification of the input rail-to-rail high-impedance instrument amplifier and the output are as follows: GM2 provides feedback transconductance, GM_R converts the current signal into a voltage signal, and the GM3 output stage in the Class AB structure improves the load capacity with the Miller compensation capacitor C 1a , the Miller compensation capacitor C 1b The overall gain of IA is set by the resistance voltage division feedback network to ensure system stability; The ripple suppression of the input rail-to-rail high-impedance instrumentation amplifier is specifically: the RRL loop generates a compensation current I RRL , which offsets the offset current I GM1 , I GM2 output by GM1 and GM2, reduces the ripple voltage, and provides a constant transconductance bias for GM1 and GM2 in the Const_GM unit, thereby realizing the input range of rail-to-rail.

2. A chopper and dynamic element matched synchronized input rail-to-rail high impedance instrumentation amplifier as claimed in claim 1 characterized by: The AC coupling ripple rejection loop of the architecture reduces the bandwidth of the AC coupling ripple rejection loop to only form effective filtering on the ripple frequency component; at the same time, the transconductance value of the transconductance unit in the loop is reduced, and according to the positive correlation between transconductance and noise density, the noise contribution of the loop itself is reduced, which enhances the ripple suppression effect while avoiding additional interference to the original circuit noise performance and does not introduce phase shift at the chopping frequency.

3. The chopper-stabilized, rail-to-rail, high-impedance instrumentation amplifier with dynamic element matching synchronization of input rails according to claim 1, characterized in that: The constant gain rail-to-rail input transconductance of the architecture based on common mode detection employs a complementary structure of NMOS differential pair and PMOS differential pair in parallel operating in sub-threshold region, whose bias circuit uses constant transconductance technique to achieve GNDA+V thn to VDDA-|V thp input rail-to-rail range, where V thn , V thp are threshold voltages of NMOS and PMOS, respectively.

4. The input rail-to-rail high-impedance instrumentation amplifier with chopper and dynamic element matching synchronization according to claim 1, characterized in that: In the input rail-to-rail high-impedance instrument amplifier, the synchronous chopping and dynamic element matching chopping switch module reduces the influence of the switching dynamic impedance on the input impedance by the switching logic of the synchronous chopping and dynamic element matching, and raises the input impedance to the order of GΩ.

5. The input rail-to-rail high-impedance instrumentation amplifier with chopper and dynamic element matching synchronization according to claim 1, characterized in that: In the input rail-to-rail high-impedance instrumentation amplifier, the circuit connection of the AC coupling ripple rejection loop RRL is as follows: the RRL is composed of a sensing capacitor C 3a , a chopper CH3, a RRL_CB common-source common-gate buffer, a C 3b integration capacitor, and a RRL_GM compensation transconductance. int The power supply node VDDA provides a positive power supply voltage for the sources of M 2a , M 2b , M 5a , and M 5b ; the output node OUT_AA is connected to the drains of M 2a , M 1a , M 2b , and M 1b ; the input node IN+ is coupled to the drains of M 3a , M 8a , and M 3b ; the input node IN- is coupled to the drains of M 8b ; and the common-mode feedback node V CMFB is connected to the gates of M 8a,b . Where M 1a With M 1b M 2a With M 2b They form a differential input pair, and their bias voltage also controls M. 5a,b The gate potential of M6 is set, and the chopper switch CH1 is connected between the input and M6. 7a,b Signal modulation is achieved between the drain nodes, and the chopper switch CH2 is connected to M. 5a,b Drain and M 6a,b Signal modulation is achieved between source nodes; C int It is an integrating capacitor, one end of which is coupled to M. 7a The source is coupled to M at the other end. 7b Source pole; The working method of the AC coupling ripple rejection loop RRL circuit is as follows: the RRL first passes through C 3a,b The ripple is converted into a chopping frequency current, which, after passing through CH3, is demodulated into a direct current I CH3 CH3 The integral on C int gives the corresponding voltage, whose final value is I CH3 × R RRL_CB , where R RRL_CB is the output impedance of RRL_CB on C int ; this voltage is converted into I RRL by RRL_GM;​ The sum of the disordered current I output by GM1 and GM2 GM1 , GM2 The compensation current I generated by the RRL loop RRL The current I is offset by negative feedback CH2 , I CH2 After being chopped by CH2, the charging and discharging of C1 is combined with the chopping frequency fch and the capacitance parameter, and the reduced ripple voltage is derived as follows Formula 1; Formula 1 ; where f ch is the chopping frequency, R RRL_CB is the output impedance of RRL_CB, G RRL_GM is the transconductance of RRL_GM, C3 is the capacitance value of the sensing capacitor C 3a,b , C1 is the capacitance value of the capacitor C1, I OS is the sum of the offset currents I GM1 , I GM2 output by GM1, GM2. The output VOUT of IA = V ripple + VOP - VON; the chopping ripple V ripple The disordered voltage from GM1, GM2, which is converted into disordered current by transconductance when not passing through RRL, the chopping will chop the current, and the chopped current will charge and discharge the Miller compensation capacitor C 1a , C 1b in a chopping period, The ripple voltage without RRL is , where T ch is the chopping period, dT represents the integral variable is time T, C 1a，b is the value of the Miller compensation capacitor C 1a，b , and RRL reduces the ripple by a factor of . RRL bandwidth is lower than the chopping frequency, C int Set to several pF, to filter the output signal after CH1 modulation; At the same time, in order to avoid the introduction of additional noise by RRL, the noise suppression and ripple suppression ability need to be balanced through parameter optimization; M 1a,b The same constant gain bias circuit as GM1 is used for biasing, and by setting the current values of the two tail currents at the input end, it is ensured that GM1 outputs sufficient compensation current while reducing its transconductance value, thereby reducing the noise contribution of RRL to IA.

6. The chopper-stabilized rail-to-rail high-impedance instrumentation amplifier of claim 1, wherein: the first and second input transistors are P-type transistors; the first and second output transistors are N-type transistors; the first and second current sources are P-type current sources; and the third and fourth current sources are N-type current sources. In the input rail-to-rail high-impedance instrument amplifier, based on the common-mode detection constant gain rail-to-rail input transconductance GM1, feedback transconductance GM2 expands the IA input range to rail-to-rail, specifically: NMOS and PMOS differential pairs are connected in parallel, NMOS differential pairs adapt to low common-mode voltage, PMOS differential pairs adapt to high common-mode voltage, NMOS tube source is connected to low potential, and conduction needs to meet that gate-source voltage VGS is close to threshold voltage, when input common-mode voltage is close to GNDA+V thn , the voltage difference between NMOS gate and source meets the conduction requirement, and normal work is ensured. The source of the PMOS tube is connected to a high potential, and the conduction needs to meet the requirement that the source-gate voltage VSG is slightly lower than the threshold voltage. When the input common-mode voltage is close to VDDA- |V thp |, the voltage difference between the source and the gate of the PMOS tube meets the conduction requirement. The NMOS operating in the low common-mode voltage interval and the PMOS operating in the high common-mode voltage interval form a complement, and both of them cooperatively realize GNDA+V thn to VDDA- |V thp rail-to-rail input voltage range; The Const_GM module perceives the input common-mode voltage level in real time through the common-mode detection unit; when the input common-mode voltage is in the low interval, the tail current proportion of the NMOS differential pair is increased; When the input common-mode voltage is in the high interval, the tail current proportion of the PMOS differential pair is increased, so that the total tail current of the NMOS and PMOS differential pairs remains constant, and according to the linear relationship between the sub-threshold MOS transconductance and the drain current, the total transconductance of the differential pair in the rail-to-rail input range is ensured to be constant.

7. The input rail-to-rail high-impedance instrumentation amplifier with chopper and dynamic element matching synchronization according to claim 6, characterized in that: The circuit of the amplifier transconductance part includes a constant transconductance unit Const_GM and signal transconductance units GM1 and GM2. The constant transconductance bias unit Const_GM is structured as follows: the source of PMOS transistor M5 is connected to power supply VDDA, the gate is connected to bias voltage Vbias, and the drain is an internal current mirror M 6a,b —M 9a,b biasing is provided; The input stage of common mode detection includes two pairs of differential pairs: transistors M 12a , M 13a whose gates are connected to the positive phase input VIP, M 12a , M 13b whose gates are connected to the negative phase input VIN; and finally output common mode nodes VCP, VCN; Transconductance GM1, GM2 adopt the same symmetrical structure: each unit contains PMOS common-source common-gate pair M 1a , M 1b , M 2a , M 2b ; NMOS input pair M 1a , M 1b The gate of each is connected to VIP and VIN respectively, the source is connected to the drain of the tail current source M4 controlled by VCN, and the drain is connected to the output AA, CC of the common-source common-gate load; the gate of PMOS input pair M 2a , M 2b is connected to VIP and VIN respectively, the source is connected to the drain of the tail current source M3 controlled by VCP, and the drain is connected to the output BB, DD of the common-source common-gate load; The circuit operation method of the input transconductance GM1 and the feedback transconductance GM2 is as follows: the input transconductance GM1 and the feedback transconductance GM2 both adopt the complementary structure of the parallel connection of the NMOS differential pair and the PMOS differential pair working in the sub-threshold region; meanwhile, the bias circuit of GM1 and GM2 uses the constant transconductance method to keep GM1 and GM2 constant in the range of GNDA+V thn to VDDA-| thp , wherein V thn , V thp are the threshold voltages of the NMOS and the PMOS respectively. When the gate-source voltage of the MOS transistor approaches its threshold voltage, the drain current of the MOS transistor operating in the sub-threshold region is given by Equation 2 below; Equation 3 below is derived by differentiating Equation 2; the input is composed of a parallel connection of an NMOS differential pair and a PMOS differential pair, and thus the input transconductance is the sum of the transconductances g mn of the NMOS and the PMOS mp , given by Equation 4 below. Formula 2; Formula 3; Formula 4; where I D is the drain current of the MOS, W is the channel width, L is the channel length of the MOS, VGS is the gate-source voltage of the MOS, n is a constant greater than 1 determined by the process, gm is the transconductance of the MOS, gmn is the transconductance of the NMOS input pair, gmp is the transconductance of the PMOS input pair, V TH is the threshold voltage of the MOS, V T is the thermal voltage, from equation 4, the transconductance and the drain current of the MOS working in the subthreshold region are linearly related, keeping the total current of the input pair constant, then the total input transconductance is kept constant, M 12a , M 12b , M 13a , M 13b The four input pair transistors realize the input common-mode voltage detection, and the current distribution of I N_ctrl and I P_ctrl according to VIN and VIP; the currents of the two branches will be copied to the tail current source in a certain proportion, so that the sum of the tail currents I N_ctrl and I P_ctrl is always a constant; since gm is linearly related to the sum of the currents, it remains constant within the common-mode range, as shown in equation 4, so that the transconductance of GM1 and GM2 remains constant within the rail-to-rail input range.

8. The input rail-to-rail high impedance instrumentation amplifier with chopper and dynamic element matching synchronization according to claim 7, characterized in that: When the instrument amplifier is used for measuring and amplifying a high-impedance weak signal source, the impedance GM_R adopts a folded cascode structure; the output stage GM3 adopts a ClassAB structure to expand the output voltage range and improve the load capacity; and the Miller compensation is used between the input stage and the output stage to ensure the stability of the IA as a whole; The method for using the instrument amplifier includes the following steps: Step 1, signal input: the pre-processed temperature, bioelectricity and other differential signals are connected to the differential input end of IA; wherein the common-mode voltage of the pre-processed signal needs to be controlled within GNDA+V thn to VDDA-|V thp interval, to ensure that the input transconductance GM1 and GM2 always work in the constant transconductance state; Step 2, impedance boosting and signal modulation: the synchronous clock signal controls the periodic switching of the chopping switches CH1a and CH1b to modulate the input signal; in this process, the SCPS technology offsets the influence of the switching dynamic resistance on the input impedance, so that the input impedance of the IA reaches the order of GΩ; Step 3, signal amplification and output: the impedance stage GM_R converts the processed current signal into a voltage signal and transmits it to the output stage GM3; the Miller compensation capacitor ensures the stability of the system, and the resistance feedback network sets the gain, and finally outputs the stable amplified signal. Step 4, ripple suppression: the RRL loop generates a compensation current through negative feedback to offset the offset current output by GM1 and GM2, thereby reducing the ripple; Step 5, constant transconductance control: The input common-mode voltage is detected by the common-mode detection unit Const_GM, and I N_ctrl With I P_ctrl The tail current of the input transconductance is controlled by the signal, and the transconductance is maintained constant within the rail-to-rail input range.

Images