Semiconductor device and manufacturing method thereof

Abstract

The invention relates to a semiconductor device and a manufacturing method thereof. A semiconductor device includes: a variable resistance memory layer, in which the memory layer includes a magnetic tunnel junction structure including a free layer having a variable magnetization direction, a fixed layer having a fixed magnetization direction, and a tunnel barrier layer disposed between the free layer and the fixed layer; and a magnetic oxide layer disposed on a sidewall of the free layer.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2024-0108295, filed on August 13, 2024, which is incorporated herein by reference in its entirety. Technical Field

[0003] The embodiments of this disclosure generally relate to a semiconductor technology, and more specifically, to a semiconductor device including a magnetic tunnel junction structure and a method of manufacturing the same. Background Technology

[0004] In response to the trends of miniaturization, low power consumption, high performance, and diversification in electronic devices, there is a need for semiconductor devices capable of storing data in various electronic devices, such as computers and portable communication devices. Researchers and industry are researching and developing such semiconductor devices. Semiconductor devices capable of storing data by utilizing the property of switching between different resistance states according to applied voltage or current can include resistive random access memory (RRAM), phase-change random access memory (PRAM), ferroelectric random access memory (FRAM), magnetic random access memory (MRAM), and electronic fuses, among others. Summary of the Invention

[0005] Embodiments of this disclosure relate to a semiconductor device including a semiconductor memory capable of improving (delta improvement) the data retention of a magnetic tunnel junction structure, and a method of manufacturing the semiconductor device.

[0006] According to one embodiment of the present disclosure, a semiconductor device includes: a variable resistance storage layer, wherein the variable resistance storage layer includes a magnetic tunnel junction structure, the magnetic tunnel junction structure including a free layer having a variable magnetization direction, a fixed layer having a fixed magnetization direction, and a tunnel barrier layer disposed between the free layer and the fixed layer; and a magnetic oxide layer disposed on the sidewall of the free layer.

[0007] According to another embodiment of this disclosure, a method for manufacturing a semiconductor device includes: forming a magnetic tunnel junction structure including a fixed layer, a tunnel barrier layer, and a free layer on a substrate; and forming a magnetic oxide layer on the sidewalls of the free layer of the magnetic tunnel junction structure by angled sputtering deposition.

[0008] According to another embodiment of this disclosure, a method for manufacturing a semiconductor device includes: sequentially forming a lower electrode layer, a magnetic tunnel junction layer including a free layer, and a hard mask layer on a substrate; selectively etching and patterning the magnetic tunnel junction layer to produce a patterned magnetic tunnel junction layer by etching the top surfaces of the magnetic tunnel junction layer and the hard mask layer; and forming a magnetic oxide layer on the sidewalls of the magnetic tunnel junction layer by performing an angled ion implantation process to implant magnetic oxide into the top surface of the patterned magnetic tunnel junction layer.

[0009] Those skilled in the art will better understand these and other features and advantages of embodiments of this disclosure from the following example figures and illustrated examples. Attached Figure Description

[0010] Figures 1 to 6 This is a simplified cross-sectional view illustrating a semiconductor device and a method for manufacturing the same according to embodiments of the present disclosure. Detailed Implementation

[0011] Various embodiments of this disclosure will be described in detail below with reference to the accompanying drawings.

[0012] Embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings. However, the illustrated embodiments may be implemented in different forms and should not be construed as limited to the embodiments described herein. Rather, these embodiments are provided to make the present disclosure comprehensive and complete, and to fully convey the scope of the disclosure to those skilled in the art. Throughout the present disclosure, the same reference numerals refer to the same parts in various figures and embodiments. The drawings are not necessarily drawn to scale, and in some cases, the scale may be exaggerated to clearly show the features of the embodiments. When a first layer is referred to as “on the second layer” or “on the substrate,” it refers not only to the case where the first layer is formed directly on the second layer or substrate, but also to the case where a third layer exists between the first layer and the second layer or substrate.

[0013] A magnetic tunnel junction (MTJ) structure may include a free layer with a variable magnetization direction, a fixed layer with a fixed magnetization direction, and a tunnel barrier layer disposed between the free layer and the fixed layer. In a variable resistive element, the magnetization direction of the free layer can be changed to be parallel or antiparallel to the magnetization direction of the fixed layer depending on the applied voltage or current; therefore, the magnetic tunnel junction structure can switch between a low-resistance state and a high-resistance state. In the embodiments of this disclosure described below, an improved magnetic tunnel junction structure is provided. The magnetic tunnel structure of the present invention can improve at least one characteristic of the magnetic tunnel junction structure.

[0014] Figures 1 to 6 This is a simplified cross-sectional view illustrating a semiconductor device and a method of manufacturing the same according to embodiments of the present disclosure. Figure 6A semiconductor device according to an embodiment of the present disclosure is shown. Figures 1 to 5 An embodiment of the present disclosure is shown for manufacturing Figure 6 The intermediate process of the semiconductor device shown.

[0015] First, the methods used to manufacture semiconductor devices can be described.

[0016] See Figure 1 A substrate 100 is provided, and an interlayer dielectric layer 210 is formed on the substrate 100. The interlayer dielectric layer 210 can be a single layer or multiple layers. For example, the lower interlayer dielectric layer 210 may include silicon oxide, silicon nitride, silicon oxynitride, and / or a low-k material. A low-k material is a material with a dielectric constant (k) of about 4 or less. The term "about" as used herein should be interpreted as representing a range of ±5%. The smaller this value, the better the electrical insulation properties can be, and the parasitic capacitance between components can be reduced. Low-k materials may include silicon oxide, organosiloxanes, silicon carbide, organic-based materials including benzene rings or fluorine, and porous materials; however, the technical concept and scope of this disclosure are not limited thereto.

[0017] On the substrate 100 on which the interlayer dielectric layer 210 is formed, a lower electrode layer 200 penetrating the interlayer dielectric layer 210, a magnetic tunnel junction layer 300 including a free layer 330, and a hard mask layer 400 may be formed sequentially. The lower electrode layer 200, the magnetic tunnel junction layer 300, and the hard mask layer 400 may be formed by sputtering, physical vapor deposition (PVD), chemical vapor deposition (CVD), or a combination thereof, but the technical concept and scope of this disclosure are not limited thereto.

[0018] First, the lower electrode layer (not shown) can be patterned to form the lower electrode 220. For example, the lower electrode 220 can be formed by forming a mask pattern (not shown) on the lower electrode layer and using the mask pattern as an etching mask to etch the lower electrode layer. The lower electrode layer can be etched using physical etching processes (such as ion beam etching (IBE) processes) or chemical etching processes (such as reactive ion etching (RIE) processes) using ions such as argon (Ar) ions and krypton (Kr) ions. The lower electrode 220 may include at least one of conductive metal nitrides (e.g., titanium nitride or tantalum nitride) and rare earth metals (e.g., ruthenium, platinum, etc.). IBE is a physical etching process that can perform etching with very high directionality using a high-energy ion beam. Therefore, IBE is advantageous when a vertical profile is required. Since RIE is a method of etching by combining chemical reactions and physical impacts, the etching rate of RIE is generally faster than that of IBE, thereby improving productivity. RIE can perform a selective etching process between the material to be etched and the protective layer or photoresist to selectively remove only the target layer.

[0019] The magnetic tunneling layer 300 may include a fixed layer 310 with a fixed magnetization direction, a tunnel barrier layer 320, and a free layer 330 with a variable magnetization direction. The tunnel barrier layer 320 is disposed between the free layer 330 and the fixed layer 310. The fixed layer 310, the tunnel barrier layer 320, and the free layer 330 are sequentially stacked on top of the lower electrode layer 200. The magnetization direction of the free layer 330 can be changed by forming a magnetic field between the lower electrode 220 and the upper electrode 520. The upper electrode 520 is... Figure 6 As shown in the diagram. The fixed layer 310 and the free layer 330 may comprise materials with interfacial perpendicular magnetic anisotropy. Interfacial perpendicular magnetic anisotropy refers to the phenomenon where a magnetic layer with inherent horizontal magnetization characteristics has a magnetization direction perpendicular to the interface with another layer adjacent to it. Here, inherent horizontal magnetization characteristics refer to the characteristic that a magnetic layer has a magnetization direction parallel to the widest surface of the magnetic layer in the absence of external factors. For example, when a magnetic layer with inherent horizontal magnetization characteristics is formed on a substrate and no external factors are present, the magnetization direction of the magnetic layer can be substantially parallel to the top surface of the substrate.

[0020] In this configuration, each of the fixed layer 310 and the free layer 330 may include at least one of cobalt (Co), iron (Fe), and nickel (Ni). Furthermore, each of the fixed layer 310 and the free layer 330 may also include at least one of a non-magnetic material, including boron (B), zinc (Zn), aluminum (Al), titanium (Ti), ruthenium (Ru), tantalum (Ta), silicon (Si), silver (Ag), gold (Au), platinum (Pt), palladium (Pd), iridium (Ir), carbon (C), and nitrogen (N). For example, each of the fixed layer 310 and the free layer 330 may include CoFe or NiFe, and may further include boron (B). Additionally, to reduce the saturation magnetization of the fixed layer 310 and the free layer 330, each of the fixed layer 310 and the free layer 330 may also include at least one of titanium (Ti), aluminum (Al), silicon (Si), magnesium (Mg), tantalum (Ta), and silicon (Si). However, the materials of the fixed layer 310 and the free layer 330 are not limited to these. The fixed layer 310 can also be referred to as the reference layer RL or the shift offset layer (SCL), and the fixed layer 310 can have a multilayer structure. The free layer 330 can also be referred to as the storage layer SL.

[0021] The tunnel barrier layer 320 may include at least one of magnesium (Mg) oxide, titanium (Ti) oxide, aluminum (Al) oxide, magnesium zinc (MgZn) oxide, magnesium boron (MgB) oxide, titanium (Ti) nitride, and vanadium (V) nitride. For example, the tunnel barrier layer 320 may be a monolayer of magnesium oxide (MgO). In contrast, the tunnel barrier layer 320 may include multiple layers.

[0022] Subsequently, an oxide layer 340 can be deposited on the free layer 330. The oxide layer 340 can serve as a capping layer. In this case, the oxide layer 340 can typically be formed of the same material as the tunnel barrier layer 320; however, the technical concept and scope of this disclosure are not necessarily limited thereto, and the oxide layer 340 can be formed of an oxide material. For example, the oxide layer 340 may include materials containing HfO. x NbO x TaO x and WO x At least one oxide material selected from the group consisting of. For example, oxide layer 340 may comprise a metal oxide selected from the group consisting of RuO, MgO, VO, WO, NbO, TaO, HfO, MoO, GdO, AlO, IrO, and combinations thereof.

[0023] A capping layer 350 can be formed on the oxide layer 340. The capping layer 350 can induce the free layer 330 to have a magnetization direction perpendicular to the substrate 100. Therefore, the free layer 330 can have interfacial perpendicular magnetic anisotropy. In addition, the capping layer 350 can suppress the loss of metal constituting the free layer 330 due to diffusion to the outside and can prevent the oxidation of the free layer 330. The capping layer 350 can be a multilayer structure, including metallic elements (such as ruthenium (Ru), tantalum (Ta), hafnium (Hf), platinum (Pt), molybdenum (Mo), and tungsten (W)) and non-metallic elements (such as boron (B)).

[0024] The resistance of the magnetic tunnel junction 300 can depend on the magnetization directions of the fixed layer 310 and the free layer 330. For example, the resistance of the magnetic tunnel junction 300 can be much larger when the magnetization directions of the fixed layer 310 and the free layer 330 are antiparallel to each other than when the magnetization directions of the fixed layer 310 and the free layer 330 are parallel to each other. Therefore, the resistance of the magnetic tunnel junction 300 can be controlled by changing the magnetization direction of the free layer 330, which can be used as a data storage principle in a semiconductor device according to embodiments of the present disclosure.

[0025] A columnar hard mask layer 400 can be deposited on the top surface of the capping layer 350, and the columnar hard mask layer 400 can be formed of a dielectric material, such as silicon nitride or silicon oxynitride. The hard mask layer 400 may include at least one of, for example, carbon (C), silicon (Si), copper (Cu), tungsten (W), titanium (Ti), tantalum (Ta), and aluminum (Al), their nitrides, oxides, and borides, and their metal nitrides (e.g., titanium nitride and tantalum nitride). The hard mask layer 400 can protect the underlying layer under the process conditions of subsequent processes. By forming the columnar hard mask layer 400, the magnetic tunnel junction layer 300 can be selectively etched to form a patterned columnar magnetic tunnel junction layer 300, as described below.

[0026] refer to Figure 2 It can be achieved through etching. Figure 1 The top surface of the illustrated structure is used to selectively etch and pattern the magnetic tunnel junction layer 300. This etching process can be performed using physical etching processes (such as ion beam etching (IBE)) or chemical etching processes (such as reactive ion etching (RIE)).

[0027] The hard mask layer 400 can be etch-selective relative to the magnetic tunnel junction layer 300. The ion beam or reactive ions can include inert ions. For example, the hard mask 410 can be etched by an ion beam etching (IBE) process or a reactive ion etching (RIE) process, and the top surface of the interlayer dielectric layer 210 of the lower electrode layer 200 can be recessed on both sides of the hard mask 410. The above etching process can be performed until the top surface of the interlayer dielectric layer 210 is exposed.

[0028] See Figure 3 Magnetic oxides, particularly ferrimagnetic oxides, can be deposited on the top surface of a patterned columnar magnetic tunneling layer 300 by an angled sputtering process to form a magnetic oxide layer, particularly a ferrimagnetic oxide layer 360, on the sidewalls of the magnetic tunneling layer 300.

[0029] Ferromagnetic oxides can be deposited on a portion of a patterned columnar magnetic tunnel junction layer 300 using an angled sputtering deposition process. The ferromagnetic oxide layer 360 can be deposited using an angled sputtering deposition process such that it forms a uniform thickness on the sidewalls of the free layer 330 of the magnetic tunnel junction structure. Sputtering deposition is particularly effective in forming uniform and high-density thin layers and allows for high precision and control. It is also particularly effective in achieving the formation of multilayer structures. In the sputtering deposition process, the direction of material injection can be controlled. Specifically, in the sputtering deposition process, the material can be supplied at an angle relative to a line perpendicular to the substrate surface. The angle between the direction of material supply and the line perpendicular to the substrate surface can be defined as the deposition angle θ. A magnetron sputtering apparatus can be used as the device for performing the angled sputtering deposition process.

[0030] The deposition angle θ can be determined such that the ferrimagnetic oxide layer 360 can cover a portion of the magnetic tunnel junction layer 300, preferably the free layer 330. According to one embodiment of this disclosure, the angled sputtering deposition process can utilize a deposition angle with a vertical tilt of approximately 50 to 80 degrees relative to a line perpendicular to the surface of the substrate. During the angled sputtering deposition process, the deposition angle and the number of deposition operations can be controlled according to the type and shape of the top surface of the patterned magnetic tunnel junction layer 300. The ferrimagnetic oxide layer can include materials such as Fe3O4, CoFe2O4, ZnFe2O4, NiFe2O4, ReFe2O4, and PbFe. 12 O 19 BaFe 12 O 19 Dy3Fe5O 12 Y3Fe5O 12 The material may be selected from at least one of the groups MnFe2O4 and MgFe2O4, but the technical concept and scope of this disclosure are not limited thereto. Generally, ferrimagnetic materials can exhibit the characteristic that their saturation magnetization increases with increasing temperature. As the saturation magnetization of the ferrimagnetic material increases, the demagnetizing field can also increase, and the anisotropic field can decrease.

[0031] By using a low-angle radio frequency (RF) sputtering method, an angled sputtering deposition process can deposit magnetic oxides, particularly ferrimagnetic oxides, on the sidewalls of the magnetic tunnel junction 300 (preferably the free layer 330). Here, the deposition angle can be adjusted so that the ferrimagnetic oxides are not deposited below the tunnel barrier layer 320 onto the magnetic tunnel junction 300. However, the ferrimagnetic oxides can also be deposited above the free layer 330 on the surfaces of the oxide layer 340 and the hard mask.

[0032] refer to Figure 4 A portion of the deposited ferrimagnetic oxide layer 360 on the sidewall of the free layer 330 may have the same magnetization direction as the free layer due to the influence of the stray field of the free layer. This can serve as an additional volume of the free layer. Generally, the effect of improving the data retention of the magnetic tunnel junction 300 (incremental improvement) can be proportional to the vertical magnetic anisotropy of the free layer 330 and the volume of the free layer 330. Therefore, when the vertical magnetic anisotropy of the free layer 330 increases, the data retention of the magnetic tunnel junction 300 can be improved, but even if there is no improvement in the vertical magnetic anisotropy as shown in the embodiments of this disclosure, the data retention can still be improved due to the increase in the volume of the free layer 330.

[0033] The bottom surface of the ferrimagnetic oxide layer 360 can be set at a height equal to or higher than the bottom surface of the tunnel barrier layer 320. The thickness of the formed ferrimagnetic oxide layer 360 can be in the range of about 0.1 nm to 5.0 nm. When the thickness of the ferrimagnetic oxide layer 360 is less than about 0.1 nm, the effect of improving the data retention of the magnetic tunnel junction layer 300 (incremental improvement) may not be significant, which is undesirable. When the thickness of the ferrimagnetic oxide layer 360 is greater than about 5.0 nm, the magnetic layer may be formed too thick, which may lead to inter-cell bridging or stray fields, which is also undesirable.

[0034] refer to Figure 5 The ferrimagnetic oxide layer 360 formed on the oxide layer 340 can be etched to form the intermediate electrode layer 510, as will be described below. This etching process can include dry etching processes, such as ion beam etching (IBE). Here, the IBE process can be performed multiple times in a diagonal direction not perpendicular to the top surface of the substrate 100, and the IBE process can be performed using etching gases including fluorine-containing gases and ammonia (NH3) and oxygen to suppress the consumption of the oxide layer 340 as reactant gases.

[0035] Dry etching processes can be performed multiple times. For example, a dry etching process can be performed three times by executing an IBE process, and each IBE process can be performed at an angle of approximately 5° to 45° relative to the top surface of the substrate 100. Furthermore, dry etching processes can be performed as reactive ion etching (RIE) processes. The ferrimagnetic oxide layer 360 formed on the sidewalls of the free layer 330 by this etching process may not be etched, but the ferrimagnetic oxide layer 360 formed on the oxide layer 340 may be selectively etched.

[0036] See Figure 6 An intermediate electrode layer 510 can be formed on the ferrimagnetic oxide layer 360. The intermediate electrode layer 510 can be used to electrically connect the magnetic tunnel junction layer 300 and the upper electrode layer 500 to each other, and to physically separate them. The intermediate electrode layer 510 can include a metallic material with a lower specific gravity than the upper electrode layer formed in subsequent processes. For example, the intermediate electrode layer 510 can include various conductive materials, such as metals like platinum (Pt), tungsten (W), aluminum (Al), copper (Cu), and tantalum (Ta), metal nitrides such as titanium nitride (TiN) and tantalum nitride (TaN), or combinations thereof. The intermediate electrode layer 510 can also include a carbon electrode. The intermediate electrode layer 510 and the upper electrode layer formed in subsequent processes can be formed using chemical vapor deposition (CVD), metal-organic chemical vapor deposition (MOCVD), or plasma-enhanced chemical vapor deposition (PECVD).

[0037] Subsequently, the upper electrode layer (not shown) can be patterned to form an upper electrode 520 over the magnetic tunnel junction layer 300. For example, the upper electrode 520 can be formed by forming a mask pattern (not shown) over the upper electrode layer and using the mask pattern as an etching mask to etch the upper electrode layer. The upper electrode layer can be etched using physical etching processes (such as ion beam etching (IBE) processes) or chemical etching processes (such as reactive ion etching (RIE) processes) using ions such as argon (Ar) ions, krypton (Kr) ions, etc. The upper electrode 520 can include a conductive material with a resistance lower than that of the intermediate electrode layer 510. For example, the upper electrode 520 can include at least one of a conductive metal nitride (e.g., titanium nitride or tantalum nitride) and a rare earth metal (e.g., ruthenium, and platinum, etc.).

[0038] As a result of the above process, it is possible to manufacture Figure 6 The semiconductor device shown.

[0039] Return to reference Figure 6 The semiconductor device according to embodiments of this disclosure may include a lower electrode layer 200, a magnetic tunnel junction layer 300, and an upper electrode layer 500 formed on a substrate 100. The lower electrode layer 200 may include a lower electrode 220 formed through an interlayer dielectric layer 210, while the magnetic tunnel junction layer 300 may include a fixed layer 310 having a fixed magnetization direction, a tunnel barrier layer 320 disposed between a free layer 330 and the fixed layer 310, an oxide layer 340 covering the free layer 330, and a capping layer 350 formed on the oxide layer 340. The upper electrode layer 500 may include an intermediate electrode layer 510 and an upper electrode 520. The oxide layer 340 may include a metal oxide selected from the group consisting of RuO, MgO, VO, WO, TaO, HfO, MoO, and combinations thereof. A ferrimagnetic oxide layer 360 may be formed on the sidewalls of the magnetic tunnel junction structure, preferably on the sidewalls of the free layer 330.

[0040] The bottom surface of the ferrimagnetic oxide layer 360 can be disposed at a height equal to or higher than the bottom surface of the tunnel barrier layer 320. The thickness of the ferrimagnetic oxide layer 360 can be in the range of about 0.1 nm to 5.0 nm. The ferrimagnetic oxide layer can include materials selected from Fe3O4, CoFe2O4, ZnFe2O4, NiFe2O4, ReFe2O4, and PbFe. 12 O 19 BaFe 12 O 19 Dy3Fe5O 12 Y3Fe5O 12 It may contain at least one of the group consisting of MnFe2O4 and MgFe2O4, but the technical concept and scope of this disclosure are not limited thereto.

[0041] According to the semiconductor device and its manufacturing method described above, the ferrimagnetic oxide layer 360 formed on the sidewall of the free layer 330 can serve as an additional volume of the free layer 330 to achieve improved data retention even without any improvement in perpendicular magnetic anisotropy.

[0042] According to embodiments of this disclosure, data retention (delta) of a magnetic tunnel junction structure can be improved by depositing magnetic oxides, particularly ferrimagnetic oxides, on the sidewalls of the magnetic tunnel junction structure.

[0043] While embodiments of the present disclosure have been described with reference to specific examples, those skilled in the art will understand that various changes and modifications can be made without departing from the spirit and scope of the present disclosure as defined in the following claims. Furthermore, embodiments can be combined to form additional embodiments.

Claims

1. A semiconductor device, comprising: Variable resistance storage layer The storage layer includes a magnetic tunnel junction structure, wherein the magnetic tunnel junction structure includes... A free layer with variable magnetization direction, A fixed layer with a fixed magnetization direction, and A tunnel barrier layer disposed between the free layer and the fixed layer; and A magnetic oxide layer is disposed on the sidewall of the free layer.

2. The semiconductor device according to claim 1, wherein, The magnetic oxide layer is a ferrimagnetic oxide layer.

3. The semiconductor device according to claim 1, wherein, The magnetic oxide layer is formed only on or above the bottom surface of the tunnel barrier layer.

4. The semiconductor device according to claim 1, wherein, The thickness of the magnetic oxide layer is in the range of about 0.1 nm to 5.0 nm.

5. The semiconductor device according to claim 2, wherein, The ferrimagnetic oxide layer comprises Fe3O4, CoFe2O4, ZnFe2O4, NiFe2O4, ReFe2O4, and PbFe. 12 O 19 BaFe 12 O 19 Dy3Fe5O 12 Y3Fe5O 12 At least one selected from the group consisting of MnFe2O4 and MgFe2O4.

6. The semiconductor device according to claim 1, wherein, The magnetic tunnel junction structure also includes an oxide layer suitable for covering the free layer.

7. The semiconductor device according to claim 6, wherein, The oxide layer comprises a metal oxide selected from the group consisting of RuO, MgO, VO, WO, NbO, TaO, HfO, MoO, GdO, AlO, IrO, and combinations thereof.

8. The semiconductor device according to claim 1, further comprising: The lower electrode and the upper electrode are respectively disposed in the lower part and the upper part of the magnetic tunnel junction structure.

9. The semiconductor device according to claim 1, wherein, The magnetization direction of the magnetic oxide layer is the same as that of the free layer.

10. A method for manufacturing a semiconductor device, the method comprising: A magnetic tunnel junction structure comprising a fixed layer, a tunnel barrier layer, and a free layer is formed on a substrate; as well as A magnetic oxide layer is formed on the sidewall of the free layer of the magnetic tunnel structure using an angled sputtering deposition process.

11. The method according to claim 10, wherein, The magnetic oxide layer is a ferrimagnetic oxide layer.

12. The method according to claim 10, wherein, The magnetic oxide layer is formed on the sidewall of the magnetic tunnel junction structure only above the bottom surface of the tunnel barrier layer.

13. The method according to claim 10, wherein, The thickness of the magnetic oxide layer is in the range of about 0.1 nm to 5.0 nm.

14. The method according to claim 11, wherein, The ferrimagnetic oxide layer comprises Fe3O4, CoFe2O4, ZnFe2O4, NiFe2O4, ReFe2O4, and PbFe. 12 O 19 BaFe 12 O 19 Dy3Fe5O 12 Y3Fe5O 12 At least one selected from the group consisting of MnFe2O4 and MgFe2O4.

15. The method according to claim 10, wherein, The angled sputtering deposition process is performed using an RF sputtering process.

16. The method of claim 10, wherein, The angled sputtering deposition process is performed at a deposition angle of approximately 50 to 80 degrees relative to a line perpendicular to the surface of the substrate.

17. The method according to claim 10, wherein, The magnetic tunnel junction structure comprising the free layer includes An oxide layer is deposited on the free layer.

18. The method according to claim 17, wherein, The oxide layer includes The metal oxide is selected from the group consisting of RuO, MgO, VO, WO, NbO, TaO, HfO, MoO, GdO, AlO, IrO, and combinations thereof.

19. The method of claim 10, further comprising: A lower electrode is formed beneath the magnetic tunnel junction structure; as well as An upper electrode is formed on the magnetic tunnel junction structure.

20. The method of claim 10, wherein the hard mask layer comprises carbon (C), silicon (Si), copper (Cu), tungsten (W), titanium (Ti), tantalum (Ta), aluminum (Al), or their nitrides or oxides.

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