Composite terminal structure and semiconductor device

Abstract

The invention provides a composite terminal structure and a semiconductor device, and the structure comprises a substrate structure; the doped regions are arranged in the substrate structure at intervals in the preset direction and located in the substrate structure, each doped region comprises a doped region body and a groove, the grooves are located in the doped region bodies, the doping type of the doped regions is different from that of the substrate structure, and the preset direction is the direction in which the cells point to the terminal; the filling layers are located in the grooves in a one-to-one correspondence mode, and the doping type of the filling layers is the same as that of the doping regions. The problem that in the prior art, a terminal structure in a silicon carbide power device is poor in voltage resistance is solved.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and more specifically, to a composite terminal structure and a semiconductor device. Background Technology

[0002] Silicon carbide, as a representative of third-generation wide-bandgap semiconductor materials, possesses excellent electrical and thermal properties, such as a wide bandgap, high critical breakdown electric field, and high thermal conductivity, making it a promising candidate for high-voltage power devices. With continuous technological advancements, silicon carbide power devices are widely used in power supplies, photovoltaic power generation, electric vehicles, aerospace, and other fields.

[0003] The primary function of high-voltage silicon carbide power devices is to turn off high voltage, and this ability directly translates to the device's breakdown voltage. Because bending in the PN junction's termination region increases the electric field strength, in practical applications, interface state charges and defects on the device surface affect the breakdown voltage, causing it to be lower than that of an ideal planar PN junction. To improve the device's breakdown voltage and reduce the junction edge electric field, thereby enhancing its actual withstand voltage capability, the device requires a suitable termination structure, such as field plates, field limiting rings, and junction termination extensions. In existing technologies, the withstand voltage performance of termination structures in silicon carbide power devices is relatively poor. Summary of the Invention

[0004] The main objective of this application is to provide a composite terminal structure and semiconductor device to solve the problem of poor voltage withstand performance of the terminal structure in silicon carbide power devices in the prior art.

[0005] To achieve the above objectives, according to one aspect of this application, a composite terminal structure is provided, comprising: a substrate structure; a plurality of doped regions spaced apart in a predetermined direction and located in the substrate structure, each doped region including a doped region body and a trench, the trench being located in the doped region body, the doping type of the doped region being different from the doping type of the substrate structure, the predetermined direction being the direction from which the cell points to the terminal; and a plurality of filling layers, each filling layer being located in a trench corresponding to the other, the doping type of the filling layer being the same as the doping type of the doped region.

[0006] Optionally, the filling layer may be made of gallium nitride or polycrystalline silicon.

[0007] Optionally, the trench has a depth of 0.2 μm-0.3 μm and a width of 0.8 μm-1.0 μm. The trench shape includes a U-shape or a semi-ellipse. The doped region body has a depth of 0.8 μm-1.0 μm and a width of 2.5 μm-4.5 μm. The direction of the depth is parallel to the thickness direction of the substrate structure, and the direction of the width is parallel to the predetermined direction.

[0008] Optionally, the doping concentration of the doped region is less than the doping concentration of the filling layer, wherein the doping concentration of the filling layer is 5.0 × 10⁻⁶. 19 cm -3 -2.0×10 20 cm -3 .

[0009] Optionally, the composite terminal structure further includes: a main junction doped region located in the substrate structure, wherein the main junction doped region is also located on one side of the plurality of doped regions in the predetermined direction, the doping type of the main junction doped region is the same as the doping type of the doped regions, and the doping concentration of the main junction doped region is greater than the doping concentration of the doped regions.

[0010] Optionally, the doped region body has opposing first and second edges, the first edge being an edge closer to the main junction doped region and the second edge being an edge farther from the main junction doped region; the trench has opposing third and fourth edges, the third edge being an edge closer to the main junction doped region and the fourth edge being an edge farther from the main junction doped region; the distance between the first edge and the third edge in the predetermined direction is greater than the distance between the second edge and the fourth edge in the predetermined direction.

[0011] Optionally, the spacing between adjacent doped regions increases sequentially along the direction from the main junction doped region to the doped region.

[0012] Optionally, the distance between the first edge and the third edge in the predetermined direction is not less than 0.3 μm, and the distance between the second edge and the fourth edge in the predetermined direction is not less than 0.3 μm.

[0013] Optionally, the composite terminal structure further includes: an insulating dielectric layer located on the surface of the substrate structure and on a portion of the doped region body away from the substrate structure; a metal layer located on the surface of the filling layer away from the substrate structure, the remaining portion of the doped region body away from the substrate structure, and the portion of the insulating dielectric layer away from the substrate structure, wherein the substrate structure includes: a substrate; a drift region located on the substrate, wherein the doping type of the drift region is the same as the doping type of the substrate, the doping concentration of the drift region is less than the doping concentration of the substrate, a plurality of the doped regions are located in the drift region, and the surface of the doped region away from the substrate overlaps with the portion of the drift region away from the substrate.

[0014] According to another aspect of this application, a semiconductor device is provided, including any of the composite terminal structures described herein.

[0015] The composite terminal structure using the technical solution of this application includes a substrate structure, multiple doped regions located within the substrate structure, and multiple filled regions. Each doped region includes a doped region body and trenches, with each filled layer correspondingly located within a trench. The doping type of the doped regions differs from that of the substrate structure, while the doping type of the filled layers is the same as that of the doped regions. The material of the filled layers includes semiconductor materials. Compared to the poor breakdown voltage performance of terminal structures in existing silicon carbide power devices, this application, by introducing trenches into the doped regions and filling them with a doping material of the same type as the doped regions (but different from the substrate), can create additional PN junctions in the terminal region of the device. This allows for the formation of additional charge regions in a predetermined direction, helping to balance the charge distribution in the terminal region, resulting in a more uniform electric field, reducing electric field spikes, and thus improving the device's breakdown voltage and stability. Attached Figure Description

[0016] The accompanying drawings, which form part of this application, are used to provide a further understanding of this application. The illustrative embodiments and descriptions of this application are used to explain this application and do not constitute an undue limitation of this application. In the drawings:

[0017] Figure 1 A cross-sectional schematic diagram of a composite terminal structure provided according to an embodiment of this application is shown.

[0018] The above figures include the following reference numerals:

[0019] 10. Substrate structure; 11. Doped region; 12. Filling layer; 13. Main junction doped region; 14. Insulating dielectric layer; 15. Metal layer; 101. Substrate; 102. Drift region. Detailed Implementation

[0020] It should be noted that the following detailed descriptions are illustrative and intended to provide further explanation of this application. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains.

[0021] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments according to this application. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0022] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate for the embodiments of the invention described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0023] It should be understood that when an element (such as a layer, film, region, or substrate) is described as being "on" another element, the element may be directly on the other element, or there may be an intermediate element present. Furthermore, in the specification and claims, when an element is described as being "connected" to another element, the element may be "directly connected" to the other element, or "connected" to the other element via a third element.

[0024] As described in the background section, the voltage withstand performance of the terminal structure in existing silicon carbide power devices is poor. To solve the above problem, embodiments of this application provide a composite terminal structure and a semiconductor device.

[0025] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

[0026] This application provides a composite terminal structure, such as... Figure 1 As shown, it includes:

[0027] Substrate structure 10;

[0028] Specifically, the doping type of the substrate structure can be N-type or P-type, and this application does not impose any specific restrictions on it.

[0029] In this embodiment, the substrate structure is N-type doped.

[0030] Multiple doped regions 11 spaced apart in a predetermined direction are located in the substrate structure 10. Each doped region 11 includes a doped region body (not shown) and a trench (not shown). The trench is located in the doped region body. The doping type of the doped region 11 is different from the doping type of the substrate structure 10. The predetermined direction is the direction from the cell to the terminal.

[0031] Multiple filling layers 12 are located in the trenches in a one-to-one correspondence, and the doping type of the filling layers 12 is the same as the doping type of the doped regions 11.

[0032] Through the above embodiments, the composite terminal structure includes a substrate structure, multiple doped regions located within the substrate structure, and multiple filled regions. Each doped region includes a doped region body and trenches, with each filled layer correspondingly located within a trench. The doping type of the doped regions differs from that of the substrate structure, while the doping type of the filled layers is the same as that of the doped regions. The material of the filled layers includes semiconductor materials. Compared to the poor voltage withstand performance of terminal structures in existing silicon carbide power devices, this application, by introducing trenches into the doped regions and filling them with a doping material of the same type as the doped regions (but different from the substrate), can create additional PN junctions in the terminal region of the device. This allows for the formation of additional charge regions in a predetermined direction, helping to balance the charge distribution in the terminal region, resulting in a more uniform electric field, reducing electric field spikes, and thus improving the device's voltage withstand capability and stability.

[0033] Specifically, Figure 1 The dashed line represents the depletion line of the device (i.e., the boundary line of the depletion layer).

[0034] In one alternative embodiment, the filling layer is made of gallium nitride (GaN) or polysilicon. In this embodiment, GaN, as a wide-bandgap semiconductor material, possesses a higher dielectric constant and stronger electric field modulation capability than traditional silicon oxide or silicon nitride dielectrics. When used as a filling layer, it can more effectively control and flatten the electric field distribution near the trench, thereby improving the overall breakdown voltage performance of the device. The high thermal conductivity of GaN facilitates rapid heat dissipation, reducing performance degradation or damage caused by heat accumulation, which is crucial for the operation of silicon carbide power devices in high-temperature environments. When polysilicon is used as a filling layer, it can also effectively control and flatten the electric field distribution near the trench, and its good thermal stability can enhance the device's resistance to thermal shock.

[0035] According to some exemplary embodiments of this application, the depth of the trench is 0.2μm-0.3μm, the width of the trench is 0.8μm-1.0μm, the shape of the trench includes U-shape or semi-ellipse, the depth of the doped region body is 0.8μm-1.0μm, the width of the doped region body is 2.5μm-4.5μm, the direction of the depth is parallel to the thickness direction of the substrate structure, and the direction of the width is parallel to the predetermined direction. In this embodiment, the trench depth is set between 0.2 μm and 0.3 μm, and the width is set between 0.8 μm and 1.0 μm. This size design aims to balance device performance and manufacturing difficulty. The depth is sufficient for the trench to effectively influence the electric field distribution without introducing additional manufacturing complexity and potential defects, such as voids during filling. The trench width is to ensure that the trench can be uniformly distributed in the terminal region, improving the uniformity of the electric field and preventing early breakdown caused by excessive local electric field concentration. By introducing shallow trenches, the electric field distribution can be effectively changed, which helps the vertical expansion of the depletion region, thereby improving the device's breakdown voltage capability. Compared with straight or rectangular trenches, U-shaped or semi-elliptical trench designs are more suitable for... The trench shape allows for a more uniform distribution of the electric field, preventing it from concentrating in specific areas and thus reducing electric field spikes. This improves the device's breakdown voltage. This design helps the electric field distribute more smoothly within the terminal region when the device is subjected to high voltage, preventing premature breakdown caused by excessively high local electric field strength. The width and depth of the doped region allow for a smooth and uniform expansion of the depletion region within the device's terminal region, significantly optimizing the electric field distribution, reducing the occurrence of electric field spikes, and further enhancing the device's withstand voltage and stability. By adjusting the width and depth of the doped region, the electric field strength at the device's terminal can be precisely controlled, preventing early breakdown caused by excessive electric field concentration.

[0036] It should be noted that the smooth contour of the U-shaped / semi-elliptical trench effectively disperses and releases stress, significantly reducing the stress concentration factor. In terms of filling technology, the U-shaped / semi-elliptical trench also improves step coverage. In trenches with right angles or high aspect ratios, CVD (chemical vapor deposition) filling can easily produce "keyholes" or voids because the deposition rate is faster at openings and corners, potentially sealing the top of the trench prematurely before the interior is full. The smooth slope and rounded corners of the U-shaped / semi-elliptical trench greatly improve the step coverage of the deposited film, allowing the filling material to flow more smoothly and evenly to the bottom of the trench, achieving perfect filling without voids or gaps. This not only improves the isolation quality but also enhances the mechanical stability of the structure.

[0037] According to some further exemplary embodiments of this application, the doping concentration of the doped region is less than the doping concentration of the filling layer, wherein the doping concentration of the filling layer is 5.0 × 10⁻⁶. 19 cm-3 -2.0×10 20 cm -3 In this embodiment, the high-doping concentration filler layer can form a stronger depletion region in the termination structure, which helps to better modulate the electric field distribution in the termination region, thereby further avoiding the occurrence of electric field spikes and further improving the breakdown voltage and reliability of the device. The selection of the filler layer concentration range is to optimize the electrical performance of the filler layer and ensure that its function in the termination structure is maximized. This design allows the filler layer to effectively interact with the drift region to generate the required vertical electric field, which promotes the uniform diffusion of the depletion region from the main junction doped region to the termination region, thereby significantly reducing the electric field concentration phenomenon and avoiding premature breakdown of the device under high-voltage applications.

[0038] According to some further exemplary embodiments of this application, such as Figure 1 As shown, the composite terminal structure further includes a main junction doped region 13 located in the substrate structure 10. The main junction doped region 13 is also located on one side of the plurality of doped regions 11 in the predetermined direction. The doping type of the main junction doped region 13 is the same as that of the doped regions 11, and the doping concentration of the main junction doped region 13 is greater than that of the doped regions 11. In this embodiment, the high doping concentration of the main junction doped region ensures the formation of a high-quality PN junction with the drift region, thereby optimizing the electric field distribution, reducing electric field spikes, and improving the device's breakdown voltage performance and reliability.

[0039] Specifically, in the embodiments of this application, the main junction doped region includes multiple spaced ion implantation regions, which together with the drift region form multiple PN junctions to constitute the main junction.

[0040] In an exemplary embodiment, the doped region body has opposing first and second edges, the first edge being the edge closer to the main junction doped region, and the second edge being the edge farther from the main junction doped region; the trench has opposing third and fourth edges, the third edge being the edge closer to the main junction doped region, and the fourth edge being the edge farther from the main junction doped region; the distance between the first edge and the third edge in the predetermined direction is greater than the distance between the second edge and the fourth edge in the predetermined direction. In this embodiment, the distance between the first edge and the third edge in the predetermined direction is greater than the distance between the second edge and the fourth edge in the predetermined direction. This design facilitates lateral depletion, reduces the likelihood of forming a double-peak electric field, and improves the device's breakdown voltage performance.

[0041] According to some other exemplary embodiments of this application, the spacing between adjacent doped regions increases sequentially along the direction from the main junction doped region to the doped region. In this embodiment, the increasing spacing helps to form a depletion region expansion pattern that gradually changes from the main junction region to the terminal region. This means that the electric field lines gradually flatten as the spacing increases, avoiding sudden changes in electric field intensity and reducing the occurrence of electric field spikes, which is key to improving the device's breakdown voltage capability.

[0042] According to some other exemplary embodiments of this application, the distance between the first edge and the third edge in the predetermined direction is not less than 0.3 μm, and the distance between the second edge and the fourth edge in the predetermined direction is not less than 0.3 μm. In this embodiment, ensuring that the minimum distance between the first edge and the third edge, and between the second edge and the fourth edge is not less than 0.3 μm effectively prevents penetration breakdown, assists in lateral depletion, and makes it less likely to form a bimodal electric field.

[0043] In other embodiments, such as Figure 1 As shown, the composite terminal structure further includes: an insulating dielectric layer 14 located on the surface of the substrate structure 10 and on the portion of the doped region body away from the substrate structure 10; a metal layer 15 located on the surface of the filling layer 12 away from the substrate structure 10, on the remaining portion of the doped region body away from the substrate structure 10, and on the portion of the insulating dielectric layer 14 away from the substrate structure. The substrate structure 10 includes: a substrate 101; a drift region 102 located on the substrate 101, wherein the doping type of the drift region 102 is the same as the doping type of the substrate 101, the doping concentration of the drift region 102 is less than the doping concentration of the substrate 101, and a plurality of doped regions 11 are located in the drift region 102, wherein the surface of the doped region 11 away from the substrate 101 overlaps with the portion of the surface of the drift region 102 away from the substrate 101. In this embodiment, the presence of the insulating dielectric layer can effectively prevent the accumulation of charge on the surface, reduce the intensity of the surface electric field, thereby reducing the possibility of electric field spikes and improving the breakdown voltage and reliability of the device. The metal layer can serve as a front electrode, providing good ohmic contact, which is beneficial for current transmission. When the metal layer and the fill layer are at the same potential, it can act as a buried field plate, further regulating the electric field distribution inside the device, especially in the region near the surface, ensuring a more uniform electric field distribution and preventing premature surface breakdown. By forming a low-doped drift region on the substrate, a gradient doping structure is formed with the high-doped substrate. This structure enables the electric field to be more uniformly distributed inside the device, rather than concentrated on the surface, thereby improving the overall breakdown voltage and withstand voltage performance of the device. This is because the low-doped drift region can withstand higher electric field strengths without causing electric field concentration and early breakdown.

[0044] Specifically, the substrate is an N-type doped silicon carbide single crystal substrate; the drift region is formed on the substrate surface to form the drift channel of the power device.

[0045] Specifically, the doped regions are located in the terminal region outside the device cell region. Multiple doped regions of the same width and depth are provided, and the spacing between the multiple doped regions is distributed in an increasing manner to form the terminal doped layer. The filling layer is located on the right side of the doped region. The insulating dielectric layer is used to protect the surface structure of the device. The doping concentration of the main junction doped region is greater than that of the doped region. The doping ions of the doped region are Al ions, which are implanted in two stages. The spacing between the doped regions increases by 0.5 μm from the inside to the outside, and the number of doped regions is 6 or more. The material of the filling layer can be P-type gallium nitride (GaN), which can improve the breakdown voltage of the device by depleting the drift region below. The minimum distance between the boundary of the filling layer and the boundary of the doped region is 0.3 μm, which allows the depletion region to expand outward.

[0046] Specifically, the fabrication method of the composite terminal structure is as follows: 1) Provide an N+ type silicon carbide substrate, which is composed of a doping concentration of 5×10⁻⁶. 18 cm -3 The substrate is composed of an N-type material with a thickness of 350 μm. An N-type drift region is fabricated on the upper side of the substrate, typically doped with arsenic or antimony. The thickness of the N-type drift region ranges from 5 μm to 20 μm, and the doping concentration is 9 × 10⁻⁶. 15 cm -3 Up to 3×10 16 cm -3 Different device withstand voltages can be obtained by selecting different epitaxial resistivities and different epitaxial thicknesses; 2) After depositing a mask layer in the terminal region, a P-type doped region is formed by photolithography and implantation twice. The dopant ions in the P-type doped region are Al ions, and the first implantation dose is 2.0 × 10⁻⁶. 14 cm -3 Energy 420keV-500keV, second injection dose 2.0×10 14 cm -3The energy is 200keV-250keV. The depth of the P-type doped region is 0.8μm-1.0μm, and the width is 2.5μm-4.5μm. The spacing of the P-type doped region increases by 0.5μm from the inside to the outside. After depositing a mask layer in the cell region, four photolithographic implantations are performed to form the P+ type main junction doped region. After the main junction implantation is completed, a carbon film needs to be deposited and then annealed. The annealing temperature is 1150℃ and the annealing time is 30min. 3) Trenches with a depth of 0.2μm-0.3μm and a width of 0.8μm-1.0μm are formed in the P-type doped region by etching. The minimum distance between the trench boundary and the P-type doped region boundary is 0.3μm. After the trench is formed, a 0.2μm-0.3μm P-type gallium nitride (GaN) dielectric is deposited to obtain a filling layer. The doped ion is Mg ion, and the doping concentration is 5.0×10 19 cm -3 Up to 2.0×10 20 cm -3 After deposition, CMP (Chemical Mechanical Polishing) is performed, followed by cleaning; 4) An insulating dielectric layer is deposited above the N-type drift region. The insulating dielectric layer is silicon dioxide with a thickness of 800 nm. Through holes are formed by etching. On top of the filling layer, front metals Ti, Al, and Cu are deposited sequentially to form a metal layer.

[0047] Specifically, the insulating dielectric layer can also be made of high-k dielectric materials such as silicon nitride.

[0048] Specifically, the fundamental idea behind termination technology is to allow the depletion region to expand smoothly and uniformly within the termination area, avoiding electric field spikes. Multiple trenches are etched into the termination region and filled with P-type GaN. This is equivalent to introducing multiple new, controllable PN junctions at the edge of the original main junction. This P-type GaN filling layer forms an auxiliary junction with the N-type drift region of the device. The P-type GaN filling layer carries a fixed negative charge (ionized acceptor), while the N-type drift region carries a fixed positive charge (ionized donor). Under reverse bias, the charges in these two regions couple with each other, generating a vertical electric field. This vertical electric field forces the depletion region of the N-type drift region to not only extend vertically downwards, but more importantly, laterally into the termination region. This transforms the boundary of the depletion region from the original sharp edge of the main junction into a smoother, gradually changing curve, thus significantly reducing electric field spikes.

[0049] Specifically, by introducing P-type doped regions, the doping concentration gradient of the main junction is gradually reduced, making the electric field distribution more linear. The doping concentration and depth of the P-type doped regions can be precisely designed to optimize this soft depletion process.

[0050] Specifically, when the filler layer material includes P-type polycrystalline silicon, the P-type filler layer is connected to a metal layer and covered by an insulating dielectric layer, forming a buried field plate structure. The metal layer and the P-type filler layer are at the same potential. Under reverse bias, there is a high potential difference relative to the N-type drift region. The electric field in the insulating dielectric layer modulates the electric field distribution on the semiconductor surface below, effectively suppressing surface breakdown. The presence of the P-type filler layer makes this field plate "buried" inside the semiconductor, rather than on the surface. The buried P-type filler layer provides a fixed and controllable negative charge, which makes the electric field modulation effect more direct and effective, further flattening the electric field distribution, thus making the terminal performance more stable and reliable.

[0051] Specifically, the filling layer material utilizes the role of P-type gallium nitride: the core principle is heterojunction polarization field-induced enhanced depletion. GaN is a strongly polarized material. When GaN is epitaxially grown on SiC, piezoelectric polarization occurs due to the difference in lattice constants and thermal expansion coefficients between the two. At the same time, GaN itself has spontaneous polarization. These polarization effects at the SiC / GaN heterojunction interface generate fixed positive polarization charges. These fixed positive polarization charges play a role similar to "donors." They compensate with the ionized acceptors (negatively charged) in P-GaN and P-SiC, significantly enhancing the depletion effect on the P-type filling layer and its surrounding P-SiC region. This is equivalent to applying a built-in "pre-depletion" effect generated by the polarization field, allowing the entire termination structure to begin effectively modulating the electric field at a lower reverse bias. This effect reduces the sensitivity of the termination structure to the doping dose in the P-region, widening the "window" of the traditional JTE process. Band engineering and carrier confinement: The band structure of SiC / GaN heterojunction is discontinuous. For the valence band, there is usually a significant valence band level, that is, the valence band top of GaN is lower than that of SiC. This valence band level forms a potential barrier for holes at the P-GaN filling layer. When the device is reverse biased, this barrier can effectively suppress the flow of holes injected from the anode to the high electric field region, thereby reducing the probability of impact ionization and leakage current, which helps to improve the avalanche breakdown voltage. Dual RESURF effect: Lateral RESURF: Achieved by charge balance between the P-SiC region and the N-SiC drift region, which is the principle of traditional RESURF; Vertical / heterojunction RESURF: Achieved by charge coupling between the P-GaN filling layer (and its polarization charge) and the underlying N-SiC drift region, which is a vertical charge balance across the heterojunction. This dual RESURF effect can more effectively "flatten" and "stretch" the sharp electric field peaks that were originally concentrated at the edge of the main junction, making the lateral electric field distribution more uniform and flat. The presence of the P-GaN filling layer, especially its edge, becomes a new and controllable electric field peak point. By sharing the voltage with the edge of the main junction, it shares the voltage withstand task, thereby significantly improving the overall breakdown voltage.

[0052] In summary, the composite termination structure of this application, by implanting a doped region into the termination and introducing a shallow trench within the doped region, allows for more complete depletion of the termination region, thereby improving the device's termination breakdown voltage and termination protection efficiency. Employing P-type light doping technology, the termination requires only two implantations, solving the problems of field-limiting ring structures being sensitive to implantation dose and having a narrow dose window, ensuring the device's feasibility in actual production. By using P-type gallium nitride or P-type polysilicon implanted into the shallow trench, the surface electric field intensity can be reduced, suppressing electric field concentration at the edges, preventing premature device breakdown, and improving device reliability. Through optimization... The design of the trench shape, size, and distribution allows the composite structure to effectively reduce terminal width and die size under the same withstand voltage. Shallow trenches solve the problems of difficult etching, long etching time, and voids in the filling medium caused by the high hardness of silicon carbide, ensuring the feasibility of the device in actual production. The small size of shallow trenches can effectively reduce the difficulty of etching silicon carbide trenches and filling medium. Compared with the fabrication of high aspect ratio vertical trenches of silicon carbide, shallow trenches have lower process difficulty, shorter etching time, and are easier to improve efficiency, enabling large-scale production and meeting the application needs of power devices under higher voltage conditions in the future.

[0053] This application also provides a semiconductor device including any of the above-described composite terminal structures.

[0054] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0055] As can be seen from the above description, the embodiments of this application achieve the following technical effects:

[0056] In the composite terminal structure of this application, the composite terminal structure includes a substrate structure, multiple doped regions located in the substrate structure, and multiple filled regions. Each doped region includes a doped region body and trenches, with each filled layer correspondingly located in one of the trenches. The doping type of the doped regions differs from that of the substrate structure, while the doping type of the filled layers is the same as that of the doped regions. The material of the filled layers includes semiconductor materials. Compared to the poor breakdown voltage performance of terminal structures in existing silicon carbide power devices, this application, by introducing trenches in the doped regions and filling them with a doping material of the same type as the doped regions (but different from the substrate), can create additional PN junctions in the terminal region of the device. This allows for the formation of additional charge regions in a predetermined direction, helping to balance the charge distribution in the terminal region, resulting in a more uniform electric field, reducing electric field spikes, and thus improving the breakdown voltage and stability of the device.

[0057] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A composite terminal structure, characterized in that, include: Substrate structure; Multiple doped regions spaced apart in a predetermined direction are located in the substrate structure. Each doped region includes a doped region body and a trench. The trench is located in the doped region body. The doping type of the doped region is different from the doping type of the substrate structure. The predetermined direction is the direction from the cell to the terminal. Multiple filling layers are located in the trench in a one-to-one correspondence, and the doping type of the filling layer is the same as the doping type of the doped region.

2. The composite terminal structure according to claim 1, characterized in that, The filling layer is made of gallium nitride or polycrystalline silicon.

3. The composite terminal structure according to claim 1, characterized in that, The trench has a depth of 0.2μm-0.3μm and a width of 0.8μm-1.0μm. The trench shape includes a U-shape or a semi-ellipse. The doped region body has a depth of 0.8μm-1.0μm and a width of 2.5μm-4.5μm. The direction of the depth is parallel to the thickness direction of the substrate structure, and the direction of the width is parallel to the predetermined direction.

4. The composite terminal structure according to claim 1, characterized in that, The doping concentration of the doped region is less than the doping concentration of the filling layer, and the doping concentration of the filling layer is 5.0 × 10⁻⁶. 19 cm -3 -2.0×10 20 cm -3 .

5. The composite terminal structure according to claim 1, characterized in that, The composite terminal structure also includes: A main junction doped region is located in the substrate structure. The main junction doped region is also located on one side of the plurality of doped regions in the predetermined direction. The doping type of the main junction doped region is the same as that of the doped regions. The doping concentration of the main junction doped region is greater than that of the doped regions.

6. The composite terminal structure according to claim 5, characterized in that, The doped region body has a first edge and a second edge, wherein the first edge is the edge closer to the main junction doped region and the second edge is the edge farther away from the main junction doped region; The trench has a third edge and a fourth edge, the third edge being the edge closer to the main junction doped region, and the fourth edge being the edge farther away from the main junction doped region; The distance between the first edge and the third edge in the predetermined direction is greater than the distance between the second edge and the fourth edge in the predetermined direction.

7. The composite terminal structure according to claim 5, characterized in that, Along the direction from the main junction doped region to the doped region, the spacing between adjacent doped regions increases sequentially.

8. The composite terminal structure according to claim 6, characterized in that, The distance between the first edge and the third edge in the predetermined direction is not less than 0.3 μm, and the distance between the second edge and the fourth edge in the predetermined direction is not less than 0.3 μm.

9. The composite terminal structure according to claim 1, characterized in that, The composite terminal structure further includes: an insulating dielectric layer located on the surface of the substrate structure and on a portion of the doped region body away from the substrate structure; and a metal layer located on the surface of the fill layer away from the substrate structure, the remaining surface of the doped region body away from the substrate structure, and the portion of the insulating dielectric layer away from the substrate structure. The substrate structure includes: a substrate; a drift region located on the substrate, wherein the doping type of the drift region is the same as the doping type of the substrate, the doping concentration of the drift region is less than the doping concentration of the substrate, a plurality of doped regions are located in the drift region, and the surface of the doped region away from the substrate overlaps with a portion of the surface of the drift region away from the substrate.

10. A semiconductor device, characterized in that, The composite terminal structure includes any one of claims 1 to 9.

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