Photovoltaic silicon single crystal wafer group, crystal column group, photovoltaic cell and photovoltaic module

Abstract

The invention discloses a photovoltaic silicon single crystal wafer group, a crystal column group, a photovoltaic cell and a photovoltaic module. The wafer group comprises a rectangular silicon wafer intercepted from the middle of a base circle silicon wafer and non-rectangular polygonal silicon wafers which are symmetrically intercepted from the periphery of the rectangular silicon wafer and are axisymmetric, and the interception size of the rectangular silicon wafer is determined according to the distribution of vacancy type point defect density CV and self-gap type point defect density CI of the base circle silicon wafer. And determining distribution of minority carrier lifetime of different radial areas of the base circle silicon wafer, so that the rectangular silicon wafer is in an area with CV-CI greater than or equal to 0, and the ratio d of the distance from four corners of the rectangular silicon wafer to the lowest point of minority carrier lifetime of the edge area of the base circle silicon wafer to the diameter of the base circle silicon wafer is greater than or equal to 2% and less than or equal to 8%. According to the method, two types of silicon wafers are segmented based on a silicon wafer mass distribution rule, respective potentials are fully excavated by adopting different battery processes, and the area utilization rate of the base circle silicon wafer exceeds 90% while a high-quality photovoltaic module is obtained.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of photovoltaic power generation, in particular to a photovoltaic silicon wafer group, a crystal column group, a photovoltaic cell and a photovoltaic module. BACKGROUND

[0002] The background of the present application is a square, hexagonal and octagonal silicon wafer cut from a cylindrical silicon single crystal column and a photovoltaic cell and a photovoltaic module prepared therefrom.

[0003] Disadvantages of the prior art; 1) The difference in quality parameters of different regions of the silicon wafer is not considered.

[0004] The quality parameters of the material between the edge and the center of the Czochralski silicon single crystal wafer have a large difference, and the prior art does not distinguish between them when making photovoltaic cells on the same silicon wafer, resulting in the restriction of the lower quality region on the higher quality region to improve the photoelectric conversion efficiency, the mechanical stress, the higher self-interstitial point defect density C I , the lower minority carrier lifetime in the edge part, which all reduce the conversion efficiency and operating reliability of the overall photovoltaic cell.

[0005] 2) The standardization of the diced silicon wafer is low.

[0006] The utilization rate of the silicon wafer of the prior art is low. In particular, the material utilization rate of the most commonly used rectangularly cut silicon single crystal wafer is the lowest. In order to improve the area utilization rate of the base circle silicon wafer, many silicon wafer cutting methods based on hexagonal, octagonal and edge skin reuse have been proposed. However, the shape and size of the silicon wafer cutting method of the prior art are less considered in terms of compatibility with the size of the standard photovoltaic module, and it is not easy to realize the standardization and serialization of the product, which is not conducive to reducing the production, transportation, installation and operation costs.

[0007] 3) The diced silicon wafer often has sharp corners, causing stress concentration.

[0008] The diced silicon wafer of the prior art often has sharp corners, which is easy to cause edge collapse and corner missing, affecting the quality of the product and causing many inconveniences in use.

[0009] 4) The bypass diode is complex to set and has a high cost.

[0010] The area of the connected cells in the prior art is small, and the number of series-connected cells is large, which increases the output voltage of the photovoltaic module and requires more bypass diodes for bypass protection, increasing the complexity of the line connection. To solve this problem, the prior art uses a method of first connecting in series and then connecting in parallel, but this also makes the connection of the photovoltaic module complex, increasing the cost, failure rate and fire risk.

[0011] To solve at least one of the deficiencies in the prior art, the present application is proposed.

[0012] Nomenclature For the convenience of expression, the following nomenclature and concepts are explained in this application: Base circle: The profile circle of the cross section of a cylindrical silicon single crystal column or the profile circle of a circular silicon wafer cut from the cylindrical silicon single crystal column. If the silicon single crystal cross section deviates far from a circle and does not meet the subsequent slitting requirements, the base circle is an excircle that can contain each part after slitting after preliminary processing.

[0013] Photovoltaic silicon single crystal wafer: A silicon single crystal wafer used for preparing a photovoltaic cell, which is also referred to as "silicon wafer" in this application.

[0014] Base circle silicon wafer: A photovoltaic silicon single crystal wafer with an excircle as the base circle.

[0015] Rectangular silicon wafer: A rectangular or square silicon wafer cut from the middle of the base circle silicon wafer in this application.

[0016] Pentagonal silicon wafer: A quasi-pentagonal silicon wafer with axial symmetry cut from the outer periphery of the rectangular silicon wafer in this application.

[0017] Hexagonal silicon wafer: A quasi-hexagonal silicon wafer with axial symmetry cut from the outer periphery of the rectangular silicon wafer in this application, and one side of the hexagon can be a straight line or a curve with a chord height of 1% of the base circle diameter.

[0018] Wafer group: 1) All rectangular silicon wafers and non-rectangular polygonal silicon wafers that can be used to prepare photovoltaic cells cut from the same base circle silicon wafer; 2) All non-rectangular polygonal silicon wafers or non-rectangular polygonal cell wafers used to form a single cell parallel group.

[0019] Base circle silicon column: A cylindrical silicon column with the shape of the base circle silicon wafer as the base.

[0020] Rectangular silicon column: A rectangular silicon column with the shape of the rectangular silicon wafer as the base.

[0021] Pentagonal silicon column: A pentagonal silicon column with the shape of the pentagonal silicon wafer as the base.

[0022] Hexagonal silicon column: A hexagonal silicon column with the shape of the hexagonal silicon wafer as the base.

[0023] Column group: All rectangular silicon pillars and non-rectangular polygonal silicon pillars divided from the same base circle silicon pillar.

[0024] Chord of a curve, height of a chord of a curve: In this application, the chord of a curve is defined as the line connecting the two endpoints intersecting the adjacent sides; the height of a chord of a curve is defined as the maximum distance between the pole on the curve and the chord of the curve; a straight line is a curve with a chord height of zero, and the curve in this application includes a straight line.

[0025] Quasi-rectangular (quasi-n-polygon, etc.): Refers to a rectangle (or n-polygon) that can be regarded as a rectangle (or n-polygon) in engineering in the presence of some gaps, machining allowance, chamfer, transition arc, rather than a perfect rectangle (or n-polygon) in the geometric sense.

[0026] Median of the minority lifetime of a silicon wafer (silicon pillar): Median (or median), refers to the value in the middle position of a set of data arranged in order of measurement value, or the average of the two values in the middle position. In this application, the median of the minority lifetime of a silicon wafer (silicon pillar) refers to the median of all data measured at other points after excluding the data measured within 20 mm of the base circle of the silicon wafer (silicon pillar).

[0027] Test method: Along the diameter direction of the base circle silicon pillar, the distance is not greater than 20 mm, and the median is taken, and the median is obtained.

[0028] Stacked photovoltaic cell: Refers to a combined photovoltaic cell with top and bottom cell stacked arrangement and light path series connection.

[0029] Back contact photovoltaic cell: A photovoltaic cell with positive and negative electrodes drawn from the back surface (non-main light receiving surface).

[0030] Two-thirds, three-thirds: A rectangular silicon wafer with the same length as the edge length of the aforementioned rectangular silicon wafer and the same width as half the edge length of the aforementioned rectangular silicon wafer is called a two-thirds wafer; a rectangular silicon wafer with the same length as the edge length of the aforementioned rectangular silicon wafer and the same width as one-third the edge length of the aforementioned rectangular silicon wafer is called a three-thirds wafer.

[0031] Lowest point of minority carrier lifetime in the edge region of the base circle silicon wafer: Example: According to the results of simulation and actual measurement, for the silicon single crystal pulled by the Czochralski method, the "minimum minority carrier lifetime point in the edge region of the silicon wafer in the base circle" is at the circumference of the base circle. According to different silicon single crystals, the "minimum minority carrier lifetime point in the edge region of the silicon wafer in the base circle" can also be in the region close to the circumference of the base circle, for example, it can be 0.1mm-100mm, 0.12mm-50mm, 0.13mm-30mm, 0.13mm-20mm, 0.13mm-10mm, etc. away from the circumference of the base circle. SUMMARY

[0032] To overcome at least one of the above deficiencies of the prior art, the present application provides the following technical solutions: In a first aspect, the present application provides a photovoltaic silicon single crystal wafer set with a (100) crystal plane, the wafer set comprising a rectangular silicon wafer taken from the middle of a base circle silicon wafer and an axisymmetric non-rectangular polygonal silicon wafer taken symmetrically from the periphery of the rectangular silicon wafer, the rectangular silicon wafer being taken according to the distribution of the vacancy-type point defect density C V and the self-interstitial-type point defect density C I of the base circle silicon wafer, so that the rectangular silicon wafer is in the region where C V -C I ≥ 0, the region where C V -C I ≥ 0 can be determined from the distribution of C V -C I in the silicon single crystal rod obtained by simulation and simulation of the initial conditions and boundary conditions by CGSim, FEMAG, etc.; after engineering verification, the specific operation can make the rectangular silicon wafer include its four corners, which are controlled in the region where the minority carrier lifetime of the base circle silicon wafer is higher than 80% of its "median value"; and / or, according to the distribution of the minority carrier lifetime in different regions of the base circle silicon wafer, the ratio d of the distance between the four corners of the rectangular silicon wafer and the inferred minimum point of the minority carrier lifetime in the edge region of the base circle silicon wafer to the diameter of the base circle silicon wafer is 2%≤d≤8%.

[0033] The beneficial effects are as follows: See Figure 6 , Figure 7 , Figure 8 .

[0034] Figure 6 is a simulation calculation example of the stress in a silicon single crystal rod with a diameter of 300mm, and Figure 6 It can be seen that at a meaningful pulling rate, the von Mises stress of the silicon single crystal in the range of about 10mm from the edge greatly increases. The source of stress is that when the silicon single crystal is prepared, the heat dissipation of the surface of the silicon single crystal rod and the pulling of the silicon single crystal rod cause the crystal crystallization interface to be concave, the higher the pulling rate, the greater the slope of the edge of the concave surface, and the greater the stress in the crystal. Therefore, Figure 6The stress growth curve shown is common to Czochralski silicon single crystals.

[0035] Figure 7 is a distribution diagram of C V -C I , wherein C V is the concentration of vacancy-type defects in a silicon single crystal, C I is the concentration of interstitial-type microdefects in a silicon single crystal, wherein C I has a much greater negative effect on the minority carrier lifetime of a silicon single crystal than C V , when C V -C I is close to 0, C V and C I have the least effect on the minority carrier lifetime of a silicon single crystal. Therefore, the change of C V -C I corresponds well to the minority carrier lifetime of a silicon single crystal. Thus, the rectangular silicon wafer is placed in the region of C V - C I ≥ 0, which is determined by engineering, or by making the rectangular silicon wafer include its four corners in the region where the minority carrier lifetime of the base circle silicon wafer is higher than 80% of its "median value".

[0036] Figure 8 is a measured value of the radial distribution of the minority carrier lifetime of a silicon single crystal column with a diameter of 315 mm, which gives the distribution of the minority carrier lifetime of a silicon single crystal along the radial direction of the silicon rod in the isodiametric growth section of the silicon rod. As can be seen from the figure, the edge of the silicon single crystal column about 10 mm thick is a low minority carrier lifetime region.

[0037] The low minority carrier lifetime region is strongly related to the stress distribution of the silicon single crystal and the change of C V -C I .

[0038] Therefore, it can be seen that the silicon wafer obtained in the middle of the base circle silicon wafer has smaller stress and longer minority carrier lifetime, and the rectangular silicon wafer obtained in the middle of the base circle silicon wafer has better quality.

[0039] Therefore, one of the beneficial effects of the present application is that, according to the distribution of the vacancy-type point defect density C V and the interstitial-type point defect density C I of the base circle silicon wafer, the rectangular silicon wafer is placed in the region of C V - C Ia region with a minority carrier lifetime of ≥ 0, or the position of the corners of the rectangular silicon wafer is determined by the distribution of the minority carrier lifetime of the regions of the base circle silicon wafer radially, the ratio d of the distance between the corners of the rectangular silicon wafer to the lowest point of the minority carrier lifetime of the edge region of the base circle silicon wafer and the diameter of the base circle silicon wafer is controlled, and / or, the rectangular silicon wafer is made to include its four corners in the region of the base circle silicon wafer where the minority carrier lifetime is higher than 80% of its "median" value, preferably both, so that any point (for example, the corners) of the rectangular silicon wafer is avoided from the possible influence of the von Mises stress jump range, and the C I The possible influence of the region with high defect density and low minority carrier lifetime is avoided, so as to improve the quality of the rectangular silicon wafer. It is beneficial to optimize the photovoltaic cell manufacturing process of the rectangular silicon wafer in the middle of the silicon wafer and the non-rectangular polygonal silicon wafer in the edge of the silicon wafer respectively, to fully tap the potential of each silicon wafer, and to obtain the best quality photovoltaic cell combination.

[0040] Further, the non-rectangular polygonal silicon wafer is an axisymmetric pentagonal silicon wafer or an axisymmetric hexagonal silicon wafer, and if it is the hexagonal silicon wafer, one of its sides is a curve, the chord height of the curve is less than 1% of the diameter of the base circle silicon wafer, and the longest side of the pentagonal silicon wafer or hexagonal silicon wafer is coordinated with the long side of the rectangular silicon wafer. By coordination, it means that after considering the gap, processing allowance, transition chamfer and other factors, the longest side of the pentagonal silicon wafer or hexagonal silicon wafer is flush with the long side of the rectangular silicon wafer.

[0041] Further, the pentagonal silicon wafer or hexagonal silicon wafer is a first silicon wafer, the pentagonal silicon wafer or hexagonal silicon wafer is cut along the symmetry axis to obtain a second silicon wafer, and n (n≥1) first silicon wafers and 2 second silicon wafers are spliced into a rectangle.

[0042] Further, the number of first silicon wafers is odd, and the odd number of first silicon wafers and 2 second silicon wafers are spliced into a rectangle compatible with the size of the rectangular silicon wafer. By compatible, it means that the width of the spliced rectangle is a simple fraction of the width of the rectangular silicon wafer, such as 1 / 2, 1 / 3, etc., and the length of the spliced rectangle is a simple multiple of the length of the rectangular silicon wafer, such as 1, 2, 3,..., 12. It should be noted that the size here is only to obtain a photovoltaic module width compatible with the rectangular silicon wafer and a length of the series, and is not an accurate size.

[0043] For example, one of the pentagonal silicon wafers or hexagonal silicon wafers is cut along the symmetry axis to form a rectangle with a length-width ratio of 2:1 or 3:1 with one of the pentagonal silicon wafers or hexagonal silicon wafers. Products that are completely consistent with conventional "two-split" and "three-split" electrical and installation technical parameters can be made.

[0044] Its beneficial effects are as follows: the size of the rectangular silicon wafer located in the middle of the base wafer is fully compatible with existing battery process equipment, photovoltaic module technical parameters, and photovoltaic power station system design, which is conducive to improving the standardization and compatibility of related batteries, modules, and power stations; when the non-rectangular polygonal silicon wafer adopts a pentagonal or hexagonal silicon wafer, the length of the pentagonal or hexagonal silicon wafer is the same as the length of one side of the central rectangular silicon wafer. After cutting one of the pentagonal or hexagonal silicon wafers along the axis of symmetry, the pentagonal or hexagonal silicon wafers can be spliced ​​into a rectangle compatible with the size of the rectangular silicon wafer. For example, they can be spliced ​​into the commonly used "three-part wafer" or "two-part wafer", so that the photovoltaic module can have the same external dimensions, output voltage, current, and power as existing products.

[0045] Furthermore, the ratio of the sum of the areas of the wafer group to the area of ​​the base wafer, k, is one of the following: 1) 88% < k ≤ 92%; 2) 92% < k ≤ 95%.

[0046] Furthermore, the thickness d of the silicon wafers of the same shape in the wafer group falls within one of the following ranges: 1) 50μm≤d<85μm; 2) 85μm≤d<98μm; 3) 98μm≤d<115μm; 4) 115μm≤d<135μm; 5) 135μm≤d<160μm.

[0047] This allows for the use of different silicon wafer thicknesses for silicon wafers of different areas, minimizing energy consumption and improving battery quality through different processes.

[0048] In a second aspect, the present invention provides a silicon single crystal pillar assembly for cutting photovoltaic silicon single crystal wafers with a (100) crystal plane, comprising a rectangular silicon pillar with the aforementioned rectangular silicon wafer as the base and a non-rectangular polygonal silicon pillar with the aforementioned non-rectangular polygonal silicon wafer as the base, wherein the angle between the direction of the generatrix of the silicon pillar and the <100> crystal direction is 0° to 3°.

[0049] Preferably, the non-rectangular polygonal silicon wafer is an axisymmetric pentagon or an axisymmetric hexagon, one side of which is a curve, and the ratio of the chord height of the curve to the diameter of the base circle silicon wafer is less than 1%.

[0050] Furthermore, the slitting of the silicon single crystal pillar assembly includes the following steps: 1) Determine the relative positions of the desired rectangular silicon pillar and the base circular silicon pillar, based on the vacancy-type point defect density C of the base circular silicon wafer. Vand the density of self-interstitial type point defects C I distribution, so that the rectangular silicon wafer is in the C V - C I ≥0 region; and / or, according to the ratio d of the distance between the edge of the base circle silicon wafer and the lowest point of the minority carrier lifetime of the edge region of the base circle silicon wafer to the diameter of the base circle silicon wafer, 2%≤d≤8%; 2) cutting along the edge of the base circle silicon wafer longitudinally to form two outer column surfaces, rotating the base circle silicon wafer, and cutting out 8 outer column surfaces with four times of feeding; 3) continuing to cut along the inside of the base circle silicon wafer longitudinally, rotating 90° twice to feed to form 4 column surfaces of the rectangular silicon column and the remaining column surfaces of the non-rectangular polygonal silicon column, obtaining 1 rectangular silicon column and 4 non-rectangular polygonal silicon columns; when the non-rectangular polygonal silicon column is a hexagonal silicon column, one column surface of the hexagonal silicon column is formed by the remaining part of the column surface of the base circle silicon wafer, or is processed into a flat surface.

[0051] In a third aspect, the present application provides a silicon single crystal photovoltaic cell prepared by using the silicon wafer in any of the photovoltaic silicon single crystal wafer groups described above, and the silicon single crystal photovoltaic cell is a back contact cell, or a silicon single crystal back contact photovoltaic cell in a laminated photovoltaic cell. The back contact cell provides convenient conditions for the series and parallel splicing of the cell.

[0052] Further, the silicon single crystal photovoltaic cell is prepared with a bypass diode, and the bypass diode provides bypass protection and freewheeling for the silicon single crystal photovoltaic cell itself and the photovoltaic cell connected in parallel therewith. The integrated bypass diode provides reliable and efficient bypass protection and freewheeling for the photovoltaic module with high voltage output.

[0053] Preferably, the bypass diode is a Schottky barrier diode, which has low conduction voltage drop and small conduction loss, and is suitable for photovoltaic modules.

[0054] In a fourth aspect, the present application provides a silicon single crystal wafer spliced cell, which is spliced by a first cell prepared from the axisymmetric hexagonal silicon wafer or pentagonal silicon wafer described above, and a second cell and a third cell obtained by axisymmetrically cutting the first cell, or a second cell and a third cell prepared by axisymmetrically cutting the hexagonal silicon wafer or pentagonal silicon wafer. The second cell and the third cell are in a mirror image relationship.

[0055] Understandably, the hexagonal silicon wafer or cell wafer is relatively shorter on one side due to further cutting after axisymmetrically cutting the aforementioned hexagonal silicon wafer or cell wafer, and can be regarded as not constituting an independent side, and the quasi-quadrilateral prepared therefrom can be regarded as a quadrilateral.

[0056] The spliced cell is conducive to obtaining a standardized size or a suitable output current and voltage.

[0057] In a fifth aspect, the present application provides a photovoltaic module, which is composed of the aforementioned silicon single crystal photovoltaic cell or silicon single crystal wafer splicing cell.

[0058] Preferably, the cell units in the photovoltaic module are u rows and one or two columns in terms of electrical connection and row-column relationship, each row is composed of v pieces of the first cell, 1 piece of the second cell, 1 piece of the third cell in parallel, and each column is composed of w pieces of the cell units in series; u, v, and w are natural numbers greater than or equal to 1.

[0059] The beneficial effects are: 1) The number of the second cell wafer and the third cell wafer is reduced, and the process cost is reduced. 2) The layout and installation of the external bypass freewheeling diode are facilitated.

[0060] The beneficial effects of the present application are: 1) Considering the distribution law of the quality level of technical elements on the silicon single crystal wafer, the rectangular silicon wafer in the middle of the base circle silicon wafer and the non-rectangular polygonal silicon wafer at the edge of the rectangular silicon wafer are divided, different photovoltaic cell manufacturing processes are used for the two types of silicon wafers, the potential of each silicon wafer is fully tapped, the optimal photovoltaic module is obtained, and the area utilization rate of the base circle silicon wafer can reach more than 90%.

[0061] 2) In the preferred scheme, the non-rectangular polygonal silicon wafer adopts an axisymmetric pentagon or an axisymmetric hexagon, the prepared photovoltaic cell has no sharp angle stress concentration phenomenon, is completely standardized compatible with the size and technical parameters of the existing photovoltaic cell, and can expand standardized series products of different lengths and output currents under the condition of the same width and the same output voltage; similarly, it can be completely standardized compatible with the size and technical parameters of the existing photovoltaic module, and can expand standardized series photovoltaic module products of different lengths and output voltages under the condition of the same width and the same output current.

[0062] 3) The small-current high-voltage photovoltaic module constructed by the non-rectangular polygonal cell is integrated with the bypass diode for hot spot protection and freewheeling on the cell wafer, so that the hot spot protection of the photovoltaic module has the advantages of high efficiency, reliability, low consumption and simple circuit compared with the external bypass diode of the prior art.

[0063] 4) The silicon column group processing technology is simple, in the preferred scheme, the silicon column has no sharp edge, and the silicon wafer has no sharp angle; by using the existing square opening or grinding equipment, one clamping and one reinforcement are performed, and one standard rectangular column silicon ingot and four pentagonal columns or six hexagonal silicon columns can be obtained by six times of feeding cutting in the bus direction.

[0064] 5) The single-column or double-column photovoltaic module cell unit connection mode is helpful for the arrangement of multiple bypass and freewheeling diodes for hot spot protection. BRIEF DESCRIPTION OF DRAWINGS

[0065] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed to be used in the embodiments will be briefly introduced as follows. It should be understood that the following drawings only show some of the embodiments of the present application, and therefore should not be considered as a limitation to the scope. For those skilled in the art, other related drawings can also be obtained without creative effort based on these drawings.

[0066] Figure 1 is a schematic diagram of the shapes of the rectangular silicon single crystal column and the four axis-symmetrical hexagonal silicon single crystal columns obtained by dividing the base circle silicon single crystal column according to the embodiment 1 of the present application; Figure 2 is a schematic diagram of the longitudinal section of the silicon photovoltaic cell prepared from the silicon single crystal wafer obtained in the embodiment 1 according to the embodiment 2 of the present application; Figure 3 is an electrical schematic diagram of the connection of the photovoltaic cell according to the embodiment 2 of the present application; Figure 4 is a schematic diagram of the shapes of the silicon single crystal photovoltaic cell and the connection group of the photovoltaic module prepared from the axis-symmetrical hexagonal silicon single crystal wafer according to the embodiment 3 of the present application; Figure 5 is a schematic diagram of the shapes of the silicon single crystal photovoltaic cell and the connection group of the photovoltaic module prepared from the axis-symmetrical hexagonal silicon single crystal wafer according to the embodiment 4 of the present application; Figure 6 is a simulation result of the internal stress of a φ300mm Czochralski silicon single crystal under a certain process condition; Figure 7 is a simulation distribution diagram of the difference between the vacancy type point defect density C V and the self-interstitial type point defect density C I of a φ300mm Czochralski silicon single crystal under a certain process condition; Figure 8 is a measured value of the radial distribution of the minority carrier lifetime of a silicon single crystal column with a diameter of 315mm.

[0067] BRIEF DESCRIPTION OF DRAWINGS 1-base circle silicon column; 11-rectangular silicon column; 12-hexagonal silicon column; 121-half hexagonal silicon column; 141-first cutting line; 142-second cutting line; 2-parallel cell unit; 20-substrate region; 21-first doped region; 22-second doped region; 3-bypass diode; 33-third doped region; 34-fourth doped region; 35-Schottky / electrode metal; 3533-Schottky barrier junction; 281-first electrode; 282-second electrode; 4-first photovoltaic module; 5-second photovoltaic module; 201-first cell; 202-second cell; 203-third cell; 481-first terminal; 482-second terminal. DETAILED DESCRIPTION

[0068] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some but not all of the embodiments of the present application. The apparatuses of the embodiments of the present application described and shown in the drawings can be arranged and designed in various different configurations.

[0069] Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative labor are within the scope of protection of the present application.

[0070] It should be noted that: similar reference numerals and letters represent similar items in the following drawings, therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.

[0071] In the description of the present application, it should be noted that the terms "upper", "lower", "inner", "outer" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship when the product of the present application is usually placed, and are only for the convenience of describing the present application and simplifying the description, and therefore cannot be understood as indicating or implying that the indicated device or element must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0072] In addition, if the terms "first", "second" and the like are used, they are only used for differentiation description, and cannot be understood as indicating or implying relative importance.

[0073] It should be noted that the features in the embodiments of the present application can be combined with each other without conflict.

[0074] Embodiment 1: Referring to Figure 1 A group of silicon single crystal columns cut from a base circle silicon column 1 with a diameter of φ292mm includes 1 rectangular silicon column 11 with a cross section of 182mmx182mm, 4 hexagonal silicon columns 12 with a cross section of a long side of 182mm, or half hexagonal silicon columns 121 further cut from the hexagonal silicon columns 12, and the included angle between the direction of the above silicon single crystal column generatrix and the <100> crystal direction is 0°~3°, the crystal direction of the symmetry axis of the hexagonal silicon column 12 is <100>, the distance δ of the edge line of the rectangular silicon column 11 from the vicinity of the base circle circumference of the minimum point of the cross section minority carrier lifetime of the base circle silicon column 1 is 17mm, and the ratio d of the diameter is 17 / 292≈5.8%, and the minority carrier lifetime τ of the edge line of the rectangular silicon column 11 is 1.5ms.e The median minority carrier lifetime τ of a rectangular silicon pillar with an 11-section cross-section m Satisfying τ e >0.8τ m Rectangular silicon pillar 11 is located in C V - C I Regions ≥ 0.

[0075] One cylindrical surface of the axisymmetric hexagonal silicon cylinder 12 is a curved surface, which is a portion of the cylindrical surface of the base circle silicon cylinder 1, and the chord height of the curved surface cross-section is less than 0.5 mm. The cutting method of the base circle silicon cylinder 1 includes the following steps: 1) With two parallel diamond wires, feed in the direction of the generatrix of the base circle silicon cylinder 1, and cut along the first cutting line 141. Each feed forms two cylindrical surfaces of the hexagonal silicon cylinder 12, and 8 cylindrical surfaces are cut out in 4 feeds. 2) Similarly, using two parallel diamond wires, feed along the generatrix of the base circle silicon pillar 1, cutting along the second cutting line 142. The first feed forms two parallel cylindrical surfaces of the rectangular silicon pillar 11. Temporarily reinforce the top of the base circle silicon pillar 1 appropriately, rotate 90°, and feed again along the second cutting line 142. Repeat the four feeds of step 1), for a total of six feeds, to cut one rectangular silicon pillar 11 and four hexagonal silicon pillars 12, forming a group of five silicon single crystal pillars. It is worth noting that one cylindrical surface of the hexagonal silicon pillar 12 is formed from a portion of the arc surface of the retained base circle silicon pillar 1.

[0076] The resulting silicon pillar assembly, after transverse slicing, has a rectangular silicon pillar 11 slice thickness of 110 μm and a hexagonal silicon pillar 12 slice thickness of 80 μm. This yields a set of photovoltaic silicon single-crystal wafers with a (100) crystal plane according to the present invention. If necessary, the rectangular silicon pillar 11 can be further slicing into bi-slice silicon pillars, tri-slice silicon pillars, etc., and the hexagonal silicon pillar 12 can be further slicing into semi-hexagonal silicon pillars 121.

[0077] Beneficial effects of Example 1: 1. The segmentation and slicing of silicon pillars results in a narrow distribution of quality characteristics among the silicon pillars in each region. The rectangular silicon pillars exhibit high and consistent minority carrier lifetime, which facilitates targeted product design and process optimization, thereby improving product quality and consistency. 2. The utilization rate of silicon wafer materials reaches 93%; 3. All silicon wafers have the same dimensions in one dimension of the plane, which allows for the design of photovoltaic module products with the same width, length, or series of lengths, facilitating product standardization and serialization; 4. The cut silicon wafers have no sharp corners, which helps to eliminate edge chipping and corner defects; 5. It can be easily achieved using existing squaring or grinding equipment at a low cost.

[0078] Example 2: See Figure 2 ,Figure 3 、 Figure 4 The first cell 201, the second cell 202 and the third cell 203 of the back contact silicon single crystal photovoltaic cell are prepared by using the silicon wafer prepared by the hexagonal silicon column 12 or the semi-hexagonal silicon column 121, and the first cell 201 is taken as an example for illustration.

[0079] The first doped region 21 (n-type) is prepared on the substrate region 20 (n-type as an example), the second doped region 22 (p-type) is prepared on the first doped region 21, the fourth doped region 34 (p-type) is prepared on the second doped region 22, and the third doped region 33 (n-type) is prepared on the fourth doped region 34. + + + + The first doped region 21 forms the first contact window of the substrate region 20 (the negative electrode of the first cell 201), and the second doped region 22 forms the charge separation pn junction and the second contact window (the positive electrode of the first cell 201) of the first cell 201 with the substrate region 20.

[0080] The fourth doped region 34 is prepared on the substrate region 20, the third doped region 33 is prepared on the fourth doped region 34, and the pn junction isolation of the pnp or npn structure is formed between the substrate region 20 and the third doped region 33; the Schottky / electrode metal 35 is prepared on the surface of the third doped region 33 to form the Schottky barrier junction 3533, one end of the Schottky / electrode metal 35 is the positive electrode of the Schottky barrier junction 3533, and the third doped region 33 is the negative electrode of the Schottky barrier junction 3533.

[0081] The positive electrode (the Schottky / electrode metal 35) of the Schottky barrier junction 3533 is connected with the negative electrode first electrode 281 of the first cell 201, and the negative electrode (the third doped region 33) is connected with the positive electrode second electrode 282 of the first cell 201, so that the hot spot protection and the fault current continuation of the first cell 201 are realized.

[0082] The beneficial effect of the embodiment is that the bypass diode 3 provides the hot spot protection and the fault current continuation for the single first cell 201 and the second cell 202 and the third cell 203 connected in parallel with the first cell 201.

[0083] The beneficial effect of the embodiment 2 is that: The bypass diode 3 is at the back of the cell and is isolated from the substrate region 20 by the pn junction, and does not affect the sunlight receiving and the photoelectric conversion of the first cell 201 on the premise of providing the hot spot protection and the fault current continuation for the first cell 201; the Schottky junction has low conduction voltage, reliable protection for the cell and small conduction power loss.

[0084] Embodiment 3: Referring to Figure 4 ​​​, the first photovoltaic module 4, the first cell 201, the second cell 202 and the third cell 203 are regarded as one piece of parallel cell unit 2, which is connected in series with the next piece of parallel cell unit 2 composed of the first cell 201, the second cell 202 and the third cell 203, and the recursion is sequentially performed until the preset voltage is reached, and finally the electric power is output by the first terminal 481 and the second terminal 482.

[0085] Since each piece of parallel cell unit 2 has three bypass diodes 3 to be selected to be connected, the first photovoltaic module 4 does not need to be externally connected with the bypass diode 3, and the most detailed hot spot protection and fault current continuation are provided.

[0086] Embodiment 4: Referring to Figure 5 , the second photovoltaic module 5, the parallel cell unit 2 includes 11 pieces of first cell 201, 1 piece of second cell 202 and 1 piece of third cell 203, the whole parallel cell unit 2 occupies one row of the second photovoltaic module 5, and there are u rows in total, which are connected in series to form a cell string group of the second photovoltaic module 5. Such series connection is performed until the preset voltage is reached, and finally the electric power is output by the first terminal 481 and the second terminal 482.

[0087] The embodiment has the following beneficial effects: 1) Due to the regional cutting, the parameters of each cell piece are consistent, which is beneficial to maximize the quality potential of the silicon single crystal piece; 2) The single-column series connection of the parallel cell unit facilitates the addition of multiple hot spot protection bypass current diodes; 3) The technical parameters are fully compatible with the existing photovoltaic module.

[0088] In summary, the technical scheme provided by the present application has significant technical advantages and cost advantages, and has great significance for the development of the industry.

[0089] The above embodiments are only preferred embodiments of the present application and are not used to limit the present application. For those skilled in the art, the present application can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application shall be included in the protection scope of the present application.

Claims

1. A group of photovoltaic silicon single crystal wafers having a (100) crystal plane, characterized in that, The wafer group includes rectangular silicon wafers taken from the middle of a base circular silicon wafer and axisymmetric non-rectangular polygonal silicon wafers taken symmetrically from the periphery of the rectangular silicon wafers, the rectangular silicon wafers having a size taken in accordance with the distribution of vacancy-type point defect density C V and interstitial-type point defect density C I of the base circular silicon wafer, the rectangular silicon wafers being in a region where C V - C I ≥ 0; and / or, in accordance with the distribution of minority carrier lifetime determined for different regions in the radial direction of the base circular silicon wafer, the ratio d of the distance between the corners of the rectangular silicon wafer and the minimum point of the minority carrier lifetime in the edge region of the base circular silicon wafer to the diameter of the base circular silicon wafer is 2% ≤ d ≤ 8%.

2. The photovoltaic silicon single crystal wafer set according to claim 1, wherein The non-rectangular polygonal silicon wafer is an axially symmetric pentagonal silicon wafer or an axially symmetric hexagonal silicon wafer, the hexagonal silicon wafer in which one side is a curve, the ratio of the chord height of the curve to the diameter of the base circle silicon wafer is less than 1%, and the longest side of the pentagonal or hexagonal silicon wafer is coordinated with the long side of the rectangular silicon wafer.

3. The photovoltaic silicon single crystal wafer set according to claim 2, wherein The pentagonal or hexagonal silicon wafer is a first silicon wafer, the pentagonal or hexagonal silicon wafer is cut along the symmetry axis to obtain a second silicon wafer, and n pieces of the first silicon wafer and 2 pieces of the second silicon wafer are spliced into a rectangle, wherein n≥1.

4. The photovoltaic silicon single crystal wafer set according to claim 3, wherein The number of the first silicon wafers is an odd number, and the odd number of the first silicon wafers and 2 pieces of the second silicon wafer are spliced into a rectangle compatible with the size of the rectangular silicon wafer, and the aspect ratio of the spliced rectangle is (3.3×m):1~(1.8×m):1, wherein m is a natural number of 1~12.

5. The photovoltaic silicon single crystal wafer set of claim 1, wherein The k value of the ratio of the sum of the areas of the wafer group to the area of the base circle silicon wafer is one of the following: 1）88%＜k≤92%； 2）92%＜k≤95%。 6. The photovoltaic silicon single crystal wafer set of claim 1, wherein The thickness d of the silicon wafers of the same shape in the wafer group is respectively in one of the following ranges: 1) 50μm≤d<85μm; 2) 85μm≤d<98μm; 3) 98μm≤d<115μm; 4) 115μm≤d<135μm; 5) 135μm≤d<160μm.

7. A group of silicon single crystal pillars for cutting a group of photovoltaic silicon single crystal wafers having a (100) crystal plane as claimed in any one of claims 1 to 6, characterized in that, The silicon wafer group includes a rectangular silicon column with the rectangular silicon wafer as the bottom and a non-rectangular polygonal silicon column with the non-rectangular polygonal silicon wafer as the bottom, and the angle between the direction of the silicon column generatrix and the <100> crystal direction is 0°~3°.

8. The silicon single crystal column set according to claim 7, wherein The bottom surface of the non-rectangular polygonal silicon column is an axially symmetric pentagon or an axially symmetric hexagon, and one side of the axially symmetric hexagon is a curve, and the ratio of the chord height of the curve to the diameter of the base circle silicon wafer is less than 1%.

9. The silicon single crystal column set according to claim 7, wherein The slicing of the silicon single crystal column group has the following steps: 1) determining the relative position of the rectangular silicon pillar to be obtained with respect to the base circle silicon pillar, on the basis of the distribution of the vacancy-type point defect density C V and the interstitial-type point defect density C I of the base circle silicon wafer, so as to place the rectangular silicon wafer in a region where C V - C I ≥ 0; and / or so as to place the ratio d of the distance between the edge of the rectangular silicon pillar and the edge of the base circle silicon pillar to the diameter of the base circle silicon wafer in the following range: 2% ≤ d ≤ 8%; 2) longitudinally slicing along the outer edge of the base circle silicon column to form two outer column surfaces, rotating the base circle silicon column, and cutting out 8 outer column surfaces through four times of feeding; 3) continuing to longitudinally slice along the inside of the base circle silicon column, rotating 90° twice to feed to form 4 column surfaces of the rectangular silicon column and the remaining column surfaces of the non-rectangular polygonal silicon column, to obtain one rectangular silicon column and 4 non-rectangular polygonal silicon columns; When the non-rectangular polygonal silicon column is a hexagonal silicon column, one column surface of the hexagonal silicon column is formed by the part of the column surface of the remaining base circle silicon column, or is processed into a flat surface.

10. A silicon single crystal photovoltaic cell, characterized by, The silicon single crystal photovoltaic cell is a back contact cell or a silicon single crystal back contact photovoltaic cell in a laminated photovoltaic cell prepared by using the silicon wafer in the silicon single crystal wafer group according to any one of claims 1-6.

11. The silicon single crystal photovoltaic cell of claim 10, wherein, The silicon single crystal photovoltaic cell is provided with a bypass diode, and the bypass diode provides bypass protection and freewheeling for the silicon single crystal photovoltaic cell itself and the photovoltaic cell connected in parallel therewith.

12. The silicon single crystal photovoltaic cell of claim 11, wherein, The bypass diode is a Schottky barrier diode.

13. A silicon single crystal wafer tiled cell prepared from the silicon wafers of the group of photovoltaic silicon single crystal wafers of claim 2, characterized in that, The first cell prepared from the axially symmetric hexagonal silicon wafer or the pentagonal silicon wafer, and the second cell and the third cell obtained by axially symmetric slicing of the first cell, or the second cell and the third cell obtained by axially symmetric slicing of the hexagonal silicon wafer or the pentagonal silicon wafer are spliced.

14. A photovoltaic module, characterized by, The silicon single crystal photovoltaic cell is prepared from the silicon single crystal photovoltaic cell according to any one of claims 10-12.

15. A photovoltaic module, characterized by, A silicon monocrystalline wafer spliced cell prepared from the silicon monocrystalline wafer as claimed in claim 13.

16. The photovoltaic module of claim 15, wherein, The cell unit in the photovoltaic module is u rows and one or two columns in terms of electrical connection and row-column relationship, each row is composed of v pieces of the first cell, 1 piece of the second cell, 1 piece of the third cell in parallel cell unit, and each column is composed of w pieces of the cell unit in series; u, v, w are natural numbers greater than or equal to 1.

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