Packaging structure and forming method thereof

Abstract

The invention relates to a packaging structure and a forming method thereof. The packaging structure comprises a lead frame, the lead frame comprises a plurality of pins arranged at intervals, each pin comprises a conductive supporting part and a conductive leading-out part, the conductive supporting part comprises a top surface and a bottom surface which are oppositely arranged, the conductive leading-out part is electrically connected to the bottom surface of the conductive supporting part, and the conductive leading-out part at least comprises a bottom welding layer. And the chip is mounted on the base pin and electrically connected with the base pin, and the chip is positioned above the top surface of the conductive supporting part. According to the invention, the cost of the raw material for forming the pin is greatly reduced, so that the market competitiveness of the ultrathin QFN product is improved, and the application field of the ultrathin QFN product is expanded.

Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a packaging structure and a method for forming the same. Background Technology

[0002] QFN (Quad Flat No) QFN (Quad Flat No-Lead) is a commonly used packaging method. QFN packaging offers advantages such as good electrical and thermal performance, small size, light weight, and low development cost, making it suitable for high-density printed circuit boards in mobile phones, digital cameras, PDAs, and other portable small electronic devices. To expand the application areas of QFN products and further reduce their size, ultra-thin QFN products have emerged.

[0003] In the process of forming ultra-thin QFN products, the leads are first formed directly on a substrate using photolithography and electroplating processes. Then, the chip is mounted onto the leads, and finally, the substrate is removed to achieve ultra-thin packaging. However, the leads of these ultra-thin QFN products are typically made of silver, nickel, or gold. Because gold is expensive, the manufacturing cost of ultra-thin QFN products increases significantly, reducing their market competitiveness.

[0004] Therefore, how to reduce the manufacturing cost of ultra-thin QFN products, thereby improving their market competitiveness and expanding their application areas, is a technical problem that urgently needs to be solved. Summary of the Invention

[0005] This invention provides a packaging structure and its forming method to reduce the manufacturing cost of ultra-thin QFN products, thereby improving the market competitiveness of ultra-thin QFN products and expanding their application areas.

[0006] According to some embodiments, the present invention provides a packaging structure, including: A lead frame includes a plurality of spaced-apart pins, each pin including a conductive support portion and a conductive lead-out portion. The conductive support portion includes a top surface and a bottom surface disposed opposite to each other. The conductive lead-out portion is electrically connected to the bottom surface of the conductive support portion. The conductive lead-out portion includes at least a bottom solder layer.

[0007] The chip is mounted on the pin and electrically connected to the pin, and the chip is located above the top surface of the conductive support.

[0008] In some embodiments, the chip includes a functional surface and a back surface disposed opposite to each other, the functional surface of the chip facing the pins; the package structure further includes: A top solder layer is located on the top surface of the conductive support, with one end of the top solder layer electrically connected to the chip and the other end electrically connected to the conductive support.

[0009] In some embodiments, it also includes: A molding compound encapsulates the chip, the conductive support portion of the pin, and a portion of the conductive lead-out portion, wherein another portion of the conductive lead-out portion protrudes from the lower surface of the molding compound.

[0010] In some embodiments, the height of the conductive lead located within the molding layer is 5 μm to 20 μm.

[0011] In some embodiments, it also includes: A molding compound encapsulates the conductive support portion of the chip and the pins, wherein the lower surface of the molding compound is flush with the bottom surface of the conductive support portion.

[0012] In some embodiments, the conductive support portion includes: Support column; A support platform is connected to the support column. The chip is mounted on the support platform above the support column away from the support column. The bottom solder layer is located on the surface of the support column away from the support platform, and the width of the support platform is greater than the width of the support column.

[0013] In some embodiments, the conductive lead-out portion includes only the bottom solder layer.

[0014] In some embodiments, the conductive lead-out portion further includes: The bottom electroplating layer is located on the surface of the bottom welding layer that is opposite to the conductive support.

[0015] In some embodiments, the material of the bottom electroplated layer includes metallic copper or metallic nickel.

[0016] In some embodiments, the conductive support is made of nickel.

[0017] In some embodiments, the material of the bottom welding layer is solder.

[0018] According to other embodiments, the present invention also provides a method for forming an encapsulation structure, comprising the following steps: A lead frame is formed and a chip is mounted onto the lead frame. The lead frame includes a plurality of spaced pins. Each pin includes a conductive support portion and a conductive lead-out portion. The conductive support portion includes a top surface and a bottom surface disposed opposite to each other. The conductive lead-out portion is electrically connected to the bottom surface of the conductive support portion. The conductive lead-out portion includes at least a bottom solder layer. The chip is mounted on the pin and electrically connected to the pin, and the chip is located above the top surface of the conductive support portion.

[0019] In some embodiments, the specific steps of forming a lead frame and mounting a chip onto the lead frame include: Multiple conductive support portions are formed at intervals; The chip is mounted on the conductive support with the chip facing the top surface of the conductive support, and the chip and the conductive support are electrically connected. A bottom weld layer electrically connected to the conductive support portion is formed on the bottom surface of the conductive support portion.

[0020] In some embodiments, the specific steps of forming a plurality of spaced-apart conductive support portions include: Provide carrier board; A plurality of conductive support portions are formed on the surface of the carrier plate at intervals. Each conductive support portion includes a support column and a support platform connected to the support column on the surface away from the carrier plate, and the width of the support platform is greater than the width of the support column.

[0021] In some embodiments, the specific steps of forming a plurality of spaced-apart conductive support portions on the surface of the carrier plate include: A photoresist layer is formed on the surface of the carrier plate, the photoresist layer having a plurality of spaced openings that penetrate the photoresist layer and expose the carrier plate; Electroplating conductive material into the multiple openings forms multiple conductive support portions.

[0022] In some embodiments, the conductive support is made of nickel.

[0023] In some embodiments, the specific steps of mounting the chip onto the conductive support with the chip facing the top surface of the conductive support and electrically connecting the chip to the conductive support include: The chip is provided, the chip including a functional surface and a back surface disposed opposite to each other; The chip is mounted onto the conductive support with its functional surface facing the conductive support via a top solder layer, and one end of the top solder layer is electrically connected to the chip and the other end is electrically connected to the conductive support.

[0024] In some embodiments, before forming the bottom weld layer electrically connected to the conductive support on the bottom surface of the conductive support, the following steps are further included: A molding layer is formed on the surface of the carrier plate to encapsulate the conductive support and the chip.

[0025] In some embodiments, the specific steps of forming the bottom welding layer electrically connected to the conductive support on the bottom surface of the conductive support include: Remove the carrier plate to expose the bottom surface of the conductive support portion, which is flush with the lower surface of the molding layer; A bottom weld layer is formed covering the bottom surface of the conductive support portion.

[0026] In some embodiments, the specific steps of forming the bottom welding layer electrically connected to the conductive support on the bottom surface of the conductive support include: Remove the carrier plate to expose the bottom surface of the conductive support portion, which is flush with the lower surface of the molding layer; Remove a portion of the conductive support portion to form a groove within the encapsulation layer; The bottom weld layer is formed to at least fill the groove.

[0027] In some embodiments, the depth of the groove is 5 μm to 20 μm.

[0028] In some embodiments, the specific steps for forming the bottom weld layer that at least fills the groove include: Solder material is placed into the groove, and the solder material fills the groove and protrudes from the lower surface of the encapsulation layer; The solder material is processed using a reflow soldering process to form the bottom solder layer, which fills the groove and protrudes from the lower surface of the encapsulation layer.

[0029] In some embodiments, the specific steps of forming the bottom welding layer electrically connected to the conductive support on the bottom surface of the conductive support include: Remove the carrier plate to expose the bottom surface of the conductive support portion, which is flush with the lower surface of the molding layer; A bottom electroplating layer is formed on the bottom surface of the conductive support portion, and a bottom welding layer is formed on the surface of the bottom electroplating layer opposite to the conductive support portion.

[0030] In some embodiments, the specific steps of forming the bottom welding layer electrically connected to the conductive support on the bottom surface of the conductive support include: Remove the carrier plate to expose the bottom surface of the conductive support portion, which is flush with the lower surface of the molding layer; Remove a portion of the conductive support portion to form a groove within the encapsulation layer; A bottom electroplating layer is formed in the groove, and a bottom welding layer is formed on the surface of the bottom electroplating layer opposite to the conductive support.

[0031] In some embodiments, the bottom electroplated layer fills the groove, and the surface of the bottom electroplated layer facing away from the conductive support is flush with the lower surface of the molding compound; or... The bottom electroplated layer is recessed on the lower surface of the molding layer, away from the conductive support. The bottom weld layer is partially located within the groove, while another portion of the bottom weld layer protrudes from the lower surface of the molding layer.

[0032] The bottom solder layer fills the groove, and the surface of the bottom solder layer facing away from the conductive support is flush with the lower surface of the molding compound; or... The bottom electroplated layer is partially located within the groove, while another portion of the bottom electroplated layer protrudes from the lower surface of the molding layer.

[0033] In some embodiments, the material of the bottom electroplated layer includes metallic copper or metallic nickel.

[0034] In some embodiments, the material of the bottom welding layer is solder.

[0035] The present invention provides a packaging structure and its forming method, wherein the pin includes a conductive support portion and a conductive lead-out portion. The conductive support portion includes a top surface and a bottom surface disposed opposite to each other. The conductive lead-out portion is electrically connected to the bottom surface of the conductive support portion. The conductive lead-out portion includes at least a bottom solder layer. A chip is mounted on the pin and electrically connected to the pin, and the chip is located above the top surface of the conductive support portion, thereby forming an ultra-thin packaging structure, which helps to expand the application fields of the packaging structure. Moreover, the conductive lead-out portion in the pin includes the bottom solder layer, that is, the bottom of the pin uses a soldering material, eliminating the need for metal or other materials as lead-out structures. Without affecting the performance of the pin, the cost of raw materials for forming the pin is greatly reduced, thereby improving the market competitiveness of ultra-thin QFN products and expanding the application fields of ultra-thin QFN products.

[0036] In the method for forming the packaging structure provided by the present invention, the conductive leads are formed after the carrier board is peeled off during the process of forming the ultra-thin packaging structure. Compared with the traditional process of forming a complete pin structure before chip mounting, this specific embodiment can ensure the structural integrity of the conductive leads and avoid damage to the structure of the ultra-thin pins (e.g., the structure of the conductive leads in the pins) caused by the process of peeling off the carrier board. Thus, the manufacturing cost of the packaging structure can be reduced while ensuring or even improving the performance of the lead frame. Attached Figure Description

[0037] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0038] Figure 1 This is a cross-sectional schematic diagram of the packaging structure in a specific embodiment of the present invention; Figure 2 This is another cross-sectional schematic diagram of the packaging structure in a specific embodiment of the present invention; Figure 3 This is another cross-sectional schematic diagram of the packaging structure in a specific embodiment of the present invention; Figure 4 This is a flowchart illustrating the method for forming the encapsulation structure in a specific embodiment of the present invention; Figure 5 This is a schematic diagram of the structure after multiple conductive support portions are formed on the carrier plate in a specific embodiment of the present invention; Figure 6 This is a schematic diagram of the structure after the chip is mounted onto the conductive support in a specific embodiment of the present invention; Figure 7 This is a schematic diagram of the structure after the molding layer is formed in a specific embodiment of the present invention; Figure 8 This is a schematic diagram of the structure after removing the carrier plate in a specific embodiment of the present invention; Figure 9 This is a schematic diagram of the structure after the groove is formed in a specific embodiment of the present invention; Figure 10 This is a schematic diagram of the structure after the welding material is placed into the groove in a specific embodiment of the present invention; Figure 11 This is a schematic diagram of the structure after the welding material has undergone reflow soldering process in a specific embodiment of the present invention.

[0039] Explanation of reference numerals in the attached figures 10 chips 11 Conductive Support 12 Bottom Welding Layer 13 Top Welding Layer 14 sealing layers 15 conductive bumps 111 support columns 112 support platform 30 Bottom plating layer 50 carrier boards 90 groove 100 welding material Detailed Implementation The specific embodiments of the packaging structure and its formation method provided by the present invention will be described in detail below with reference to the accompanying drawings.

[0040] This specific embodiment provides a packaging structure. Figure 1 This is a cross-sectional schematic diagram of the encapsulation structure in a specific embodiment of the present invention. For example... Figure 1 As shown, the packaging structure includes: A lead frame includes a plurality of spaced-apart pins, each pin including a conductive support portion 11 and a conductive lead-out portion. The conductive support portion 11 includes a top surface and a bottom surface disposed opposite to each other. The conductive lead-out portion is electrically connected to the bottom surface of the conductive support portion 11. The conductive lead-out portion includes at least a bottom solder layer 12.

[0041] Chip 10 is mounted on the pin and electrically connected to the pin, and chip 10 is located above the top surface of the conductive support portion 11.

[0042] For example, the lead frame is an ultra-thin frame; in one example, the total thickness of the lead frame is less than or equal to 50 μm. The lead frame includes a plurality of spaced-apart pins for supporting and electrically connecting to the chip 10 located thereon. Each pin includes a conductive support portion 11 and a conductive lead-out portion. The conductive support portion 11 includes a top surface and a bottom surface disposed opposite to each other, with the top surface of the conductive support portion facing the chip 10, and the conductive lead-out portion electrically connected to the bottom surface of the conductive support portion 11. In one example, the surface of the chip 10 facing the pin has conductive bumps 15. One end of the conductive support portion 11 is electrically connected to the conductive bumps 15 on the chip 10, and the other end is electrically connected to the conductive lead-out portion, thereby allowing control signals to be transmitted to the chip 10 through the conductive lead-out portion and the conductive support portion 11, and signals in the chip 10 can also be output through the conductive support portion 11 and the conductive lead-out portion.

[0043] This specific embodiment configures the pin to include a conductive support portion 11 and a conductive lead-out portion. The conductive lead-out portion is disposed on the bottom surface of the conductive support portion 11 facing away from the chip 10, and the conductive lead-out portion includes the bottom solder layer 12. Since the bottom solder layer 12, formed using soldering material, has good conductivity, and the bottom solder layer 12 is soldered to the conductive support portion 11, the pin is ensured to have good electrical, thermal, and mechanical properties, enabling the chip 10 to maintain stable and reliable operation. Furthermore, the packaging structure provided in this specific embodiment can be processed and manufactured using existing photolithography, electroplating, and packaging equipment, without requiring large-scale modifications to existing production equipment and processes. This facilitates rapid promotion and application in actual production, reducing technology transfer costs and risks.

[0044] In some embodiments, the chip 10 includes a functional surface and a back surface disposed opposite to each other, with the functional surface of the chip 10 facing the pins; the package structure further includes: The top solder layer 13 is located on the top surface of the conductive support portion 11, and one end of the top solder layer 13 is electrically connected to the chip 10 and the other end is electrically connected to the conductive support portion 11.

[0045] For example, the chip 10 includes a functional surface and a back surface opposite to the functional surface, and the conductive bump 15 is disposed on the functional surface of the chip 10. The chip 10 is soldered to the top surface of the conductive support portion 11 of the pin through the top solder layer 13 with the functional surface facing the pin, that is, the chip 10 is flip-chip mounted on the pin. The chip 10 is electrically connected to the pin through the top solder layer 13, that is, one end of the conductive bump 15 is electrically connected to the chip 10, and the other end is electrically connected to the pin through the top solder layer 13. In one example, the top solder layer 13 is located between the conductive bump 15 and the conductive support portion 11, and covers at least a portion of the sidewall of the conductive bump 15 to enhance the connection strength between the conductive bump 15 and the conductive support portion 11. In this specific embodiment, the chip 10 is flip-chip mounted on the pins, thus eliminating the need for wire bonding on the lead frame. This not only simplifies the manufacturing process of the package structure and improves its manufacturing efficiency but also helps to further reduce the thickness of the package structure. Furthermore, the conductive bumps 15 on the chip 10 are directly soldered to the pins via the top solder layer 13, thereby shortening the signal transmission path between the chip 10 and the lead frame and improving the signal transmission efficiency between them. In one example, the top solder layer 13 is made of solder to ensure a stable electrical connection between the chip 10 and the pins while further reducing the manufacturing cost of the package structure.

[0046] In some embodiments, the packaging structure further includes: A molding layer 14 encapsulates the chip 10, the conductive support portion 11 in the pins, and a portion of the conductive lead-out portion, with another portion of the conductive lead-out portion protruding from the surface of the molding layer 14.

[0047] For example, such as Figure 1As shown, the molding compound 14 continuously encapsulates a plurality of the pins, the chip 10, the conductive bumps 15, the top solder layer 13, and a portion of the conductive leads. The molding compound 14 includes an upper surface and a lower surface opposite to the upper surface. In one example, the back surface of the chip 10 (i.e., the surface of the chip 10 facing away from the pins) is flush with the upper surface of the molding compound 14. In another example, the molding compound 14 covers the back surface of the chip 10, i.e., the upper surface of the molding compound 14 is higher than the back surface of the chip 10. In one example, the material of the molding compound 14 may be epoxy resin. The conductive leads extend in a direction perpendicular to the back surface of the chip 10, and a portion of the conductive leads is located within the molding compound 14, while another portion of the conductive leads protrudes from the lower surface of the molding compound 14, i.e., the conductive leads only partially protrude from the molding compound 14. With the above structure, on the one hand, the molding compound 14 between adjacent conductive leads can serve as an isolation layer, reducing the risk of short circuits between adjacent conductive leads; on the other hand, since the conductive leads include the bottom solder layer 12, embedding the conductive leads partially within the molding compound 14 prevents the bottom solder layer 12 from shifting position during the reflow soldering process, ensuring a stable electrical connection between the bottom solder layer 12 and the conductive support 11. Furthermore, embedding the conductive leads partially within the molding compound 14 improves the bonding strength between the pins and the molding compound.

[0048] In some embodiments, the height of the conductive lead located within the molding layer 14 is 5 μm to 20 μm.

[0049] For example, the height of the conductive lead within the molding compound 14 is 5 μm to 20 μm in a direction perpendicular to the back surface of the chip 10. By setting the height of the conductive lead within the molding compound 14 to 5 μm to 20 μm, a stable electrical connection between the conductive lead and the conductive support 11 and the control circuit board can be ensured, while also helping to further reduce the thickness of the package structure.

[0050] Figure 2 This is another cross-sectional schematic diagram of the packaging structure in a specific embodiment of the present invention. In some other embodiments, the packaging structure further includes: A molding compound 14 is used to encapsulate the chip 10 and the conductive support portion 11 in the pins. The lower surface of the molding compound 14 is flush with the bottom surface of the conductive support portion 11.

[0051] For example, such as Figure 2As shown, the molding compound 14 continuously encapsulates a plurality of the pins, the chip 10, the conductive bumps 15, and the top solder layer 13. The molding compound 14 includes an upper surface and a lower surface opposite to the upper surface. In one example, the back surface of the chip 10 (i.e., the surface of the chip 10 facing away from the pins) is flush with the upper surface of the molding compound 14. In another example, the molding compound 14 covers the back surface of the chip 10, i.e., the upper surface of the molding compound 14 is higher than the back surface of the chip 10. In one example, the material of the molding compound 14 may be epoxy resin molding compound. The lower surface of the molding compound 14 is flush with the bottom surface of the conductive support portion 11, thereby making the conductive leads completely outside the molding compound 14, simplifying the manufacturing process of the package structure.

[0052] In some embodiments, the conductive support portion 11 includes: Support column 111; A support platform 112 is connected to the support column 111. The chip 10 is mounted on the support platform 112 above the support column 111 away from the support column 111. The bottom solder layer 12 is located on the surface of the support column 111 away from the support platform 112, and the width of the support platform 112 is greater than the width of the support column 111.

[0053] For example, such as Figure 1 As shown, the conductive support portion 11 includes a support post 111 and a support platform 112 connected to the surface of the support post 111 facing the chip 10. The conductive bumps 15 on the chip 10 are soldered to the surface of the support platform 112 opposite to the support post 111 via the top solder layer 13, and the bottom solder layer 12 is soldered to the surface of the support post 111 opposite to the support platform 112. The surface of the support post 111 opposite to the support platform 112 serves as the bottom surface of the conductive support portion 11, and the surface of the support platform 112 opposite to the support post 111 serves as the top surface of the conductive support portion 11. Along the direction parallel to the back surface of the chip 10, the width of the support platform 112 is greater than the width of the support post 111. On the one hand, this increases the welding area between the conductive bump 15 and the conductive support portion 11, which not only reduces the alignment accuracy between the chip 10 and the pin, but also provides better support for the chip 10. On the other hand, it also helps to increase the heat dissipation area of ​​the pin, thereby improving the heat dissipation performance of the pin.

[0054] In some embodiments, the conductive lead-out portion includes only the bottom solder layer 12.

[0055] For example, such as Figure 1 or Figure 2As shown, the conductive lead-out portion only includes the bottom welding layer 12, that is, the entire conductive lead-out portion is made of welding material. This not only further simplifies the manufacturing process of the packaging structure and further reduces the manufacturing cost of the packaging structure, but also makes it easier to control the size of the conductive lead-out portion, so as to achieve flexible adjustment of the thickness of the packaging structure and further expand the application field of the packaging structure.

[0056] Figure 3 This is another cross-sectional schematic diagram of the encapsulation structure in a specific embodiment of the present invention. In some other embodiments, the conductive lead-out portion further includes: The bottom electroplating layer 30 covers the bottom surface of the conductive support portion 11 and is located between the conductive support portion 11 and the bottom welding layer 12.

[0057] For example, such as Figure 3 As shown, the conductive lead-out portion includes a bottom electroplated layer 30 covering the bottom surface of the conductive support portion 11 and a bottom solder layer 12 covering the surface of the bottom electroplated layer 30 facing away from the conductive support portion 11. The bottom electroplated layer 30 is a metallic conductive layer formed by an electroplating process. By forming the bottom electroplated layer 30 on the bottom surface of the conductive support portion 11, not only can the contact resistance between the conductive lead-out portion and the control circuit board be reduced, but the heat dissipation performance of the conductive lead-out portion can also be further enhanced.

[0058] In order to further reduce the manufacturing cost of the packaging structure while ensuring that the bottom electroplated layer 30 has good electrical performance, in some embodiments, the material of the bottom electroplated layer 30 includes metallic copper or metallic nickel.

[0059] In one example, the bottom electroplating layer 30 is a single-layer structure to further simplify the manufacturing process of the package structure. In another example, the bottom electroplating layer 30 may include multiple metal material layers stacked sequentially along a direction perpendicular to the back surface of the chip 10 to further improve the electrical performance of the conductive leads. None of the multiple metal material layers contain precious metals such as gold and silver to avoid increasing the manufacturing cost of the package structure. In this specific embodiment, "multiple" refers to two or more layers.

[0060] In some embodiments, the conductive support portion 11 is made of nickel. In one example, the conductive support portion 11 is made of only nickel, thereby further reducing the manufacturing cost of the packaging structure while further simplifying the manufacturing process of the packaging structure.

[0061] In some embodiments, the bottom solder layer 12 is made of solder to ensure the connection strength between the bottom solder layer 12 and the bottom electroplated layer 30 while further reducing the manufacturing cost of the package structure.

[0062] This specific embodiment also provides a method for forming an encapsulation structure. Figure 4 This is a flowchart illustrating the method for forming the encapsulation structure in a specific embodiment of the present invention. A schematic diagram of the encapsulation structure formed in this specific embodiment can be found in [reference needed]. Figures 1-3 .like Figures 1-4 As shown, the method for forming the packaging structure includes the following steps: Step S41: A lead frame is formed and a chip 10 is mounted onto the lead frame. The lead frame includes a plurality of spaced pins. Each pin includes a conductive support portion 11 and a conductive lead-out portion. The conductive support portion 11 includes a top surface and a bottom surface disposed opposite to each other. The conductive lead-out portion is electrically connected to the bottom surface of the conductive support portion 11. The conductive lead-out portion includes at least a bottom solder layer 12 covering the bottom surface of the conductive support portion 11. The chip 10 is mounted on the pin and electrically connected to the pin, and the chip 10 is located above the top surface of the conductive support portion 11.

[0063] In some embodiments, the specific steps of forming a lead frame and mounting the chip 10 onto the lead frame include: The conductive support portions 11 are arranged in multiple spaced intervals; The chip 10 is mounted on the conductive support 11 with the top surface of the chip 10 facing the conductive support 11, and the chip 10 and the conductive support 11 are electrically connected. A bottom welding layer 12, which is electrically connected to the conductive support portion 11, is formed on the bottom surface of the conductive support portion 11.

[0064] Figure 5 This is a schematic diagram of the structure after forming multiple conductive support portions on a carrier plate in a specific embodiment of the present invention. In some embodiments, the specific steps for forming multiple spaced-apart conductive support portions 11 include: Provide carrier board 50; A plurality of conductive support portions 11 are formed on the surface of the carrier plate 50 at intervals. Each conductive support portion 11 includes a support column 111 and a support platform 112 connected to the support column 111 on the surface away from the carrier plate 50. The width of the support platform 112 is greater than the width of the support column 111.

[0065] In some embodiments, the specific steps of forming a plurality of spaced-apart conductive support portions 11 on the surface of the carrier plate 50 include: A photoresist layer is formed on the surface of the carrier plate 50, the photoresist layer having a plurality of spaced openings that penetrate the photoresist layer and expose the carrier plate 50; Electroplating conductive material into the multiple openings forms multiple conductive support portions 11.

[0066] In some embodiments, the conductive support portion 11 is made of nickel.

[0067] For example, a steel plate is first provided, and this steel plate is used as the carrier plate 50. Next, a photoresist material is coated on the front side of the carrier plate 50 to form the photoresist layer. Then, through processes such as exposure and development, multiple openings penetrating the photoresist layer and exposing the front side of the carrier plate 50 are formed in the photoresist layer, and the multiple openings are spaced apart in a direction parallel to the front side of the carrier plate 50. Afterwards, nickel is electroplated into the openings to form multiple conductive support portions 11, such as... Figure 5 As shown. In one example, the conductive support 11 is made of only nickel, thereby further reducing the manufacturing cost of the packaging structure and further simplifying the manufacturing process of the packaging structure.

[0068] The conductive support portion 11 includes a support post 111 and a support platform 112 connected to the support post 111 on the surface away from the carrier plate 50. In the direction parallel to the front side of the carrier plate 50, the width of the support platform 112 is greater than the width of the support post 111. On the one hand, this can increase the welding area between the conductive bump 15 on the chip 10 and the conductive support portion 11, which can not only reduce the alignment accuracy between the chip 10 and the pin, but also better support the chip 10. On the other hand, it also helps to increase the heat dissipation area of ​​the pin, thereby improving the heat dissipation performance of the pin.

[0069] Figure 6 This is a schematic diagram of the structure after the chip is mounted onto the conductive support portion in a specific embodiment of the present invention. In some embodiments, the specific steps of mounting the chip 10 onto the conductive support portion 11 with the chip 10 facing the top surface of the conductive support portion 11 and electrically connecting the chip 10 and the conductive support portion 11 include: The chip 10 is provided, the chip 10 including a functional surface and a back surface disposed opposite to each other; The chip 10 is mounted onto the conductive support 11 via the top solder layer 13 with the functional surface of the chip 10 facing the conductive support 11, and one end of the top solder layer 13 is electrically connected to the chip 10 and the other end is electrically connected to the conductive support 11.

[0070] For example, the chip 10 includes a functional surface and a back surface opposite to the functional surface, and conductive bumps 15 are provided on the functional surface of the chip 10. In forming such... Figure 5 After the multiple spaced conductive support portions 11 shown, the chip 10 is soldered to the top surface of the conductive support portion 11 of the pin through the top solder layer 13 with the functional surface facing the pin. That is, the chip 10 is flip-chip mounted on the pin. Figure 6 As shown. The chip 10 is electrically connected to the pins via the top solder layer 13. In one example, the top solder layer 13 is first applied to the top surface of the conductive support 11, and then the conductive bump 15 is soldered to the top surface of the conductive support 11 via the top solder layer 13. In another example, the top solder layer 13 is first applied to the surface of the conductive bump 15 facing away from the chip 10, and then the conductive bump 15 is soldered to the top surface of the conductive support 11 via the top solder layer 13.

[0071] In this specific embodiment, the chip 10 is flip-chip mounted on the pins, thus eliminating the need for wire bonding on the lead frame. This not only simplifies the manufacturing process of the package structure and improves its manufacturing efficiency but also helps to further reduce the thickness of the package structure. Furthermore, the chip 10 is directly soldered to the pins via the top solder layer 13, thereby shortening the signal transmission path between the chip 10 and the lead frame and improving the signal transmission efficiency between them. In one example, the top solder layer 13 is made of solder to ensure a stable electrical connection between the chip 10 and the pins while further reducing the manufacturing cost of the package structure.

[0072] Figure 7 This is a schematic diagram of the structure after the molding compound layer is formed in a specific embodiment of the present invention. In some embodiments, before forming the bottom welding layer 12 electrically connected to the conductive support portion 11 on the bottom surface of the conductive support portion 11, the following steps are further included: A molding layer 14 is formed on the surface of the carrier 50 to encapsulate the conductive support portion 11 and the chip 10.

[0073] For example, after flip-chip 10 is flip-chip mounted onto the pins including the conductive support portion 11, a molding process is used to form a molding layer 14 on the surface of the carrier board 50 to encapsulate the conductive support portion 11, the conductive bumps 15, and the chip 10, such as... Figure 7As shown. In one example, the molding compound 14 may be made of epoxy resin molding compound. The molding compound 14 continuously molds multiple conductive supports 11, the chip 10, the conductive bumps 15, and the top solder layer 13. The molding compound 14 includes an upper surface facing away from the carrier board 50 and a lower surface opposite to the upper surface. In one example, the back surface of the chip 10 (i.e., the surface of the chip 10 facing away from the carrier board 50) is flush with the upper surface of the molding compound 14. In another example, the molding compound 14 covers the back surface of the chip 10, i.e., the upper surface of the molding compound 14 is higher than the back surface of the chip 10.

[0074] Figure 8 This is a schematic diagram of the structure after removing the carrier plate in a specific embodiment of the present invention. Figure 9 This is a schematic diagram of the structure after the groove is formed in a specific embodiment of the present invention. Figure 10 This is a schematic diagram of the structure after the welding material is placed into the groove in a specific embodiment of the present invention. Figure 11 This is a schematic diagram of the structure after the solder material has undergone a reflow soldering process in a specific embodiment of the present invention. In some embodiments, the specific steps of forming the bottom solder layer 12 electrically connected to the conductive support portion 11 on the bottom surface of the conductive support portion 11 include: Remove the carrier plate 50 to expose the bottom surface of the conductive support portion 11, which is flush with the lower surface of the molding compound 14. Figure 8 As shown; By removing a portion of the conductive support portion 11, a groove 90 is formed within the molding layer 14, such as... Figure 9 As shown; Forming the bottom weld layer 12 that at least fills the groove 90, such as Figure 11 As shown.

[0075] In some embodiments, the depth of the groove 90 is 5 μm to 20 μm.

[0076] In some embodiments, the specific steps for forming the bottom weld layer 12 that at least fills the groove 90 include: Solder 100 is placed into the groove 90, and the solder 100 fills the groove 90 and protrudes from the lower surface of the molding compound 14, as shown. Figure 10 As shown; The solder 100 is processed using a reflow soldering process to form the bottom solder layer 12, which fills the groove 90 and protrudes from the lower surface of the encapsulation layer 14. Figure 11 As shown.

[0077] For example, after forming the molding compound 14, the carrier board 50 is removed by a peeling process, exposing the lower surface of the molding compound 14 and the bottom surface of the conductive support portion 11, with the exposed lower surface of the molding compound 14 flush with the bottom surface of the conductive support portion 11. The package including the molding compound 14, the chip 10, the conductive bump 15, the conductive support portion 11, and the top solder layer 13 is flipped so that the lower surface of the molding compound 14 faces upward. Next, a portion of the conductive support portion 11 is etched away using an etching process, and the molding compound 14 and the remaining conductive support portion 11 enclose the groove 90. In one example, a dry etching process or a wet etching process can be used to etch away a portion of the conductive support portion 11, and during the etching process, the depth of the groove 90 is adjusted by controlling etching parameters (e.g., etching time, etching temperature, etchant dosage, etc.). In this specific embodiment, by setting the depth of the groove 90 to 5μm ~ 20μm, on the one hand, it can ensure the stable support performance of the conductive support portion 11 for the chip 10; on the other hand, it can also ensure a stable electrical connection between the subsequently formed bottom solder layer 12 and the conductive support portion 11, and also helps to further reduce the overall thickness of the packaging structure.

[0078] After forming the groove 90, solder paste is applied to the groove 90 or solder balls are installed in the groove 90, and the solder paste or solder balls are used as the solder material 100, with the solder material 100 protruding from the lower surface of the molding compound 14, such as... Figure 10 As shown. Next, the solder 100 is processed using a reflow soldering process to form the bottom solder layer 12, which fills the groove 90 and protrudes from the lower surface of the encapsulation layer 14, as shown. Figure 11 As shown. Then, the package is flipped over again to obtain the following... Figure 1 The structure shown. In, as... Figure 1 In the structure shown, the conductive lead-out portion only includes the bottom welding layer 12, that is, the entire conductive lead-out portion is made of welding material. This not only further simplifies the manufacturing process of the packaging structure and further reduces the manufacturing cost of the packaging structure, but also makes it easier to control the size of the conductive lead-out portion, so as to achieve flexible adjustment of the thickness of the packaging structure and further expand the application field of the packaging structure.

[0079] In this specific embodiment, during the removal of the carrier plate 50 via a peeling process, the bottom of the conductive support portion 11 may be damaged simultaneously. For example, some conductive material on the bottom of the conductive support portion 11 may be torn off along with the carrier plate 50, thereby affecting the morphology and electrical properties of the conductive support portion 11, and consequently causing defects at the bottom of the conductive support portion 11. After removing the carrier plate 50, a portion of the conductive support portion 11 can be removed via an etching process to eliminate the defective portion of the conductive support portion 11, ensuring the morphology and electrical properties of the final conductive lead-out portion. By forming the groove 90, at least a portion of the conductive leads are located within the groove 90. On one hand, the molding compound 14 between adjacent conductive leads can serve as an isolation layer, reducing the risk of short circuits between adjacent conductive leads. On the other hand, since the conductive leads include the bottom solder layer 12, partially embedding the conductive leads within the molding compound 14 prevents the bottom solder layer 12 from shifting during the reflow soldering process, ensuring a stable electrical connection between the bottom solder layer 12 and the conductive support 11. Furthermore, partially embedding the conductive leads within the molding compound 14 reduces the height of the conductive leads protruding from the molding compound 14, thereby helping to further reduce the thickness of the package structure.

[0080] The process of forming the pins in the lead frame according to this specific embodiment does not require large-scale improvements to existing production equipment and manufacturing processes, which facilitates rapid promotion and application in production and reduces technology transfer costs and risks.

[0081] In other embodiments, the specific steps of forming the bottom welding layer 12, which is electrically connected to the conductive support portion 11, on the bottom surface of the conductive support portion 11 include: Remove the carrier plate 50 to expose the bottom surface of the conductive support portion 11, which is flush with the lower surface of the molding compound 14. Figure 8 As shown; The bottom weld layer 12 is formed to cover the bottom surface of the conductive support portion 11, such as... Figure 2 As shown.

[0082] For example, after forming the molding compound 14, the carrier board 50 is removed by a peeling process, exposing the lower surface of the molding compound 14 and the bottom surface of the conductive support portion 11, with the exposed lower surface of the molding compound 14 flush with the bottom surface of the conductive support portion 11. The package including the molding compound 14, the chip 10, the conductive bumps 15, the conductive support portion 11, and the top solder layer 13 is flipped so that the lower surface of the molding compound 14 faces upward. Next, solder paste is applied directly to the bottom surface of the conductive support portion 11 or solder balls are installed, and the bottom solder layer 12 is formed on the surface of the conductive support portion 11 opposite to the chip 10 by a reflow soldering process, as shown. Figure 2 As shown. Since the conductive support portion 11 is not etched before applying solder paste or installing solder balls on its bottom surface, the bottom surface of the conductive support portion 11 is kept flush with the lower surface of the molding compound 14, thereby further simplifying the manufacturing process of the packaging structure and reducing the manufacturing cost of the packaging structure.

[0083] In some other embodiments, the specific steps of forming the bottom welding layer 12, which is electrically connected to the conductive support portion 11, on the bottom surface of the conductive support portion 11 include: Remove the carrier plate 50 to expose the bottom surface of the conductive support portion 11, which is flush with the lower surface of the molding layer 14. A portion of the conductive support portion 11 is removed, and a groove 90 is formed in the molding layer 14; A bottom electroplated layer 30 is formed within the groove 90, and a bottom weld layer 12 is formed on the surface of the bottom electroplated layer 30 facing away from the conductive support portion 11, such as... Figure 3 As shown.

[0084] For example, after forming the molding compound 14, the carrier board 50 is removed by a peeling process, exposing the lower surface of the molding compound 14 and the bottom surface of the conductive support portion 11, with the exposed lower surface of the molding compound 14 flush with the bottom surface of the conductive support portion 11. The package including the molding compound 14, the chip 10, the conductive bump 15, the conductive support portion 11, and the top solder layer 13 is flipped so that the lower surface of the molding compound 14 faces upward. Next, a portion of the conductive support portion 11 is etched away using an etching process, and the molding compound 14 and the remaining conductive support portion 11 enclose the groove 90. In one example, a dry etching process or a wet etching process can be used to etch away a portion of the conductive support portion 11, and during the etching process, the depth of the groove 90 is adjusted by controlling etching parameters (e.g., etching time, etching temperature, etchant dosage, etc.). In this specific embodiment, by setting the depth of the groove 90 to 5μm ~ 20μm, on the one hand, it can ensure the stable support performance of the conductive support portion 11 for the chip 10; on the other hand, it can also ensure a stable electrical connection between the subsequently formed bottom solder layer 12 and the conductive support portion 11, and also helps to further reduce the overall thickness of the packaging structure.

[0085] After forming the groove 90, a bottom electroplating layer 30 is formed within the groove 90 using an electroplating process. The bottom electroplating layer 30 covers the bottom surface of the conductive support portion 11. Solder paste is applied or solder balls are placed on the surface of the bottom electroplating layer 30 facing away from the conductive support portion 11, using the solder paste or solder balls as solder material 100. Subsequently, a reflow soldering process is used to process the solder material 100, forming the bottom solder layer 12. This results in the conductive lead-out portion including the bottom electroplating layer 30 covering the bottom surface of the conductive support portion 11 and the bottom solder layer 12 covering the surface of the bottom electroplating layer 30 facing away from the conductive support portion 11, as shown below. Figure 3 As shown. By providing the bottom electroplating layer 30 between the conductive support portion 11 and the bottom welding layer 12, not only can the contact resistance between the conductive lead-out portion and the control circuit board be reduced, but the heat dissipation performance of the conductive lead-out portion can also be further enhanced.

[0086] In some embodiments, the bottom electroplated layer 30 fills the groove 90, and the surface of the bottom electroplated layer 30 facing away from the conductive support portion 11 is flush with the lower surface of the molding compound 14; or, The bottom electroplated layer 30 is recessed from the surface of the conductive support portion 11 and is located on the lower surface of the encapsulation layer 14. The bottom weld layer 12 is partially located within the groove 90, and another part of the bottom weld layer 12 protrudes from the lower surface of the encapsulation layer 14.

[0087] In some other embodiments, the specific steps of forming the bottom welding layer 12, which is electrically connected to the conductive support portion 11, on the bottom surface of the conductive support portion 11 include: Remove the carrier plate 50 to expose the bottom surface of the conductive support portion 11, which is flush with the lower surface of the molding layer 14. A bottom electroplating layer 30 is formed on the bottom surface of the conductive support portion 11, and a bottom welding layer 12 is formed on the surface of the bottom electroplating layer 30 opposite to the conductive support portion 11.

[0088] For example, after forming the molding compound 14, the carrier board 50 is removed by a peeling process, exposing the lower surface of the molding compound 14 and the bottom surface of the conductive support portion 11, with the exposed lower surface of the molding compound 14 flush with the bottom surface of the conductive support portion 11. The package including the molding compound 14, the chip 10, the conductive bump 15, the conductive support portion 11, and the top solder layer 13 is flipped so that the lower surface of the molding compound 14 faces upward. Next, a bottom electroplating layer 30 is formed on the bottom surface of the conductive support portion 11 by an electroplating process. The bottom electroplating layer 30 covers the bottom surface of the conductive support portion 11, and solder paste or solder balls are applied to the surface of the bottom electroplating layer 30 facing away from the conductive support portion 11, using the solder paste or solder balls as solder material 100. Afterward, the solder material 100 is processed by a reflow soldering process to form the bottom solder layer 12. The conductive lead-out portion includes a bottom electroplated layer 30 covering the bottom surface of the conductive support portion 11 and a bottom solder layer 12 covering the surface of the bottom electroplated layer 30 facing away from the conductive support portion 11. Since the conductive support portion 11 is not etched before the bottom electroplated layer 30 is formed on the bottom surface of the conductive support portion 11, the bottom surface of the conductive support portion 11 is kept flush with the lower surface of the molding layer 14, thereby further simplifying the manufacturing process of the packaging structure and reducing the manufacturing cost of the packaging structure.

[0089] In order to further reduce the manufacturing cost of the packaging structure while ensuring that the bottom electroplated layer 30 has good electrical performance, in some embodiments, the material of the bottom electroplated layer 30 includes metallic copper or metallic nickel.

[0090] After the conductive leads are formed on the bottom surface of the conductive support portion, they can be soldered to the control circuit board using a soldering process, thus electrically connecting the conductive leads to the control circuit board. This allows control signals from the control circuit board to be transmitted to the chip 10 via the conductive leads and the conductive support portion 11, and signals from the chip 10 can also be output to the control circuit board via the conductive support portion 11 and the conductive leads. In one example, the control circuit board is a PCB.

[0091] In some embodiments, the bottom solder layer 12 is made of solder to ensure the connection strength between the bottom solder layer 12 and the control circuit board while further reducing the manufacturing cost of the package structure.

[0092] The packaging structure and its formation method provided in this specific embodiment include a conductive support portion and a conductive lead-out portion for the pin. The conductive support portion includes a top surface and a bottom surface disposed opposite to each other. The conductive lead-out portion is electrically connected to the bottom surface of the conductive support portion. The conductive lead-out portion includes at least a bottom solder layer. A chip is mounted on the pin and electrically connected to the pin, and the chip is located above the top surface of the conductive support portion, thereby forming an ultra-thin packaging structure, which helps to expand the application fields of the packaging structure. Moreover, the conductive lead-out portion in the pin includes the bottom solder layer, that is, the bottom of the pin uses solder material, eliminating the need for metal materials such as gold as lead-out structures. Without affecting the performance of the pin, the cost of raw materials for forming the pin is greatly reduced, thereby improving the market competitiveness of ultra-thin QFN products and expanding the application fields of ultra-thin QFN products.

[0093] In this specific embodiment, the conductive leads are formed after the carrier 50 is peeled off during the formation of the ultra-thin package structure. Compared with the traditional process of forming a complete pin structure before chip mounting, this specific embodiment can ensure the structural integrity of the conductive leads and avoid damage to the structure of the ultra-thin pins (such as the structure of the conductive leads in the pins) caused by the process of peeling off the carrier 50. This allows for a reduction in the manufacturing cost of the package structure while ensuring or even improving the performance of the lead frame.

[0094] It should be noted that the terms "comprising" and "having," and their variations, used in this invention document are intended to cover non-exclusive inclusion. The terms "first," "second," etc., are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence, unless explicitly indicated by the context; it should be understood that such use of data can be interchanged where appropriate. The term "one or more" depends at least in part on the context and can be used to describe features, structures, or characteristics in a singular sense, or in a plural sense to describe combinations of features, structures, or characteristics. The term "based on" can be understood as not necessarily intended to express an exclusive set of factors, but can instead, also at least in part on the context, allow for the presence of other factors that are not necessarily explicitly described. Furthermore, embodiments and features in embodiments of this invention can be combined with each other without conflict. In addition, descriptions of well-known components and technologies have been omitted in the above description to avoid unnecessarily obscuring the concepts of this invention. In the various embodiments described above, each embodiment focuses on its differences from other embodiments; similar / identical parts between embodiments can be referred to mutually.

[0095] The above description is only a preferred embodiment of the present invention. It should be noted that those skilled in the art can make several improvements and modifications without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A packaging structure, characterized in that, include: A lead frame includes a plurality of spaced-apart pins, each pin including a conductive support portion and a conductive lead-out portion. The conductive support portion includes a top surface and a bottom surface disposed opposite to each other. The conductive lead-out portion is electrically connected to the bottom surface of the conductive support portion. The conductive lead-out portion includes at least a bottom solder layer. The chip is mounted on the pin and electrically connected to the pin, and the chip is located above the top surface of the conductive support.

2. The packaging structure according to claim 1, characterized in that, The chip includes a functional surface and a back surface that are disposed opposite to each other, with the functional surface of the chip facing the pins; the package structure further includes: A top solder layer is located on the top surface of the conductive support, with one end of the top solder layer electrically connected to the chip and the other end electrically connected to the conductive support.

3. The packaging structure according to claim 1, characterized in that, Also includes: A molding compound encapsulates the chip, the conductive support portion of the pin, and a portion of the conductive lead-out portion, wherein another portion of the conductive lead-out portion protrudes from the lower surface of the molding compound.

4. The packaging structure according to claim 3, characterized in that, The height of the conductive lead located within the encapsulation layer is 5μm to 20μm.

5. The packaging structure according to claim 1, characterized in that, Also includes: A molding compound encapsulates the conductive support portion of the chip and the pins, wherein the lower surface of the molding compound is flush with the bottom surface of the conductive support portion.

6. The packaging structure according to claim 1, characterized in that, The conductive support portion includes: Support column; A support platform is connected to the support column. The chip is mounted on the support platform above the support column away from the support column. The bottom solder layer is located on the surface of the support column away from the support platform, and the width of the support platform is greater than the width of the support column.

7. The packaging structure according to claim 1, characterized in that, The conductive lead-out portion further includes: A bottom electroplated layer covers the bottom surface of the conductive support and is located between the conductive support and the bottom welding layer.

8. The packaging structure according to claim 7, characterized in that, The material of the bottom electroplated layer includes metallic copper or metallic nickel.

9. The packaging structure according to claim 1, characterized in that, The conductive support is made of metallic nickel.

10. The packaging structure according to claim 1, characterized in that, The material of the bottom welding layer is solder.

11. A method for forming an encapsulation structure, characterized in that, Includes the following steps: A lead frame is formed and a chip is mounted onto the lead frame. The lead frame includes a plurality of spaced pins. Each pin includes a conductive support portion and a conductive lead-out portion. The conductive support portion includes a top surface and a bottom surface disposed opposite to each other. The conductive lead-out portion is electrically connected to the bottom surface of the conductive support portion. The conductive lead-out portion includes at least a bottom solder layer. The chip is mounted on the pin and electrically connected to the pin, and the chip is located above the top surface of the conductive support portion.

12. The method for forming the packaging structure according to claim 11, characterized in that, The specific steps for forming the lead frame and mounting the chip onto the lead frame include: Multiple conductive support portions are formed at intervals; The chip is mounted on the conductive support with the chip facing the top surface of the conductive support, and the chip and the conductive support are electrically connected. A bottom weld layer electrically connected to the conductive support portion is formed on the bottom surface of the conductive support portion.

13. The method for forming the packaging structure according to claim 12, characterized in that, The specific steps for forming multiple spaced conductive support portions include: Provide carrier board; A plurality of conductive support portions are formed on the surface of the carrier plate at intervals. Each conductive support portion includes a support column and a support platform connected to the support column on the surface away from the carrier plate, and the width of the support platform is greater than the width of the support column.

14. The method for forming the packaging structure according to claim 13, characterized in that, The specific steps for forming a plurality of spaced conductive support portions on the surface of the carrier plate include: A photoresist layer is formed on the surface of the carrier plate, the photoresist layer having a plurality of spaced openings that penetrate the photoresist layer and expose the carrier plate; Electroplating conductive material into the multiple openings forms multiple conductive support portions.

15. The method for forming the packaging structure according to claim 11, characterized in that, The conductive support is made of metallic nickel.

16. The method for forming the packaging structure according to claim 13, characterized in that, The specific steps of mounting the chip onto the conductive support with the chip facing the top surface of the conductive support and electrically connecting the chip to the conductive support include: The chip is provided, the chip including a functional surface and a back surface disposed opposite to each other; The chip is mounted onto the conductive support with its functional surface facing the conductive support via a top solder layer, and one end of the top solder layer is electrically connected to the chip and the other end is electrically connected to the conductive support.

17. The method for forming the packaging structure according to claim 16, characterized in that, Before forming the bottom weld layer electrically connected to the conductive support on the bottom surface of the conductive support, the following steps are also included: A molding layer is formed on the surface of the carrier plate to encapsulate the conductive support and the chip.

18. The method for forming the packaging structure according to claim 17, characterized in that, The specific steps for forming the bottom weld layer electrically connected to the conductive support on the bottom surface of the conductive support include: Remove the carrier plate to expose the bottom surface of the conductive support portion, which is flush with the lower surface of the molding layer; A bottom weld layer is formed covering the bottom surface of the conductive support portion.

19. The method for forming the packaging structure according to claim 17, characterized in that, The specific steps for forming the bottom weld layer electrically connected to the conductive support on the bottom surface of the conductive support include: Remove the carrier plate to expose the bottom surface of the conductive support portion, which is flush with the lower surface of the molding layer; Remove a portion of the conductive support portion to form a groove within the encapsulation layer; The bottom weld layer is formed to at least fill the groove.

20. The method for forming the packaging structure according to claim 19, characterized in that, The depth of the groove is 5μm~20μm.

21. The method for forming the packaging structure according to claim 19, characterized in that, The specific steps for forming the bottom weld layer that at least fills the groove include: Solder material is placed into the groove, and the solder material fills the groove and protrudes from the lower surface of the encapsulation layer; The solder material is processed using a reflow soldering process to form the bottom solder layer, which fills the groove and protrudes from the lower surface of the encapsulation layer.

22. The method for forming the packaging structure according to claim 17, characterized in that, The specific steps for forming the bottom weld layer electrically connected to the conductive support on the bottom surface of the conductive support include: Remove the carrier plate to expose the bottom surface of the conductive support portion, which is flush with the lower surface of the molding layer; A bottom electroplating layer is formed on the bottom surface of the conductive support portion, and a bottom welding layer is formed on the surface of the bottom electroplating layer opposite to the conductive support portion.

23. The method for forming the packaging structure according to claim 17, characterized in that, The specific steps for forming the bottom weld layer electrically connected to the conductive support on the bottom surface of the conductive support include: Remove the carrier plate to expose the bottom surface of the conductive support portion, which is flush with the lower surface of the molding layer; Remove a portion of the conductive support portion to form a groove within the encapsulation layer; A bottom electroplating layer is formed in the groove, and a bottom welding layer is formed on the surface of the bottom electroplating layer opposite to the conductive support.

24. The method for forming the packaging structure according to claim 23, characterized in that, The bottom electroplated layer fills the groove, and the surface of the bottom electroplated layer facing away from the conductive support is flush with the lower surface of the molding compound; or... The bottom electroplated layer is recessed on the lower surface of the molding layer, away from the conductive support. The bottom weld layer is partially located within the groove, while another portion of the bottom weld layer protrudes from the lower surface of the molding layer.

25. The method for forming the packaging structure according to claim 22 or 23, characterized in that, The material of the bottom electroplated layer includes metallic copper or metallic nickel.

26. The method for forming the packaging structure according to claim 11, characterized in that, The material of the bottom welding layer is solder.

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