A radio frequency identification card chip accurate field strength detection circuit

Abstract

The application belongs to the technical field of radio frequency identification card design, and more particularly to a precise field strength detection circuit for a radio frequency identification card chip. The precise field strength detection circuit comprises a voltage detection quantization circuit, a current detection quantization circuit and a logic processing circuit; the voltage detection quantization circuit calculates the voltage value of the rectified voltage VCC, the current detection quantization circuit accurately calculates the current value of the leakage current ILEK, and the logic processing circuit identifies the field strength of the radio frequency identification card chip through the quantized rectified voltage VCC and the quantized field strength. The application solves the problem that when the radio frequency identification card chip works at the farthest working distance, the field strength is extremely small, the leakage circuit stops working and no longer leaks current, and the size of the leakage current cannot be detected and quantized to detect the size of the working field strength.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of radio frequency identification card design, and more particularly to a radio frequency identification card chip accurate field strength detection circuit. BACKGROUND

[0002] In the application field of high-frequency radio frequency identification cards, the non-contact antenna of the radio frequency card reader and the non-contact antenna of the radio frequency identification card communicate through inductive coupling. The radio frequency identification card obtains energy through antenna coupling and communicates with the radio frequency card reader. The energy obtained by the radio frequency identification card is inversely proportional to the distance between the radio frequency identification card and the radio frequency card reader. The closer the distance between the two, the greater the field strength where the radio frequency identification card is located, and the greater the energy obtained. The farther the distance between the two, the smaller the field strength where the radio frequency identification card is located, and the smaller the energy obtained.

[0003] Chinese patent document CN107977697A discloses a field strength detection adaptive energy coupling circuit, which comprises a variable resonant frequency inductance-capacitance resonant circuit, a rectifier circuit, and a field strength detection circuit. When it is detected that the radio frequency identification card works in a specific large field strength, the energy coupled by the radio frequency identification card is reduced through the detuning of the inductance-capacitance resonant circuit in the radio frequency identification card, so as to avoid the entry of excess energy into the chip interior, thereby avoiding the heating of the chip and improving the reliability and safety of the radio frequency identification card.

[0004] In summary, the traditional field strength detection circuit mainly detects and quantifies the rectified voltage VCC or the size of the bleeder current, but both of the above detection methods have great disadvantages.

[0005] The disadvantage of the scheme of detecting and quantifying the rectified voltage VCC is that the rectified voltage VCC is not linearly related to the field strength, and simple detection and quantification of the rectified voltage VCC cannot reflect the size of the current field strength.

[0006] The disadvantage of the scheme of detecting and quantifying the size of the bleeder current is that, since the rectified voltage VCC changes with the field strength, the relationship between the size of the bleeder current and the field strength is also not linear, and the size of the bleeder current cannot reflect the size of the current field strength through detection and quantification, especially when the radio frequency identification card chip works at the farthest working distance, at which time the field strength is extremely small and the bleeder circuit stops working and no longer bleeds current, at which time the size of the bleeder current cannot be detected to detect the size of the working field strength. SUMMARY

[0007] The present application aims to overcome at least one of the above-mentioned defects of the prior art, and provides an accurate field strength detection circuit for a radio frequency identification card chip, so as to solve the problem that when the radio frequency identification card chip works at the farthest working distance, the field strength is extremely small, the bleeder circuit stops working and no longer bleeds current, and at this time, the working field strength cannot be detected and quantized by detecting the size of the bleeder current.

[0008] The detailed technical solutions of the present application are as follows:

[0009] An accurate field strength detection circuit for a radio frequency identification card chip is designed, which can accurately detect the size of the working field strength of the chip, so as to dynamically adjust the bleeder current and working parameters of the radio frequency identification card chip. The accurate field strength detection circuit for the radio frequency identification card chip detects and quantizes the rectified voltage VCC and the bleeder current ILEK at the same time, and the quantized results are calculated by a logic processing circuit to obtain the current accurate field strength. Since the size of the field strength is proportional to the energy obtained by the antenna, i.e. the power consumption of the chip, the current accurate field strength can be predicted by accurately calculating the power consumption of the chip.

[0010] An accurate field strength detection circuit for a radio frequency identification card chip is designed, which can accurately detect the size of the working field strength of the chip, so as to dynamically adjust the bleeder current and working parameters of the radio frequency identification card chip. The accurate field strength detection circuit for the radio frequency identification card chip detects and quantizes the rectified voltage VCC and the bleeder current ILEK at the same time, and the quantized results are calculated by a logic processing circuit to obtain the current accurate field strength. Since the size of the field strength is proportional to the energy obtained by the antenna, i.e. the power consumption of the chip, the current accurate field strength can be predicted by accurately calculating the power consumption of the chip.

[0011] The antenna coupling part provides coupled energy, the rectifier circuit converts alternating current signals into direct current signals, if the accurate field strength detection circuit detects that the field strength of the direct current signal is greater than a set threshold, the bleeder voltage stabilizing circuit is started to bleed the excess energy coupled, and then the coupled energy is provided to the digital functional circuit for use to realize the required functions.

[0012] Further, the accurate field strength detection circuit comprises a voltage detection and quantization circuit, a current detection and quantization circuit, and a logic processing circuit.

[0013] The voltage detection and quantization circuit calculates and quantizes the voltage value of the rectified voltage VCC, the current detection and quantization circuit accurately calculates and quantizes the current value of the bleeder current ILEK, and the logic processing circuit identifies the field strength size of the radio frequency identification card chip through the quantized rectified voltage VCC and the quantized field strength, so as to dynamically adjust the working parameters of the radio frequency identification card chip and improve the working efficiency of the chip.

[0014] Further, the identification of the field strength size of the radio frequency identification card chip specifically comprises:

[0015] The voltage detection and quantization circuit receives the rectified voltage VCC and the reference voltage VREF, detects and quantizes the rectified voltage VCC, and generates an n-bit output SV <n:1>;

[0016] The current detection quantization circuit receives the bleeder control voltage VB and the reference current IREF, detects and quantizes the bleeder current ILEK, and generates an m-bit output SI <m:1>;

[0017] The logic processing circuit also receives SV <n:1>and SI <m:1>, by the logic processing circuit to the SV <n:1>and SI <n:1>The values of the output S are processed, outputting S <t:1>The digital functional circuit identifies the magnitude of the electric field strength of the RFID card chip, accurately detects the magnitude of the chip's operating electric field strength, and then dynamically adjusts the operating parameters of the RFID card chip.

[0018] Furthermore, the quantification and detection of the rectified voltage VCC specifically includes:

[0019] The input rectified voltage VCC is sampled, and the sampled VCC value is quantized by the reference voltage VREF and multiple comparator circuits to accurately calculate the VCC voltage value. When the VCC voltage value is lower than the preset minimum voltage value, the logic processing circuit detects and outputs an alarm signal to shut down the RFID card chip.

[0020] The voltage detection and quantization circuit specifically includes:

[0021] Use R1, R2...R2 n The voltage VCC is divided by the resistor RH in series to obtain the voltage division value V. <1> V <2> ...V<2 n >, through 2 n Each comparator compares the voltage V. <1> V <2> ...V<2 n The thermometer code P<2 is obtained by comparing the value of the reference voltage VREF with the value of the reference voltage. n :1>, then the thermometer code P<2 is decoded by the decoding circuit. n :1> Convert to output binary code SV <n:1>Thus, the rectified voltage VCC is quantized.

[0022] Further, the detection and quantization of the leakage current ILEK specifically includes:

[0023] The current of the leakage tube in the mirror leakage circuit is quantized by the reference current IREF and the current comparator, and the current value of the leakage current ILEK is accurately calculated.

[0024] The current detection and quantization circuit specifically includes:

[0025] The voltage VB for controlling the leakage tube is connected to the mirror MOS tube N2 of the leakage tube, the gate length of N2 is the same as that of the leakage tube, and the gate width is α times that of the leakage tube. α is set to one thousandth or smaller according to the size of the leakage current ILEK; since the gate length of N2 is the same as that of the leakage tube, and the gate width is α times that of the leakage tube, the current flowing through N2 is ILEK*α, thereby realizing mirror sampling of the leakage current ILEK flowing through the leakage tube through the mirror tube N2.

[0026] The drain of N2 is connected to the drain of PM, the gate of PM is connected to the drain of PM, the source of PM is connected to VDD voltage, the gate of PM is connected to the gates of P1, P2, P3……P2, the sources of P1, P2, P3……P2 are connected to VDD voltage, and the gate length and gate width of P1, P2, P3……P2 are the same as those of PM. n The drain of N2 is connected to the drain of PM, the gate of PM is connected to the drain of PM, the source of PM is connected to VDD voltage, the gate of PM is connected to the gates of P1, P2, P3……P2, the sources of P1, P2, P3……P2 are connected to VDD voltage, and the gate length and gate width of P1, P2, P3……P2 are the same as those of PM. n The drain of N2 is connected to the drain of PM, the gate of PM is connected to the drain of PM, the source of PM is connected to VDD voltage, the gate of PM is connected to the gates of P1, P2, P3……P2, the sources of P1, P2, P3……P2 are connected to VDD voltage, and the gate length and gate width of P1, P2, P3……P2 are the same as those of PM. n The drain of N2 is connected to the drain of PM, the gate of PM is connected to the drain of PM, the source of PM is connected to VDD voltage, the gate of PM is connected to the gates of P1, P2, P3……P2, the sources of P1, P2, P3……P2 are connected to VDD voltage, and the gate length and gate width of P1, P2, P3……P2 are the same as those of PM. m The drain of N2 is connected to the drain of PM, the gate of PM is connected to the drain of PM, the source of PM is connected to VDD voltage, the gate of PM is connected to the gates of P1, P2, P3……P2, the sources of P1, P2, P3……P2 are connected to VDD voltage, and the gate length and gate width of P1, P2, P3……P2 are the same as those of PM. m The drain of N2 is connected to the drain of PM, the gate of PM is connected to the drain of PM, the source of PM is connected to VDD voltage, the gate of PM is connected to the gates of P1, P2, P3……P2, the sources of P1, P2, P3……P2 are connected to VDD voltage, and the gate length and gate width of P1, P2, P3……P2 are the same as those of PM. m >;

[0027] Then the thermometer code P<2 m :1> is converted into the output binary code SI <m:1>Thus, the bleed current ILEK is quantified.

[0028] Further, the logic processing circuit further comprises a field strength judgment working state:

[0029] A field strength threshold is set, if the field strength where the RFID card chip is located is greater than the field strength threshold, it is a large field strength working state; if the field strength where the RFID card chip is located is less than or equal to the field strength threshold, it is a small field strength working state.

[0030] When the SI <m:1>When the limit field strength is 0, it is the limit field strength working state;

[0031] When the radio frequency identification card chip is in a large working field strength, the bleeding circuit works in the bleeding state, at this time the bleeding current ILEK is much larger than the working current of the digital function module, the logic processing circuit outputs the SV <n:1>and SI <m:1>The product of the two is the power consumption of the chip;

[0032] When the radio frequency identification card chip is in a small working field, the bleeder circuit stops working, the current detection quantization circuit quantizes the SI of the bleeder current ILEK <m:1>is recorded as 0, at this time, the logic processing circuit detects and outputs an alarm signal, prompting the digital function module to save power consumption by reducing the frequency or shutting down part of the function circuit;

[0033] At this time, the current detection quantization circuit outputs SI <m:1>Vd = 0, and at this time the SV output from the voltage detection quantizing circuit <n:1>denoted as lower operating limit, the logic processing circuit detects SV <n:1>value when the SV <n:1>When the voltage value of VCC is lower than the lowest voltage for the chip to work, the logic processing circuit detects and outputs an alarm signal, and turns off the RF identification card chip to prevent the chip from working in error or storing data in error due to the excessively low working voltage.

[0034] Compared with the prior art, the present application has the following advantages:

[0035] (1) The precise field strength detection circuit for the RF identification card chip can detect the field strength in which the RF identification card chip is located by accurately quantifying the rectified voltage VCC and the leakage current ILEK, and the detection output can identify that the chip is in a large field strength working state, a small field strength working state or a limit field strength working state, so as to adjust the working parameters of the digital functional circuit of the chip.

[0036] (2) The precise field strength detection circuit for the RF identification card chip accurately calculates the voltage value of the rectified voltage VCC through the voltage detection quantization circuit and accurately calculates the current value of the leakage current ILEK through the current detection quantization circuit, and the logic processing circuit receives the above calculation results to accurately detect the working field strength of the chip, so as to dynamically adjust the working parameters of the RF identification card chip and improve the working efficiency of the chip. BRIEF DESCRIPTION OF DRAWINGS

[0037] Figure 1 is the structure diagram of the prior RF identification card in embodiment 1 of the present application.

[0038] Figure 2 is the structure diagram of the leakage circuit in the prior RF identification card chip in embodiment 1 of the present application.

[0039] Figure 3 is the structure diagram of the precise field strength detection circuit for the RF identification card chip in the RF identification card chip.

[0040] Figure 4 is the structure diagram of the precise field strength detection circuit in the RF identification card chip in embodiment 1 of the present application.

[0041] Figure 5 is the structure diagram of the voltage detection quantization circuit in the precise field strength detection circuit for the RF identification card chip in embodiment 1 of the present application.

[0042] Figure 6 is the structure diagram of the current detection quantization circuit in the precise field strength detection circuit for the RF identification card chip in embodiment 1 of the present application. DETAILED DESCRIPTION

[0043] The present application will be further described below in combination with the drawings and embodiments.

[0044] It should be noted that the following detailed description is exemplary in nature and is intended to provide further description of the application. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

[0045] It is also important to note that the terms "or" and "and" as used herein, unless otherwise indicated, are used to mean either phonetic "or", that is, any or all possible combinations of words it conjoins, or phonetic "and" that is, all possible combinations of words it conjoins.

[0046] The embodiments in the application and the features in the embodiments can be combined with each other without conflict.

[0047] Embodiment 1

[0048] In the field of high frequency (13.56MHz) radio frequency identification card application, as shown in Figure 1 , the non-contact antenna of the radio frequency card reader and the non-contact antenna of the radio frequency identification card communicate through inductive coupling; the radio frequency identification card further includes a rectifier circuit (composed of D1, D2, D3, D4), a discharge voltage stabilizing circuit and a digital function circuit. The radio frequency identification card obtains energy through antenna coupling and communicates with the radio frequency card reader. The energy obtained by the radio frequency identification card is inversely proportional to the distance between the radio frequency identification card and the radio frequency card reader. The closer the distance, the stronger the field strength where the radio frequency identification card is located, and the more energy it obtains. The farther the distance, the smaller the field strength where the radio frequency identification card is located, and the less energy it obtains.

[0049] The energy difference obtained by the radio frequency identification card through coupling is huge when it communicates at different field strengths, i.e. near distance and far distance. Therefore, in the radio frequency identification card chip, the excess energy needs to be consumed in the form of current discharge through the current discharge circuit in the discharge voltage stabilizing circuit at a large field strength.

[0050] The existing current discharge circuit structure is as follows Figure 2 As shown, when the radio frequency identification card chip is in a large field strength, the VDD voltage is too high, the VDD voltage is raised through the voltage division of the resistors RL1 and RL2, when the VFB voltage is higher than the internal reference voltage VREF of the chip, the output VB voltage of the operational amplifier 01 is raised, the bleeder tube bleeds more current at the VDD end, so that the VDD voltage is reduced to the preset value; when the radio frequency identification card chip is in a small field strength, the VDD has been at the preset value, at this time, the VFB voltage of the VDD through the voltage division of the resistors R1 and R2 is much lower than the reference voltage VREF, the output VB voltage of the operational amplifier 01 is 0, i.e. the ground potential, the bleeder tube is closed, and all the energy coupled to the radio frequency identification card chip is provided for the digital functional circuit.

[0051] The embodiment provides a radio frequency identification card chip accurate field strength detection circuit, as shown in the figure, Figure 3 As shown, the radio frequency identification card chip accurate field strength detection circuit 11 is applied in a radio frequency identification card chip, and the radio frequency identification card chip comprises an antenna coupling part, a rectifier circuit, the accurate field strength detection circuit 11, a bleeder voltage stabilizing circuit and a digital functional circuit.

[0052] The antenna coupling part provides coupled energy, the rectifier circuit converts alternating current signals into direct current signals, if the accurate field strength detection circuit 11 detects that the field strength of the direct current signal is greater than a set threshold value, the bleeder voltage stabilizing circuit is started to bleed the excess energy coupled, and then the coupled energy is provided for the digital functional circuit; the digital functional circuit is a digital circuit part of the radio frequency card chip, and realizes the required function.

[0053] The accurate field strength detection circuit 11 comprises a voltage detection and quantization circuit, a current detection and quantization circuit and a logic processing circuit, and the logic processing circuit is a digital logic calculation and processing circuit of the field strength detection circuit, as shown in the figure. Figure 4

[0054] The voltage detection and quantization circuit accurately calculates the voltage value of the rectified voltage VCC, the current detection and quantization circuit accurately calculates the current value of the bleeder current ILEK, the logic processing circuit simultaneously receives the voltage value of the rectified voltage VCC and the current value of the bleeder current ILEK, accurately detects the size of the chip working field strength, and thus dynamically adjusts the working parameters of the radio frequency identification card chip, and improves the working efficiency of the chip.

[0055] Preferably, the accurate field strength detection circuit 11 detects and quantizes the rectified voltage VCC and the bleeder current ILEK at the same time, and the quantization result is calculated by the logic processing to obtain the current accurate field strength;

[0056] Since the size of the field strength is proportional to the energy obtained on the antenna, i.e. the power consumption of the chip, the current field strength can be predicted by accurately calculating the power consumption of the chip, as shown in the figure. Figure 3 ​As shown: the accurate field strength detection circuit 11 input rectified voltage VCC, reference voltage VREF, bleeder tube control voltage VB and reference current IREF to calculate the current field strength, quantified as output value t bits S <t:1>And is connected to the digital function circuit, for the digital function circuit identification radio frequency identification card chip is in the field intensity size. Wherein, reference voltage VREF and reference current IREF are the chip inside reference, for the known parameter, rectified voltage VCC and leakage current ILEK are the quantized parameter.

[0057] Preferably, the rectified voltage of the radio frequency identification card chip is accurately detected and quantized by the voltage detection quantization circuit, such as Figure 4 As described in detail, it specifically includes:

[0058] The input end of the voltage detection quantization circuit is the rectified voltage VCC and the reference voltage VREF, and n-bit output SV is generated by detecting and quantizing the rectified voltage VCC. <n:1>;

[0059] The input end of the current detection quantization circuit is the bleed pipe control voltage VB and the reference current IREF, the bleed current ILEK is detected and quantized, and an m-bit output SI is generated <m:1>;

[0060] SV <n:1>and SI <m:1>Output to the logic processing circuit, since the radio frequency identification card chip power consumption and chip operating voltage and operating current product related, through the logic processing circuit to SV <n:1>and SI <n:1>The value of the current is processed, and the size of the energy acquired by the current radio frequency identification card chip can be accurately calculated. Through the S <t:1>This indicates the magnitude of the electric field strength at which the RFID card chip operates, used to define the digital function circuitry. The operating voltage is the rectified voltage VCC, and the operating current includes the discharge current ILEK and the power consumption current of the digital function circuitry. Since the power consumption of the digital function circuitry is low, it can be ignored under non-extreme operating electric field strengths.

[0061] Preferably, the rectified voltage VCC is detected and quantified, such as... Figure 5 Specifically, it includes:

[0062] The input rectified voltage VCC is sampled, and the sampled VCC value is quantized by the reference voltage VREF and multiple comparator circuits to accurately calculate the VCC voltage value. When the VCC voltage value is lower than the preset minimum voltage value, the logic processing circuit can detect and output an alarm signal to shut down the RFID card chip.

[0063] One implementation scheme of voltage detection and quantization circuit is as follows: Figure 5 As shown, R1, R2...R2 n The voltage VCC is divided by the resistor RH in series to obtain the voltage division value V. <1> V <2> ...V<2 n >, through 2 n Comparators (21, 22, 23...22) n ) respectively compare the score pressure value V <1> V <2> ...V<2 n The thermometer code P<2 is obtained by combining the value of the reference voltage VREF. n :1>, then the thermometer code P<2 is decoded by the decoding circuit 31. n :1> Convert to output binary code SV <n:1>This enables the quantization of the rectified voltage VCC.

[0064] Preferably, the discharge current ILEK is detected and quantified, such as... Figure 6 Specifically, it includes:

[0065] In the mirror discharge circuit, the current of the discharge tube is quantified by the reference current IEF and the current comparator to accurately calculate the current value of the discharge current ILEK.

[0066] Both voltage and current quantization are performed using analog-to-digital conversion circuits, which involves comparing sampled values ​​with reference values ​​of different weights using multiple comparators.

[0067] An implementation scheme for a current detection and quantization circuit is as follows: Figure 6 As shown, the voltage VB controlling the bleeder is connected to the mirror MOS transistor N2. The gate length of N2 is the same as that of the bleeder, and the gate width is α times that of the bleeder. α can be set to one-thousandth or less depending on the magnitude of the bleeder current ILEK. Since the gate length of N2 is the same as that of the bleeder and the gate width is α times that of the bleeder, the current flowing through N2 is ILEK*α. Thus, the mirror sampling of the bleeder current ILEK flowing through the bleeder is achieved through the mirror transistor N2.

[0068] The drain of transistor N2 is connected to the drain of transistor PM, the gate of transistor PM is connected to the drain of transistor PM, and the source of transistor PM is connected to VDD voltage. The gate of transistor PM is connected to P1, P2, P3...P2 n The gates, P1, P2, P3...P2 n The source terminals are connected to VDD voltage, P1, P2, P3...P2 n The gate length and gate width of P1 are the same as those of PM. The drain of P1 and the reference current IREF are connected to the input of current comparator 41, which outputs Q. <1> The drain of transistor P2 and twice the reference current IREF are connected to the input of current comparator 42, which outputs Q. <2> The drain of transistor P3 and three times the reference current IREF are connected to the input of current comparator 43, which outputs Q. <3> And so on, P2 m The tube's leak level and 2 m The reference current IREF is connected to the current comparator 42. m At the input terminal, the current comparator outputs Q<2 m >

[0069] Then, the thermometer code P<2 is decoded by the decoding circuit 51. m :1> Convert to output binary code SI <m:1>Thus, the bleed current ILEK is quantified.

[0070] Figure 4 The middle logic processing circuit is a digital logic calculation processing circuit of the field strength detection circuit, and functions to judge the field strength working state.

[0071] The large field strength working state: when the radio frequency identification card chip is in a large working field strength, the energy received by the radio frequency identification card antenna is much greater than the working power consumption of the chip, the bleed circuit works in a bleed state, at this time, the bleed current ILEK is much greater than the working current of the digital function module, the logic processing circuit judges the SV <n:1>and SI <m:1>The product of the two is the power dissipation of the chip.

[0072] Small field intensity working state: when the radio frequency identification card chip is in a small working field intensity, the energy received by the radio frequency identification card antenna just supplies the power dissipation of the chip for normal working, the bleeding circuit stops working, the current detection quantization circuit quantizes the SI of the bleeding current ILEK <m:1>Approaching 0 or 0, at this time the logic processing circuit can detect and output alarm signal, prompt digital function module can save power consumption through the frequency reduction or close part of function circuit.

[0073] Limit field strength working state: At this time, the SI output by the current detection quantization circuit <m:1>Vd = 0, and at this time the SV output from the voltage detection quantizing circuit <n:1>Also close to the lower end of the working range. The logic processing circuit detects SV <n:1>value when the SV <n:1>When the set value, i.e. the VCC voltage value is lower than the minimum voltage for the chip to work, the logic processing circuit detects and outputs an alarm signal to turn off the radio frequency identification card chip, preventing the chip from working in a wrong state or storing wrong data due to the excessively low working voltage.

[0074] In summary, the present application designs a precise field strength detection circuit 11 in a radio frequency identification card chip, which can detect the field strength of the radio frequency identification card chip by precisely quantifying the rectified voltage VCC and the leakage current ILEK, and the detection output can identify that the chip is in a large field strength working state, a small field strength working state and a limit field strength working state, so as to adjust the working parameters of the digital functional circuit of the chip.

[0075] Obviously, the above embodiments of the present application are only examples for clearly illustrating the technical solutions of the present application, and are not intended to limit the specific embodiments of the present application. Any modification, equivalent replacement and improvement made within the spirit and principle of the claims of the present application shall be included in the protection scope of the claims of the present application.

Claims

1. A precise field strength detection circuit for a radio frequency identification card chip, applied in a radio frequency identification card chip, characterized in that, The radio frequency identification card chip comprises an antenna coupling part, a rectifier circuit, an accurate field strength detection circuit, a bleeder voltage stabilizing circuit and a digital function circuit; The antenna coupling part provides coupling energy, the rectifier circuit converts alternating current signals into direct current signals, if the accurate field strength detection circuit detects that the field strength of the direct current signals is greater than a set threshold, the bleeder voltage stabilizing circuit is started to bleed off the excess energy coupled, and then the energy coupled is provided for the digital function circuit to use; The accurate field strength detection circuit comprises a voltage detection quantization circuit, a current detection quantization circuit and a logic processing circuit; The voltage detection quantization circuit calculates the voltage value of the quantized rectified voltage VCC, the current detection quantization circuit accurately calculates the current value of the quantized bleeder current ILEK, and the logic processing circuit identifies the field strength size where the radio frequency identification card chip is located through the quantized rectified voltage VCC and the quantized bleeder current ILEK. The identification of the field strength size where the radio frequency identification card chip is located comprises: The voltage detection quantization circuit receives the rectified voltage VCC and the reference voltage VREF, detects and quantizes the rectified voltage VCC, and generates an n-bit output SV <n:1> ；< / n:1> The current detection quantization circuit receives the bleeder tube control voltage VB and the reference current IREF, detects and quantizes the bleeder current ILEK, and generates an m-bit output SI <m:1> ；< / m:1> The logic processing circuit simultaneously receives SV <n:1>and SI <m:1>, by the logic processing circuit to the SV <n:1>and SI <m:1>The values of the output S are processed, outputting S <t:1>The field strength size where the radio frequency identification card chip is located is identified for the digital function circuit.< / t:1> 2. The precise field strength detection circuit for a radio frequency identification card chip according to claim 1, wherein, The voltage detection quantization circuit specifically comprises: Use R1, R2...R2 n The voltage VCC is divided by the resistor RH in series to obtain the voltage division value V. <1> V <2> ...V<2 n >, through 2 n Each comparator compares the voltage V. <1> V <2> ...V<2 n The thermometer code P<2 is obtained by combining the value of the reference voltage VREF. n :1>; The thermometer code P<2 n is then converted by the decoding circuit into the output binary code SV <n:1>Thus, the quantization of the rectified voltage VCC is realized.< / n:1> 3. The precise field strength detection circuit for a radio frequency identification card chip according to claim 2, wherein, The current detection quantization circuit specifically comprises: The bleeder tube control voltage VB is connected to the mirror MOS tube N2 of the bleeder tube, the gate length of N2 is the same as that of the bleeder tube, and the gate width is alpha times of that of the bleeder tube, alpha is set to one thousandth or smaller according to the size of the bleeder current ILEK; since the gate length of N2 is the same as that of the bleeder tube, and the gate width is alpha times of that of the bleeder tube, the current flowing through N2 is ILEK*alpha, thus the mirror sampling of the bleeder current ILEK flowing through the bleeder tube is realized through the mirror tube N2. The drain of N2 transistor is connected to the drain of PM transistor, the gate of PM transistor is connected to the drain of PM transistor, and the source of PM transistor is connected to VDD voltage; the gate of PM transistor is connected to P1, P2, P3...P2 n The gates, P1, P2, P3...P2 n The source terminals are connected to VDD voltage, P1, P2, P3...P2 n The grid length and grid width are the same as those of the PM tube; The drain of the P1 transistor and the reference current IREF are connected to the input of a current comparator (41) which outputs Q<1>; the drain of the P2 transistor and the double reference current IREF are connected to the input of a current comparator (42) which outputs Q<2>; the drain of the P3 transistor and the triple reference current IREF are connected to the input of a current comparator (43) which outputs Q<3>; and so on, the drain of the P2 m transistor and the double reference current IREF are connected to the input of a current comparator (42 m ), which outputs Q<2 m >; the drain of the P3 transistor and the triple reference current IREF are connected to the input of a current comparator (43 m ), which outputs Q<3 m >. The thermometer code P<2 m is then converted by the decoding circuit into the output binary code SI <m:1>Thus, the quantization of the bleeder current ILEK is realized.< / m:1> 4. The precise field strength detection circuit for a radio frequency identification card chip according to claim 2, wherein, The logic processing circuit further comprises a judgment field strength working state: The field strength threshold is set. If the field strength where the RFID card chip is located is greater than the field strength threshold, it is a large field strength working state. If the field strength where the RFID card chip is located is less than or equal to the field strength threshold, it is a small field strength working state. When the current detection quantization circuit outputs SI <m:1>When 0, it is the limit field strength working state;< / m:1> When the radio frequency identification card chip is in a large field intensity working state, the bleeding circuit works in a bleeding state, at this time the bleeding current ILEK is much larger than the working current of the digital function circuit, the logic processing circuit outputs the SV <n:1>and SI <m:1>The product of VCC and ILEK is the power consumption of the chip;< / m:1> When the radio frequency identification card chip is in a small field strength working state, the bleeding circuit stops working, the current detection quantization circuit quantizes the SI of the bleeding current ILEK <m:1>When 0, the logic processing circuit detects and outputs an alarm signal, prompting the digital function circuit to reduce the frequency or close part of the function circuit to save power consumption;< / m:1> Limit field strength working state: at this time, the SI output by the current detection quantization circuit <m:1>Vd = 0, and at this time the SV output from the voltage detection quantizing circuit <n:1>denoted as lower operating limit, the logic processing circuit detects SV <n:1>value when the SV <n:1>When lower than the set value, that is, when the VCC voltage value is lower than the minimum voltage for the chip to work, the logic processing circuit detects and outputs an alarm signal to close the radio frequency identification card chip.< / n:1>

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