High-efficiency flyback power supply topology circuit structure
By optimizing the flyback power supply topology, adopting a secondary self-driven synchronous rectifier circuit and domestically produced components, the efficiency and size issues of the flyback switching power supply were solved, achieving a high-efficiency and miniaturized flyback power supply design.
Patent Information
- Application Number
- CN202511693658.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-18
- Publication Date
- 2026-02-17
AI Technical Summary
Existing flyback switching power supply technology has room for improvement in terms of efficiency, cost, and complexity, especially in the selection of suitable synchronous rectification circuits and control logic design.
It adopts a high-efficiency flyback power supply topology circuit structure, including a secondary self-driven synchronous rectification circuit design, optimized component selection and circuit layout, and uses domestic synchronous rectification chip RMJ91816 and control chip CYT5022. Combined with optocoupler feedback and optimized circuit topology design, it reduces losses and improves power supply efficiency.
The output efficiency of the flyback power supply has been improved, the power supply size has been reduced, and the power supply has been made domestically. The size has been reduced by more than 1/3, the efficiency has been increased by more than 3%, the components have been made domestically, and the internal heat dissipation of the power supply has been optimized.
Smart Images
Figure CN121546925A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of flyback switching power supply technology, and specifically to a high-efficiency flyback power supply topology circuit structure. Background Technology
[0002] Currently, in flyback switching power supply design, the losses in the flyback topology mainly originate from transformer losses, power device losses, and the losses of the main control chip itself. First, core losses are primarily copper and iron losses. Considering output power and size, the core size and parameters are essentially fixed. Therefore, the most effective way to improve transformer efficiency is to select different magnetic materials. However, the price of different magnetic materials becomes a limiting factor, so transformer losses will not be discussed here. Second, the flyback power devices are mainly primary and secondary power MOSFETs. Their losses are mainly divided into drive losses, conduction losses, and switching losses. Therefore, appropriate power device models and absorption parameters can be selected to avoid voltage spikes between the drain and source of the MOSFET exceeding the rated value, which could damage the MOSFET. Finally, selecting a suitable main control chip can also reduce circuit losses, but the chip's functionality and applicability must be considered.
[0003] On the other hand, for typical flyback circuit topologies, the secondary rectifier circuit usually offers two options: Schottky rectification and synchronous rectification. Compared to ordinary Schottky rectification, secondary synchronous rectification, while involving more components, effectively improves circuit efficiency. Therefore, effectively selecting the synchronous rectifier circuit becomes a key method for improving flyback power supply efficiency. Synchronous rectification utilizes MOSFETs instead of traditional diodes for rectification. Since the on-resistance of a MOSFET is much smaller than the forward voltage drop of a Schottky diode, power consumption can be significantly reduced under high current conditions. However, in practical applications, the design complexity of the synchronous rectification control logic and its associated additional costs must be considered.
[0004] In summary, existing flyback switching power supply technology still has room for improvement in terms of efficiency, cost, and complexity. When designing a flyback switching power supply, the characteristics of each component should be comprehensively considered, and the optimal choice should be made based on the specific application scenario. Summary of the Invention
[0005] To address the shortcomings of existing technologies, the present invention aims to provide a high-efficiency flyback power supply topology circuit structure.
[0006] To achieve the above objectives, the present invention adopts the following technical solution: A high-efficiency flyback power supply topology circuit structure is disclosed, comprising: a control chip and its peripheral circuits, a primary power circuit, a secondary power circuit, and a secondary output synchronous rectification circuit.
[0007] The control chip and its peripheral circuits are used to provide drive signals to the primary power circuit of the flyback power supply. The primary power circuit stores the energy of the input voltage in the primary winding of transformer T1 and controls the storage and release of energy by controlling the current of the primary winding of the transformer. The secondary power circuit induces voltage in the secondary winding of transformer T1, transfers energy to the load, and performs synchronous rectification and output voltage regulation to achieve constant voltage output. The secondary output synchronous rectification circuit drives the secondary output power MOSFET of the flyback power supply to detect the on / off state and on-time of the MOSFET in the secondary power circuit and generate corresponding synchronous rectification drive signals.
[0008] As a further improvement to the above technical solution, the circuit structure also includes an input filter circuit for smoothing the input voltage; and an output filter circuit for smoothing the output voltage. The input filter circuit includes a primary filter capacitor C1; the first terminal of the primary filter capacitor C1 is connected to the same-name terminal of the primary winding of the transformer T1, and the second terminal of the primary filter capacitor C1 is connected to the input ground.
[0009] As a further improvement to the above technical solution, the circuit structure also includes an output filter circuit, which is used to smooth the output voltage. The output filter circuit includes a secondary filter capacitor C2; the first terminal of the secondary filter capacitor C2 is connected to the opposite terminal of the secondary winding of the transformer T1, and the second terminal of the secondary filter capacitor C2 is connected to the output ground.
[0010] As a further improvement to the above technical solution, the primary power circuit includes a primary switching transistor Q1, a primary absorption resistor R1, and a primary absorption capacitor C3. The source of the primary switching transistor Q1 is connected to the first terminal of the primary absorption capacitor C3, the second terminal of the primary absorption capacitor C3 is connected to the first terminal of the primary absorption resistor R1, and the second terminal of the primary absorption resistor R1 is connected to the drain of the primary switching transistor Q1. The gate of the primary switching transistor Q1 is connected to the output terminal of the control chip and its peripheral circuits. The node where the drain of the primary switching transistor Q1 is connected to the second terminal of the primary absorption resistor R1 is connected to the opposite terminal of the primary winding of the transformer T1. The node where the first terminal of the primary absorption capacitor C3 is connected to the source of the primary switching transistor Q1 is grounded through the sampling resistor R3.
[0011] As a further improvement to the above technical solution, the secondary power circuit includes a secondary switch Q2, a secondary absorption resistor R2, and a secondary absorption capacitor C4. The drain of the secondary switch Q2 is connected to the same-name terminal of the secondary winding of the transformer T1, and the source of the secondary switch Q2 is connected to the first terminal of the secondary absorption capacitor C4, which is also grounded. The second terminal of the secondary absorption capacitor C4 is connected to the first terminal of the secondary absorption resistor R2, and the second terminal of the secondary absorption resistor R2 is connected to the voltage signal detection input terminal of the secondary output synchronous rectifier circuit. The gate of the secondary switch Q2 is connected to the drive signal output terminal of the secondary output synchronous rectifier circuit.
[0012] As a further improvement to the above technical solution, both the primary switch Q1 and the secondary switch Q2 are N-type power MOSFETs.
[0013] As a further improvement to the above technical solution, the secondary output synchronous rectification circuit includes a self-driven synchronous rectification chip and peripheral circuits; the self-driven synchronous rectification chip adopts the 91816 type self-driven synchronous rectification chip; the secondary output voltage of transformer T1 is used to power the synchronous rectification chip; the switching period and conduction time of the synchronous rectification chip are determined by detecting the drain-source voltage of the switching transistor in the secondary power circuit; the switching delay time of the synchronous rectification chip is 10ns.
[0014] As a further improvement to the above technical solution, the circuit structure further includes: a current sampling and feedback circuit and a voltage sampling and feedback circuit; the current sampling and feedback circuit is used to sample the current signal of the primary power circuit and feed the sampled current signal back to the control chip and its peripheral circuits; the voltage sampling and feedback circuit is used to sample the voltage signal of the secondary power circuit and feed the sampled voltage signal back to the control chip and its peripheral circuits after optical isolation.
[0015] Compared with the prior art, the advantages of the present invention are: (1) In response to the current domestic engineering practice's requirements for high reliability and miniaturization of power supplies, as well as the increasingly tense international situation triggering the demand for product localization, this invention provides a secondary self-driven synchronous rectification circuit design. This circuit determines the switching cycle and conduction time of the synchronous rectification chip (RMJ91816) by detecting the drain-source voltage of the switching transistor in the secondary power circuit; and sets the switching delay time of the synchronous rectification chip (RMJ91816) by adjusting the external RC parameters; and avoids cross-conduction between the synchronous rectification transistor drive signal and the switching transistor signal by increasing the pre-turn-off time. On the other hand, by optimizing the selection of other components in the circuit, the following measures are taken: The control chip and its peripheral circuits are selected from the domestic 5022 series control chip, which integrates short-circuit protection, soft-start, and ramp compensation functions, thus simplifying the peripheral circuitry; the transformer T1 uses a domestic ER11 / 5 / 6 type magnetic core, and the core size is optimized by optimizing parameters such as copper thickness, leakage inductance, and impedance; the primary and secondary power circuits are optimized, with 200V and 100V domestic MOSFETs selected for the primary and secondary sides respectively; the input and output filter circuits are optimized, with single-capacitor filtering used in both; in terms of circuit layout, a double-layer PCB with four-sided board layout and side-mount is adopted, and the heat dissipation channels are optimized by rationally distributing power heat-generating components. In summary, this invention can reduce the power supply size by more than 1 / 3 compared to similar power supplies.
[0016] (2) The secondary self-driven synchronous rectifier circuit design is the innovation of this invention. Common secondary synchronous rectifier driving methods for low-power flyback power supplies include self-driven and auxiliary winding driven methods, but both suffer from defects such as unstable driving signals and complex circuit topologies. The circuit topology adopted in this invention, through the use of a new domestically produced synchronous rectifier chip and optimized peripheral resistor and capacitor parameters, improves the output efficiency of the flyback power supply in practical engineering operations and reduces the power supply size. The secondary self-driven synchronous rectifier circuit design adopted in this invention solves, on the one hand, the problem of cross-conduction between the synchronous rectifier tube driving signal and the switching tube signal caused by dead-time design defects; on the other hand, it further improves the output efficiency and reliability of the low-power flyback power supply while reducing its size in practical engineering applications. Through the above innovations, taking the technical parameters of a 20W flyback power supply as an example, this invention achieves a typical output efficiency of 85%, and its size is reduced by more than 1 / 3 compared to a similar 27mm*27mm power supply, reducing the size to 25mm*13mm. Attached Figure Description
[0017] Figure 1 This is a circuit diagram of the circuit structure for improving the efficiency of the flyback topology circuit in this invention. Detailed Implementation
[0018] The present invention will be further described below with reference to the accompanying drawings: like Figure 1 The diagram illustrates a high-efficiency flyback power supply topology, comprising: a control chip and its peripheral circuits, a current sampling and feedback circuit, a voltage sampling and feedback circuit, a synchronous rectification circuit, an input filter circuit, an output filter circuit, a primary power circuit, and a secondary power circuit. Figure 1 In the diagram, the circuit within dashed box ① is the primary power circuit, and the circuit within dashed box ② is the secondary power circuit. This invention optimizes the flyback synchronous rectifier circuit, improving the overall power supply conversion efficiency.
[0019] The control chip and its peripheral circuits are used to provide drive signals to the primary power circuit of the flyback power supply. The current sampling and feedback circuit is connected to the primary power circuit of the flyback power supply and is used to acquire the primary-side current feedback signal. The voltage sampling and feedback circuit is connected to the secondary power circuit of the flyback power supply and is used to acquire the secondary-side voltage feedback signal. The secondary output synchronous rectification circuit is used to detect and drive the secondary output terminal of the flyback power supply to determine the start / stop state and conduction time of the MOSFET in the secondary power circuit and generate the corresponding synchronous rectification drive signal. The current sampling and feedback circuit, voltage sampling and feedback circuit, input filter circuit, and output filter circuit can be implemented using existing technologies.
[0020] The high-efficiency flyback power supply topology described in this invention optimizes the synchronous rectification circuit of the flyback power supply, thereby improving the overall conversion efficiency of the power supply. Through reasonable component selection and circuit optimization design, the losses of the input filter circuit, output filter circuit, control chip and its peripheral circuits, current sampling and feedback circuit, primary power circuit, secondary power circuit, voltage sampling and feedback circuit, and synchronous rectification circuit are reduced, thus improving the overall conversion efficiency of the flyback power supply.
[0021] To optimize the circuit topology and reduce the circuit size while ensuring circuit filtering, both the input and output filtering circuits in this invention use a 1210 capacitor for filtering. The input filtering circuit is connected to the primary power circuit. The output filtering circuit is connected to the secondary power circuit. Specifically, the input filtering circuit includes a primary filtering capacitor C1. The first terminal of the primary filtering capacitor C1 is connected to the same-name terminal of the primary winding of the transformer T1, and the second terminal of the primary filtering capacitor C1 is grounded. The output filtering circuit includes a secondary filtering capacitor C2. The first terminal of the secondary filtering capacitor C2 is connected to the opposite-name terminal of the secondary winding of the transformer T1, and the second terminal of the secondary filtering capacitor C2 is connected to the output ground. As a further improvement to the above technical solution, considering the advance of power MOSFET losses, the primary and secondary power circuits identify the main losses as the driving loss, conduction loss, and switching loss of the MOSFET, and therefore select appropriate models accordingly. Considering the advance of MOSFET voltage spikes, to optimize the circuit topology, an absorption circuit for the power MOSFET is added, and appropriate parameters are selected through calculation to reduce the absorption circuit losses.
[0022] The primary power circuit is connected to the control chip, its peripheral circuits, and the current sampling and feedback circuit. The secondary power circuit is connected to the secondary output synchronous rectification circuit and the voltage sampling and feedback circuit. The current sampling and feedback circuit samples the current signal of the primary power circuit and feeds it back to the control chip and its peripheral circuits. By designing the parameters of the current sampling and feedback circuit, harmonic compensation is added to the circuit. The circuit switching frequency is set based on the chip parameters and the circuit output power, and relevant parameters of the control chip and its peripheral circuits are also set to add undervoltage protection and soft-start functions. The voltage sampling and feedback circuit samples the voltage signal of the secondary power circuit and feeds it back to the control chip and its peripheral circuits after optocoupler isolation.
[0023] The primary power circuit includes a primary switch Q1, a primary absorption resistor R1, and a primary absorption capacitor C3. The source of the primary switch Q1 is connected to the first terminal of the primary absorption capacitor C3, the second terminal of the primary absorption capacitor C3 is connected to the first terminal of the primary absorption resistor R1, and the second terminal of the primary absorption resistor R1 is connected to the drain of the primary switch Q1. The gate of the primary switch Q1 is connected to the output terminal of the control chip and its peripheral circuitry. The node where the drain of the primary switch Q1 is connected to the second terminal of the primary absorption resistor R1 is connected to the opposite-named terminal of the primary winding of transformer T1. The node where the first terminal of the primary absorption capacitor C3 is connected to the source of the primary switch Q1 is grounded via the sampling resistor R3.
[0024] The secondary power circuit includes a secondary switch Q2, a secondary absorption resistor R2, and a secondary absorption capacitor C4. The drain of the secondary switch Q2 is connected to the same-name terminal of the secondary winding of the transformer T1, and the source of the secondary switch Q2 is connected to the first terminal of the secondary absorption capacitor C4. The source of the secondary switch Q2 is also grounded. The second terminal of the secondary absorption capacitor C4 is connected to the first terminal of the secondary absorption resistor R2, and the second terminal of the secondary absorption resistor R2 is connected to the voltage signal detection input terminal of the secondary output synchronous rectification circuit. The gate of the secondary switch Q2 is connected to the drive signal output terminal of the secondary output synchronous rectification circuit. Both the primary switch Q1 and the secondary switch Q2 are N-type power MOSFETs. To reduce transformer losses, the transformer T1 in this invention uses a DMR96A type magnetic core. For flyback topologies with an output power not exceeding 20W, a core size of ER11 is generally selected. Simultaneously, the transformer T1 employs a sandwich winding method to enhance coil coupling, thereby improving efficiency.
[0025] The secondary output synchronous rectification circuit includes a self-driven synchronous rectification chip and peripheral circuits. The secondary output synchronous rectification circuit detects the output voltage signal to determine the start / stop state of the synchronous rectification circuit and generates a corresponding synchronous rectification drive signal. It also sets the peripheral circuit parameters of the self-driven synchronous rectification chip to determine the switching cycle and conduction time.
[0026] In the implementation of the high-efficiency flyback power supply topology circuit structure described in this invention, firstly, the CYT5022 main control chip, characterized by low loss, high integration of auxiliary functions, and a wide power supply range, is selected. While ensuring voltage and current feedback functionality, a capacitor is added to the NS pin of the main control chip to enhance soft-start functionality; a voltage divider resistor is added to the UVLO pin to implement input undervoltage protection; and a resistor and capacitor are added to the CS pin to achieve harmonic compensation. Secondly, by setting a suitable power supply method—connecting the VCC pin of the main control chip to the positive terminal of the input voltage—the operating range of the flyback power supply is widened. Furthermore, by setting pull-up resistors and Zener diodes, the reliability and applicability of the circuit are improved. Optical coupling feedback is chosen as the circuit feedback method. Compared to transformer winding feedback, although optical coupling feedback affects circuit size due to the larger number of components, it ensures circuit output accuracy and allows for optimization of circuit dynamic performance through the use of Type III feedback, thereby further improving circuit reliability. A resistor-capacitor series circuit (R1 and C3, R2 and C4) is selected as the primary and secondary absorption circuits of the flyback topology. This series absorption circuit effectively reduces stress spikes in the power MOSFETs, and the optimal values are determined through simulation calculations to improve circuit efficiency. Synchronous rectification is chosen as the secondary rectifier circuit of the flyback. By selecting a suitable self-detecting and self-driving synchronous rectifier chip RMJ91816, the secondary synchronous rectifier circuit is simplified. The switching cycle and conduction time of the synchronous rectifier chip are set by calculating the external resistor and capacitor parameters, ensuring normal switching of the MOSFETs in both the primary and secondary power circuits, thereby improving the output efficiency of the flyback circuit. Through the above scheme, the output efficiency of the low-power flyback topology circuit can be improved by more than 3%.
[0027] For flyback topologies with output power less than 20W, efficiency decreases by approximately 0.2% for every 1mA increase in input current. Therefore, reducing the steady-state power consumption of the PWM chip can effectively improve the conversion efficiency of the product. This invention ultimately selects the 5022 series chip, which has lower steady-state power consumption and a wider operating voltage range, as the control chip. Furthermore, considering both output efficiency and circuit parameters, the operating frequency of the main control chip is set to 300kHz.
[0028] Taking an output power of no more than 20W as an example, for the primary power MOSFET Q1 and the secondary power MOSFET Q2, by calculating the drive loss, conduction loss, and switching loss of the MOSFETs, it is clear that the drive loss is the main loss. Therefore, the Qg value is preferred, that is, the MOSFET with a lower total gate charge voltage on the gate. Secondly, the RDS(on) value is considered, that is, the MOSFET with a lower drain-source on-resistance. On the other hand, since this invention uses a self-driven synchronous rectification chip, the gate drive voltage of the secondary MOSFET also needs to be considered simultaneously.
[0029] For the secondary synchronous rectification circuit, this invention first selects the 91816 self-driven synchronous rectification chip. Taking the secondary switch (MOSFET) connected to the negative output terminal as an example, this invention uses the secondary output voltage to power the synchronous rectification chip. By detecting the drain-source voltage of the secondary switch, the switching cycle and conduction time of the synchronous rectification chip are determined. Furthermore, by designing the chip to have the shortest possible power-on time, the switching delay time of the designed synchronous rectification chip is approximately 10ns, making the switching time more accurate and ensuring normal switching of the primary and secondary MOSFETs, thereby improving the reliability and output efficiency of the flyback circuit. It is worth noting that in the circuit design, the distance from the synchronous rectification chip drive signal pin to the gate of the secondary MOSFET should be as short as possible, and the drain-source detection line of the secondary MOSFET should be as thick as possible.
[0030] The synchronous rectification circuit is the core component for improving the conversion efficiency of a 20W flyback power supply. Its core logic is to precisely control the turn-on and turn-off timing of the synchronous rectifier diode Q2 through the synchronous rectifier chip RM91816, replacing the traditional rectifier diode to reduce rectification losses. The specific working mechanism is as follows: (1) On-time control When the synchronous rectifier MOSFET Q2 starts its turn-on phase, current begins to flow through its body diode, generating a negative Vds voltage across it. However, the voltage drop across the body diode is typically much higher than the voltage drop caused by the on-resistance of the synchronous rectifier MOSFET, thus triggering the turn-on threshold VTH2. To prevent false turn-on due to ringing, the rate of Vds decline of the synchronous rectifier is usually used as another turn-on condition. For the synchronous rectifier chip RM91816, this turn-on condition is: the time for Vds to drop from 2V to VTH2 must be less than approximately 20ns. At this moment, the IC will initiate the gate drive of the synchronous rectifier, causing the turn-on voltage Vds of the switching transistor to gradually decrease. This decrease is usually accompanied by a certain amount of ringing, which may trigger the internal comparator. Therefore, a minimum on-time (MOT) is needed for blanking. This blanking phase keeps the power MOSFET on for a minimum amount of time, avoiding false turn-off after turn-on caused by ringing.
[0031] (2) Shutdown timing control The synchronous rectifier MOSFET Q2 remains on, and the rectified current gradually decreases, causing the drain-source voltage Vds to cross the turn-off threshold VTH1.
[0032] ① In discontinuous current mode (DCM), the current crosses the threshold at a relatively low dI / dt. After crossing the threshold, the current will start flowing through the body diode again, causing the drain-source voltage Vds to jump to negative. Depending on the magnitude of the remaining current, the drain-source voltage Vds may trigger the turn-on threshold again. Therefore, after the turn-off threshold VTH1 is triggered, the turn-on threshold VTH2 will be blanked for a period of time (TBLANK). The blanking time is internally set. Once the drain-source voltage Vds crosses the positive threshold VTH3, the blanking time also ends, and the IC (synchronous rectifier chip RM91816) prepares for the next turn-on cycle. In DCM mode, this Vds adjustment design allows Vds to cross 0V exponentially, combined with a 10ns turn-off propagation delay, making the turn-off timing more accurate, regardless of the accuracy of the turn-off threshold.
[0033] ② In continuous current mode (CCM), the turn-off transition is steep, meaning the rate of change of current, dI / dt, is much higher. During the MOSFET's turn-on phase, the current decays linearly, and the drain-source voltage Vds on the synchronous rectifier MOSFET Q2 also decays linearly. Once the primary switch Q1 begins to turn on again, the current in the synchronous rectifier MOSFET Q2 decreases rapidly, crossing the turn-off threshold VTH1 and turning off the gate. The turn-off speed is crucial for avoiding cross-conduction on the primary side and reducing switching losses. Blanking is applied in this case as well, but given the very fast transition, it is reset once the drain-source voltage Vds crosses the positive threshold VTH3, preparing for the next turn-on cycle.
[0034] (3) Slow discharge assisted control To further optimize the stability of the turn-off timing, the RM91816 synchronous rectifier chip incorporates a slow discharge mechanism. The RM91816 monitors the drain-source voltage Vds of the synchronous rectifier diode Q2, using -40mV as a threshold, to determine whether the gate voltage VG needs to initiate the slow discharge process. Once slow discharge is initiated, the chip stabilizes Vds of the synchronous rectifier diode Q2 to approximately -40mV, maintaining this state until the current flowing through Q2 drops to zero. Particularly in CCM mode, VG is pre-set to be lower than VCC, which accelerates the turn-off speed of VG and further ensures the accuracy of the turn-off timing.
[0035] (4) Avoid premature shutdown of synchronous rectifier drive After the primary switch Q1 is turned off, the energy stored in the leakage inductance resonates with the Coss of the primary and secondary sides and the absorption circuit, manifesting as a rapidly oscillating current signal on both sides. This oscillating current generates an oscillating voltage signal on the synchronous rectifier MOSFET, and simultaneously generates a voltage on the inductor of the power circuit corresponding to the synchronous rectification detection pin (between VD and VSS). The superposition of these two voltages causes the SR to detect the VDS turn-off threshold, thus causing the synchronous rectification drive to turn off prematurely.
[0036] To achieve precise control over the timing and dead time of synchronous rectification, this invention employs the following measures: ① Using a sandwich winding method to control the transformer leakage inductance, fundamentally reducing leakage inductance oscillation energy; ② Adjusting and optimizing absorption parameters to reduce the amplitude and frequency of current oscillations; ③ Optimizing layout design to reduce parasitic parameters. By combining these three measures, this invention achieves precise control over the timing and dead time of synchronous rectification, ensuring the effectiveness and high efficiency of synchronous rectification.
[0037] (5) Optimize the voltage feedback circuit. To ensure sampling accuracy and applicability, this invention adopts optocoupler isolation and type II feedback circuit. The optocoupler selected is the domestic optocoupler HT8331, which has the characteristics of wide transmission ratio and small size. The size of this model is about 1 / 2 smaller than that of general optocouplers.
[0038] (6) Optimize the main control chip and peripheral circuits. The control chip selected is the domestic 5022 series control chip, which integrates short circuit protection, soft start and ramp compensation functions; the input and output filter circuits both use single capacitor filter design, which effectively simplifies the chip's peripheral circuits.
[0039] (7) Optimize product structure design. In terms of structure design, double-sided PCB layout and side three-dimensional mounting process are adopted. By rationally distributing power heat-generating devices, the internal heat dissipation channel of the power supply is optimized to improve the heat dissipation effect.
[0040] In summary, this invention enables a 20W flyback power supply to be reduced in size by more than 1 / 3 compared to similar products: the size is reduced from 27mm*27mm*10.8mm to 25mm*13mm*10.8mm; the efficiency is increased by 3% to 5% compared to similar products (80%); and all internal components of the power supply are domestically produced.
[0041] In response to the current demand for miniaturized power supplies in the DC / DC converter industry, this invention optimizes the topology of a 20W flyback power supply used in traditional engineering practices. At the same time, in light of the increasingly tense international situation, all internal components of the power supply have been selected for complete domestic production.
[0042] Compared with existing engineering experience and related technologies, the innovation of this invention is as follows: (1) Optimized design of the main transformer. In a 20W flyback power supply, transformer losses account for about 1 / 2 of the total losses, so transformer design is particularly important. In this invention, the magnetic material of transformer T1 is selected as the domestic DMR96A type magnetic core, and the core size is selected as ER11 / 5 / 6. Combined with PCB board printing and sandwich winding scheme, the transformer's size, impedance, leakage inductance and other parameters can be reduced to the greatest extent. Through the above scheme, actual measurement shows that the size of the ER11 / 5 / 6 type transformer is reduced by about 1 / 4 compared with the traditional P11 type magnetic core, the transformer impedance parameter is 100mΩ, the leakage inductance parameter is 0.1uH, and the transformer loss is reduced to 0.5W compared with the traditional P11 magnetic core.
[0043] (2) Optimized design of the secondary output rectifier circuit. Compared with the traditional 20W flyback power supply secondary Schottky rectifier or auxiliary winding driven synchronous rectifier circuit, this invention adopts a self-detection and self-driving synchronous rectifier scheme based on the domestic synchronous rectifier chip (RMJ91816). This scheme has the advantages of stable drive signal and simple circuit topology. The circuit detects the drain-source voltage of the switching transistor in the secondary power circuit by its own pins, thereby determining the switching cycle and conduction time of the synchronous rectifier chip (RMJ91816); the switching delay time of the synchronous rectifier chip (RMJ91816) is set by adjusting the external RC parameters of the synchronous rectifier chip (RMJ91816); and the pre-turn-off time is increased to avoid cross-conduction between the synchronous rectifier drive signal and the switching transistor signal.
[0044] The above-described embodiments are merely preferred embodiments of the present invention and are not intended to limit the scope of the present invention. Various modifications and improvements made by those skilled in the art to the technical solutions of the present invention without departing from the spirit of the present invention should fall within the protection scope defined by the claims of the present invention.
Claims
1. A high-efficiency flyback power supply topology circuit structure, characterized in that, The circuit structure includes: a control chip and its peripheral circuits, a primary power circuit, a secondary power circuit, and a secondary output synchronous rectification circuit; The control chip and its peripheral circuits are used to provide drive signals to the primary power circuit of the flyback power supply. The primary power circuit stores the energy of the input voltage in the primary winding of transformer T1 and controls the storage and release of energy by controlling the current of the primary winding of the transformer. The secondary power circuit induces voltage in the secondary winding of transformer T1, transfers energy to the load, and performs synchronous rectification and output voltage regulation to achieve constant voltage output. The secondary output synchronous rectification circuit drives the secondary output power MOSFET of the flyback power supply to detect the on / off state and on-time of the MOSFET in the secondary power circuit and generate corresponding synchronous rectification drive signals.
2. The high-efficiency flyback power supply topology circuit structure according to claim 1, characterized in that, The circuit structure also includes an input filter circuit for smoothing the input voltage; and an output filter circuit for smoothing the output voltage. The input filtering circuit includes a primary filtering capacitor C1; the first end of the primary filtering capacitor C1 is connected to the same-named end of the primary winding of the transformer T1, and the second end of the primary filtering capacitor C1 is connected to the input ground.
3. The high-efficiency flyback power supply topology circuit structure according to claim 1, characterized in that, The circuit structure also includes an output filter circuit, which is used to smooth the output voltage; The output filter circuit includes a secondary filter capacitor C2; the first terminal of the secondary filter capacitor C2 is connected to the opposite terminal of the secondary winding of the transformer T1, and the second terminal of the secondary filter capacitor C2 is connected to the output ground.
4. The high-efficiency flyback power supply topology circuit structure according to claim 1, characterized in that, The primary power circuit includes a primary switching transistor Q1, a primary absorption resistor R1, and a primary absorption capacitor C3. The source of the primary switching transistor Q1 is connected to the first terminal of the primary absorption capacitor C3, the second terminal of the primary absorption capacitor C3 is connected to the first terminal of the primary absorption resistor R1, and the second terminal of the primary absorption resistor R1 is connected to the drain of the primary switching transistor Q1. The gate of the primary switching transistor Q1 is connected to the output terminal of the control chip and its peripheral circuit. The node after the drain of the primary switching transistor Q1 is connected to the second terminal of the primary absorption resistor R1 is connected to the opposite terminal of the primary winding of the transformer T1. The node after the first terminal of the primary absorption capacitor C3 is connected to the source of the primary switching transistor Q1 is grounded through the sampling resistor R3.
5. The high-efficiency flyback power supply topology circuit structure according to claim 4, characterized in that, The secondary power circuit includes a secondary switch Q2, a secondary absorption resistor R2, and a secondary absorption capacitor C4; The drain of the secondary switch Q2 is connected to the same-name terminal of the secondary winding of the transformer T1, and the source of the secondary switch Q2 is connected to the first terminal of the secondary absorption capacitor C4. The source of the secondary switch Q2 is also grounded. The second terminal of the secondary absorption capacitor C4 is connected to the first terminal of the secondary absorption resistor R2, and the second terminal of the secondary absorption resistor R2 is connected to the voltage signal detection input terminal of the secondary output synchronous rectifier circuit. The gate of the secondary switch Q2 is connected to the drive signal output terminal of the secondary output synchronous rectifier circuit.
6. The high-efficiency flyback power supply topology circuit structure according to claim 5, characterized in that, Both the primary switch Q1 and the secondary switch Q2 are N-type power MOSFETs.
7. The high-efficiency flyback power supply topology circuit structure according to claim 5, characterized in that, The secondary output synchronous rectification circuit includes a self-driven synchronous rectification chip and peripheral circuitry; the self-driven synchronous rectification chip is a 91816 type self-driven synchronous rectification chip. The secondary output voltage of transformer T1 is used to power the synchronous rectifier chip. The switching cycle and conduction time of the synchronous rectifier chip are determined by detecting the drain-source voltage of the switching transistor in the secondary power circuit. The switching delay time of the synchronous rectifier chip is 10ns.
8. The high-efficiency flyback power supply topology circuit structure according to claim 1, characterized in that, The circuit structure further includes: a current sampling and feedback circuit and a voltage sampling and feedback circuit; the current sampling and feedback circuit is used to sample the current signal of the primary power circuit and feed the sampled current signal back to the control chip and its peripheral circuits; the voltage sampling and feedback circuit is used to sample the voltage signal of the secondary power circuit and feed the sampled voltage signal back to the control chip and its peripheral circuits after optical isolation.
9. The high-efficiency flyback power supply topology circuit structure according to claim 5, characterized in that, The control chip and its peripheral circuits use the 5022 series chip as the main control chip, and the operating frequency of the main control chip is 300kHz.
10. The high-efficiency flyback power supply topology circuit structure according to claim 5, characterized in that, The transformer T1 uses a DMR96A type magnetic core; the winding of the transformer T1 uses a sandwich winding method.