MEMS microphone and preparation method thereof

Abstract

According to the MEMS microphone and the preparation method thereof, in the preparation process, a heat conduction layer is arranged between a barrier layer and a vibrating diaphragm layer, radiant heat in the rapid annealing process can be rapidly and transversely conducted, local hot spots on the vibrating diaphragm layer are eliminated, it is ensured that the whole vibrating diaphragm layer is evenly heated, and therefore highly-uniform tensile stress is obtained. Besides, one side, far away from the heat conduction layer, of the vibrating diaphragm layer is also provided with a heat insulation layer, and the heat insulation layer can reduce heat loss of the vibrating diaphragm layer to the environment in a high-temperature maintaining stage, so that the vibrating diaphragm layer can be stably maintained at a target annealing temperature, and the stress release and conversion effects are ensured. The high temperature in the rapid annealing process is effectively limited in the area of the vibrating diaphragm layer due to the dual effects of the heat conduction layer and the heat insulation layer, so that rapid annealing treatment is allowed to be performed after a CMOS circuit is integrated, the limitation of a traditional process sequence is broken through, and finally the vibrating diaphragm with controllable stress, uniformity and flatness is obtained.

Description

Technical Field

[0001] This application relates to the field of sensor technology, and in particular to a MEMS microphone and its fabrication method. Background Technology

[0002] MEMS microphones, as core acoustic devices in consumer electronics, automotive electronics and other fields, support the voice interaction functions of smartphones, smart wearables and other devices with their advantages of miniaturization and low power consumption, and are an indispensable part of modern electronic systems.

[0003] As the core component of MEMS microphones for achieving acoustic-to-electric conversion, the stress state of the diaphragm directly determines the microphone's acoustic performance, structural stability, and service life. If the diaphragm has excessive compressive stress, it is prone to warping, wrinkling, or even structural collapse, leading to abnormal vibration amplitude and increased nonlinear distortion. If the tensile stress is insufficient, the diaphragm rigidity is too weak, resulting in frequency response curve fluctuations due to vibration response lag under high-frequency signals, or generating additional vibration noise under minor external interference, severely reducing the microphone's accuracy in capturing sound signals.

[0004] Annealing is one of the main factors affecting diaphragm stress. Existing annealing processes mainly include furnace tube annealing and rapid thermal annealing (RTA). Among them, furnace tube annealing has a slow heating and cooling rate, high thermal budget, uneven process, and cannot accurately control the stress type (such as difficulty in converting it into tensile stress). Although RTA is highly efficient, it faces the risk of thermal damage, such as high temperature (>900℃) damage to CMOS circuits, rediffusion of doped regions, and failure of metal interconnects. It also faces the problem of uneven thermal distribution. Summary of the Invention

[0005] To address the aforementioned technical problems, this application provides a MEMS microphone and its fabrication method.

[0006] To achieve the above objectives, this application provides a method for fabricating a MEMS microphone, comprising the following steps: S1. A silicon dioxide barrier layer is deposited on a silicon substrate using chemical vapor deposition. S2. A thermally conductive layer is deposited on the barrier layer using a magnetron sputtering method, wherein the thermal conductivity of the thermally conductive layer is ≥20W / (m·K); S3. An amorphous silicon diaphragm layer is formed on the thermally conductive layer by chemical vapor deposition. S4. An insulation layer is deposited on the diaphragm layer using a chemical vapor deposition method, wherein the thermal conductivity of the insulation layer is ≤1W / (m·K); S5. A backsheet layer is formed by depositing amorphous silicon on the insulation layer using chemical vapor deposition. S6. The entire film structure after step S5 is annealed using a rapid annealing process: the entire film structure is placed in a rapid annealing furnace and heated to 900-1150°C at a rate of 100-250°C / s under an inert atmosphere, held for 10-60s, and then cooled at a rate of 50-150°C / s. S7. Etch on the backplate layer until the upper surface of the insulation layer to form several acoustic holes with the same radius; S8. Using the acoustic hole in step S7, the central insulation layer is etched away by a wet etching process to form an acoustic cavity. S9. Etch the back of the silicon substrate down to the lower surface of the diaphragm layer to form a back cavity, which serves as a channel for sound to enter the microphone, thus forming a MEMS microphone.

[0007] As a further improvement of this application, the material of the thermally conductive layer is selected from any one of titanium nitride, aluminum nitride, metal, and metal oxide.

[0008] As a further improvement to this application, the material of the insulation layer is selected from either silicon dioxide or porous silicon.

[0009] As a further improvement of this application, the thickness of the barrier layer is 400nm to 600nm.

[0010] As a further improvement of this application, the thickness of the thermally conductive layer is 80nm to 120nm.

[0011] As a further improvement of this application, the thickness of the diaphragm layer is 400nm to 500nm.

[0012] As a further improvement to this application, the thickness of the insulation layer is 150nm to 250nm.

[0013] As a further improvement of this application, the thickness of the backsheet layer is 1μm to 2μm.

[0014] As a further improvement of this application, the radius of the acoustic aperture is r, the value of r ranges from 5μm to 15μm, and the spacing between the acoustic apertures is from 2μm to 4μm.

[0015] To achieve the above objectives, this application also provides a MEMS microphone, which is obtained by the above-described MEMS microphone fabrication method.

[0016] The beneficial effects of this application are as follows: It provides a MEMS microphone and its fabrication method. During the fabrication process, a thermally conductive layer is placed between the barrier layer and the diaphragm layer. This layer can rapidly conduct radiative heat during the rapid annealing process laterally, eliminating local hot spots on the diaphragm layer and ensuring uniform heating of the entire diaphragm layer, thereby obtaining highly uniform tensile stress. Simultaneously, while uniformly dissipating heat, the thermally conductive layer also isolates the direct heat conduction of high temperature to the CMOS circuit below the substrate in the vertical direction, acting as a "thermal barrier." Furthermore, a thermal insulation layer is placed on the side of the diaphragm layer away from the thermally conductive layer. This thermal insulation layer reduces heat loss from the diaphragm layer to the environment during the high-temperature holding stage, allowing the diaphragm layer to be stably maintained at the target annealing temperature, ensuring effective stress release and transformation.

[0017] With the combined effect of the thermal conductive layer and the thermal insulation layer, the high temperature during the rapid annealing process is effectively "limited" to the diaphragm layer area, thus allowing rapid annealing after the integration of CMOS circuits. This breaks the limitations of the traditional process sequence and ultimately yields a stress-controlled, uniform, and flat diaphragm, significantly improving the microphone's sensitivity, consistency, and production yield. Detailed Implementation

[0018] In existing MEMS microphone manufacturing, when using Rapid Thermal Annealing (RTA) to control diaphragm stress, there are technical issues such as reliance on infrared radiation heating and the lack of thermally conductive and insulating layers in conventional chip structures. Specifically: First, after the diaphragm absorbs infrared radiation, the heat can only be slowly conducted laterally through its own material. Different regions of the diaphragm (e.g., the center and edges, and the diaphragm near the center and edges of the silicon wafer) have different absorption efficiencies and heat conduction path lengths, leading to localized heat accumulation and hotspot formation within the chip. The temperature rise rate difference within the same diaphragm layer can reach 50–100°C. Second, these localized hotspots prevent the thermal expansion coefficients of different regions of the diaphragm from functioning synchronously. During annealing, the degree of stress release (e.g., the proportion of compressive stress relief) and the direction of stress transformation (e.g., the efficiency of transformation to tensile stress) show significant differences, resulting in residual compressive stress in some areas. The stress induces micro-wrinkles, and excessive tensile stress in some areas leads to abnormal rigidity, forming a stress gradient across the diaphragm layer. This ultimately causes diaphragm warping, with warping reaching 1–3 μm, directly disrupting the smoothness of diaphragm vibration. Subsequently, without an effective thermal isolation structure, the high temperature of the diaphragm layer is conducted vertically downwards through the silicon substrate. The heat directly acts on the integrated CMOS circuit below through the barrier layer. When the temperature exceeds 900°C, impurity atoms in the doped regions of the circuit will undergo re-diffusion, resulting in blurred PN junction boundaries and threshold voltage drift. At the same time, the metal interconnect layer (such as aluminum or copper layers) will react with the surrounding dielectric layer at high temperatures, producing metal compounds, leading to increased interconnect resistance or even open circuits. Ultimately, the rapid thermal annealing process cannot achieve uniform stress control of the diaphragm layer, and the high temperature damages the CMOS circuit, making it impossible to balance stress control effectiveness and circuit reliability.

[0019] To address the aforementioned technical problems, this application provides a method for fabricating a MEMS microphone, comprising the following steps: S1. A silicon dioxide barrier layer is deposited on a silicon substrate using chemical vapor deposition. S2. A thermally conductive layer is deposited on the barrier layer using a magnetron sputtering method, wherein the thermal conductivity of the thermally conductive layer is ≥20W / (m·K); S3. An amorphous silicon diaphragm layer is formed on the thermally conductive layer by chemical vapor deposition. S4. An insulation layer is deposited on the diaphragm layer using a chemical vapor deposition method, wherein the thermal conductivity of the insulation layer is ≤1W / (m·K); S5. A backsheet layer is formed by depositing amorphous silicon on the insulation layer using chemical vapor deposition. S6. The entire film structure after step S5 is annealed using a rapid annealing process: the entire film structure is placed in a rapid annealing furnace and heated to 900-1150°C at a rate of 100-250°C / s under an inert atmosphere, held for 10-60s, and then cooled at a rate of 50-150°C / s. S7. Etch on the backplate layer until the upper surface of the insulation layer to form several acoustic holes with the same radius; S8. Using the acoustic hole in step S7, the central insulation layer is etched away by a wet etching process to form an acoustic cavity. S9. Etch the back of the silicon substrate down to the lower surface of the diaphragm layer to form a back cavity, which serves as a channel for sound to enter the microphone, thus forming a MEMS microphone.

[0020] Based on the above technical solution, this application incorporates a thermally conductive layer between the blocking layer and the diaphragm layer during the fabrication of a MEMS microphone. This thermally conductive layer is made of a high thermal conductivity material with a thermal conductivity ≥20 W / (m·K). On one hand, the thermally conductive layer acts as a "heat diffusion plate," rapidly conducting the radiant heat absorbed by the diaphragm layer laterally. This allows heat from hot spots to quickly diffuse to low-temperature regions, eliminating temperature differences within the chip and on the wafer, ensuring a balanced heating rate across the diaphragm layer, and thus allowing for uniform stress release and transformation, resulting in consistent tensile stress. On the other hand, the thermally conductive layer acts as a "thermal barrier," with its low thermal conductivity direction (perpendicular to the stacking direction) blocking the conduction of high temperatures to the CMOS circuit below the substrate, maintaining the circuit area temperature below 900°C and preventing re-diffusion of doped regions and metal interconnect failure. In optional embodiments, the material of the thermally conductive layer is selected from any one of titanium nitride, aluminum nitride, metal, and metal oxide. Preferably, the metal is selected from any one of silver, copper, aluminum, etc., and the metal oxide is selected from any one of aluminum oxide, etc.

[0021] In addition, this application also provides an insulation layer on the side of the diaphragm layer away from the heat-conducting layer. The insulation layer is made of a material with a thermal conductivity of ≤1W / (m·K). The insulation layer formed by the low thermal conductivity material can act as a "heat insulation cover" to reduce the heat loss of the diaphragm layer to the environment during the high-temperature maintenance stage, so as to control the temperature fluctuation of the diaphragm layer within the preset range and ensure that stress release and transformation achieve the target effect.

[0022] Through the synergistic effect of the thermally conductive layer and the thermally insulating layer, high temperature is effectively confined to the diaphragm layer region. This not only achieves a breakthrough in the rapid annealing process after integrating CMOS circuits, breaking the traditional process sequence limitation of annealing before integrated circuits, but also yields a stress-controlled, uniform, and flat diaphragm, thereby improving the sensitivity and process stability of the MEMS microphone, thus ensuring production yield and acoustic performance. In an optional embodiment, the thermally insulating layer is made of either silicon dioxide or porous silicon.

[0023] In an optional embodiment, the thickness of the barrier layer is 400 nm to 600 nm.

[0024] In an optional embodiment, the thickness of the thermally conductive layer is 80 nm to 120 nm.

[0025] In an optional implementation, the thickness of the diaphragm layer is 400 nm to 500 nm.

[0026] In an optional embodiment, the thickness of the insulation layer is 150 nm to 250 nm.

[0027] In an optional implementation, the thickness of the backsheet layer is 1 μm to 2 μm.

[0028] In an optional implementation, the radius of the acoustic aperture is r, the value of r ranges from 5μm to 15μm, and the spacing between the acoustic apertures is from 2μm to 4μm.

[0029] To make the objectives, technical solutions, and advantages of this invention clearer, the specific embodiments of this invention are described clearly and completely below. Obviously, the described embodiments are only a part of the embodiments of this invention, not all of them. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this invention.

[0030] Example 1 This embodiment provides a method for fabricating a MEMS microphone, including the following steps: 1) A silicon dioxide barrier layer with a thickness of 400 nm was deposited on a silicon substrate using chemical vapor deposition. 2) A titanium nitride thermal conductive layer is deposited on the barrier layer using magnetron sputtering, and the thickness of the thermal conductive layer is 120 nm. 3) An amorphous silicon diaphragm layer is deposited on the thermally conductive layer using chemical vapor deposition to form a diaphragm layer with a thickness of 400 nm; 4) A silicon dioxide insulation layer is deposited on the diaphragm layer using chemical vapor deposition, and the thickness of the insulation layer is 150 nm. 5) An amorphous silicon backsheet layer is deposited on the insulation layer using chemical vapor deposition to form a backsheet layer with a thickness of 1 μm; 6) The entire membrane structure after step S5 is annealed using a rapid annealing process: the entire membrane structure is placed in a rapid annealing furnace and heated to 900°C at a rate of 100°C / s under an inert atmosphere, held for 60s, and then cooled at a rate of 50°C / s. 7) Etch on the backplate layer up to the upper surface of the insulation layer to form several acoustic holes with the same radius. The radius r of the acoustic holes is 5μm and the spacing between the acoustic holes is 2μm. 8) Using the acoustic hole in step S7, the central insulation layer is etched away using a wet etching process to form an acoustic cavity; 9) Etch the back of the silicon substrate down to the lower surface of the diaphragm layer to form a back cavity, which serves as a channel for sound to enter the microphone, thus forming a MEMS microphone.

[0031] Example 2 This embodiment provides a method for fabricating a MEMS microphone, including the following steps: 1) A silicon dioxide barrier layer with a thickness of 600 nm was deposited on a silicon substrate using chemical vapor deposition. 2) An aluminum nitride thermal conductive layer is deposited on the barrier layer using magnetron sputtering, and the thickness of the thermal conductive layer is 120 nm. 3) An amorphous silicon diaphragm layer is deposited on the thermally conductive layer using chemical vapor deposition to form a diaphragm layer with a thickness of 500 nm; 4) A porous silicon insulation layer is deposited on the diaphragm layer using chemical vapor deposition, and the thickness of the insulation layer is 250 nm. 5) An amorphous silicon backsheet layer is deposited on the insulation layer using chemical vapor deposition to form a backsheet layer with a thickness of 2 μm; 6) The entire film structure after step S5 is annealed using a rapid annealing process: the entire film structure is placed in a rapid annealing furnace and heated to 1150℃ at a rate of 250℃ / s under an inert atmosphere, held for 10s, and then cooled at a rate of 150℃ / s. 7) Etch on the backplate layer up to the upper surface of the insulation layer to form several acoustic holes with the same radius. The radius r of the acoustic holes is 15μm and the spacing between the acoustic holes is 4μm. 8) Using the acoustic hole in step S7, the central insulation layer is etched away using a wet etching process to form an acoustic cavity; 9) Etch the back of the silicon substrate down to the lower surface of the diaphragm layer to form a back cavity, which serves as a channel for sound to enter the microphone, thus forming a MEMS microphone.

[0032] Example 3 This embodiment provides a method for fabricating a MEMS microphone, including the following steps: 1) A silicon dioxide barrier layer with a thickness of 500 nm was deposited on a silicon substrate using chemical vapor deposition. 2) An alumina thermal conductive layer is deposited on the barrier layer using magnetron sputtering, and the thickness of the thermal conductive layer is 100 nm. 3) An amorphous silicon diaphragm layer is deposited on the thermally conductive layer using chemical vapor deposition to form a diaphragm layer with a thickness of 450 nm; 4) A silicon dioxide insulation layer is deposited on the diaphragm layer using chemical vapor deposition, and the thickness of the insulation layer is 200 nm. 5) An amorphous silicon backsheet layer is deposited on the insulation layer using chemical vapor deposition to form a backsheet layer with a thickness of 1.5 μm; 6) The entire membrane structure after step S5 is annealed using a rapid annealing process: the entire membrane structure is placed in a rapid annealing furnace and heated to 1000℃ at a rate of 180℃ / s under an inert atmosphere, held for 30s, and then cooled at a rate of 100℃ / s. 7) Etch on the backplate layer up to the upper surface of the insulation layer to form several acoustic holes with the same radius. The radius r of the acoustic hole is 10μm and the spacing between the acoustic holes is 3μm. 8) Using the acoustic hole in step S7, the central insulation layer is etched away using a wet etching process to form an acoustic cavity; 9) Etch the back of the silicon substrate down to the lower surface of the diaphragm layer to form a back cavity, which serves as a channel for sound to enter the microphone, thus forming a MEMS microphone.

[0033] Example 4 The difference between this embodiment and embodiment 3 is that in step 2), a silver thermal conductive layer is deposited on the barrier layer using a magnetron sputtering method, and the thickness of the thermal conductive layer is 80 nm.

[0034] Example 5 The difference between this embodiment and embodiment 3 is that in step 2), a copper thermal conductive layer is deposited on the barrier layer using a magnetron sputtering method, and the thickness of the thermal conductive layer is 80 nm.

[0035] Example 6 The difference between this embodiment and embodiment 3 is that in step 2), a copper thermal conductive layer is deposited on the barrier layer using a magnetron sputtering method, and the thickness of the thermal conductive layer is 80 nm.

[0036] Comparative Example 1 The difference between this comparative example and Example 3 is that step 2 is removed, while the rest of the steps are the same as in Example 3.

[0037] Comparative Example 2 The difference between this comparative example and Example 3 is that in step 4), a silicon nitride insulating layer is deposited, while the rest of the steps are the same as in Example 3.

[0038] Comparative Example 3 The difference between this comparative example and Example 3 is that the silicon nitride insulation layer deposited in steps 2) and 4) is removed; the rest of the steps are the same as in Example 3.

[0039] The performance of the diaphragms after rapid annealing in Examples 1-6 and Comparative Examples 1-3 was tested, and the performance results are shown in Table 1.

[0040] 1. Mean tensile stress Test method: Wafer curvature method, using a KLA Tencor P-17 stress meter. Test steps: Reference measurement: After the entire film structure is deposited, that is, after step S5 and before annealing in step S6, the laser beam of the machine is used to scan the multi-film structure deposited on the silicon substrate. Several positions are pre-selected and their initial radius of curvature Rpre is measured. There can be 3 to 5 positions, such as 1 at the center of the wafer and 3 to 4 evenly distributed at the edge, or points are taken at equal intervals along the diameter direction.

[0041] Post-processing measurement: After completing the rapid annealing process and step S6, scan again at the pre-selected locations to measure the radius of curvature Rpost after annealing.

[0042] Stress calculation: The curvature change at the same location is automatically calculated based on the Stoney formula, and the overall average stress is obtained by combining data from multiple points.

[0043] 2. Diaphragm flatness and height difference between the diaphragm center and edge Test method: White light interferometry, measured using an optical profilometer. Test steps: Sample preparation: After the back cavity etching is completed, that is, after step S9, the diaphragm becomes a suspended structure. Place the sample under the objective lens.

[0044] 3D scanning: Using a white light source, the entire diaphragm area of ​​a single MEMS microphone is rapidly scanned in three dimensions through the principle of interference.

[0045] Data Analysis: Flatness: The software can automatically calculate the root mean square roughness (Sq) or flatness parameter of the entire diaphragm area. The smaller the value, the "superior" the flatness.

[0046] Center-edge height difference: On the 3D topography map, the software can easily draw a line from the center of the diaphragm to the edge and generate a contour curve, directly reading the maximum height difference. This data intuitively reflects the degree of warping caused by uneven stress; the larger the value, the more severe the warping.

[0047] 3. Testing of metal interconnect performance and MOSFET electrical performance Test method: Semiconductor parameter testing, measured using Keysight B1500A. Test steps: Designing a Test Key: In the scribe line or dedicated test area of ​​the MEMS microphone, a test structure identical to that of the main circuit needs to be fabricated simultaneously. Metal interconnect performance: Fabrication of "snake-shaped" resistive structures (for measuring interconnect resistance) and "comb-shaped" capacitive structures (for detecting interconnect short circuits / leakage).

[0048] MOS transistor electrical performance: Fabrication of independent MOS transistors.

[0049] Electrical testing: Metal interconnect performance: A constant current is applied to the "serpentine" structure, the voltage drop is measured, and the resistance is calculated. Compared with a reference sample that has not undergone high-temperature annealing, the resistance change rate (e.g., <5%) can be judged as "normal," while a significant increase (e.g., >50%) or even an open circuit indicates "failure."

[0050] Apply voltage to the "comb" structure and measure the inter-electrode leakage current. A very small leakage current (e.g., <1nA) is considered "normal," while a significant leakage current (e.g., >1μA) indicates "failure / criticality."

[0051] MOSFET electrical performance: Measure the transfer characteristic curve (Id-Vg) and output characteristic curve (Id-Vd) of the MOSFET. Key parameters: threshold voltage (Vth), saturation current (Idsat), and subthreshold swing (SS). Compare these parameters with a reference sample; drift within specifications (e.g., Vth drift <30mV) is considered "normal," while severe drift (e.g., Vth drift >100mV) is considered "failure."

[0052] Table 1

[0053] As shown in Table 1, in Examples 1-6, due to the addition of a thermally conductive layer (thermal conductivity ≥ 20 W / (m·K)) and an insulating layer (thermal conductivity ≤ 1 W / (m·K)), the average tensile stress of the diaphragm is stable at 95-110 MPa, with excellent flatness and a height difference of only 20-35 nm between the center and the edge. The metal interconnects and the electrical performance of the MOS transistor are normal, which confirms the synergistic effect of the thermally conductive layer's lateral heat uniformity, vertical heat insulation, and the insulating layer's heat preservation. This effectively limits the high temperature in the diaphragm area, avoids damage to the CMOS circuit, and obtains a diaphragm with uniform stress.

[0054] Comparative Example 1 (no thermal conductive layer) exhibited 40MPa compressive stress, obvious wrinkles, and circuit failure, highlighting the crucial role of the thermal conductive layer in eliminating hot spots and protecting the circuit. Comparative Example 2 (SiN insulation layer, thermal conductivity not up to standard) showed poor stress and flatness, indicating that the insulation layer material needs to meet the low thermal conductivity requirement. Comparative Example 3 (no thermal conductive layer + SiN insulation layer) exhibited high pressure stress, severe warping, and circuit failure, further proving that the dual setting of a thermal conductive layer and a qualified insulation layer is the core to achieving controllable stress and ensuring product performance.

[0055] The embodiments of the present invention have been described in detail above, but the present invention is not limited to the described embodiments. For those skilled in the art, various changes, modifications, substitutions, and variations can be made to these embodiments without departing from the principles and spirit of the present invention, and these variations still fall within the protection scope of the present invention.

Claims

1. A method of manufacturing a MEMS microphone, characterized by, The method comprises the following steps: S1, depositing a silicon dioxide barrier layer on a silicon substrate by chemical vapor deposition; S2, depositing a heat-conducting layer on the barrier layer by magnetron sputtering, the heat-conducting layer having a thermal conductivity of ≥20 W / (m·K); S3, depositing amorphous silicon on the heat-conducting layer to form a diaphragm layer by chemical vapor deposition; S4, depositing an insulating layer on the diaphragm layer by chemical vapor deposition, the insulating layer having a thermal conductivity of ≤1 W / (m·K); S5, depositing amorphous silicon on the insulating layer to form a backplate layer by chemical vapor deposition; S6, annealing the entire film layer structure after step S5 by rapid annealing: placing the entire film layer structure in a rapid annealing furnace, and heating at a rate of 100-250 ℃ / s to 900-1150 ℃ in an inert atmosphere, and then cooling at a rate of 50-150 ℃ / s; S7, etching the backplate layer until the upper surface of the insulating layer is reached, forming a plurality of acoustic holes with consistent radii; S8, etching away the central insulating layer by wet etching using the acoustic holes in step S7 to form an acoustic cavity; S9, etching the back of the silicon substrate until the lower surface of the diaphragm layer is reached to form a back cavity as a channel for sound to enter the microphone, thereby forming a MEMS microphone.

2. The method of claim 1, wherein, The heat-conducting layer is made of any one of titanium nitride, aluminum nitride, metal, and metal oxide.

3. The method of claim 1, wherein the MEMS microphone is prepared by: The insulating layer is made of any one of silicon dioxide and porous silicon.

4. The method of claim 1, wherein the MEMS microphone is prepared by: The thickness of the barrier layer is 400-600 nm.

5. The method of claim 1, wherein the MEMS microphone is prepared by: The thickness of the heat-conducting layer is 80-120 nm.

6. The method of claim 1, wherein the MEMS microphone is prepared by: The thickness of the diaphragm layer is 400-500 nm.

7. The method of claim 1, wherein the MEMS microphone is prepared by a method comprising: The thickness of the insulating layer is 150-250 nm.

8. The method of claim 1, wherein the MEMS microphone is prepared by: The thickness of the backplate layer is 1-2 μm.

9. The method of claim 1, wherein, The radius of the acoustic hole is r, and r is 5-15 μm, and the spacing between the acoustic holes is 2-4 μm.

10. A MEMS microphone, characterized by The MEMS microphone is prepared by the method of any one of claims 1-9.

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