Simulation circuit breaker low-power-consumption control system and method with signal priority self-adaptive response function

Abstract

The invention relates to the technical field of automatic testing of a power distribution network, in particular to a low-power-consumption control system and method for an analog circuit breaker with signal priority self-adaptive response, and the method comprises the steps that a signal input detection circuit receives and conditions an external input signal, and a built-in signal priority discrimination module carries out the priority discrimination of the input signal; generating a first instruction with a high priority and a second instruction with a low priority; the signal input end of the control module is connected with the output end of the judgment module, and the control module is switched to a corresponding first working mode or a second working mode according to a received instruction; the first switch is connected in series with a power supply loop of the signal output drive circuit, the control end of the first switch is connected with the on-off control output end of the control module, the control module dynamically controls on-off of the switch according to the current working mode, on-demand power supply of the signal output drive circuit is achieved, rapid response of high-priority instructions is guaranteed, system power consumption is reduced to the maximum extent, and system reliability is improved. And dynamic balance between response performance and low power consumption is achieved.

Description

Technical Field

[0001] This invention relates to the field of power distribution network automation testing technology, and in particular to a low-power control system and method for an analog circuit breaker with adaptive signal priority response. Background Technology

[0002] In the testing of the automatic fault handling (FA) system for distribution networks, the simulated circuit breaker is the core device. Its core function is to replace the real circuit breaker, receive closing and opening commands from the master station or FTU / DTU, simulate the action of the real circuit breaker and output corresponding closing and opening signals, thereby verifying the accuracy of the FA logic without affecting the actual operation of the power grid.

[0003] Due to the portability requirements of field testing, existing analog circuit breakers are generally battery-powered. This necessitates extremely long standby times, making ultra-low power consumption a core technical requirement. However, current low-power design solutions in the industry have not yet fully met the performance and reliability requirements of practical applications, and several technical shortcomings remain to be addressed, as follows: Firstly, power consumption and response speed cannot be balanced: it cannot distinguish between emergency fault commands and regular operation commands, and cannot achieve adaptive power consumption and performance adjustment. Either power consumption is sacrificed to ensure response speed, or response timeliness is affected to reduce power consumption.

[0004] Secondly, the system wake-up reliability is insufficient: relying on a single wake-up path, once a pin failure, poor soldering, or electromagnetic interference occurs, the system is prone to freezing, failing to respond to external commands normally, and affecting the continuity of testing work.

[0005] Thirdly, the equipment has poor maintainability: it lacks a battery life assessment function, making it impossible for users to accurately grasp the remaining battery life and health status, making it difficult to plan battery replacement in advance, and easily causing test interruptions due to sudden battery failure, while also increasing the risk of equipment use.

[0006] Fourthly, power consumption optimization lacks a systematic approach: it only performs local power consumption control for individual modules, without coordinating power consumption management across the entire path of signal input, processing, and output from a system-level perspective. As a result, the overall power consumption control effect is poor and it is impossible to achieve ultimate energy efficiency. Summary of the Invention

[0007] Therefore, the technical problem to be solved by the present invention is that the existing low-power design of analog circuit breakers lacks adaptive adjustment of response and power consumption, relies on a single wake-up path leading to insufficient reliability, lacks accurate battery life assessment function affecting maintainability, and does not realize system-level full-path collaborative power consumption management. Thus, the present invention provides a low-power control system and method for analog circuit breakers with adaptive response of signal priority.

[0008] Specifically, the low-power control system for analog circuit breakers with adaptive signal priority response includes: a constant power supply unit, a constant power supply sleep-able unit, and a controllable power supply unit. The constant power supply unit includes: a signal input detection circuit for receiving external input signals. The signal input detection circuit includes a signal priority discrimination module, which performs preliminary classification of the priority of the external input signals and generates a first instruction or a second instruction, wherein the priority of the first instruction is greater than the priority of the second instruction. The constantly powered sleep-able unit includes a control module, the signal input terminal of which is connected to the instruction signal output terminal of the signal priority discrimination module, so as to select and switch to the corresponding first working mode or second working mode according to the received first instruction or second instruction. The controllable power supply unit includes: a signal output driving circuit and a first switch, wherein the first switch is connected in series in the power supply circuit of the signal output driving circuit, and the control terminal of the first switch is connected to the on / off control output terminal of the control module. The control module dynamically controls the on and off states of the first switch according to the current working mode, thereby coordinating the power-on operation and power-off sleep states of the signal output drive circuit.

[0009] In one embodiment of the present invention, the signal priority discrimination module includes a rising edge slope detection submodule, a characteristic frequency detection submodule, and a logic judgment submodule, wherein the input terminals of the rising edge slope detection submodule and the characteristic frequency detection submodule both receive the external input signal; The rising edge slope detection submodule identifies rising edge features in the external input signal to obtain a first discrimination signal. The feature frequency detection submodule identifies the feature frequency component of a specified intensity in the external input signal to obtain a second discrimination signal; The outputs of the rising edge slope detection submodule and the characteristic frequency detection submodule are both connected to the input of the logic judgment submodule, and are used to perform logical calculations on the first discrimination signal and the second discrimination signal to obtain a first instruction or a second instruction.

[0010] In one embodiment of the present invention, the rising edge slope detection submodule is composed of a differentiating circuit and a first voltage comparator, wherein the input terminal of the differentiating circuit receives the external input signal. Its output terminal is connected to the negative input terminal of the first voltage comparator, and the positive input terminal of the first voltage comparator is connected to the first reference voltage. ; The differentiating circuit is based on the formula For the external input signal Perform differential calculations and output a negative pulse voltage. After level conversion, a positive pulse signal is obtained; among which, The rate of change of voltage is used to characterize the rising edge characteristics of the external input signal. and The resistors and capacitors that constitute the differentiating circuit; The first voltage comparator compares the positive pulse signal with the first reference voltage. A comparison is made when the positive pulse signal is greater than the first reference voltage. When a rising edge feature is detected, the first discrimination signal output is the first instruction.

[0011] In one embodiment of the present invention, the characteristic frequency detection submodule is composed of a bandpass filter, an envelope detector, and a second voltage comparator cascaded in sequence, and the input terminal of the bandpass filter receives the external input signal. The characteristic frequency bandwidth is selected for the signal, allowing only signals within a specified frequency range to pass through and outputting a filtered AC signal; the input of the envelope detector is connected to the output of the bandpass filter, extracting the amplitude envelope of the AC signal and converting it into a DC voltage proportional to its amplitude; The positive input of the second voltage comparator is connected to the output of the envelope detector to obtain the DC voltage, and its negative input is connected to the second reference voltage. ; The DC voltage and the second reference voltage are compared using the second voltage comparator. A threshold comparison is performed, and the DC voltage is greater than the second reference voltage. When the specified intensity of the characteristic frequency component is identified, the corresponding output second discrimination signal is the first instruction.

[0012] In one embodiment of the present invention, the logic judgment submodule is an OR gate module.

[0013] In one embodiment of the present invention, the constantly powered sleep-able unit further includes an event triggering module. The event triggering module includes a main event triggering submodule and a first slave event triggering submodule arranged in parallel. The trigger signal output terminal of the signal input detection circuit is connected to the first interrupt triggering terminal and the second interrupt triggering terminal of the control module through the main event triggering submodule and the first slave event triggering submodule, respectively. After the signal priority discrimination module completes the priority classification of the input signals, the event triggering module performs a validity check on the first interrupt trigger terminal: If the first interrupt trigger terminal is in an active state, the main event trigger submodule sends an interrupt request signal to the first interrupt trigger terminal, causing the control module to switch to the corresponding priority working mode. If the first interrupt trigger terminal is in a failed state, the first slave event trigger submodule sends an interrupt request signal to the first interrupt trigger terminal, causing the control module to switch to the corresponding priority working mode.

[0014] In one embodiment of the present invention, the event triggering module further includes a second slave event triggering submodule. The second slave event triggering submodule is connected to the third interrupt triggering terminal of the control module. After the first interrupt triggering terminal or the second interrupt triggering terminal successfully receives an interrupt request signal, the control module resets the working state of the third interrupt triggering terminal and terminates the timing operation of the second slave event triggering submodule. Only when both the first interrupt trigger terminal and the second interrupt trigger terminal are in a failed state, the second event trigger submodule starts timing and generates timing data in real time, which is sent to the control module through the third interrupt trigger terminal. When the control module detects that the timing data exceeds a preset threshold, it triggers itself to switch to the corresponding priority working mode.

[0015] In one embodiment of the present invention, the constantly powered sleep-able unit further includes a prediction module. The input terminal of the prediction module is connected to an external battery module, and both the output terminal and the external battery module are connected to the data acquisition terminal of the control module. The external battery module is connected to the power input terminal of the control module.

[0016] In one embodiment of the present invention, the prediction module includes a data preprocessing submodule, a battery degradation calculation submodule, and a health status fusion assessment submodule; The data preprocessing submodule performs digital filtering on the voltage data, current data, and ambient temperature data of the external battery module to obtain preprocessed data. The battery degradation calculation submodule constructs a cycle life degradation model, a load intensity degradation model, and an environmental degradation model based on the preprocessed data and the operating status parameters of the external battery module. These three models are then used to calculate the cycle life degradation index value. Load intensity attenuation index value and environmental degradation index values ; The health status fusion assessment submodule evaluates the cycle life decay index value. The load intensity attenuation index value and the environmental degradation index value After normalization, a weighted calculation is performed to obtain the health status assessment value of the external battery module. .

[0017] In one embodiment of the present invention, the cycle life decay index value is calculated using the cycle life decay model. The method is as follows: The total number of cycles C in the working state parameters is obtained, which is one cycle in which the external battery module goes from wake-up to working state and then to sleep state; and the cumulative duration of the external battery module being in working state is obtained. ; Calculate the average working time for a single cycle. : According to the above and the set baseline cycle working time Calculate the time correction factor : ; Based on the time correction coefficient Calculate the equivalent number of iterations. : ; The unit cycle capacity decay rate was obtained through experimental fitting. Based on the unit cycle capacity decay rate and the equivalent number of loops Calculate the capacity decay ratio caused by cycling. : ; Based on the capacity attenuation ratio coefficient Calculate the cycle life decay index value : .

[0018] In one embodiment of the present invention, the load intensity attenuation index value is calculated using a load intensity attenuation model. The method is as follows: Obtain the operating duration of the control module in the first operating mode. That is, the duration of operation of the control module in the first working mode when the external battery module supplies power to the control module; and the cumulative duration of operation of the control module in all working modes. That is, the cumulative duration of the external battery module in all operating modes; according to the and stated Calculate the percentage of working time in the first mode. : ; Select an external battery module model that matches the control module, and under the same environmental conditions, set up multiple sets of cyclic aging test experiments with different percentages of first mode operating time. After each preset cycle test, measure the remaining capacity of the external battery module and use an exponential decay model. The fitting yields the first Group Corresponding capacity decay rate , For the initial capacity, This refers to the test duration; Based on the calibrated capacity decay rate Calculate the cumulative load degradation ratio of the external battery module. : ; Based on the cumulative load attenuation ratio The calculated range of values ​​is Load strength attenuation index value : .

[0019] In one embodiment of the present invention, the environmental degradation index value is calculated using an environmental degradation model. The method is as follows: Obtain the actual ambient temperature Calculate the accelerating factor of ambient temperature on the aging of external battery modules. : , As the battery activation energy, Boltzmann's constant, The reference ambient temperature; Based on the Average ambient temperature per work cycle Acceleration factor The first under different ambient temperatures Actual working time of this work cycle Equivalent aging time converted to reference ambient temperature : ; New batteries of the same model as the external battery module and batteries with different aging levels were selected and left to stand at a reference ambient temperature for a preset time before their open-circuit voltage was measured. The voltage correction coefficient was obtained by fitting. : a and b are experimental fitting coefficients; Based on the equivalent aging time and the voltage correction coefficient Calculate the cumulative degradation rate of the battery due to environmental factors. : , The environmental degradation rate per unit time at the reference temperature is calibrated through accelerated lifetime experiments; Based on the cumulative attenuation ratio The calculated range of values ​​is Environmental degradation index value : .

[0020] Based on the same inventive concept, this invention also provides a low-power control method for an analog circuit breaker with adaptive signal priority response, implemented through the aforementioned low-power control system for an analog circuit breaker with adaptive signal priority response, comprising: Receive external input signals for power distribution network automation testing, perform preliminary classification of the priority of the external input signals, and generate a first instruction or a second instruction, wherein the priority of the first instruction is greater than the priority of the second instruction; Based on the received first or second instruction, select and switch to the corresponding first or second working mode; Based on the current working mode, the power-on operation and power-off sleep states of the output drive module are coordinated and controlled.

[0021] Compared with the prior art, the above-described technical solution of the present invention has the following advantages: This invention utilizes a core dynamic three-zone power supply architecture to achieve coordinated power consumption management across the entire signal input, processing, and output path at the system level. This ensures that each functional module powers on when needed and shuts off when not in use, achieving ultimate energy efficiency. Relying on a hardware-based signal priority discrimination and adaptive response mechanism, it can accurately distinguish between emergency and routine commands, dynamically adjusting the system clock frequency to ensure both high-speed response to emergency commands and low-power operation under normal conditions, resolving the contradiction between response and power consumption. Employing a multi-redundant wake-up mechanism of primary / backup interrupts and a watchdog timer, coupled with wake-up source diagnosis and anomaly logging, it completely avoids the risk of system failure due to a single wake-up path failure, significantly improving system reliability. The built-in battery life prediction module accurately calculates the state of health (SOH) of the battery through a multi-parameter fusion intelligent algorithm (integrating cycle, load, and environmental attenuation sub-models), solving the problem of difficult assessment of the remaining battery life in portable devices and significantly improving maintainability and user experience. Simultaneously, the collaborative event-driven design at the software level and hardware-accelerated decision-making further strengthens the balance between power consumption and performance, forming a complete and differentiated ultra-low power solution for analog circuit breakers. Attached Figure Description

[0022] To make the content of this invention easier to understand, the invention will be further described in detail below with reference to specific embodiments and accompanying drawings.

[0023] Figure 1 This is a schematic diagram of a low-power control system for an analog circuit breaker with adaptive signal priority response provided in an embodiment of the present invention. Figure 2 This is a schematic diagram of the specific structure of the signal priority discrimination module provided in the embodiments of the present invention and its application. Figure 1 The diagram shows the connection diagram of the system shown. Figure 3 This is a schematic diagram of the specific structure of the event triggering module provided in the embodiments of the present invention and its application. Figure 1 The diagram shows the connection diagram of the system shown. Figure 4 This is a schematic diagram of the specific structure of the prediction module provided in the embodiments of the present invention and its application. Figure 1 The diagram shows the connection diagram of the system shown. Figure 5 This is a schematic flowchart of a low-power control method for an analog circuit breaker with adaptive signal priority response provided in an embodiment of the present invention.

[0024] Explanation of reference numerals in the accompanying drawings: 1. Constant power supply unit; 11. Signal input detection circuit; 111. Signal priority determination module; 1111. Rising edge slope detection submodule; 1112. Characteristic frequency detection submodule; 1113. Logic judgment submodule; 2. Constant power supply with sleep mode; 21. Control module; 22. Event triggering module; 221. Main event triggering submodule; 222. First slave event triggering submodule; 223. Second slave event triggering submodule; 23. Prediction module; 231. Data preprocessing submodule; 232. Battery degradation calculation submodule; 233. Health status fusion assessment submodule; 3. Controllable power supply unit; 31. Signal output drive module; 32. Second switch; 100. Battery module. Detailed Implementation

[0025] The present invention will be further described below with reference to the accompanying drawings and specific embodiments, so that those skilled in the art can better understand and implement the present invention. However, the embodiments described are not intended to limit the present invention.

[0026] Example 1: Reference Figure 1As shown, the present invention provides a low-power control system for an analog circuit breaker with adaptive signal priority response, comprising: a constant power supply unit 1, a constant power supply sleep-able unit 2, and a controllable power supply unit 3, all connected to an external battery module 100; wherein, the constant power supply unit 1 includes: a signal input detection circuit 11 for receiving external input signals, the signal input detection circuit 11 including a signal priority discrimination module 111, which performs preliminary classification of the priority of the external input signals and generates a first instruction or a second instruction, wherein the priority of the first instruction is greater than the priority of the second instruction; The constantly powered sleep-able unit 2 includes a control module 21, the signal input terminal of which is connected to the instruction signal output terminal of the signal priority discrimination module 111, so as to select and switch to the corresponding first working mode (i.e., high power consumption working mode, adapted to high priority instructions) or second working mode (i.e., low power consumption working mode, adapted to low priority instructions) according to the received first instruction or second instruction. The controllable power supply unit 3 includes: a signal output driving circuit 31 and a first switch 32. The first switch 32 is connected in series in the power supply circuit of the signal output driving circuit 31, and the control terminal of the first switch 32 is connected to the on / off control output terminal of the control module 21. The control module 21 can be selected as an STM32L4 series microcontroller system. According to the current working mode, it dynamically controls the on and off states of the first switch 32, thereby coordinating the power-on operation and power-off sleep states of the signal output drive circuit 31.

[0027] like Figure 2 As shown, the signal priority discrimination module 111 includes a rising edge slope detection submodule 1111, a characteristic frequency detection submodule 1112, and a logic judgment submodule 1113. The input terminals of the rising edge slope detection submodule 1111 and the characteristic frequency detection submodule 1112 both receive the external input signal. The rising edge slope detection submodule 1111 identifies the rising edge features in the external input signal to obtain a first discrimination signal; The feature frequency detection submodule 1112 identifies the feature frequency component of a specified intensity in the external input signal to obtain a second discrimination signal; The output terminals of the rising edge slope detection submodule 1111 and the characteristic frequency detection submodule 1112 are both connected to the input terminal of the logic judgment submodule 1113, and are used to perform logical calculations on the first discrimination signal and the second discrimination signal to obtain a first instruction or a second instruction.

[0028] Specifically, the rising edge slope detection submodule 1111 consists of a differentiating circuit and a first voltage comparator, and the input terminal of the differentiating circuit receives the external input signal. Its output terminal is connected to the negative input terminal of the first voltage comparator, and the positive input terminal of the first voltage comparator is connected to the first reference voltage. ; The differentiating circuit is based on the formula For the external input signal Perform differential calculations and output a negative pulse voltage. After level conversion, a positive pulse signal is obtained; among which, The voltage change rate of the external input signal is used to characterize the steepness of the rising edge. and The resistors and capacitors that constitute the differentiating circuit; The first voltage comparator compares the positive pulse signal with the first reference voltage. A threshold comparison is performed; when the positive pulse signal is greater than the first reference voltage... When the rising edge slope detection submodule 1111 is determined to have detected a rising edge feature that meets the preset requirements, it outputs a high-level first discrimination signal, corresponding to the first instruction.

[0029] Specifically, the characteristic frequency detection submodule 1112 is composed of a bandpass filter, an envelope detector, and a second voltage comparator cascaded together. The input terminal of the bandpass filter receives the external input signal. The characteristic frequency bandwidth is selected for the signal, allowing only signals within a specified frequency range to pass through and outputting a filtered AC signal; the input of the envelope detector is connected to the output of the bandpass filter, extracting the amplitude envelope of the AC signal and converting it into a DC voltage proportional to its amplitude; The positive input of the second voltage comparator is connected to the output of the envelope detector to obtain the DC voltage, and its negative input is connected to the second reference voltage. ; The DC voltage and the second reference voltage are compared using the second voltage comparator. A threshold comparison is performed, and the DC voltage is greater than the second reference voltage. When a characteristic frequency component of a specified intensity is identified, the characteristic frequency detection submodule 1112 outputs a high-level second discrimination signal, corresponding to the first instruction.

[0030] Preferably, the logic judgment submodule 1113 is an OR gate module, which performs a logical OR operation on the first judgment signal and the second judgment signal: when either judgment signal is high, the logic judgment submodule 1113 outputs a first instruction; when both judgment signals are low, it outputs a second instruction.

[0031] Optionally, the first voltage comparator and the second voltage comparator are high-speed voltage comparators of the LM311 model.

[0032] like Figure 3 As shown, the constantly powered sleep-able unit 2 also includes an event triggering module 22, which includes a main event triggering submodule 221, a first slave event triggering submodule 222, and a second slave event triggering submodule 223, which are set in parallel.

[0033] The input terminal of the main event triggering submodule 221 is connected to the trigger signal output terminal of the signal input detection circuit 11, and its output terminal is connected to the first interrupt trigger terminal of the control module 21 (corresponding to the main interrupt pin INT0).

[0034] The input terminal of the first slave event trigger sub-module 222 is connected to the trigger signal output terminal of the signal input detection circuit 11, and its output terminal is connected to the second interrupt trigger terminal of the control module 21 (corresponding to the spare interrupt pin INT1). The second event triggering submodule 223 is a low-power timer watchdog submodule built into the control module 21. Its output terminal is connected to the third interrupt trigger terminal of the control module 21 (corresponding to the timer overflow interrupt interface), and forms a closed-loop control logic from triggering to resetting with the control module 21.

[0035] After the signal priority discrimination module 111 completes the priority classification of the input signals, the first interrupt trigger terminal serves as the main interrupt path. The event trigger module 22 determines whether the main interrupt path is in normal working condition by collecting parameters such as the level state and pin response delay of the trigger terminal. If the first interrupt trigger terminal is in an active state, the main event trigger submodule 221 generates an interrupt request signal that conforms to the interrupt protocol of the control module 21 based on the trigger signal of the signal input detection circuit 11, and transmits it to the control module 21 through the first interrupt trigger terminal; after receiving the signal, the control module 21 immediately calls the preset priority response logic and switches to the first working mode (emergency high power working mode) or the second working mode (normal low power mode) that matches the signal priority. If the first interrupt trigger terminal is in a failure state, such as physical damage to the pin or signal loss due to electromagnetic interference, the event trigger module 22 immediately activates the first slave event trigger submodule 222 and starts the backup interrupt path: after receiving the trigger signal from the signal input detection circuit 11, the first slave event trigger submodule 222 synchronously generates an interrupt request signal and sends it to the control module 21 through the second interrupt trigger terminal (backup interrupt path); after the control module 21 obtains the signal through the second interrupt trigger terminal, it also performs priority matching working mode switching and synchronously records the abnormal event log of the main interrupt path failure, providing a basis for subsequent system diagnosis.

[0036] Furthermore, the second event-triggered submodule 223 serves as the final guarantee for system wake-up, and its working state is controlled by the timing of the control module 21, with the specific logic as follows: After the first interrupt trigger terminal or the second interrupt trigger terminal successfully receives the interrupt request signal, it immediately sends a reset command to the second slave event trigger submodule 223 to terminate its internal timing operation and reset the third interrupt trigger terminal to standby state to avoid false triggering. If the control module 21 does not obtain any signal through the first interrupt trigger terminal or the second interrupt trigger terminal within the preset time window, it determines that the dual interrupt path has failed. At this time, the second slave event trigger submodule 223 automatically starts the timing function, generates timing data in real time, and transmits it to the third interrupt trigger terminal.

[0037] When the control module 21 detects that the timing data of the third interrupt trigger terminal exceeds the preset threshold (i.e., timer overflow), it immediately triggers its own forced wake-up mechanism, switches to the working mode that matches the signal priority, records the serious abnormal event of timer fallback wake-up, and starts the fault self-diagnosis process of the main / backup interrupt path.

[0038] like Figure 4 As shown, the constantly powered sleep-able unit 2 also includes a prediction module 23. The input terminal of the prediction module 23 is connected to an external battery module 100, and the output terminal and the battery module 100 are both connected to the data acquisition terminal of the control module 21. The battery module 100 is connected to the power input terminal of the control module 21.

[0039] Specifically, the prediction module 23 is a battery health status (SOH) assessment unit that integrates multi-parameter perception and intelligent algorithms. It includes a data preprocessing submodule 231, a battery degradation calculation submodule 232, and a health status fusion assessment submodule 233. The data preprocessing submodule 231 synchronously collects real-time voltage data, cumulative discharge current data and ambient temperature data of the external battery module 100 through the ADC sampling unit, coulomb meter and temperature sensor. It uses moving average filtering or Kalman filtering algorithm to perform noise reduction and noise removal on the original collected data, eliminate instantaneous interference signals, and output stable and reliable preprocessed data. The battery degradation calculation submodule 232 constructs a multi-dimensional degradation model based on the preprocessed data and the operating status parameters of the battery module 100: the cycle life degradation model takes the total operating time and the number of wake-ups as core inputs, quantifies the capacity degradation caused by battery cycle charging and discharging, and outputs a cycle life degradation index value. The load intensity degradation model uses the proportion of emergency mode operation as the key parameter to characterize the accelerated effect of high power consumption operation on battery aging, and outputs a load intensity degradation index value. The environmental degradation model integrates historical temperature data with real-time voltage monitoring results to quantify the impact of harsh environments such as high temperatures on battery performance and outputs environmental degradation index values. ; The health status fusion assessment submodule 233 uses the maximum-minimum normalization or Z-score normalization method to normalize the cycle life decay index value. The load intensity attenuation index value and the environmental degradation index value After normalization, a weighted calculation is performed to obtain the health status assessment value of the battery module 100. : , , , For weight parameters, This is the normalized value of the cycle life decay index. This is the normalized load intensity attenuation index value. This represents the normalized environmental degradation index value.

[0040] This assessment value directly reflects the ratio of the battery's current remaining capacity to its initial capacity. Based on The numerical range is mapped to a three-level health status and output through a hardware interface: when When the condition is determined to be "good", the green LED indicator light will remain constantly on; when When the condition is "maintenance required", the yellow LED indicator light will flash; when When the system detects an urgent need for replacement, it will drive a red LED indicator to flash rapidly (e.g., at a frequency of 5Hz) and simultaneously output a high-level alarm signal to the system main controller via the GPIO interface of the main control module 21 to remind the user to perform timely maintenance.

[0041] Furthermore, the cycle life decay index value is calculated using the cycle life decay model. The method is as follows: The total number of cycles C in the working state parameters is obtained, that is, one cycle in which the battery module 100 goes from wake-up to working state and then to sleep state is counted as one cycle; and the cumulative duration of the battery module 100 being in the working state is obtained. ; Calculate the average working time for a single cycle. : According to the above and the set baseline cycle working time Calculate the time correction factor : ; Based on the time correction coefficient Calculate the equivalent number of iterations. : ; The unit cycle capacity decay rate was obtained through experimental fitting. Based on the unit cycle capacity decay rate and the equivalent number of loops Calculate the capacity decay ratio caused by cycling. : ; Based on the capacity attenuation ratio coefficient Calculate the cycle life decay index value : .

[0042] Furthermore, the load intensity attenuation index value is calculated using a load intensity attenuation model. The method is as follows: The duration of operation of the control module 21 in the first working mode is obtained. That is, the duration during which the battery module 100 supplies power to the control module 21 in the first working mode; and the cumulative duration of the control module 21 in all working modes. That is, the cumulative duration of the battery module 100 in all operating modes; according to the and stated Calculate the percentage of working time in the first mode. : ; Select an external battery module model that matches the control module 21, and under the same environmental conditions, set up multiple sets of cyclic aging test experiments with different percentages of first mode working time. After each preset cycle test, measure the remaining capacity of the external battery module 100 and use the exponential decay model. The fitting yields the first Group Corresponding capacity decay rate , For the initial capacity, This refers to the test duration; Based on the calibrated capacity decay rate Calculate the cumulative load attenuation ratio of the external battery module 100. : ; Based on the cumulative load attenuation ratio The calculated range of values ​​is Load strength attenuation index value : .

[0043] Furthermore, environmental degradation index values ​​are calculated using an environmental degradation model. The method is as follows: Obtain the actual ambient temperature Calculate the accelerating factor of ambient temperature on the aging of external battery module 100. : , As the battery activation energy, Boltzmann's constant, The reference ambient temperature; Based on the Average ambient temperature per work cycle Acceleration factor The first under different ambient temperatures Actual working time of this work cycle Equivalent aging time converted to reference ambient temperature : ; New batteries of the same model as the external battery module and batteries with different aging levels were selected and left to stand at a reference ambient temperature for a preset time before their open-circuit voltage was measured. The voltage correction coefficient was obtained by fitting. : a and b are experimental fitting coefficients; Based on the equivalent aging time and the voltage correction coefficient Calculate the cumulative degradation rate of the battery due to environmental factors. : , The environmental degradation rate per unit time at the reference temperature is calibrated through accelerated lifetime experiments; Based on the cumulative attenuation ratio The calculated range of values ​​is Environmental degradation index value : .

[0044] Example 2: Based on the same inventive concept, such as Figure 5 As shown, the present invention also provides a low-power control method for an analog circuit breaker with adaptive signal priority response, which is implemented through the aforementioned low-power control system for an analog circuit breaker with adaptive signal priority response, and includes the following steps: The signal input detection circuit 11 receives external input signals for power distribution network automation testing, and performs preliminary classification of the priority of the external input signals through the signal priority discrimination module 111 to generate a first instruction or a second instruction, wherein the priority of the first instruction is greater than the priority of the second instruction. The control module 21 triggers the built-in working mode switching logic according to the received first or second instruction, so that the system automatically switches to the first or second working mode that matches the instruction priority. The control module 21 dynamically manages the power supply status of the signal output drive circuit 31 according to the current working mode, so as to realize the power-on operation of the output drive module in the corresponding working mode and the power-off sleep state switching in the non-working mode, ensuring that energy consumption is allocated as needed.

[0045] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0046] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0047] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0048] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0049] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this invention.

Claims

1. A low-power control system for an analog circuit breaker with adaptive signal priority response, characterized in that, include: The constant power supply unit includes: a signal input detection circuit for receiving external input signals, the signal input detection circuit including a signal priority discrimination module, which performs preliminary classification of the priority of the external input signals and generates a first instruction or a second instruction, wherein the priority of the first instruction is greater than the priority of the second instruction; A constantly powered, sleep-enabled unit includes: a control module, wherein the signal input terminal of the control module is connected to the instruction signal output terminal of the signal priority discrimination module, so as to select and switch to the corresponding first working mode or second working mode according to the received first instruction or second instruction; A controllable power supply unit includes: a signal output driving circuit and a first switch, wherein the first switch is connected in series in the power supply circuit of the signal output driving circuit, and the control terminal of the first switch is connected to the on / off control output terminal of the control module. The control module dynamically controls the on and off states of the first switch according to the current working mode, thereby coordinating the power-on operation and power-off sleep states of the signal output drive circuit.

2. The low-power control system for an analog circuit breaker with adaptive signal priority response according to claim 1, characterized in that, The signal priority discrimination module includes a rising edge slope detection submodule, a characteristic frequency detection submodule, and a logic judgment submodule. The input terminals of the rising edge slope detection submodule and the characteristic frequency detection submodule both receive the external input signal. The rising edge slope detection submodule identifies rising edge features in the external input signal to obtain a first discrimination signal. The feature frequency detection submodule identifies the feature frequency component of a specified intensity in the external input signal to obtain a second discrimination signal; The outputs of the rising edge slope detection submodule and the characteristic frequency detection submodule are both connected to the input of the logic judgment submodule, and are used to perform logical calculations on the first discrimination signal and the second discrimination signal to obtain a first instruction or a second instruction.

3. The low-power control system for an analog circuit breaker with adaptive signal priority response according to claim 2, characterized in that, The rising edge slope detection submodule consists of a differentiating circuit and a first voltage comparator. The input terminal of the differentiating circuit receives the external input signal. Its output terminal is connected to the negative input terminal of the first voltage comparator, and the positive input terminal of the first voltage comparator is connected to the first reference voltage. ; The differentiating circuit is based on the formula For the external input signal Perform differential calculations and output a negative pulse voltage. After level conversion, a positive pulse signal is obtained; among which, The rate of change of voltage is used to characterize the rising edge characteristics of the external input signal. and The resistors and capacitors that constitute the differentiating circuit; The first voltage comparator compares the positive pulse signal with the first reference voltage. A comparison is made when the positive pulse signal is greater than the first reference voltage. When a rising edge feature is detected, the first discrimination signal output is the first instruction.

4. The low-power control system for an analog circuit breaker with adaptive signal priority response according to claim 2, characterized in that, The characteristic frequency detection submodule consists of a bandpass filter, an envelope detector, and a second voltage comparator cascaded together. The input terminal of the bandpass filter receives the external input signal. The characteristic frequency bandwidth is selected for it, allowing only signals within a specified frequency range to pass through and outputting a filtered AC signal; the input terminal of the envelope detector is connected to the output terminal of the bandpass filter, extracting the amplitude envelope of the AC signal and converting it into a DC voltage proportional to its amplitude; The positive input of the second voltage comparator is connected to the output of the envelope detector to obtain the DC voltage, and its negative input is connected to the second reference voltage. ; The DC voltage and the second reference voltage are compared using the second voltage comparator. A threshold comparison is performed, and the DC voltage is greater than the second reference voltage. When the specified intensity of the characteristic frequency component is identified, the corresponding output second discrimination signal is the first instruction.

5. The low-power control system for an analog circuit breaker with adaptive signal priority response according to claim 2, characterized in that, The logic judgment submodule is an OR gate module.

6. The low-power control system for an analog circuit breaker with adaptive signal priority response according to claim 1, characterized in that, The constantly powered sleep-able unit also includes an event triggering module, which includes a main event triggering submodule and a first slave event triggering submodule arranged in parallel. The trigger signal output terminal of the signal input detection circuit is connected to the first interrupt triggering terminal and the second interrupt triggering terminal of the control module through the main event triggering submodule and the first slave event triggering submodule, respectively. After the signal priority discrimination module completes the priority classification of the input signals, the event triggering module performs a validity check on the first interrupt trigger terminal: If the first interrupt trigger terminal is in an active state, the main event trigger submodule sends an interrupt request signal to the first interrupt trigger terminal, causing the control module to switch to the corresponding priority working mode. If the first interrupt trigger terminal is in a failed state, the first slave event trigger submodule sends an interrupt request signal to the first interrupt trigger terminal, causing the control module to switch to the corresponding priority working mode.

7. The low-power control system for an analog circuit breaker with adaptive signal priority response according to claim 6, characterized in that, The event triggering module further includes a second slave event triggering submodule, which is connected to the third interrupt triggering terminal of the control module. After the first interrupt triggering terminal or the second interrupt triggering terminal successfully receives an interrupt request signal, the control module resets the working state of the third interrupt triggering terminal and terminates the timing operation of the second slave event triggering submodule. Only when both the first interrupt trigger terminal and the second interrupt trigger terminal are in a failed state, the second event trigger submodule starts timing and generates timing data in real time, which is sent to the control module through the third interrupt trigger terminal. When the control module detects that the timing data exceeds a preset threshold, it triggers itself to switch to the corresponding priority working mode.

8. The low-power control system for an analog circuit breaker with adaptive signal priority response according to claim 1, characterized in that, The always-powered sleep-enabled unit also includes a prediction module. The input of the prediction module is connected to an external battery module, and both the output and the external battery module are connected to the data acquisition terminal of the control module. The external battery module is connected to the power input of the control module.

9. The low-power control system for an analog circuit breaker with adaptive signal priority response according to claim 8, characterized in that, The prediction module includes a data preprocessing submodule, a battery degradation calculation submodule, and a health status fusion assessment submodule. The data preprocessing submodule performs digital filtering on the voltage data, current data, and ambient temperature data of the external battery module to obtain preprocessed data. The battery degradation calculation submodule constructs a cycle life degradation model, a load intensity degradation model, and an environmental degradation model based on the preprocessed data and the operating status parameters of the external battery module. These three models are then used to calculate the cycle life degradation index value. Load intensity attenuation index value and environmental degradation index values ; The health status fusion assessment submodule evaluates the cycle life decay index value. The load intensity attenuation index value and the environmental degradation index value After normalization, a weighted calculation is performed to obtain the health status assessment value of the external battery module. .

10. The low-power control system for an analog circuit breaker with adaptive signal priority response according to claim 9, characterized in that, The cycle life decay index value is calculated using the cycle life decay model. The method is as follows: The total number of cycles C in the working state parameters is obtained, which is one cycle in which the external battery module goes from wake-up to working state and then to sleep state; and the cumulative duration of the external battery module being in working state is obtained. ; Calculate the average working time for a single cycle. : According to the above and the set baseline cycle working time Calculate the time correction factor : ; Based on the time correction coefficient Calculate the equivalent number of iterations. : ; The unit cycle capacity decay rate was obtained through experimental fitting. Based on the unit cycle capacity decay rate and the equivalent number of loops Calculate the capacity decay ratio caused by cycling. : ; Based on the capacity attenuation ratio coefficient Calculate the cycle life decay index value : 。 11. The low-power control system for an analog circuit breaker with adaptive signal priority response according to claim 9, characterized in that, Calculate the load intensity attenuation index value using the load intensity attenuation model. The method is as follows: Obtain the operating duration of the control module in the first operating mode. That is, the duration of operation of the control module in the first working mode when the external battery module supplies power to the control module; and the cumulative duration of operation of the control module in all working modes. That is, the cumulative duration of the external battery module in all operating modes; according to the and stated Calculate the percentage of working time in the first mode. : ; Select an external battery module model that matches the control module, and under the same environmental conditions, set up multiple sets of cyclic aging test experiments with different percentages of first mode operating time. After each preset cycle test, measure the remaining capacity of the external battery module and use an exponential decay model. The fitting yields the first Group Corresponding capacity decay rate , For the initial capacity, For test duration; Based on the calibrated capacity decay rate Calculate the cumulative load degradation ratio of the external battery module. : ; Based on the cumulative load attenuation ratio The calculated range of values ​​is Load strength attenuation index value : 。 12. The low-power control system for an analog circuit breaker with adaptive signal priority response according to claim 9, characterized in that, Calculate environmental degradation index values ​​using an environmental degradation model. The method is as follows: Obtain the actual ambient temperature Calculate the accelerating factor of ambient temperature on the aging of external battery modules. : , As the battery activation energy, Boltzmann's constant, The reference ambient temperature; Based on the Average ambient temperature per work cycle Acceleration factor The first under different ambient temperatures Actual working time of this work cycle Equivalent aging time converted to reference ambient temperature : ; New batteries of the same model as the external battery module and batteries with different aging levels were selected and left to stand at a reference ambient temperature for a preset time before their open-circuit voltage was measured. The voltage correction coefficient was obtained by fitting. : a and b are experimental fitting coefficients; Based on the equivalent aging time and the voltage correction coefficient Calculate the cumulative degradation rate of the battery due to environmental factors. : , The environmental degradation rate per unit time at the reference temperature is calibrated through accelerated lifetime experiments; Based on the cumulative attenuation ratio The calculated range of values ​​is Environmental degradation index value : 。 13. A low-power control method for an analog circuit breaker with adaptive signal priority response, characterized in that, This is achieved through a low-power control system for an analog circuit breaker with adaptive signal priority response as described in any one of claims 1 to 12, comprising: Receive external input signals for power distribution network automation testing, perform preliminary classification of the priority of the external input signals, and generate a first instruction or a second instruction, wherein the priority of the first instruction is greater than the priority of the second instruction; Based on the received first or second instruction, select and switch to the corresponding first or second working mode; Based on the current working mode, the power-on operation and power-off sleep states of the output drive module are coordinated and controlled.

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