Intelligent network card, operating system switching method and electronic device

Abstract

This invention provides a smart network interface card (NIC), an operating system switching method, and an electronic device, applicable to the field of computer technology. The smart NIC includes: a system-on-a-chip (SoC), non-volatile memory, and embedded memory; the non-volatile memory stores programmable gate array (PGA) images and boot programs of the primary and backup systems within the smart NIC; the embedded memory stores the operating system image of the backup system, user data shared by the primary and backup systems, and system runtime files; the smart NIC is configured to, upon determining a failure in the primary system, control the processor to run the backup system's boot program via a system switching module in the PGA, thereby configuring the backup system's PGA image onto the PGA, loading the backup system's operating system image onto the processor, and simultaneously mounting user data and system runtime files to start the backup system.

Description

Technical Field

[0001] This invention relates to the field of computer technology, specifically to a smart network card, an operating system switching method, and an electronic device. Background Technology

[0002] Smart network interface cards (NICs) typically use non-volatile memory to store critical data for both the primary and backup systems. In related technologies, due to the limited storage space of non-volatile memory, the mirrored data of the backup system is usually significantly simplified, retaining only the most basic functional modules.

[0003] In the process of realizing the concept of this invention, it was found that at least the following problems exist in the related technology: because the image data of the backup system is cut off due to storage limitations, after the primary system fails and switches to the backup system, the backup system can only run limited underlying logic. This makes it difficult for the smart network card to maintain complete business functions, and also leads to a reduction in its reliability and stability. Summary of the Invention

[0004] In view of the above problems, the present invention provides a smart network card, an operating system switching method, and an electronic device.

[0005] According to a first aspect of the present invention, a smart network interface card (NIC) is provided, comprising: a system-on-a-chip (SoC), a non-volatile memory (NVM), and an embedded memory deployed in the smart NIC; wherein the SoC integrates a programmable gate array (PGA) and a processor; the NVM is divided into multiple partitions for storing PGA images and boot programs of a primary system and a backup system in the smart NIC; the embedded memory is divided into an operating system partition and a user data partition, wherein the operating system partition stores the operating system image of the backup system, and the user data partition stores user data and system runtime files shared by the primary system and the backup system; the smart NIC is configured to, upon determining that the primary system has failed, control the processor to run the boot program of the backup system via a system switching module in the PGA to configure the PGA image of the backup system onto the PGA, load the operating system image of the backup system onto the processor, and simultaneously load the user data and the system runtime files to start the backup system.

[0006] A second aspect of the present invention provides an operating system switching method, characterized in that it is applied to a smart network interface card (NIC), wherein the smart NIC includes a system-on-a-chip (SoC), a non-volatile memory (NVM), and an embedded memory, wherein the SoC integrates a programmable gate array (PGA) and a processor, and the method includes: upon determining that the primary system in the smart NIC has failed, configuring the PGA image of the backup system onto the PGA by running a boot program of a backup system stored in the NVM; providing the processor with the operating system image of the backup system stored in the operating system partition of the embedded memory; and mounting user data and system runtime files shared by the primary system and the backup system stored in the user data partition of the embedded memory to start the backup system.

[0007] A third aspect of the present invention provides an electronic device, comprising: a server, and the aforementioned smart network interface card (NIC), wherein the smart NIC is installed on the server; wherein the server is configured to: monitor the operating status of the main system in the smart NIC, and, in the event that the main system has failed, send a system switching command to the smart NIC so that the smart NIC can start a backup system.

[0008] A fourth aspect of the present invention also provides a computer-readable storage medium having a computer program or instructions stored thereon, wherein the computer program or instructions, when executed by a processor, implement the steps of the above-described method.

[0009] A fifth aspect of the present invention also provides a computer program product, including a computer program or instructions that, when executed by a processor, implement the steps of the above-described method.

[0010] According to embodiments of the present invention, by deploying a system-on-a-chip, non-volatile memory, and embedded memory in a smart network interface card (NIC), partitioning the memory, and setting up a system switching module, the smart NIC can achieve rapid switching between a primary system and a backup system. When the primary system fails, the system switching module can control the processor to run the backup system's boot programmable programmable gate array (FPGA) image, configure the backup system's FPGA image, load the backup system's operating system image onto the processor, and simultaneously mount shared user data and system runtime files, thereby quickly starting the backup system. This effectively improves the reliability and stability of the smart NIC, reduces downtime caused by system failures, and ensures the continuity of service processing. Attached Figure Description

[0011] The above-mentioned contents, as well as other objects, features and advantages of the present invention, will become clearer from the following description of embodiments of the present invention with reference to the accompanying drawings.

[0012] Figure 1A structural diagram of a smart network interface card according to an embodiment of the present invention is shown.

[0013] Figure 2 A schematic diagram of the partition configuration of the smart network card according to the present invention is shown.

[0014] Figure 3 A structural diagram of a smart network interface card according to another embodiment of the present invention is shown.

[0015] Figure 4 A structural diagram of a smart network interface card according to another embodiment of the present invention is shown.

[0016] Figure 5 A flowchart of an operating system switching method according to an embodiment of the present invention is shown.

[0017] Figure 6 A structural block diagram of an operating system switching device according to an embodiment of the present invention is shown.

[0018] Figure 7 A block diagram of an electronic device suitable for implementing an operating system switching method according to an embodiment of the present invention is shown. Detailed Implementation

[0019] Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the invention. In the following detailed description, numerous specific details are set forth to provide a thorough understanding of the embodiments of the invention for ease of explanation. However, it will be apparent that one or more embodiments may be practiced without these specific details. Furthermore, descriptions of well-known structures and techniques are omitted in the following description to avoid unnecessarily obscuring the concept of the invention.

[0020] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the invention. The terms “comprising,” “including,” etc., as used herein indicate the presence of the stated features, steps, operations, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, or components.

[0021] All terms used herein (including technical and scientific terms) have the meanings commonly understood by those skilled in the art, unless otherwise defined. It should be noted that the terms used herein are to be interpreted in a manner consistent with the context of this specification, and not in an idealized or overly rigid way.

[0022] When using expressions such as "at least one of A, B and C", they should generally be interpreted in accordance with the meaning that is commonly understood by those skilled in the art (e.g., "a system having at least one of A, B and C" should include, but is not limited to, a system having A alone, a system having B alone, a system having C alone, a system having A and B, a system having A and C, a system having B and C, and / or a system having A, B and C, etc.).

[0023] In the technical solution of this invention, the data involved (including but not limited to data used for analysis, data stored, data displayed, etc.) are all information and data authorized by the user or fully authorized by all parties. The collection, storage, use, processing, transmission, provision, disclosure and application of related data all comply with relevant laws, regulations and standards, necessary confidentiality measures have been taken, and they do not violate public order and good morals. Corresponding operation entry points are provided for users to choose to authorize or refuse.

[0024] Figure 1 A structural diagram of a smart network interface card according to an embodiment of the present invention is shown.

[0025] like Figure 1 As shown, the smart network interface card (NIC) deploys a system-on-a-chip (SoC) 101, a non-volatile memory (NVM) 102, and an embedded memory 103. The SoC 101 integrates a programmable gate array (PGA) 1011 and a processor 1012. The NVM 102 is divided into multiple partitions for storing the PGA images and boot programs of the main and backup systems in the smart NIC. The embedded memory 103 is divided into an operating system partition 1031 and a user data partition 1032. The operating system partition 1031 stores the operating system image of the backup system, and the user data partition 1032 stores user data and system runtime files shared by the main and backup systems.

[0026] The smart network card is configured to, in the event of a failure in the primary system, control the processor 1012 to run the boot program of the backup system through the system switching module in the programmable gate array 1011, so as to configure the programmable gate array image of the backup system onto the programmable gate array 1011, load the operating system image of the backup system onto the processor 1012, and simultaneously mount user data and system runtime files to start the backup system.

[0027] According to an embodiment of the present invention, the hardware architecture of the smart network card is based on a system-on-a-chip 101, which integrates a programmable gate array 1011 and an embedded processor 1012, which work closely together through an internal high-speed bus.

[0028] Among them, the programmable gate array 1011 is responsible for hardware acceleration tasks such as data forwarding and protocol processing, while the processor 1012 undertakes software-level management tasks such as system control and task scheduling. It is also used in conjunction with non-volatile memory 102 and embedded memory 103 to build a complete storage system.

[0029] The non-volatile memory 102 uses highly reliable flash memory media and is divided into multiple independent storage areas through a pre-planned partitioning strategy. Among them, a dedicated partition is allocated for storing the programmable gate array (PGA) image and boot program of the main system in the smart network interface card (NIC), and another partition is allocated for storing the PGA image and boot program of the backup system in the smart NIC. Each partition is equipped with a data verification mechanism to ensure that the stored PGA image and boot program are not lost or damaged in the event of power failure or abnormal conditions, providing basic storage protection for the independent operation of the dual systems.

[0030] The embedded memory 103 can be an embedded multimedia memory card, which is also partitioned into an operating system partition 1031 and a user data partition 1032. The operating system partition 1031 is specifically used to store the complete operating system image of the backup system, including kernel files, drivers, system service components, etc. The user data partition 1032 centrally stores various types of data shared by the primary and backup systems, covering user configuration parameters, business operation logs, temporary cache data, and general system runtime files. This shared data uses a unified file system format, supporting concurrent read / write and real-time access to data by both systems.

[0031] During system operation, the server continuously monitors the operating status of the main system within the smart network interface card (NIC), including the logical integrity of the programmable gate array (PGA) 1011, the task execution status of the processor 1012, and the continuity of data transmission. When the server detects a logical error, system crash, or communication interruption in the main system, it will immediately trigger a switching mechanism.

[0032] The system switching module, pre-programmed with hardware logic in the programmable gate array 1011, is started up, sending an interrupt signal to the processor 1012 to control the processor 1012 to terminate the execution of the main system's related programs. Subsequently, the boot processor 1012 reads the boot program corresponding to the backup system from the partition of the non-volatile memory 102 and loads and runs it.

[0033] Driven by the bootloader, the processor 1012 retrieves the standby system's programmable gate array (PGA) image from the non-volatile memory 102 and writes the PGA image frame by frame into the configuration storage unit of the PGA 1011 through a dedicated configuration interface, completing the logical reconfiguration and function switching of the PGA 1011. Simultaneously, it loads the standby system's operating system image from the operating system partition 1031 of the embedded memory 103, gradually initializing the system kernel, loading the adapted hardware drivers, and starting the necessary system services.

[0034] During this process, the shared user data and system running files of the user data partition 1032 in the embedded memory 103 are seamlessly mounted to the file system directory of the backup system through a preset mounting protocol, ensuring that the backup system can directly reuse these data resources without reconfiguration or data migration.

[0035] Ultimately, the backup system was fully launched in a short time, achieving seamless connection and continuous transmission of business data. Throughout the switchover process, data integrity and consistency were strictly guaranteed through mechanisms such as partitioning and data verification, effectively preventing business interruptions or data loss.

[0036] By deploying system-on-a-chip (SoC), non-volatile memory, and embedded memory within the smart network interface card (NIC), partitioning the memory, and configuring a system switching module, the smart NIC enables rapid switching between the primary and backup systems. When the primary system fails, the system switching module controls the processor to run the backup system's bootloader, configures the backup system's programmable gate array (PGA) image onto the PGA, loads the backup system's operating system image onto the processor, and simultaneously mounts shared user data and system runtime files. This rapid startup of the backup system effectively improves the reliability and stability of the smart NIC, reduces downtime caused by system failures, and ensures the continuity of service processing.

[0037] Figure 2 A schematic diagram of the partition configuration of the smart network card according to the present invention is shown.

[0038] like Figure 2 As shown, users can configure partitions through the programming file generator interface. The left side of the interface displays a list of currently created partitions, showing existing partition entries such as Partition 1, Partition 2, and Partition 3. Several empty partition slots are reserved below for adding partition content later.

[0039] On the right side of the interface are several function operation buttons, each corresponding to a different configuration management function. Among them, the "Add Device" button is used to associate the programming file with the corresponding hardware device, the "Add Partition" button adds a new partition entry to the partition list on the left, the "Add File System" button configures the appropriate file system type for an existing partition, the "Edit" button allows adjustment of parameters and modification of content for the selected partition or related configuration items, and the "Remove" button deletes the currently selected partition or related configured items.

[0040] The layout of the entire interface is clear and concise. Through these operation buttons, users can create, adjust, and manage the storage structure (including partitions, associated devices, file systems, etc.) corresponding to the programming file, thereby constructing a programming file configuration that meets their needs.

[0041] According to an embodiment of the present invention, the boot program includes a first boot program and a second boot program; the first boot program is configured with an offset address parameter of the second boot program corresponding to the first boot program in non-volatile memory; the first boot program is configured to: load the corresponding programmable gate array image to initialize hardware resources, and load the corresponding second boot program according to the offset address parameter.

[0042] Specifically, the first boot program and the second boot program correspond to the supporting components of the main system or the backup system, and are stored in the corresponding partitions of the non-volatile memory. The storage addresses of the two are pre-planned to ensure that they do not overlap and that the access paths are optimal.

[0043] The code segment of the first bootloader has a dedicated configuration parameter area, which contains the offset address parameter of the second bootloader bound to the current first bootloader in non-volatile memory.

[0044] The offset address parameter is a physical address offset value accurate to the byte. Its value is calibrated by the system programming tool before the smart network card leaves the factory. Combined with the base address of the non-volatile memory, the physical storage location of the second boot program can be uniquely determined.

[0045] Once the first bootloader is triggered, the corresponding programmable gate array (PGA) image is loaded. The first bootloader reads the PGA image from the corresponding partition in non-volatile memory based on its own system identifier (primary system or backup system).

[0046] During the reading process, the validity and compatibility of the programmable gate array (PGA) image are verified to ensure that the loaded PGA image matches the current hardware platform. Subsequently, the PGA image is written to the PGA configuration register in sequence through the dedicated configuration interface of the PGA, completing the reconstruction and loading of the hardware logic.

[0047] Next, the hardware resources are initialized and configured, including setting the high-speed bus speed between the processor and the programmable gate array, initializing the network port physical layer parameters of the network card, configuring the read and write timing of the storage controller, and enabling the interrupt response mechanism of key hardware modules, to ensure that each hardware component can work together in accordance with the preset specifications.

[0048] After hardware initialization is complete, the first bootloader will enter the loading process of the second bootloader. Specifically, it extracts the offset address parameter of the second bootloader from its own configuration parameter area, and calculates the absolute physical memory address of the second bootloader by combining it with the global base address of the non-volatile memory. Then, it sends a block read instruction to that address to read the code data of the second bootloader.

[0049] After the reading is complete, the first bootloader will perform a context switch of the processor, point the program counter to the entry address of the second bootloader, release the temporary resources it occupies, and formally transfer system control to the second bootloader to ensure a smooth transition of the subsequent boot process.

[0050] By dividing the bootloader into a first bootloader responsible for hardware initialization and a second bootloader responsible for system loading, the division of labor is clearly defined, effectively improving the modularity and reliability of the boot process.

[0051] According to an embodiment of the present invention, the non-volatile memory is further divided into an environment variable partition for storing main system environment variables and backup system environment variables, wherein: the second boot program of the main system is configured to: read the device address and partition information in the main system environment variables to load the main system operating system image from the non-volatile memory; the second boot program of the backup system is configured to: read the boot instructions in the backup system environment variables to load the backup system operating system image from the operating system partition of the embedded memory.

[0052] When planning the partitions of non-volatile memory, in addition to reserving partitions for storing programmable gate array images and partitions for storing boot programs, a separate partition for environment variables is also specifically designated.

[0053] The environment variable partition adopts a dual backup design, which is further divided into a primary system environment variable sub-partition and a backup system environment variable sub-partition. The two sub-partitions are physically isolated and of equal size.

[0054] The core data stored in the main system environment variable sub-partition includes the device address and partition information corresponding to the main system. The device address is the global physical base address of the non-volatile memory (accurate to the byte), and the partition information includes the starting offset, total storage length, data block size, and file system type identifier of the partition where the main system operating system image is located. These parameters are written using a dedicated tool during smart network interface card factory configuration or system upgrades and can be subsequently updated and maintained through the system management interface.

[0055] The backup system environment variable sub-partition primarily stores the backup system's boot instructions. These boot instructions are structured data, including key information such as the target storage medium identifier (explicitly pointing to the embedded memory), the index number of the operating system partition, the starting address offset of the image, loading priority, and verification method.

[0056] After the second bootloader of the main system is handed over control by the first bootloader, it initializes the access interface of the non-volatile memory and locates the storage area of ​​the main system environment variable sub-partition according to the preset environment variable partition base address.

[0057] Subsequently, the second bootloader extracts the device address and partition information from the main system environment variables using its built-in parameter parsing logic. Based on the parsed device address (non-volatile memory base address) and partition information (starting offset, total length, etc.), the second bootloader calculates the physical storage range of the main system's operating system image in non-volatile memory.

[0058] Then, the operating system image of the main system is read. The second bootloader will verify the operating system image and confirm that it is compatible with the current hardware platform and the main system version. Then, the operating system image will be gradually loaded into the memory running area corresponding to the processor, completing the initial loading preparation of the main system operating system.

[0059] When the backup system's second bootloader is triggered and executed, it first initializes the non-volatile memory access interface, and then directly locates the backup system environment variable sub-partition in the environment variable partition.

[0060] After reading the backup system environment variables stored in the backup system environment variable sub-partition, the second boot program extracts the identification information of the target storage medium (embedded memory) and the specific parameters of the operating system partition (such as partition start address, image length, and file system format).

[0061] According to the configuration in the boot command, the second bootloader will switch the storage access channel to the embedded memory and locate the preset operating system partition in the embedded memory. Then, it will read the operating system image of the backup system according to the read method specified in the boot command.

[0062] During the reading process, the second bootloader loads the operating system image into the memory space allocated by the processor, and at the same time completes memory address mapping and permission configuration, laying the foundation for the subsequent initialization and startup of the backup system operating system.

[0063] By dividing the environment variable into independent partitions, the boot programs of the primary and backup systems can read their respective configuration parameters, thus achieving differentiated boot paths.

[0064] According to an embodiment of the present invention, the second boot program of the standby system is further configured to: when loading the operating system image of the standby system from the operating system partition of the embedded memory, pass a root file system path parameter pointing to the user data partition in the embedded memory to the operating system of the standby system; the operating system of the standby system is configured to: mount the user data partition to mount shared user data and system runtime files according to the root file system path parameter.

[0065] Before loading the operating system image of the backup system from the embedded memory, the backup system's second bootloader prepares and encapsulates the root file system path parameters. These parameters include the embedded memory's device identifier, the physical starting address of the user data partition, the total storage capacity of the partition, and the file system format identifier. This data is embedded in the second bootloader based on the smart network interface card's (NIC) factory storage partitioning plan and can be fine-tuned later using system management tools.

[0066] As the backup system's operating system image is gradually loaded into the designated memory region, the second bootloader simultaneously packages the root file system path parameters according to the format agreed upon with the backup system's operating system kernel, converting them into a binary data format that the kernel can directly parse. This data is then written to a pre-allocated shared memory region in the embedded memory, accessible during kernel startup. This region has independent address mappings and access permissions to prevent parameters from being accidentally modified by other processes.

[0067] Before the standby system's operating system image is loaded and the kernel is about to start initialization, the second bootloader sends a parameter ready signal to the kernel, informing it that the root file system path parameter can be read from the shared memory area, ensuring the timing accuracy of parameter passing. After the standby system's operating system kernel starts, it will first complete the initialization of basic hardware drivers according to the preset boot process, including loading the embedded memory controller driver, ensuring normal access to the various partitions of the embedded memory.

[0068] Subsequently, the kernel actively scans the shared memory region specified by the second bootloader, reads the root file system path parameters stored therein, and parses the core information in the root file system path parameters. After parsing, it begins mounting the partitions. Specifically, it first performs an integrity check on the user data partition. If the check passes, the user data partition is mounted to the kernel's preset shared directory.

[0069] After mounting is complete, the kernel will generate a system log indicating successful mounting and configure the access permissions of the partition to be the same as those of the primary system. This ensures that the backup system can seamlessly reuse the shared user data (such as business configuration files and user account information) and system runtime files (such as general library files and temporary cache directories) without the need for additional data migration or configuration adaptation, thus achieving complete collaboration between the two systems at the data level.

[0070] By passing specific root file system parameters, the system can accurately mount the shared data partition after startup, ensuring data continuity and availability after system switchover and improving system efficiency and stability.

[0071] According to an embodiment of the present invention, the programmable gate array is further configured to: when the smart network card is started, obtain a currently valid pointer block by reading the boot information partition stored in the non-volatile memory, wherein the pointer block is used to indicate the programmable gate array image of the system to be started; according to the indication of the pointer block, consult the partition table in the non-volatile memory corresponding to the system to be started to locate the boot program of the system to be started, and run the boot program.

[0072] As the core hardware control unit of a smart network interface card (NIC), the Field Programmable Gate Array (FPGA) needs to initialize its communication interface with the non-volatile memory. After the FPGA is powered on, its internal hardware configuration logic first activates the memory controller. The memory controller then configures the connection protocol with the non-volatile memory according to preset timing parameters to ensure stable and high-speed reading of data from the memory.

[0073] Once the communication interface is ready, the FPGA will access a predefined boot information partition with a fixed starting address in the non-volatile memory according to its internally programmed boot logic. By reading the boot information partition stored in the non-volatile memory, it obtains the currently valid pointer block.

[0074] Each pointer block is a structured data unit, including the physical start address and data length of a programmable gate array (PGA) image of a specific system (master or backup system) in non-volatile memory, and also embeds a valid bit flag. When the FPGA reads a pointer block, if the valid bit flag is 0, the FPGA considers the pointer block corrupted or invalid and automatically attempts to read the next pointer block. This mechanism provides basic fault tolerance for the boot process. Ultimately, the FPGA finds the pointer block with a valid bit of 1, identifies it as the current valid pointer block, and thus determines the target system image to be loaded during this boot.

[0075] After identifying a valid pointer block, the FPGA consults the partition table corresponding to the system to be booted. The partition table is a higher-level memory layout index, also stored in a specific location in non-volatile memory, and its address is usually specified by a field in the valid pointer block. The partition table includes detailed information about all logical partitions of the smart network interface card, such as the name, purpose, starting address, size, and access permissions of each partition.

[0076] The FPGA locates the corresponding entry in the partition table based on the identifier of the system to be booted indicated in the valid pointer block (such as a binary bit or an index value). This entry clearly tells the FPGA which partition and location the bootloader (i.e., the first bootloader) of the system to be booted is stored in.

[0077] After obtaining the precise storage address and length of the bootloader, the FPGA's memory controller initiates a series of read commands to load the bootloader's code and data completely from non-volatile memory into the FPGA's internal configuration logic block and embedded block. Once configured, the FPGA's logic functions are entirely defined by the loaded bootloader code, formally transferring system control to the software-level bootloader and initiating the subsequent operating system loading process. This entire process, from hardware initialization to bootloader execution, forms a complete boot loop.

[0078] By reading the boot information partition in non-volatile memory using a programmable gate array, obtaining the pointer block, and locating the boot program of the system to be booted, the smart network card achieves fast boot and system switching, improving boot efficiency and system flexibility.

[0079] According to an embodiment of the present invention, the system switching module is configured to: update the pointer block in the non-volatile memory so that the pointer block points to the programmable gate array image of the standby system when it is determined that the primary system has failed; the programmable gate array is configured to: locate the programmable gate array image of the standby system and the corresponding boot program according to the updated pointer block, so as to start the standby system.

[0080] By continuously monitoring multi-dimensional indicators such as processor operating status, data transmission link integrity, and programmable gate array logic execution results, the server determines that the main system has experienced an unrecoverable fault (such as kernel crash, hardware logic error, communication link interruption, etc.) and issues a clear fault signal. The system switching module will immediately start the pointer block update process.

[0081] The system switching module sends a partition locking command to the memory through the dedicated control interface of the non-volatile memory, temporarily blocking other access requests to the boot information partition, preventing data conflicts or tampering during pointer block updates, and ensuring the atomicity of the update operation.

[0082] Subsequently, the system switching module reads the pointer block currently stored in the boot information partition and modifies its contents according to preset rules. Specifically, it replaces the original physical address offset pointing to the primary system's programmable gate array (FPGA) image with the precise physical address of the backup system's FPGA image in non-volatile memory. Simultaneously, it sets the valid bit corresponding to the original primary system to "invalid" and switches the valid bit corresponding to the backup system to "valid," ensuring the integrity and uniqueness of the updated pointer block data. After the updated data is prepared, the system switching module writes the modified pointer block data to the original storage location in the boot information partition via a high-speed storage interface, overwriting the old pointer block.

[0083] Subsequently, the programmable gate array (PGA) reads the updated pointer block. Based on the physical address and data length information pointing to the PGA image of the backup system in the pointer block, the PGA locates the partition in the non-volatile memory where the PGA image of the backup system is stored. The PGA image is then written to its own configuration storage unit frame by frame in sequence, completing the reconstruction and initialization of the hardware logic and ensuring that all hardware resources required by the backup system are ready according to the preset specifications.

[0084] After the hardware logic configuration is completed, the programmable gate array will consult the preset partition table in the non-volatile memory based on the backup system identification information hidden in the updated pointer block, retrieve the entry corresponding to the backup system in the partition table, and extract key information such as the starting address, storage length and access permissions of the partition where the backup system boot program (first boot program) is located.

[0085] Subsequently, the programmable gate array's memory controller will use this information to accurately read the backup system's first boot program from the non-volatile memory, load it into its own embedded block, set the program counter to the entry address of the first boot program, and hand over system control.

[0086] Subsequently, the first bootloader loads the corresponding programmable gate array (PLA) image to complete a secondary verification of hardware resources. Then, the second bootloader loads the image using offset address parameters, and finally, the standby system's operating system is gradually started and the user data partition is mounted, achieving a complete switchover from primary system failure to normal standby system operation. Throughout the entire process, the PPA ensures the timeliness and reliability of the switchover through hardware-level logic control, ensuring that service interruption time is kept within a preset range.

[0087] By updating the pointer block when the primary system fails through the system switching module, and by using the programmable gate array to locate the backup system's image and boot program based on the updated pointer block to start the backup system, rapid switching between the primary and backup systems is achieved, improving the reliability and fault tolerance of the smart network interface card.

[0088] According to an embodiment of the present invention, the smart network card is further configured to: update the pointer block in the non-volatile memory after determining that the main system fault repair is completed, so that the pointer block points back to the programmable gate array image of the main system; the programmable gate array is configured to: locate the programmable gate array image of the main system and the corresponding boot program according to the updated pointer block, and start the main system; after the main system starts, mount the user data partition in the embedded memory to mount the user data and system running files that have been updated during the operation of the standby system.

[0089] The server verifies whether the main system has been fully repaired by checking the integrity of the main system's programmable gate array image, detecting the recovery status of the processor core functions, and verifying the availability of the operating system kernel and drivers, among other metrics. When it is detected that the main system's hardware logic and software components have been restored to normal operating standards and there are no potential faults, the server sends a confirmation signal to the system switching module confirming that the main system repair is complete, triggering the pointer block switchback process.

[0090] Upon receiving the signal, the system switching module sends a boot information partition lock command to the non-volatile memory, temporarily blocking other modules from accessing the partition and preventing data races or tampering risks during pointer block updates. Subsequently, the system switching module reads the pointer block currently stored in the boot information partition (which now points to the backup system) and modifies its contents.

[0091] Specifically, the physical address offset of the original pointer to the backup system's programmable gate array (PGA) image is replaced with the precise physical address of the master system's PGA image in non-volatile memory. Simultaneously, the valid bit corresponding to the backup system is set to "invalid," while the valid bit corresponding to the master system is switched to "valid," ensuring the uniqueness and accuracy of the pointer block. Once the updated data is ready, the system switching module writes the new pointer block to the original storage location in the boot information partition, overwriting the pointer block originally pointed to by the backup system.

[0092] Subsequently, the programmable gate array (PGA) reinitializes its communication interface with the non-volatile memory, accesses the boot information partition according to the fixed address, and reads the updated pointer block. The pointer block is then verified, checking if the valid bit corresponding to the main system is "valid," confirming that the pointer block is currently a valid pointer block. Based on the physical address and data length of the main system PGA image recorded in the pointer block, the PGA locates the partition in the non-volatile memory that stores the main system PGA image. Through a dedicated configuration interface, it writes the PGA image frame by frame into its configuration storage unit according to a preset timing sequence, completing the reconstruction and initialization of the hardware logic and restoring the core resources required by the main system, such as hardware acceleration modules, data forwarding channels, and interrupt control logic.

[0093] After the hardware logic configuration is complete, the programmable gate array (PLA) uses the master system identifier information implicit in the pointer block to consult the partition table in non-volatile memory, retrieves the partition entry corresponding to the master system, and extracts key information such as the storage address, length, and access permissions of the master system bootloader (first bootloader) recorded in that entry. Subsequently, the PPLA's memory controller accurately reads the master system bootloader from non-volatile memory according to this information, loads it into its embedded block, completes the bootloader integrity verification, sets the program counter to the bootloader entry address, and transfers system control. The bootloader loads the master system operating system image according to a preset process, completing kernel initialization, driver loading, and other startup steps.

[0094] After the main system boots up, the operating system, based on the preset root file system path parameters and the device identifier of the embedded memory and the physical address of the user data partition, mounts the partition to the designated directory of the main system using a standard mount protocol. During the mounting process, user data and system runtime files updated during the backup system's operation are automatically synchronized, and data consistency checks are performed to ensure that the main system reads the latest and complete data.

[0095] At the same time, configure partition access permissions consistent with the backup system to ensure that the main system's applications and services can seamlessly access, read and write these shared resources, achieve seamless connection of business data after the main system is restored, and ensure that there is no data loss or business interruption during the entire switchover process.

[0096] Figure 3 A structural diagram of a smart network interface card according to another embodiment of the present invention is shown.

[0097] like Figure 3The diagram illustrates the storage layout of the non-volatile memory and embedded memory in a smart network interface card (NIC) and the collaborative logic between them. On the non-volatile memory side, various core data resources required for the operation of the smart NIC are centrally located. Among them, the boot information partition stores the basic navigation information required for the boot process, and the factory image, as the initial hardware configuration image pre-programmed when the NIC leaves the factory, together with the independent partition tables of the main system and the backup system, constitute the basis for system booting.

[0098] These partition tables record detailed layout information such as the physical address, data length, and access permissions of each storage module in the corresponding system. Meanwhile, pointer blocks for both the primary and backup systems specify the exact storage location of the corresponding system's programmable gate array image in memory.

[0099] The non-volatile memory also stores the programmable gate array (PGA) images and the first bootloader for both the primary and backup systems. The PGA image is used to reconstruct the hardware logic of the corresponding system during startup, while the first bootloader serves as the initial execution code for the system startup process. Furthermore, the second bootloaders for both the primary and backup systems, as subsequent execution components of the first bootloader, are also stored here, as is the complete operating system image of the primary system.

[0100] On the embedded memory side, there is an operating system image for the backup system, which is associated with the backup system's second bootloader stored in non-volatile memory. This second bootloader is responsible for locating and loading the image. The embedded memory also includes a user data partition. This storage area, shared by the primary and backup systems, is effectively connected to the relevant runtime data of the primary and backup systems in the non-volatile memory. This enables both systems to access and reuse shared user data and system runtime files, thus ensuring seamless data transfer during system switchover.

[0101] Figure 4 A structural diagram of a smart network interface card according to another embodiment of the present invention is shown.

[0102] like Figure 4 As shown, this architecture is in Figure 3 Optimizations have been made to further improve system performance and storage management efficiency. In this architecture, non-volatile memory continues to carry core basic data such as boot information partitions, factory images, primary and backup system partition tables and pointer blocks, programmable gate array images, first boot program, and second boot program.

[0103] In addition to user data partitions, the embedded memory also stores the operating system images of the primary and backup systems. The second bootloader of the primary system in the non-volatile memory associates and loads the operating system image of the primary system in the embedded memory, and the second bootloader of the backup system similarly associates and loads the operating system image of the backup system in the embedded memory.

[0104] Since embedded memory typically offers faster read / write speeds than non-volatile memory, deploying both the primary and backup operating system images on embedded memory can significantly improve image loading efficiency during system startup, effectively reducing startup time. Simultaneously, non-volatile memory can free up more storage space to better serve the storage needs of core data such as startup information and programmable gate array (FPGA) images, alleviating their storage pressure.

[0105] Furthermore, storing the operating system images of the primary and backup systems in the embedded memory makes the storage location more organized, which facilitates the unified management, updating and calling of the operating system images in the future. This further improves the smoothness and timeliness of the primary and backup system switching process, and enhances the overall efficiency and stability of the dual-system operation of the smart network card.

[0106] Figure 5 A flowchart of an operating system switching method according to an embodiment of the present invention is shown.

[0107] like Figure 5 As shown, this embodiment includes operations S510 to S530.

[0108] When operating the S510, if a failure is detected in the main system of the smart network interface card, the backup system's programmable gate array (PGA) image is configured onto the PGA by running the backup system's boot program stored in non-volatile memory.

[0109] When operating the S520, the processor is provided with an operating system image of the backup system stored in the operating system partition of the embedded memory.

[0110] When operating the S530, the user data and system runtime files shared by the primary and backup systems are stored in the user data partition of the embedded memory to start the backup system.

[0111] When an unrecoverable anomaly is detected in the main system, such as a hardware failure (e.g., programmable gate array logic malfunction, processor interface failure), system crash, core process termination, or service execution timeout, the operating system switchover process is triggered. At this point, the system-on-a-chip (SoC) first starts an initialization program to complete the basic configuration of its own hardware resources, and then automatically loads the backup system bootloader stored in a designated area of ​​non-volatile memory. This bootloader is pre-compiled and optimized to adapt to the hardware architecture of the smart network interface card (NIC), and its startup priority is higher than that of the main system's related programs.

[0112] After the bootloader runs, it performs an integrity check on the PGR image of the backup system stored in non-volatile memory. Once the check passes, the bootloader writes the PGR image of the backup system into the configuration register of the PGR through the configuration interface inside the system-on-a-chip, thus completing the logical function reconfiguration of the PGR and adapting it to the hardware driver requirements and business processing logic of the backup system.

[0113] As the programmable gate array (FPGA) configuration is complete, the bootloader instructs the processor to access the embedded memory, which has been pre-partitioned with a separate operating system partition. The backup system's operating system image (including the kernel, drivers, system services, and other complete components) is pre-stored in this partition. Following the bootloader's instructions, the processor reads the backup system's operating system image from the embedded memory's operating system partition and loads it into its own memory space, completing the initialization of the operating system kernel and the startup of basic services.

[0114] During this process, the embedded memory is also divided into an independent user data partition. The user data partition is pre-configured as a shared storage area between the main system and the backup system. It stores user configuration information, business data files, and general system runtime files (such as general driver libraries, configuration scripts, etc.) generated during the operation of the main system. This partition adopts a file system format compatible with both systems.

[0115] Once the standby system's operating system kernel is initialized, the user data partition is identified and mounted using a preset file system mounting protocol. The user data and system runtime files within it are then integrated into the standby system's file directory structure. This ensures that the standby system can directly access existing user configurations and business data, allowing it to continue the primary system's business processes without reconfiguration. Ultimately, this completes the standby system's startup, enabling seamless switching between the primary and standby systems and ensuring the service continuity of the smart network interface card.

[0116] By running the backup system bootloader when the primary system fails, the backup system's programmable gate array (PLG) image is configured onto the PPG, and the backup system's operating system image, along with shared user data and system runtime files, is provided. This enables rapid switching between the primary and backup systems in the smart network interface card (NIC), improving system reliability and fault tolerance, and ensuring the continuity and stability of network communication.

[0117] According to an embodiment of the present invention, the boot program includes a first boot program and a second boot program; running the boot program of the backup system stored in non-volatile memory includes: running the first boot program of the backup system to load the programmable gate array image of the backup system for hardware resource initialization, and loading the second boot program of the backup system according to a pre-configured offset address parameter; running the second boot program of the backup system to read the boot instructions in the backup system environment variables stored in the non-volatile memory; and loading the operating system image of the backup system from the operating system partition of the embedded memory according to the boot instructions.

[0118] The bootloader consists of a first bootloader and a second bootloader that work together. Both are pre-stored in independent and designated storage areas in the non-volatile memory of the smart network card, ensuring that they can be quickly accessed by the system-on-a-chip at startup.

[0119] When the primary system fails and triggers the switchover process, the system-on-a-chip (SoC) first calls and runs the backup system's first bootloader in non-volatile memory. After the first bootloader starts, it prioritizes reading the backup system's programmable gate array (PLA) image stored in non-volatile memory. The PLA image is then written to the PLA via an internal configuration interface, completing the logic function reconfiguration and hardware resource initialization. This includes configuring the data bus between the PLA and the processor and memory, initializing hardware interrupt vectors, and activating critical peripheral interfaces, thus establishing a stable hardware foundation for subsequent system operation.

[0120] Simultaneously, the first bootloader calls an offset address parameter pre-stored in its own code. This offset address parameter is pre-configured to precisely point to the starting address of the second bootloader in non-volatile memory. Based on this offset address, the first bootloader locates the complete storage area of ​​the second bootloader and loads it into the designated memory buffer of the system-on-a-chip via a data read protocol, ensuring that the second bootloader can be executed normally by the processor.

[0121] After the first bootloader completes the above operations, it automatically transfers execution control, and the processor then runs the second bootloader of the loaded backup system. Upon startup, the second bootloader first accesses the preset backup system environment variable partition in non-volatile memory. This partition stores various configuration parameters and instructions required for the backup system to boot. By parsing the partition data, the second bootloader precisely extracts the boot instructions, including key information such as the operating system image's storage path, loading priority, and verification method.

[0122] Subsequently, the second bootloader locates the operating system partition of the embedded memory based on the extracted boot instructions. Following the reading rules and verification standards specified in the instructions, it reads the operating system image of the backup system from the partition and gradually loads the kernel, driver modules, system services, and other components from the operating system image into the processor's running memory, preparing for the complete boot of the backup system.

[0123] The phased boot process improves the flexibility and reliability of system startup, ensuring that the smart network card can quickly and accurately start the backup system in the event of a primary system failure.

[0124] Based on the above-described operating system switching method, the present invention also provides an operating system switching device. The following will be combined with... Figure 6 The device is described in detail.

[0125] Figure 6 A structural block diagram of an operating system switching device according to an embodiment of the present invention is shown.

[0126] like Figure 6 As shown, the operating system switching device 600 of this embodiment includes an image configuration module 610, an image provision module 620, and a data mounting module 630.

[0127] The mirror configuration module 610 is used to mirror the programmable gate array (PGA) of the backup system to the PGA when a failure is determined in the primary system of the smart network interface card (NIC), by running the boot program of the backup system stored in non-volatile memory. In one embodiment, the mirror configuration module 610 can be used to perform the operation S510 described above, which will not be repeated here.

[0128] The image providing module 620 is used to provide the processor with an operating system image of the backup system stored in the operating system partition of the embedded memory. In one embodiment, the image providing module 620 can be used to perform the operation S520 described above, which will not be repeated here.

[0129] The data mounting module 630 is used to mount user data and system runtime files shared by the primary and backup systems stored in the user data partition of the embedded memory, in order to start the backup system. In one embodiment, the data mounting module 630 can be used to perform the operation S530 described above, which will not be repeated here.

[0130] According to embodiments of the present invention, any plurality of modules among the mirror configuration module 610, mirror providing module 620, and data mounting module 630 may be combined into one module, or any one of these modules may be split into multiple modules. Alternatively, at least a portion of the functionality of one or more of these modules may be combined with at least a portion of the functionality of other modules and implemented in one module. According to embodiments of the present invention, at least one of the mirror configuration module 610, mirror providing module 620, and data mounting module 630 may be at least partially implemented as hardware circuitry, such as a field-programmable gate array (FPGA), a programmable logic array (PLA), a system-on-a-chip, a system-on-a-substrate, a system-on-package, an application-specific integrated circuit (ASIC), or any other reasonable means of integrating or packaging circuitry, or implemented in software, hardware, or firmware, or in any appropriate combination of any of these three implementation methods. Alternatively, at least one of the mirror configuration module 610, mirror providing module 620, and data mounting module 630 may be at least partially implemented as a computer program module, which, when run, can perform corresponding functions.

[0131] Figure 7 A block diagram of an electronic device suitable for implementing an operating system switching method according to an embodiment of the present invention is shown.

[0132] like Figure 7 As shown, the electronic device 700 according to an embodiment of the present invention includes a server and a smart network interface card (NIC) 712 installed on the server. The smart NIC 712 is configured with a system-on-a-chip (SoC), non-volatile memory, and embedded memory. The SoC integrates a programmable gate array (FPGA) and a dedicated processor. The server and the smart NIC 712 interact and transmit control signals through a hardware interface. The processor of the electronic device 700 is the core processing unit of the server. It can perform various appropriate actions and processes according to the program stored in the server's read-only memory (ROM) 702, or the program loaded from the server's storage portion 708 and the non-volatile memory of the smart NIC 712 into the random access memory (RAM) 703. The processor may include, for example, a general-purpose microprocessor (e.g., a CPU), an instruction set processor, and / or a related chipset and / or a dedicated microprocessor (e.g., an application-specific integrated circuit (ASIC)). The processor may also include onboard memory for caching purposes. It can be a single processing unit performing different actions or multiple processing units working in concert. One of its core functions is to continuously monitor the operating status of the main system in the smart NIC 712.

[0133] The random access memory (RAM) 703 stores various programs and data required for the operation of the electronic device 700 (including the server and the smart network card 712). The server's processor, read-only memory (ROM) 702, and RAM 703 are interconnected via a bus 704. The bus 704 also establishes a connection with the system-on-a-chip of the smart network card 712 through an interface, enabling instruction transmission and data exchange between the server and the smart network card 712. The processor executes various operations of the operating system switching method according to embodiments of the present invention by executing programs in the read-only memory (ROM) 702, the random access memory (RAM) 703, or related programs stored in the non-volatile memory of the smart network card 712. Programs can also be stored in one or more storage media other than the aforementioned memories, and the processor can also complete corresponding operations by executing programs in these storage media.

[0134] According to an embodiment of the present invention, the electronic device 700 further includes an input / output (I / O) interface 705, which is connected to a bus 704, and the relevant control interface of the smart network card 712 also establishes communication with the I / O interface 705 in order to receive control commands issued by the server and feedback its own operating status. The electronic device 700 may also include one or more of the following components connected to the input / output (I / O) interface 705: an input section 706 including a keyboard, mouse, etc., for receiving user configuration operations on the server and smart network card 712; an output section 707 including a cathode ray tube (CRT), liquid crystal display (LCD), and speaker, for displaying information such as the operating status and fault alarms of the server and smart network card 712; a storage section 708 including a hard disk, for storing the server's system programs, business data, and backup data related to the smart network card 712; and a communication section 709, which uses the smart network card 712 as the core communication component, replacing traditional LAN cards, modems, etc., and performs communication processing through a network such as the Internet. The programmable gate array of the smart network card 712 undertakes hardware acceleration tasks such as data forwarding and protocol processing, ensuring efficient and stable communication. The drive 710 may also be connected as needed to the input / output (I / O) interface 705, removable media 711, such as a disk, optical disk, magneto-optical disk, semiconductor memory, etc., which may be installed on the drive 710 as needed so that computer programs read from them may be installed into the non-volatile memory of the storage section 708 or the smart network card 712 as needed.

[0135] The present invention also provides a computer-readable storage medium, which may be included in the electronic device 700 (including a server and a smart network card 712) described in the above embodiments, such as the server's read-only memory (ROM) 702, random access memory (RAM) 703, storage portion 708, or the smart network card 712's non-volatile memory or embedded memory; or it may be a separate storage medium not assembled into the electronic device 700. The aforementioned computer-readable storage medium carries one or more programs, which, when executed, implement the operating system switching method according to the embodiments of the present invention, namely, the complete process of the server monitoring the main system operating status of the smart network card 712, sending switching instructions, and the smart network card 712 starting the backup system.

[0136] According to embodiments of the present invention, the computer-readable storage medium may be a non-volatile computer-readable storage medium, such as including but not limited to: portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof, particularly including the non-volatile memory of the smart network card 712, which is specifically used to store key data such as the programmable gate array image of the primary and backup systems, boot programs, and environment variables. In the present invention, the computer-readable storage medium may be any tangible medium containing or storing a program that can be used or combined with the server's processor, the processor execution system of the smart network card 712, apparatus, or device to implement the corresponding operating system switching function. For example, according to embodiments of the present invention, the computer-readable storage medium may include the server read-only memory (ROM) and / or random access memory (RAM) described above, the non-volatile memory and / or embedded memory of the smart network card 712, and one or more other related memories.

[0137] Embodiments of the present invention also include a computer program product comprising a computer program containing program code for performing the methods shown in the flowchart. When the computer program product is run on a computer system, the program code is used to enable the computer system to implement the operating system switching method provided in the embodiments of the present invention.

[0138] When the computer program is executed by a processor, it performs the functions defined in the system / apparatus of this invention. According to embodiments of the invention, the systems, apparatuses, modules, units, etc., described above can be implemented by computer program modules.

[0139] In one embodiment, the computer program may rely on a tangible storage medium such as an optical storage device or a magnetic storage device. In another embodiment, the computer program may also be transmitted and distributed in the form of signals over a network medium, and may be downloaded and installed via the communication section 709, and / or installed from a removable medium 711. The program code contained in the computer program can be transmitted using any suitable network medium, including but not limited to: wireless, wired, etc., or any suitable combination thereof.

[0140] In such an embodiment, the computer program can be downloaded and installed from a network via communication section 709, and / or installed from removable medium 711. When the computer program is executed by a processor, it performs the functions defined in the system of this embodiment of the invention. According to embodiments of the invention, the systems, devices, apparatuses, modules, units, etc., described above can be implemented by computer program modules.

[0141] According to embodiments of the present invention, program code for executing the computer programs provided in the embodiments of the present invention can be written in any combination of one or more programming languages. Specifically, these computational programs can be implemented using high-level procedural and / or object-oriented programming languages, and / or assembly / machine languages. Programming languages ​​include, but are not limited to, languages ​​such as Java, C++, Python, "C", or similar programming languages. The program code can be executed entirely on the user's computing device, partially on the user's device, partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0142] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in a block diagram or flowchart, and combinations of blocks in a block diagram or flowchart, may be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0143] Those skilled in the art will understand that the features described in the various embodiments of the present invention can be combined and / or combined in various ways, even if such combinations or combinations are not explicitly described in the present invention. In particular, the features described in the various embodiments of the present invention can be combined and / or combined in various ways without departing from the spirit and teachings of the present invention. All such combinations and / or combinations fall within the scope of the present invention.

[0144] The embodiments of the present invention have been described above. However, these embodiments are merely illustrative and not intended to limit the scope of the invention. Although various embodiments have been described above, this does not mean that the measures in the various embodiments cannot be used advantageously in combination. Various substitutions and modifications can be made by those skilled in the art without departing from the scope of the invention, and all such substitutions and modifications should fall within the scope of the invention.

Claims

1. A smart network interface card (NIC), characterized in that, include: The smart network interface card (NIC) is equipped with a system-on-a-chip (SoC), a non-volatile memory, and an embedded memory. The SoC integrates a programmable gate array (PGA) and a processor. The non-volatile memory is divided into multiple partitions for storing programmable gate array images and boot programs of the main system and backup system in the smart network card; The embedded memory is divided into an operating system partition and a user data partition. The operating system partition is used to store the operating system image of the backup system, and the user data partition is used to store user data and system runtime files shared by the main system and the backup system. The smart network card is configured to, in the event that the main system fails, control the processor to run the boot program of the backup system through the system switching module in the programmable gate array, so as to configure the programmable gate array image of the backup system onto the programmable gate array, load the operating system image of the backup system onto the processor, and simultaneously mount the user data and the system runtime files to start the backup system. The bootloader includes a first bootloader and a second bootloader; the first bootloader is configured to: load the corresponding programmable gate array image to initialize hardware resources, and load the corresponding second bootloader; The second bootloader of the backup system is configured to: prepare root file system path parameters before loading the operating system image of the backup system from the operating system partition of the embedded memory; when loading the operating system image of the backup system from the operating system partition of the embedded memory, package the root file system path parameters in a format agreed upon with the operating system kernel of the backup system, and write them into a pre-allocated shared memory area in the embedded memory that is accessible when the operating system kernel starts; and before the operating system image of the backup system is loaded and the operating system kernel starts initializing, pass a parameter ready signal to the operating system kernel of the backup system so that the operating system kernel reads the root file system path parameters from the shared memory area. The operating system of the backup system is configured to mount the user data partition according to the root file system path parameters to mount the shared user data and the system runtime files.

2. The smart network interface card according to claim 1, characterized in that, The first bootloader is configured with an offset address parameter of a second bootloader corresponding to the first bootloader in the non-volatile memory; The first bootloader is configured to: load the corresponding programmable gate array image for hardware resource initialization, and load the corresponding second bootloader according to the offset address parameter.

3. The smart network interface card according to claim 2, characterized in that, The non-volatile memory is further divided into an environment variable partition for storing primary system environment variables and backup system environment variables, wherein: The second bootloader of the main system is configured to read the device address and partition information in the main system environment variables in order to load the operating system image of the main system from the non-volatile memory; The second bootloader of the backup system is configured to read the boot instructions in the backup system environment variables to load the operating system image of the backup system from the operating system partition of the embedded memory.

4. The smart network interface card according to claim 1, characterized in that, The programmable gate array is also configured to: When the smart network card is started, the currently valid pointer block is obtained by reading the startup information partition stored in the non-volatile memory, wherein the pointer block is used to indicate the programmable gate array image of the system to be started; According to the pointer block, the partition table corresponding to the system to be booted in the non-volatile memory is consulted to locate the boot program of the system to be booted and run the boot program.

5. The smart network interface card according to claim 4, characterized in that, The system switching module is configured as follows: If a failure is determined in the primary system, the pointer block in the non-volatile memory is updated so that the pointer block points to the programmable gate array image of the backup system; The programmable gate array is configured to: locate the programmable gate array image of the backup system and the corresponding boot program based on the updated pointer block, so as to start the backup system.

6. The smart network interface card according to claim 5, characterized in that, The smart network interface card is also configured to: Once it is determined that the main system fault repair is complete, the pointer block in the non-volatile memory is updated so that the pointer block points back to the programmable gate array image of the main system; The programmable gate array is configured to: locate the programmable gate array image of the main system and the corresponding boot program based on the updated pointer block, and start the main system. After the main system starts up, the user data partition in the embedded memory is mounted to mount the user data and system runtime files that have been updated during the operation of the backup system.

7. An operating system switching method, characterized in that, Applied to smart network interface cards (NICs), the smart NIC includes a system-on-a-chip (SoC), non-volatile memory, and embedded memory. The SoC integrates a programmable gate array (FPGA) and a processor. The method includes: If the main system of the smart network card fails, the backup system's programmable gate array image is configured onto the programmable gate array by running the backup system's boot program stored in the non-volatile memory. The boot program includes a first boot program and a second boot program. The first boot program is used to load the corresponding programmable gate array image to initialize hardware resources and load the corresponding second boot program. The processor is provided with an operating system image of the backup system stored in the operating system partition of the embedded memory; The user data and system runtime files shared by the primary system and the backup system, stored in the user data partition of the embedded memory, are mounted to start the backup system; The method further includes: preparing root file system path parameters before loading the operating system image of the backup system from the operating system partition of the embedded memory; when loading the operating system image of the backup system from the operating system partition of the embedded memory, packaging the root file system path parameters in a format agreed upon with the operating system kernel of the backup system, and writing them into a pre-allocated shared memory area in the embedded memory that is accessible when the operating system kernel starts; and before the operating system image of the backup system is loaded and the operating system kernel starts and initializes, passing a parameter ready signal to the operating system kernel of the backup system so that the operating system kernel reads the root file system path parameters from the shared memory area. Based on the root file system path parameters, the user data partition is mounted to mount the shared user data and the system runtime files.

8. The method according to claim 7, characterized in that, The boot program includes a first boot program and a second boot program; The process of running the boot program for the backup system stored in the non-volatile memory includes: The first bootloader of the backup system is run to load the programmable gate array image of the backup system for hardware resource initialization, and the second bootloader of the backup system is loaded according to the pre-configured offset address parameters. Run the second bootloader of the backup system to read the startup instructions from the backup system environment variables stored in the non-volatile memory; According to the boot instruction, the operating system image of the backup system is loaded from the operating system partition of the embedded memory.

9. An electronic device, characterized in that, include: The server, and the smart network interface card as described in any one of claims 1 to 6, wherein the smart network interface card is installed in the server; The server is configured to monitor the operating status of the main system in the smart network interface card (NIC) and, if it is determined that the main system has failed, send a system switch command to the smart NIC so that the smart NIC can start the backup system.

Images