Circuit knowledge graph library construction and application method, electronic equipment and storage medium

Abstract

The invention discloses a circuit knowledge graph library construction and application method, electronic equipment and a storage medium. The circuit knowledge graph library construction method comprises the following steps: carrying out semantic function module extraction on an original electronic circuit drawing uploaded to electronic equipment; performing standardization processing on the extracted function module to obtain a standardized function module template; and constructing a circuit knowledge graph library by taking the standardized functional module template as a basic storage unit. The invention provides a brand-new data processing mode with a reusable functional module as a core, circuit knowledge is precipitated into reusable functional module knowledge units by performing semantic and modular disassembly and standardized reconstruction on electronic circuit drawings, and on the basis, the reusable functional module knowledge units are obtained. A modularized cross-equipment-model circuit knowledge graph database is constructed, and finally, cross-equipment-model circuit comparative analysis capability is provided for maintenance personnel, and powerful support is provided for intelligent fault reasoning when the maintenance personnel face brand-new unknown equipment.

Description

Technical Field

[0001] This invention relates to the field of electronic repair technology, and in particular to a method for constructing and applying a circuit knowledge graph database, an electronic device, and a storage medium. Background Technology

[0002] The electronics repair industry has long faced two major pain points: First, information lag and insufficient coverage: When a new model of electronic device (such as a mobile phone) is launched, its official repair drawings and data often take a long time to become available, or may never be available at all. This results in the repair industry being in an information vacuum for a long time when facing new equipment, leading to a low repair success rate.

[0003] Second, knowledge silos prevent the transfer of experience: Existing repair data and experience are organized and stored on a per-device basis (e.g., a phone model A from a certain company). However, different brands and models of equipment often use the same or similar core chips and functional modules (e.g., the same power management chip from the same company). Due to limitations in data organization, the valuable repair experience accumulated by repair personnel regarding a particular chip on a "model A" device is difficult to apply effectively and systematically to troubleshooting related faults on "model B" devices, resulting in a significant waste of knowledge.

[0004] Therefore, the industry urgently needs a new technical solution that can break down the barriers of "complete machine model" and realize the modular accumulation of circuit knowledge, cross-device reuse, and intelligent reasoning. Summary of the Invention

[0005] In view of this, the present invention provides a method for constructing and applying a circuit knowledge graph library, an electronic device, and a storage medium to solve the problems of low repair success rate caused by information lag and insufficient coverage in the existing electronic repair industry, as well as knowledge silos and knowledge waste caused by the inability to transfer experience.

[0006] To address the aforementioned technical problems, the first aspect of this invention provides the following technical solution: a method for constructing a circuit knowledge graph library, applied to electronic devices, wherein the method for constructing the circuit knowledge graph library includes: Semantic functional module extraction is performed on the original electronic circuit diagrams uploaded to electronic devices; The extracted functional modules are standardized to obtain standardized functional module templates. A circuit knowledge graph library is constructed by using standardized functional module templates as basic storage units.

[0007] Optionally, the extraction of semantically generated functional modules from the original electronic circuit diagram uploaded to the electronic device includes: The circuit semantic parsing engine is invoked to perform semantic parsing on the original electronic circuit diagram uploaded to the electronic device to obtain identifiable circuit semantic information, which includes complete topology and component information. Based on the circuit semantic information and the knowledge model of electronics industry experts, functional modules are extracted from the original electronic circuit drawings.

[0008] Optionally, the step of extracting functional modules from the original electronic circuit diagram based on the circuit semantic information and the knowledge model of electronics industry experts includes: By utilizing knowledge models from electronics industry experts, the core chips on the original electronic circuit diagrams can be automatically identified. Based on the circuit semantic information, the peripheral components and networks centered on the identified core chip are automatically parsed from the original electronic circuit diagram to form a functional module.

[0009] Optionally, based on the circuit semantic information, the peripheral components and networks centered on the identified core chip are automatically parsed from the original electronic circuit diagram to form a functional module, including: Using the identified core chip as the center, execute a boundary expansion algorithm; The boundary expansion algorithm continuously acquires peripheral components directly associated with the identified core chip by following the complete topological structure in the circuit semantic information. When the boundary expansion algorithm encounters a preset stopping condition, the process of acquiring peripheral components directly associated with the identified core chip stops. The identified core chip and all acquired peripheral components and networks constitute an unprocessed functional module.

[0010] Optionally, the preset stopping conditions include: when the boundary expansion algorithm traverses a network node whose attribute is identified as a power or ground network, it determines it as a boundary and stops expansion; when the algorithm traverses a series resistor, inductor, or fuse element, it is considered a continuation of the path and expansion continues.

[0011] Optionally, the standardization process for the extracted functional modules to obtain standardized functional module templates includes: Based on a globally unified standardized naming system, the extracted functional modules are reassigned standardized names. Standardize the functional modules that have been renamed to standardized names, and generate standardized functional module templates.

[0012] Optionally, the standardized naming system is based on a unique functional location hash ID generated from the connection position of the element in the topology.

[0013] Optionally, the standardization process for the functional modules that have been re-assigned standardized names, to generate standardized functional module templates, includes: The following standardization process is applied to the functional modules that have been re-assigned standardized names to generate standardized functional module templates: the absolute coordinates of the functional modules in the original electronic circuit drawings are discarded, and only their internal relative topology and standardized names are retained to generate standardized functional module templates.

[0014] Optionally, the method for constructing the circuit knowledge graph database further includes: acquiring an expert knowledge and maintenance case database, and associating the functional modules and their fault phenomena in the expert knowledge and maintenance case database with the corresponding functional module templates in the circuit knowledge graph database.

[0015] Accordingly, a second aspect of the present invention provides the following technical solution: a method for applying a circuit knowledge graph library to an electronic device, the method comprising: In the front-end user interface of an electronic device, a circuit knowledge graph library is used to perform comparative analysis and / or fault reasoning on electronic circuits, wherein the circuit knowledge graph library is obtained by the circuit knowledge graph library construction method according to any one of claims 1 to 7; The analysis results and / or fault reasoning results returned by the circuit knowledge graph library are visualized in the front-end user interface of the electronic device.

[0016] Optionally, the application circuit knowledge graph library performs comparative analysis on electronic circuits, including: obtaining module instances with the same functional module templates in two different devices; comparing the component parameters and topology of the two module instances based on standardized names; identifying the common parts, parameter differences, and structural differences between the two module instances, and displaying them in different visualization styles in the front-end user interface.

[0017] Optionally, the application circuit knowledge graph library performs fault reasoning on electronic circuits, including: receiving known chip models and fault phenomena input by the user; querying historical repair cases by associating expert knowledge and repair case library in the circuit knowledge graph library; statistically analyzing the frequency of fault causes, generating a fault point detection list containing probability or priority, and displaying it in the front-end user interface in combination with circuit fragments of corresponding functional module templates.

[0018] Accordingly, the third aspect of the present invention provides the following technical solution: an electronic device, comprising: a memory, a processor, and a computer program stored in the memory and running on the processor, wherein when the computer program is executed by the processor, it implements the steps of the circuit knowledge graph library construction method described in the first aspect of the present invention and / or implements the steps of the circuit knowledge graph library application method described in the second aspect of the present invention.

[0019] Accordingly, the fourth aspect of the present invention provides the following technical solution: a storage medium storing a program for constructing a circuit knowledge graph library and / or applying a circuit knowledge graph library, wherein when the program for constructing a circuit knowledge graph library and / or applying a circuit knowledge graph library is executed by a processor, it implements the steps of the circuit knowledge graph library construction method described in the first aspect of the present invention and / or implements the steps of the circuit knowledge graph library application method described in the second aspect of the present invention.

[0020] Compared with related technologies, this invention proposes a method for constructing and applying a circuit knowledge graph library, an electronic device, and a storage medium. The method involves extracting semantically relevant functional modules from the original electronic circuit diagrams uploaded to the electronic device; standardizing the extracted functional modules to obtain standardized functional module templates; and using these standardized templates as basic storage units to construct a circuit knowledge graph library. This invention proposes a novel data processing model centered on reusable functional modules. By semantically deconstructing, modularizing, and standardizing massive amounts of electronic circuit diagrams of different models, circuit knowledge is precipitated into reusable functional module knowledge units. Based on these units, a vast, linkable, modular, cross-device model circuit knowledge graph library is constructed. Ultimately, this provides maintenance personnel with cross-device model circuit comparison and analysis capabilities, as well as powerful support for intelligent fault reasoning when facing new and unknown equipment. This will completely change the existing closed and outdated data organization model centered on the whole machine model, and solve the problems of low repair success rate caused by information lag and insufficient coverage in the current electronic repair industry, as well as knowledge silos and waste of knowledge due to the inability to transfer experience. Attached Figure Description

[0021] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0022] Figure 1A flowchart illustrating a method for constructing a circuit knowledge graph library provided by the present invention; Figure 2 A flowchart illustrating step SA1 in a circuit knowledge graph library construction method provided by the present invention; Figure 3 A flowchart illustrating step SA2 in a circuit knowledge graph library construction method provided by the present invention; Figure 4 A flowchart illustrating a circuit knowledge graph database application method provided by the present invention; Figure 5 This is a schematic diagram of the structure of an electronic device provided by the present invention. Detailed Implementation

[0023] To make the technical problems, solutions, and beneficial effects of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0024] In the following description, the use of suffixes such as "module," "part," or "unit" to denote elements is solely for the purpose of illustrative purposes and has no specific meaning in itself. Therefore, "module," "part," or "unit" may be used interchangeably.

[0025] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0026] In one embodiment, such as Figure 1 As shown, this invention provides a method for constructing a circuit knowledge graph library, applied to electronic devices. The method includes: SA1. Extract semantic functional modules from the original electronic circuit diagrams uploaded to the electronic device; SA2. Standardize the extracted functional modules to obtain standardized functional module templates; SA3. Using standardized functional module templates as basic storage units, construct a circuit knowledge graph library with standardized functional module templates as basic storage units.

[0027] This embodiment provides a method for constructing a circuit knowledge graph library. It involves extracting semantically relevant functional modules from original electronic circuit diagrams uploaded to electronic devices; standardizing these extracted functional modules to obtain standardized functional module templates; and using these standardized functional module templates as basic storage units to construct a circuit knowledge graph library. This invention proposes a novel data processing model centered on reusable functional modules. By semantically deconstructing and standardizing massive amounts of electronic circuit diagrams of different models, circuit knowledge is precipitated into reusable functional module knowledge units. Based on these units, a vast, linkable, modular, cross-device model circuit knowledge graph library is constructed. Ultimately, this provides repair personnel with cross-device model circuit comparison and analysis capabilities, as well as powerful support for intelligent fault reasoning when facing new and unknown devices. This fundamentally changes the existing closed and lagging data organization model centered on the entire device model, solving the problems of low repair success rates due to information lag and insufficient coverage in the current electronic repair industry, as well as knowledge silos and the waste of knowledge due to the inability to transfer experience.

[0028] In one embodiment, in step SA1, semantic functional modules are extracted from the original electronic circuit diagram uploaded to the electronic device.

[0029] Specifically, the original electronic circuit drawings include original Electronic Design Automation (EDA) design files or high-resolution scanned drawings of electronic circuits.

[0030] The aforementioned original electronic circuit diagrams can come from electronic circuit diagrams of different brands and models of equipment, achieving diversity and a massive amount of original electronic circuit diagram source files.

[0031] like Figure 2 As shown, in step SA1, semantic functional module extraction is performed on the original electronic circuit diagram uploaded to the electronic device, including: SA11 invokes the circuit semantic parsing engine to perform semantic parsing on the original electronic circuit diagram uploaded to the electronic device, and obtains identifiable circuit semantic information, which includes the complete topology and component information.

[0032] Specifically, the circuit semantic parsing engine is invoked to parse the geometric and connection information in the original electronic circuit diagram uploaded to the electronic device, obtaining identifiable circuit semantic information, which includes the complete topology and component information. In other words, the circuit semantic parsing engine parses the original electronic circuit diagram uploaded to the electronic device into a machine-readable internal data format containing the complete topology and component information.

[0033] SA12. Based on the circuit semantic information and the knowledge model of electronics industry experts, extract the functional modules from the original electronic circuit drawings.

[0034] SA121: Utilizes an expert knowledge model in the electronics industry to automatically identify all core chips on the original electronic circuit diagram.

[0035] Specifically, by utilizing an expert knowledge model in the electronics industry, the system automatically identifies several core chips on the original electronic circuit diagram and marks them with boxes on the diagram. For example, the system uses an expert knowledge model in the electronics industry to automatically identify (e.g., by component size, number of pins, or keywords in the name) and locate all the core chips on the original electronic circuit diagram, and marks all the identified core chips with boxes on the diagram.

[0036] The electronics industry expert knowledge model is developed by electronics engineers who, leveraging their extensive industry knowledge and experience, manually annotate and define the boundaries of several functional modules on original electronic circuit diagrams using specialized background annotation tools. These boundaries are then trained on a large-scale knowledge model. Electronic engineers can analyze electronic circuit diagrams from different brands and models of equipment. The more original electronic circuit diagrams an analysis, the more accurate the inference of the electronics industry expert knowledge model becomes, and the more powerful the circuit knowledge graph becomes. By utilizing the prior knowledge of human experts based on the electronics industry expert knowledge model, several core chips are automatically identified and annotated on the original electronic circuit diagrams, solving the industry-wide challenge of automatically recognizing circuit semantics and ensuring the accuracy and functional integrity of core chip identification.

[0037] SA122. Based on the circuit semantic information, the peripheral components and networks centered on the identified core chip are automatically parsed from the original electronic circuit diagram to form a functional module.

[0038] Specifically, after automatically identifying several core chips on the original electronic circuit diagram, based on the circuit semantic information, all peripheral components, pads, and their internal network connections (i.e., internal topology) centered on the identified core chip are automatically parsed from the original electronic circuit diagram. All the automatically parsed components, pads, and their internal network connections (i.e., internal topology) centered on the identified core chip, along with the core chip, constitute a functional module.

[0039] If there are multiple core chips on the original electronic circuit diagram, repeat step SA122 to form a functional module by combining all peripheral components, pads and their internal network connections (i.e., internal topology) related to each core chip.

[0040] For example, on the original electronic circuit diagram, the PM8350 power management chip is automatically identified and selected using an electronic industry expert knowledge model. Then, based on the circuit semantic information, the "PM8350 standard power supply unit," which consists of all the necessary peripheral filter capacitors and energy storage inductors centered on the PM8350 power management chip, is automatically parsed from the original electronic circuit diagram. The PM8350 standard power supply unit is a functional module that is marked and defined on the original electronic circuit diagram.

[0041] Furthermore, in step SA122, based on circuit semantic information, the peripheral components and networks centered on the identified core chip are automatically parsed from the original electronic circuit diagram to form a functional module. This can be achieved using the following specific methods: Centered on the identified core chip, a boundary expansion algorithm is executed. This algorithm continuously acquires peripheral components (such as capacitors, resistors, and inductors) directly associated with the identified core chip by following the complete topology (i.e., the network connections of the electronic circuit) in the circuit semantic information. When the boundary expansion algorithm encounters a preset stopping condition, the process of acquiring peripheral components directly associated with the identified core chip stops. At this point, the identified core chip and all acquired peripheral components and networks constitute an unprocessed original functional module.

[0042] The preset stopping conditions include: when the boundary expansion algorithm traverses to another component defined as a core chip, or when the network node attribute is identified as a power / ground network (VCC / GND), the expansion is stopped; when it traverses to a series resistor, inductor, or fuse component, it is considered a continuation of the path and the expansion continues. For example, when the network node attribute is identified as a power / ground network (VCC / GND), the expansion stops; but when traversing a series resistor / inductor, the expansion continues until the next level chip pin. Specifically, the boundary expansion algorithm includes intelligent stopping logic based on circuit attributes: when the network node attribute traversed by the algorithm is identified as a global power rail (VCC / GND), it is determined to be a common boundary, and the expansion of that branch stops; while when the algorithm traverses passive series components such as series resistors, common-mode inductors, or fuses, it is considered a continuation of the signal or power supply path, and the expansion continues through the component until the next level active chip pin is traversed.

[0043] By leveraging the prior knowledge of human experts and based on an expert knowledge model in the electronics industry, several core chips are automatically identified and marked on the original electronic circuit diagram. Then, based on the circuit semantic information, the peripheral components and networks centered on the identified core chips are automatically parsed from the original electronic circuit diagram. The core chips and their peripheral components and networks constitute a functional module, solving the industry problem of automatic machine recognition of circuit semantics, ensuring the accuracy of functional module boundary division and functional integrity, and realizing the extraction of semantic functional modules.

[0044] In one embodiment, such as Figure 3 As shown, in step SA2, the extracted functional modules are standardized to obtain standardized functional module templates, specifically including: SA21. Based on the globally unified standardized naming system, reassign standardized names to the extracted functional modules.

[0045] Specifically, a standardized naming system for component reference numbers and nets is established, independent of any original blueprints and globally unified. This standardized naming system uses a unique hash algorithm based on the topology, naming components according to their connection positions within the topology. That is, a unique functional location hash ID is generated based on the component's connection position in the topology, and this ID serves as the component's standardized name. Thus, when a new functional module is extracted and stored in the circuit knowledge graph library, all components and nets within that functional module will be reassigned standard names under this unified standardized naming system.

[0046] Standardized naming is reassigned, employing an automated hash naming logic based on topology. For example, for peripheral components, the system obtains the core chip pin number (Pin_N) to which it is connected and the network attribute (such as GND) at the other end, and generates a unique identifier (such as C_PinN_GND) through a hash algorithm, thereby achieving automatic alignment of components with the same function in different drawings without relying on the original tag number.

[0047] For example, a capacitor connected between pin N (Pin_N) of a chip and ground (GND) automatically generates a unique standardized name C_PinN_GND.

[0048] For example, component C8215 on the original electronic circuit drawing is renamed C_PWR_FILTER_01 according to its function and the globally unified standardized naming system, thereby achieving complete decoupling of component C8215 from the original drawing.

[0049] SA22. Standardize the functional modules that have been re-given standardized names to generate standardized functional module templates.

[0050] Specifically, the functional modules that have been reassigned standardized names undergo the following standardization process to generate standardized functional module templates: The absolute coordinates of the functional module in the original electronic circuit diagram are discarded, retaining only its internal relative topology and standardized naming, thus generating a standardized functional module template. In this way, based on a globally unified standardized naming system, the extracted functional modules are standardized to obtain a reusable, standardized functional module template that is completely decoupled from the original electronic circuit diagram.

[0051] For example, the PM8350 power supply unit extracted from the original electronic circuit diagrams of either Company A or Company B, after being stored in the circuit knowledge graph library, has the following standardized names in a globally unified naming system: its core chip is U_MAIN_PWR, its main power supply input capacitor is C_MAIN_IN_01, and its connection network is NET_VCC_MAIN. In this way, a reusable, standardized functional module template that is completely decoupled from specific device models is obtained.

[0052] In this embodiment, by establishing a globally unified standardized naming system, the extracted functional modules are standardized according to the globally unified standardized naming system to generate standardized functional module templates, thereby realizing the standardization and normalization of functional modules and obtaining a reusable and standardized functional module template that is completely decoupled from the original electronic circuit diagram.

[0053] In one embodiment, in step SA3, a circuit knowledge graph library with standardized functional module templates as basic storage units is constructed using standardized functional module templates as basic storage units.

[0054] Specifically, standardized functional module templates are used as basic storage units to construct a circuit knowledge graph library. This circuit knowledge graph library is a hierarchical knowledge graph with a layered structure, including a bottom layer and a top layer. The bottom layer is a module knowledge database, storing tens of thousands of standardized functional module templates generated through step SA2. The top layer is a complete device assembly database, describing the specific combination methods for each device model; that is, how a device model is assembled from one or more functional module templates in the bottom module knowledge database through specific connection relationships.

[0055] In this way, when a new functional module is extracted, and the extracted functional module is standardized, it will be stored in the circuit knowledge graph library with standardized functional module templates as the basic storage units.

[0056] In this embodiment, a circuit knowledge graph library is constructed using standardized functional module templates as basic storage units. In this way, the original electronic circuit diagram of a complete device model is deconstructed into instances linked and assembled from multiple functional module templates. This loosely coupled architecture makes the maintenance, updating, and expansion of the circuit knowledge graph library extremely flexible and efficient. Furthermore, it completely breaks down the knowledge silos based on the entire device model in existing technologies, accumulating electronic circuit repair knowledge into standardized functional module templates that can be reused across devices. This achieves exponential growth and migration of knowledge, thereby breaking down information barriers and enabling knowledge reuse. This invention constructs a powerful circuit knowledge graph library through the core process of "identification -> standardization -> hierarchical storage," ultimately supporting two intelligent applications: comparative analysis and fault reasoning.

[0057] In one embodiment, the method for constructing the circuit knowledge graph database further includes: SA4, acquiring an expert knowledge and maintenance case library, and associating the functional modules and their fault phenomena in the expert knowledge and maintenance case library with the corresponding functional module templates in the circuit knowledge graph database, thereby realizing the association between the circuit knowledge graph database and the expert knowledge and maintenance case library. The expert knowledge and maintenance case library contains a large amount of structured "fault phenomenon-root cause" case data, which can inject key data sources of wisdom into the circuit knowledge graph database.

[0058] Based on the same concept, in one embodiment, such as Figure 4 As shown, this invention provides a method for applying a circuit knowledge graph database to electronic devices. This method includes: SB1. In the front-end user interface of an electronic device, a circuit knowledge graph library is used to perform comparative analysis and / or fault reasoning on electronic circuits, wherein the circuit knowledge graph library is obtained by the circuit knowledge graph library construction method described in any of the above embodiments; SB2. Visualize the analysis results and / or fault reasoning results returned by the circuit knowledge graph database in the front-end user interface of the electronic device.

[0059] This embodiment provides a method for applying a circuit knowledge graph library. By using the circuit knowledge graph library in the front-end user interface of an electronic device to perform comparative analysis and / or fault reasoning on electronic circuits, the library is constructed using standardized functional module templates as basic storage units. The analysis results and / or fault reasoning results returned by the circuit knowledge graph library are presented in the front-end user interface of the electronic device. This allows for fault reasoning on electronic circuits even without complete electronic circuit diagrams, providing strong scientific guidance for the repair of new equipment. It solves the biggest problem in the repair industry: information lag, enabling the repair of unknown equipment and addressing industry pain points. Simultaneously, the circuit knowledge graph library can also be used for cross-device comparative analysis of electronic circuits, providing experienced engineers and technical learners with an unprecedented in-depth perspective. This allows for a more macro-level understanding of the design philosophies and technological evolution of different manufacturers, providing in-depth insights and creating new value. This addresses the problems of low repair success rates due to information lag and insufficient coverage in the existing electronic repair industry, as well as knowledge silos and the waste of knowledge due to the inability to transfer experience.

[0060] Furthermore, in step SB1, in the front-end user interface of the electronic device, a circuit knowledge graph library is applied to perform comparative analysis and / or fault reasoning on the electronic circuit, wherein the circuit knowledge graph library is constructed from standardized functional module templates as basic storage units.

[0061] Specifically, the front-end user interface of an electronic device is a unified interactive user interface that provides users with an operating interface for comparative analysis and fault reasoning.

[0062] The construction process of the circuit knowledge graph library can refer to the circuit knowledge graph library construction method described in any of the above embodiments, and will not be repeated here.

[0063] To facilitate understanding of the above-mentioned inventive concept of the present invention, the inventive concept of the circuit knowledge graph library application method of the present invention will be described in more detail below with reference to specific embodiments.

[0064] Application Example 1: Cross-device modular comparative analysis.

[0065] A method for applying a circuit knowledge graph database to cross-device modular comparative analysis includes: SC1. In the front-end user interface of the electronic device, select the two cross-device module instances to be compared (e.g., "PM8350 power supply unit of a certain model from Company A" and "PM8350 power supply unit of a certain model from Company B").

[0066] After receiving the request, the SC2 electronic device backend system retrieves the data of the two module instances from the circuit knowledge graph database of the two companies mentioned above. Since both modules follow the unified standardized naming system established in step SA21 above in the circuit knowledge graph database, the electronic device backend can compare all components and topologies with the same standardized names in these two modules one by one.

[0067] SC3. Use a differential comparison algorithm to perform differential comparison of component parameters and topology of two modules: The core of the differential comparison algorithm is to find similarities and retain differences. The differential comparison algorithm includes an equivalence tolerance judgment mechanism: The system sets a preset tolerance threshold (e.g., ±10%); when comparing parameters, if the parameter difference of corresponding components in the two modules is within the preset tolerance threshold, the system determines that the parameters are the same and does not highlight the difference; if the parameter difference of corresponding components in the two modules exceeds the preset tolerance threshold, the system determines that the parameters are different and highlights the difference, thereby avoiding invalid redundant alarms.

[0068] Specifically: For components with identical standardized names and topologies, they are labeled as identical parts; For components with the same standardized name but different component parameters (such as capacitor capacity), they are marked as parameter differences; for example, if model A has a 10uF capacitor and model B has a 13uF capacitor, and the tolerance exceeds the preset tolerance threshold, it is determined to be a parameter difference and highlighted. For components or topologies that exist in one module but not in another module, they are marked as structural differences.

[0069] SC4. Visualize the analysis results returned by the circuit knowledge graph library on the front-end user interface of the electronic device. The rendering engine of the electronic device will highlight the similarities and differences between the two side-by-side electronic circuit diagrams using different visualization styles (e.g., color highlighting, gray for similarities, yellow for parameter differences, and red for structural differences), and add expert comments from the circuit knowledge graph library on "why this design is possible" or "what impact different designs will have".

[0070] In this embodiment, by applying a circuit knowledge graph library to conduct cross-device modular comparative analysis, an unprecedented in-depth insight perspective is provided for senior engineers and technology learners. This allows them to understand the design philosophies and technological evolution of different manufacturers from a more macro perspective, thereby providing in-depth insights and creating new value.

[0071] Application Example 2: Intelligent Fault Reasoning on Unknown Devices.

[0072] A method for applying a circuit knowledge graph database to intelligent fault reasoning on unknown devices includes: SD1. In the front-end user interface of the electronic device, select the "Intelligent Inference" module to receive the known information input by the user. The known information includes the known chip model and fault symptoms, such as "Chip Model: PM8350" and "Fault Symptom: Cannot be powered on".

[0073] SD2, the electronic equipment backend system uses known information as keywords to search for historical repair cases in the circuit knowledge graph database by associating it with expert knowledge and the repair case database.

[0074] SD3. Using inference algorithms for fault reasoning: First, locate all historical "no power" fault cases related to "PM8350"; Then, statistical analysis and frequency ranking were performed on the root causes (faulty parts) recorded in these cases; Inference algorithms assign higher weights to fault points that come from more reliable sources or have been validated by more cases.

[0075] SD4: Calculate the frequency of fault causes, generate a fault point detection list containing probability or priority, and display it in the front-end user interface in combination with the circuit fragments of the corresponding functional module templates.

[0076] Instead of returning a definitive answer, the circuit knowledge graph database generates a "smart testing guide" based on probability and priority. This guide, presented as a list, tells the user: "[80% probability] Please prioritize checking if C_MAIN_IN_01 (main input capacitor) is short-circuited," and "[15% probability] Next, please check if L_BUCK_03 (step-down inductor) has a cold solder joint..." The guide also includes images of the electronic circuit diagrams for these "high-risk" components from standardized functional module templates in the knowledge graph database. Even without complete schematics of the unknown device, users can refer to this "standard design" for testing.

[0077] In this embodiment, by applying a circuit knowledge graph library to perform fault reasoning on unknown devices, it is possible to perform fault reasoning on electronic circuits even without complete electronic circuit diagrams. This provides strong scientific guidance for the maintenance of new equipment, solves the biggest problem of information lag in the maintenance industry, empowers the maintenance of unknown equipment, and addresses industry pain points.

[0078] Furthermore, embodiments of the present invention also provide an electronic device, such as... Figure 5 The diagram shown is a structural schematic of an electronic device provided in an embodiment of this application. Figure 5 As shown, the electronic device 300 can be a computer, mobile phone, tablet computer, interactive flat panel, etc. The electronic device 300 may include: at least one processor 310, at least one memory 320, at least one communication bus 360, and one or more computer programs stored in the memory 320 and executable on the processor 310. The memory 320 and the processor 310 are coupled together through the communication bus 360. When the one or more computer programs are executed by the processor 310, they implement the circuit knowledge graph library construction method and / or circuit knowledge graph library application method provided in the embodiments of the present invention.

[0079] The electronic device 300 may also include: at least one display 330, at least one network interface 340, and a user interface 350.

[0080] The communication bus 360 is used to enable communication between these components.

[0081] The user interface 350 may include a display screen and a camera; the user interface 350 may also include standard wired and wireless interfaces.

[0082] The network interface 340 may optionally include a standard wired interface and a wireless interface (such as a Wi-Fi interface).

[0083] The processor 310 may include one or more processing cores. The processor 310 connects to various parts within the electronic device 300 using various interfaces and lines, and performs various functions and processes data by running or executing instructions, programs, code sets, or instruction sets stored in the memory 320, and by calling data stored in the memory 320. Optionally, the processor 310 may be implemented using at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), or Programmable Logic Array (PLA). The processor 310 may integrate one or a combination of several of the following: Central Processing Unit (CPU), Graphics Processing Unit (GPU), and modem. The CPU primarily handles the operating system, user interface, and applications; the GPU is responsible for rendering and drawing the content required for display; and the modem handles wireless communication. It is understood that the modem may also be implemented as a separate chip without being integrated into the processor 310.

[0084] The memory 320 may include random access memory (RAM) or read-only memory. Optionally, the memory 320 may include a non-transitory computer-readable storage medium. The memory 320 may be used to store instructions, programs, code, code sets, or instruction sets. The memory 320 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for at least one function, instructions for implementing the various method embodiments described above, etc.; the data storage area may store data involved in the various method embodiments described above, etc. Optionally, the memory 320 may also be at least one storage device located remotely from the aforementioned processor 310.

[0085] It should be noted that the above-described electronic device embodiments and method embodiments belong to the same concept. For details of their implementation process, please refer to the method embodiments. Furthermore, the technical features in the method embodiments are all applicable to the electronic device embodiments, and will not be repeated here.

[0086] In addition, in an exemplary embodiment, this invention also provides a computer storage medium, specifically a computer-readable storage medium, such as a memory 320 storing computer programs. The computer storage medium stores one or more programs for a circuit knowledge graph library construction method and / or a circuit knowledge graph library application method. When the processor 310 executes the one or more programs for the circuit knowledge graph library construction method and / or the circuit knowledge graph library application method, it implements the circuit knowledge graph library construction method and / or the circuit knowledge graph library application method provided by this invention. The execution process can be referred to the description shown in the above method embodiments, and will not be repeated here. The device containing the storage medium can be an electronic device such as a personal computer, laptop computer, smartphone, or tablet computer.

[0087] It should be noted that the above-mentioned method for constructing and / or applying a circuit knowledge graph library on a computer-readable storage medium is based on the same concept as the method embodiment. The specific implementation process is detailed in the method embodiment, and the technical features in the method embodiment are also applicable to the above-mentioned computer-readable storage medium embodiment, which will not be repeated here.

[0088] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0089] The sequence numbers of the above embodiments of the present invention are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0090] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) and includes several instructions to cause a terminal (which may be a mobile phone, computer, server, air conditioner, or network device, etc.) to execute the methods described in the various embodiments of the present invention.

[0091] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims. All of these forms are within the protection scope of the present invention.

Claims

1. A method for constructing a circuit knowledge graph library, characterized in that, The application is applied to an electronic device, and a circuit knowledge graph library construction method comprises the following steps: extracting a functional module from an original electronic circuit drawing uploaded to the electronic device; standardizing the extracted functional module to obtain a standardized functional module template; using the standardized functional module template as a basic storage unit to construct a circuit knowledge graph library. 2.The circuit knowledge graph library construction method of claim 1, wherein, The functional module extraction from the original electronic circuit drawing uploaded to the electronic device comprises the following steps: calling a circuit semantic analysis engine to perform semantic analysis on the original electronic circuit drawing uploaded to the electronic device to obtain circuit semantic information available for recognition, wherein the circuit semantic information comprises complete topology structure and element information; extracting a functional module from the original electronic circuit drawing according to the circuit semantic information and an electronic industry expert knowledge model. 3.The circuit knowledge graph library construction method of claim 2, wherein, The functional module extraction from the original electronic circuit drawing according to the circuit semantic information and the electronic industry expert knowledge model comprises the following steps: automatically recognizing a core chip on the original electronic circuit drawing by using the electronic industry expert knowledge model; automatically analyzing peripheral elements and networks centered on the recognized core chip on the original electronic circuit drawing according to the circuit semantic information to form a functional module. 4.The circuit knowledge graph library construction method of claim 3, wherein, The automatic analysis of the peripheral elements and networks centered on the recognized core chip on the original electronic circuit drawing according to the circuit semantic information to form a functional module comprises the following steps: executing a boundary expansion algorithm centered on the recognized core chip; The boundary expansion algorithm continuously obtains peripheral elements directly associated with the recognized core chip along the complete topology structure in the circuit semantic information; When the boundary expansion algorithm encounters a preset stop condition, the process of obtaining the peripheral elements directly associated with the recognized core chip is stopped, and the recognized core chip and all obtained peripheral elements and networks form an untreated functional module. 5.The circuit knowledge graph library construction method of claim 4, wherein, The preset stop condition comprises: when the boundary expansion algorithm traverses a network node attribute identified as a power supply or ground network, the boundary is determined and the expansion is stopped; when the algorithm traverses a series resistor, inductor or fuse element, the expansion is continued as a path continuation. 6.The circuit knowledge graph library construction method of claim 1, wherein, The standardized processing of the functional module to obtain a standardized functional module template comprises the following steps: reassigning a standardized name to the extracted functional module according to a globally unified standardized naming system; standardizing the functional module to which the standardized name is reassigned to generate a standardized functional module template. 7.The circuit knowledge graph library construction method of claim 6, wherein, The standardized naming system is a unique functional position hash ID generated based on the connection position of an element in a topology structure. 8.The circuit knowledge graph library construction method of claim 6, wherein, The standardized processing of the functional module to which the standardized name is reassigned to generate a standardized functional module template comprises the following steps: standardizing the functional module to which the standardized name is reassigned to generate a standardized functional module template by discarding the absolute coordinates of the functional module in the original electronic circuit drawing and only retaining the internal relative topology structure and standardized name to generate a standardized functional module template. 9.The circuit knowledge graph library construction method of claim 1, wherein, The circuit knowledge graph library construction method further comprises: obtaining expert knowledge and a maintenance case library, and associating the function modules and fault phenomena in the expert knowledge and the maintenance case library with corresponding function module templates in the circuit knowledge graph library.

10. A circuit knowledge graph library application method, characterized in that, The circuit knowledge graph library application method is applied to an electronic device. In a front-end user interface of the electronic device, the circuit knowledge graph library is applied to comparative analysis and / or fault reasoning of the electronic circuit, wherein the circuit knowledge graph library is obtained by the circuit knowledge graph library construction method in any one of claims 1 to 7. The analysis result and / or fault reasoning result returned by the circuit knowledge graph library is visualized and presented in the front-end user interface of the electronic device.

11. The circuit knowledge graph library application method of claim 10, wherein, The comparative analysis of the electronic circuit by the circuit knowledge graph library comprises: obtaining module instances with the same function module templates in two different devices; comparing element parameters and topological structures in the two module instances based on standardized names; identifying the same parts, parameter difference parts and structure difference parts between the two module instances, and displaying the same parts, parameter difference parts and structure difference parts in different visual styles in the front-end user interface.

12. The circuit knowledge graph library application method of claim 10, wherein, The fault reasoning of the electronic circuit by the circuit knowledge graph library comprises: receiving a known chip model and a fault phenomenon input by a user; querying historical maintenance cases in the circuit knowledge graph library by associating the expert knowledge and the maintenance case library; counting the frequency of fault causes to generate a fault point detection list containing probabilities or priorities, and combining the circuit fragments of the corresponding function module templates to display in the front-end user interface.

13. An electronic device, comprising: The circuit knowledge graph library construction method comprises: A memory, a processor and a computer program stored in the memory and running on the processor, wherein the computer program is executed by the processor to implement the steps of the circuit knowledge graph library construction method in any one of claims 1 to 9, and / or implement the steps of the circuit knowledge graph library application method in any one of claims 8 to 10.

14. A storage medium, characterized by The storage medium stores a circuit knowledge graph library construction method and / or a circuit knowledge graph library application method program, and the circuit knowledge graph library construction method and / or the circuit knowledge graph library application method program is executed by the processor to implement the steps of the circuit knowledge graph library construction method in any one of claims 1 to 9, and / or implement the steps of the circuit knowledge graph library application method in any one of claims 8 to 10.

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