Post-power-loss state maintaining circuit and method and direct current charging controller
Patent Information
- Application Number
- CN202511778712.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-28
- Publication Date
- 2026-02-27
AI Technical Summary
[0004]直流充电控制器用于执行指令并且记录保存充电桩内各模块的工作状态数据,以及在充电时车载设备的状态信息等;当交流供电突然切换相或是供电端子松动时,可能会因为开关电源模块断电而导致直流充电控制器意外掉电,进而引发直流充电控制器记录的各类型数据、文件等断电丢失,严重威胁充电桩的稳定运行
(1)本发明通过降压电路的失电检测功能,判断开关电源模块的电压输出情况,当检测到失电信号后,通过直流充电控制器使能电源开关电路打开,将法拉电容中存储的能量释放出来,并在外围搭建均衡稳压电路,均衡法拉电容的充电电压与电流,通过电压调节电路、恒流控制电路,输出给直流充电控制器(MCU)外围系统稳定的电压电流,维持MCU外围系统稳定运行一定的既定时间,该运行时间可以在两分钟以内裁减,在此期间MCU记录桩内数据与车载设备交互信息。
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Figure CN121584849A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of electric vehicle charging, in particular to a power loss state maintenance circuit, method and DC charging controller. BACKGROUND
[0002] The statements in this section merely provide background information related to the present application and do not necessarily constitute the prior art.
[0003] In recent years, DC charging piles have become the main equipment of public charging networks; the relevant standards of electric vehicle conductive charging systems have clear requirements for the control function of DC charging piles, i.e. a switching power supply module is required inside the DC charging pile to convert single-phase AC 220V into 24V or 12V, etc. for use by modules such as DC charging controllers inside the pile.
[0004] The DC charging controller is used to execute instructions and record and save the working state data of each module in the charging pile, as well as the state information of the on-board equipment during charging; when the AC power supply suddenly switches phases or the power supply terminals are loose, the DC charging controller may be unexpectedly powered off due to the power failure of the switching power supply module, thereby causing the power loss of various types of data and files recorded by the DC charging controller, which seriously threatens the stable operation of the charging pile.
[0005] To solve such problems, the existing solutions mostly use button cells for power failure retention, but this is not conducive to repeated use, and it is inconvenient to replace them once the power is consumed. The power failure retention design using a farad capacitor improves the rate of repeated use, but the energy utilization rate is low and constant current control cannot be achieved. SUMMARY
[0006] To solve the above problems, the present application proposes a power loss state maintenance circuit, method and DC charging controller, which can effectively save and record the data and files inside the pile when the switching power supply module is powered off, while saving resources and costs of the DC charging controller.
[0007] In some embodiments, the following technical solutions are adopted: A power loss state maintenance circuit, comprising: an input protection circuit, a step-down circuit, a unidirectional conduction circuit, a farad capacitor, a power switch circuit and a voltage regulation circuit connected in sequence; wherein the farad capacitor is connected to an equalization voltage stabilization circuit for equalizing the energy during charging of the farad capacitor; and the voltage regulation circuit is connected to a constant current control circuit for outputting stable voltage and current; The step-down circuit can determine the input voltage and send a power failure signal to the DC charging controller when the external power supply is interrupted. After receiving the power failure signal, the DC charging controller enables the power switch circuit to open and release the energy stored in the supercapacitor. The released energy is then used by the voltage regulation circuit and the constant current control circuit to provide a stable voltage and current to the peripheral system of the DC charging controller, so that the DC charging controller can save the working status data of the charging pile.
[0008] As a further embodiment, the input protection circuit is connected to the switching power supply module and includes a fuse F1, a Schottky diode D9, and a Schottky diode D10 connected in series. One end of the transient suppression voltage transformer D8 is connected between the fuse F1 and the Schottky diode D9, and the other end is grounded.
[0009] As a further embodiment, the step-down circuit includes: a step-down chip U1, the input terminal of which is connected to a capacitor to smooth the ripple of the input voltage; the output terminal of the step-down chip U1 is connected to ground after being connected to a series branch of resistors R2, R4 and R5, and a capacitor C4 is connected in parallel across the two ends of the series branch; the output indicator terminal of the step-down chip U1 is connected to a pull-up resistor R3 to detect the output voltage status. When power is lost, the output indicator terminal outputs a low level, which is transmitted to the detection pin of the DC charging controller.
[0010] As a further embodiment, the unidirectional conduction circuit includes: a unidirectional conduction rectifier circuit and a unidirectional conduction current limiting circuit respectively connected to the output terminal of the step-down circuit; the unidirectional conduction rectifier circuit includes a Schottky diode D1 for rectifying and conducting and preventing current backflow; the unidirectional conduction current limiting circuit includes a Schottky diode D2 and a resistor R7 connected in series for limiting the charging and discharging current of the farad capacitor.
[0011] As a further embodiment, the equalizing voltage regulator circuit includes: a voltage regulator chip; the input terminal of the supercapacitor is connected to the reference voltage terminal of the voltage regulator chip via a voltage divider resistor; the input terminal of the supercapacitor is also connected to the gate of MOSFET Q1 and the voltage input terminal of the voltage regulator chip via a current-limiting resistor; the drain of MOSFET Q1 is connected to the input terminal of the supercapacitor; and the source of MOSFET Q1 is connected to ground via a current-limiting resistor. When the supercapacitor is charged, if the charging voltage is higher than the voltage regulation value input to the voltage regulator chip via the voltage divider resistor, the MOSFET is turned on to release the energy in the supercapacitor.
[0012] As a further embodiment, the power switch circuit includes: a switch chip U2, the enable terminal of the switch chip U2 is connected to the DC charging controller through an enable resistor R9, so that after the DC charging controller receives the power failure signal output by the buck circuit, the energy release switch chip opens and releases the energy stored in the supercapacitor; the output terminal of the switch chip U2 is connected to the voltage regulation circuit, and at the same time, the output terminal of the switch chip U2 is connected to the clamping diode D3 and the output filter capacitor C8 respectively and then grounded.
[0013] As a further embodiment, the voltage regulation circuit includes: two voltage output units connected in parallel, one of which includes: a buck-boost chip U8; the output of the power switch circuit is connected to the input terminal of the buck-boost chip U8 after passing through capacitors C12, C13, C14 and C38 connected in parallel; the output of the buck-boost chip is grounded after being connected to a voltage divider resistor; the output terminal of the buck-boost chip is also connected to the constant current control circuit after being connected in parallel with capacitors C37, C9, C10, C11 and resistor R32. The other voltage output unit includes a buck-boost chip U9. The output of the power switch circuit is connected to the input terminal of the buck-boost chip U9 after passing through capacitors C19, C20, C21, and C40 connected in parallel. The output of the buck-boost chip is grounded after being connected to a voltage divider resistor. The output terminal of the buck-boost chip is also connected to the constant current control circuit after being connected in parallel with capacitors C39, C16, C17, C18, and resistor R25. An inductor L1 is connected between the inductor terminals L1 and L2 of the buck-boost chip U9. The inductor L1 is connected in sequence to capacitor C23, clamping diode D6, holding capacitor C24, current limiting resistor R18, Zener diode D7, filter capacitor C25, and load resistor R19 to output +5V to power USB communication and maintain operation for a period of time after power failure.
[0014] As a further embodiment, the constant current control circuit includes: a constant current control unit connected to each voltage output unit, wherein the constant current control unit includes: an operational amplifier chip, the non-inverting input terminal of the operational amplifier chip is connected to the voltage regulating current output terminal via a current limiting resistor, and the inverting input terminal is connected to a voltage regulator chip via a current limiting resistor and a voltage divider resistor; a parallel branch of a feedback resistor and a feedback capacitor is connected in series between the inverting input terminal and the output terminal of the operational amplifier chip; the output terminal of the operational amplifier chip is connected in series with a rectifier diode D11 and a current limiting resistor R31 and then connected to the FB terminal of a buck-boost chip.
[0015] In other embodiments, the following technical solutions are adopted: A method for operating a power failure state maintenance circuit includes: the voltage output by the switching power supply module is current-limited and then converted into a suitable voltage by a step-down circuit; the voltage is then used to charge a supercapacitor through a unidirectional conduction circuit; during the charging process, a voltage equalization and regulation circuit is used to ensure that the charging voltage of the supercapacitor remains stable; and simultaneously, the step-down circuit outputs a power failure detection signal to the DC charging controller. Upon receiving a power failure signal, the DC charging controller enables the power switch circuit to open, releasing the energy stored in the supercapacitor. The released energy then passes through the voltage regulation circuit and the constant current control circuit to provide a stable voltage or current to the peripheral system of the DC charging controller, enabling the DC charging controller to save the working status data of the charging pile.
[0016] In other embodiments, the following technical solutions are adopted: A DC charging controller, characterized in that it includes: the above-mentioned power failure state maintenance circuit.
[0017] Compared with the prior art, the beneficial effects of the present invention are: (1) The present invention uses the power failure detection function of the step-down circuit to determine the voltage output status of the switching power supply module. When a power failure signal is detected, the power switch circuit of the DC charging controller is turned on to release the energy stored in the supercapacitor. An equalization voltage regulation circuit is built on the periphery to equalize the charging voltage and current of the supercapacitor. Through the voltage regulation circuit and the constant current control circuit, a stable voltage and current are output to the DC charging controller (MCU) peripheral system to maintain the stable operation of the MCU peripheral system for a certain predetermined time. This operation time can be reduced within two minutes. During this period, the MCU records the data in the pile and the interactive information of the vehicle equipment.
[0018] This invention, through the coordinated operation of power failure signal detection, supercapacitors, equalizing voltage regulator circuits, voltage regulation circuits, and constant current control circuits, can provide temporary power to the MCU peripheral system in the event of an unexpected power failure of the switching power supply, ensuring the reliable preservation of critical data and facilitating subsequent fault analysis. This circuit offers better cost-effectiveness than existing solutions, with low-cost components and minimal resource consumption on the circuit board and MCU.
[0019] Other features and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description
[0020] Figure 1 This is a schematic diagram of the circuit for maintaining the state after power loss in an embodiment of the present invention; Figure 2 This is a schematic diagram of the circuit structure for maintaining the state after power loss in an embodiment of the present invention; Figure 3 This is a schematic diagram of the input protection circuit structure in an embodiment of the present invention; Figure 4 This is a schematic diagram of the step-down circuit structure in an embodiment of the present invention; Figure 5 This is a schematic diagram of the equalization voltage regulator circuit structure in an embodiment of the present invention; Figure 6 This is a schematic diagram of the power switch circuit structure in an embodiment of the present invention; Figure 7 This is a schematic diagram of the voltage regulation circuit structure in an embodiment of the present invention; Figure 8 This is a schematic diagram of the constant current control circuit structure in an embodiment of the present invention. Detailed Implementation
[0021] It should be noted that the following detailed description is illustrative and intended to provide further explanation of the invention. Unless otherwise specified, all technical and scientific terms used in this invention have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains.
[0022] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of exemplary embodiments according to the invention. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Furthermore, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they indicate the presence of features, steps, operations, devices, components, and / or combinations thereof.
[0023] Example 1 In one or more embodiments, a power failure state maintenance circuit is disclosed, combined with Figure 1 Specifically, it includes: an input protection circuit, a step-down circuit, a unidirectional conduction circuit, a supercapacitor, a power switch circuit, and a voltage regulation circuit connected in sequence; wherein, the input protection circuit is connected to the output terminal of the switching power supply module; the supercapacitor is connected to the equalizing voltage regulator circuit, which is used to equalize the energy during the charging process of the supercapacitor; the voltage regulation circuit is connected to the constant current control circuit, which is used to output a stable voltage; and the constant current control circuit is used to output a stable current.
[0024] The output of the voltage regulation circuit is connected to the DC charging controller MCU peripheral system, communication circuit, input and output control circuit, battery voltage and current acquisition circuit, insulation detection circuit, temperature acquisition circuit, etc., to release the energy of the supercapacitor in the event of an unexpected power failure to provide temporary power to these circuits for a certain period of time, so as to ensure the effective recording of critical data.
[0025] In this embodiment, the step-down circuit can determine the input voltage and send a power failure signal to the DC charging controller when the external power supply is cut off. After receiving the power failure signal, the DC charging controller enables the power switch circuit to open and release the energy stored in the supercapacitor. The released energy is then used by the voltage regulation circuit and the constant current control circuit to provide a stable voltage or current to the peripheral system of the DC charging controller, so that the DC charging controller can save the working status data of the charging pile.
[0026] As a specific implementation method, the following is combined with Figure 2 The specific structure of each circuit is explained.
[0027] Combination Figure 3 The input protection circuit is connected to the switching power supply module and includes a fuse F1, a Schottky diode D9, and a Schottky diode D10 connected in series. One end of a transient voltage suppressor D8 is connected between the fuse F1 and the Schottky diode D9, and the other end is grounded. The input protection circuit is used to rectify and protect the input power supply voltage, preventing overvoltage, overcurrent, and reverse connection.
[0028] Combination Figure 4 The step-down circuit includes: a step-down chip U1, whose input terminals are connected to input filter capacitors C1 and C2 and decoupling capacitor C3. The input filter capacitors C1 and C2 are connected in parallel and then in series with the decoupling capacitor C3 to smooth the input voltage ripple; the output terminal of the step-down chip U1 is connected to ground after being connected to a series branch of resistors R2, R4 and R5, where resistors R4 and R5 are connected to the feedback pin FB to regulate and stabilize the output voltage, and capacitor C4 is connected in parallel across the two ends of the series branch; the PG pin of the step-down chip U1 is also connected to resistor R3 to detect power failure signals.
[0029] In this example, the step-down chip is EZ8603. Resistors R2, R4, and R5 are voltage divider feedback resistors, resistor R3 is a pull-up resistor, and capacitor C4 is the output filter capacitor. The output of the input protection circuit is filtered by capacitors C1, C2, and C3, and then outputs a stable 5V voltage via step-down chip U1, resistors R2, R3, R4, and capacitor C4. This voltage is then connected to the pull-up resistor R3 via the output indicator pin of step-down chip U1 to output a power failure detection signal. If the input power supply fails, this output indicator pin outputs a low level, which is transmitted to the detection pin of the DC charging controller.
[0030] The unidirectional conduction circuit includes: a unidirectional conduction rectifier circuit and a unidirectional conduction current limiting circuit, which are respectively connected to the output terminal of the step-down circuit; the unidirectional conduction rectifier circuit includes a Schottky diode D1, which is used to achieve rectification and conduction during normal power-on and prevent current backflow; the unidirectional conduction current limiting circuit includes a Schottky diode D2 and a resistor R7 connected in series, which limits the charging and discharging current of the subsequent supercapacitor through the resistor R7, and D2 prevents the backflow of the current stored in the supercapacitor.
[0031] The farad capacitor consists of capacitors C5, C6, and C7 connected in parallel for energy storage. Each capacitor can be a single capacitor or a combination of at least two capacitors connected in series. In this example, each capacitor is composed of two 7F capacitors connected in series, increasing the capacitor's voltage rating and thus providing a capacitor suitable for the circuit design in this example.
[0032] Combination Figure 5 The equalizing voltage regulator circuit is connected between the input and output of the supercapacitor and includes: a voltage regulator chip U5 (in this example, a TL431 is selected as the voltage regulator chip). The input terminal of the supercapacitor is connected to the reference voltage terminal of the voltage regulator chip through voltage divider resistor R20 and resistor R21. The input terminal of the supercapacitor is also connected to the gate of MOSFET Q1 and the voltage input terminal of voltage regulator chip U5 through current limiting resistor R22. The drain of MOSFET Q1 is connected to the input terminal of the supercapacitor, and the source of MOSFET Q1 is connected to ground after being connected to the current limiting resistor. When the supercapacitor is charged, if the charging voltage is higher than the voltage value input to the voltage regulator chip through the voltage divider resistor, the MOSFET is turned on to release the energy in the supercapacitor, thereby equalizing the energy during the charging of the supercapacitor.
[0033] Combination Figure 6 The power switch circuit includes: a switch chip U2 (in this example, the switch chip is SGM2593AD); the output current limiting terminal LIM of switch chip U2 is connected to ground via a series resistor R8; the enable terminal of switch chip U2 is connected to the DC charging controller via an enable resistor R9, so that the power-off switch chip opens after the DC charging controller receives the power failure signal output by the buck circuit, releasing the energy stored in the supercapacitor; the output terminal of switch chip U2 is connected to the voltage regulation circuit, and the output terminal of switch chip U2 is connected to the clamping diode D3 and the output filter capacitor C8 respectively, and then grounded, to release the energy in the supercapacitor.
[0034] Conventional power switching circuits mostly use MOSFETs or a combination of transistors and MOSFETs for control and conduction. However, this can lead to significant input-output discrepancies and a floating output terminal. In this example, when the output voltage exceeds the input voltage by 25mV, the output of the switching chip U2 is turned off to prevent current from flowing back from the output to the input. Furthermore, when the switching chip's output is off, energy is dissipated between the output terminal and ground through an output filter capacitor C8 to prevent the output terminal from floating. This ensures that the input and output remain consistent, and that no voltage or current is generated at the output terminal when it is off.
[0035] Combination Figure 7 The voltage regulation circuit includes: two voltage output units connected in parallel; One of the voltage output units includes: a buck-boost chip U8; the output of the power switch circuit is connected to the input terminal of the buck-boost chip U8 after passing through capacitors C12, C13, C14 and C38 connected in parallel; inductor L2 is connected between the inductor terminals L1 and L2 of the buck-boost chip U8; the output of the buck-boost chip U8 is connected to ground after passing through voltage divider resistors R12 and R13; capacitors C37, C9, C10 and C11 are also connected in parallel at the output terminal of the buck-boost chip to filter the output voltage, and then it is connected to the constant current control circuit through sampling resistor R32. The other voltage output unit includes a buck-boost chip U9. The circuit connection of buck-boost chip U9 is basically the same as that of buck-boost chip U8. The difference is that inductor L1 is connected between the connection inductor terminals L1 and L2 of buck-boost chip U9. Inductor L1 is connected in sequence to capacitor C23, clamping diode D6, holding capacitor C24, current limiting resistor R18, Zener diode D7, filter capacitor C25 and load resistor R19, which is used to output +5V to power USB communication and maintain operation for a period of time after power failure.
[0036] The input voltage first passes through a multi-capacitor parallel filter network (C19, C20, C21, C40, etc.) to filter out high-frequency noise and ripple, providing a stable input voltage for subsequent chips. After passing through chips U8 and U9, the internal PWM control at a fixed frequency (2.4MHz) drives the internal switching transistors to turn on and off, working in conjunction with inductors L1 and L2 to store and release energy, resulting in a stable output voltage. The output voltage is sampled through voltage divider resistors R16, R17, R12, and R13, and the signal is sent to the chip's FB pin. The chip internally compares the sampled voltage with a reference voltage and dynamically adjusts the switching transistor duty cycle through an error amplifier and PWM controller to ensure stable output voltage. The output voltage then passes through a capacitor filter network (C39, C16, C17, C18) to further filter out ripple during the conversion process, resulting in a smooth DC voltage. One of the output branches, U9, also passes through a charge pump circuit composed of diode D6, resistor R18, and Zener diode D7, ultimately outputting +5V and 3.3V; the other branch, U8, directly outputs 3.8V.
[0037] Combination Figure 8 The constant current control circuit includes: a constant current control unit connected to each voltage output unit, and the constant current control unit includes: an operational amplifier chip U11, the non-inverting input terminal of the operational amplifier chip U11 is connected to the voltage regulation current output terminal through a current limiting resistor, and the inverting input terminal is connected to the voltage regulator chip U10 through a current limiting resistor and a voltage divider resistor; a parallel branch of a feedback resistor and a feedback capacitor is connected in series between the inverting input terminal and the output terminal of the operational amplifier chip U11; the output terminal of the operational amplifier chip U11 is connected to the FB terminal of the buck-boost chip in series with a rectifier diode D11 and a current limiting resistor R31.
[0038] The output voltage signal passes through sampling resistors R25 and R32 and enters the non-inverting input terminals of operational amplifiers U11 and U13. Resistors R29 and R30, and R36 and R37 form negative feedback networks, configuring the op-amps as proportional amplifiers to amplify the input signal and stabilize the output. Capacitor C42 and resistor R39, and capacitor C43 and resistor R40 form RC filters to further filter out high-frequency noise in the signal, ensuring the stability of the input signal to the op-amps. U10 and U12 serve as precision reference sources and control cores, implementing constant current logic: pin 1 must maintain a 2.5V reference voltage. R26 and R27, and R33 and R34 form voltage divider networks to compare the op-amp output voltage with the reference voltage of the TL431. When the op-amp output voltage changes, the current at pin 2 adjusts accordingly, thereby controlling the load current and ultimately achieving constant current output.
[0039] The output of the voltage regulation circuit is connected to the constant current control circuit. The reference terminal of the voltage regulator chip U10 is connected in series with resistors R26, R27 and R28 to the inverting input terminal of the op-amp. The non-inverting input terminal of the op-amp is connected in series with the output terminal of the voltage regulation circuit with a sampling resistor R25. The inverting input terminal and the output terminal of the op-amp are connected in parallel with a resistor R39 and a capacitor C42. The output terminal of the op-amp and the feedback terminal of the voltage regulation circuit are connected with a diode D11 and a resistor R31, which are used to output constant current for the MCU peripheral system and other circuits.
[0040] The structure of the other constant current control unit is the same as the one described above.
[0041] Most existing constant current control circuits use passive components, which limits the operating frequency bandwidth, reduces load capacity, and causes unstable output. To meet design requirements, this example uses operational amplifiers (op-amps) to regulate and control the output voltage and current. This includes voltage regulator chips U10 and U12 (TL431), with resistor R28 connected between the chip reference terminal and the positive terminal of the voltage regulation circuit output. Op-amp chips U11 and U13 (LMV831 in this example) are also used. The current sampling resistors R25 and R32 are selected as 10 milliohms in this example to reduce losses. The output current value is limited under the regulation of this circuit. In this example, the constant current output is set to 1.5A. A voltage divider network of resistors R26, R27, R33, and R34 divides the 2.5V generated by the TL431 to obtain a 15mV reference value. The feedback resistor for the op-amp's gain is set to 200Ω. A capacitor is connected across the feedback resistor to introduce a pair of zeros and poles, reducing the op-amp loop bandwidth. The newly added op-amp element creates zeros and poles that are further away from the loop's crossover frequency, and the effects of the zeros and poles on gain / phase cancel each other out. Therefore, in this example, the circuit achieves constant voltage and current output, strong load capacity, and increased output loop stability.
[0042] The specific working principle of the power failure maintenance circuit in this embodiment is as follows: The voltage output from the switching power supply module is current-limited and then converted into a suitable voltage by the buck circuit. It then charges the supercapacitor through a unidirectional conduction circuit. During the charging process, the equalization voltage regulation circuit ensures that the charging voltage of the supercapacitor remains stable. At the same time, the buck circuit outputs a power failure detection signal to the DC charging controller. Upon receiving a power failure signal, the DC charging controller enables the power switch circuit to open, releasing the energy stored in the supercapacitor. The released energy then passes through the voltage regulation circuit and the constant current control circuit to provide a stable voltage or current to the peripheral system of the DC charging controller, enabling the DC charging controller to save the working status data of the charging pile.
[0043] Example 2 In one or more embodiments, a DC charging controller is disclosed, specifically including: a switching power supply module, a power failure state maintenance circuit as described in Embodiment 1, an MCU peripheral system, a communication circuit, an output control circuit, an input detection circuit, a battery voltage and current acquisition circuit, an insulation detection circuit, and a temperature and humidity acquisition circuit.
[0044] The switching power supply module converts single-phase 220V AC power to 12V to power the controller and other load modules within the charging pile. The MCU peripheral system is the core of the controller, responsible for recording and storing data and files, receiving and issuing execution commands. The communication circuit interacts with devices such as the vehicle-mounted BMS, the charging pile's meter, the IoT platform, card readers, and displays. The output control circuit controls output switching, power distribution, and discharge control. Input detection uses auxiliary contacts on external modules to detect their status. The battery voltage and current acquisition circuit collects the vehicle battery's voltage and current in real time to adjust the charging strategy. The insulation detection circuit pre-detects the resistance between the battery's positive and negative terminals and ground before actual switching. The temperature and humidity acquisition circuit collects the charging pile temperature, charging gun temperature, and humidity levels within the charging pile.
[0045] The power failure state maintenance circuit has been described in the above examples. The maintenance circuit in this controller can also achieve the aforementioned function, so it will not be described in detail here.
[0046] While the specific embodiments of the present invention have been described above in conjunction with the accompanying drawings, this is not intended to limit the scope of protection of the present invention. Those skilled in the art should understand that various modifications or variations that can be made by those skilled in the art without creative effort based on the technical solutions of the present invention are still within the scope of protection of the present invention.
Claims
1. A state maintenance circuit after power failure, characterized in that, include: The circuit consists of an input protection circuit, a step-down circuit, a unidirectional conduction circuit, a supercapacitor, a power switch circuit, and a voltage regulation circuit, connected in sequence. The supercapacitor is connected to a voltage equalization and regulation circuit to balance the energy during the charging process. The voltage regulation circuit is connected to a constant current control circuit to output a stable voltage and current. The step-down circuit can determine the input voltage and send a power failure signal to the DC charging controller when the external power supply is interrupted. After receiving the power failure signal, the DC charging controller enables the power switch circuit to open and release the energy stored in the supercapacitor. The released energy is then used by the voltage regulation circuit and the constant current control circuit to provide a stable voltage and current to the peripheral system of the DC charging controller, so that the DC charging controller can save the working status data of the charging pile.
2. The power failure state maintenance circuit as described in claim 1, characterized in that, The input protection circuit is connected to the switching power supply module and includes a fuse F1, a Schottky diode D9, and a Schottky diode D10 connected in series. One end of the transient suppression voltage transformer D8 is connected between the fuse F1 and the Schottky diode D9, and the other end is grounded.
3. The power failure state maintenance circuit as described in claim 1, characterized in that, The step-down circuit includes: a step-down chip U1, the input terminal of which is connected to a capacitor to smooth the ripple of the input voltage; the output terminal of the step-down chip U1 is connected to ground after being connected to a series branch of resistors R2, R4 and R5, and a capacitor C4 is connected in parallel across the two ends of the series branch; the output indicator terminal of the step-down chip U1 is connected to a pull-up resistor R3 to detect the output voltage status. When power is lost, the output indicator terminal outputs a low level, which is transmitted to the detection pin of the DC charging controller.
4. The power failure state maintenance circuit as described in claim 1, characterized in that, The unidirectional conduction circuit includes: a unidirectional conduction rectifier circuit and a unidirectional conduction current limiting circuit, which are respectively connected to the output terminal of the step-down circuit; the unidirectional conduction rectifier circuit includes a Schottky diode D1, which is used to realize rectification and conduction and prevent current backflow; the unidirectional conduction current limiting circuit includes a Schottky diode D2 and a resistor R7 connected in series, which are used to limit the charging and discharging current of the farad capacitor.
5. The power failure state maintenance circuit as described in claim 1, characterized in that, The equalizing voltage regulator circuit includes: a voltage regulator chip; the input terminal of the farad capacitor is connected to the reference voltage terminal of the voltage regulator chip through a voltage divider resistor; the input terminal of the farad capacitor is also connected to the gate of MOSFET Q1 and the voltage input terminal of the voltage regulator chip through a current limiting resistor; the drain of MOSFET Q1 is connected to the input terminal of the farad capacitor; and the source of MOSFET Q1 is connected to ground after being connected to a current limiting resistor. When the farad capacitor is charged, if the charging voltage is higher than the voltage value input to the voltage regulator chip through the voltage divider resistor, the MOSFET is turned on to release the energy in the farad capacitor.
6. The power failure state maintenance circuit as described in claim 1, characterized in that, The power switch circuit includes: a switch chip U2, the enable terminal of which is connected to a DC charging controller through an enable resistor R9, so that the energy release switch chip opens after the DC charging controller receives a power failure signal from the buck circuit, releasing the energy stored in the supercapacitor; the output terminal of the switch chip U2 is connected to a voltage regulation circuit, and the output terminal of the switch chip U2 is connected to a clamping diode D3 and an output filter capacitor C8 and then grounded.
7. The power failure state maintenance circuit as described in claim 1, characterized in that, The voltage regulation circuit includes two voltage output units connected in parallel. One voltage output unit includes a step-up / step-down chip U8. The output of the power switch circuit is connected to the input terminal of the step-up / step-down chip U8 after passing through capacitors C12, C13, C14, and C38 connected in parallel. The output of the step-up / step-down chip is grounded after being connected to a voltage divider resistor. The output terminal of the step-up / step-down chip is also connected to a constant current control circuit after being connected in parallel with capacitors C37, C9, C10, C11, and resistor R32. The other voltage output unit includes a buck-boost chip U9. The output of the power switch circuit is connected to the input terminal of the buck-boost chip U9 after passing through capacitors C19, C20, C21, and C40 connected in parallel. The output of the buck-boost chip is grounded after being connected to a voltage divider resistor. The output terminal of the buck-boost chip is also connected to the constant current control circuit after being connected in parallel with capacitors C39, C16, C17, C18, and resistor R25. An inductor L1 is connected between the inductor terminals L1 and L2 of the buck-boost chip U9. The inductor L1 is connected in sequence to capacitor C23, clamping diode D6, holding capacitor C24, current limiting resistor R18, Zener diode D7, filter capacitor C25, and load resistor R19 to output +5V to power USB communication and maintain operation for a period of time after power failure.
8. The power failure state maintenance circuit as described in claim 7, characterized in that, The constant current control circuit includes: a constant current control unit connected to each voltage output unit, the constant current control unit including: an operational amplifier chip, the non-inverting input terminal of the operational amplifier chip being connected to the voltage regulating current output terminal via a current limiting resistor, and the inverting input terminal being connected to a voltage regulator chip via a current limiting resistor and a voltage divider resistor; a parallel branch of a feedback resistor and a feedback capacitor being connected in series between the inverting input terminal and the output terminal of the operational amplifier chip; and the output terminal of the operational amplifier chip being connected in series with a rectifier diode D11 and a current limiting resistor R31 and then connected to the FB terminal of a buck-boost chip.
9. A method for operating a state maintenance circuit after power failure, characterized in that, include: The voltage output from the switching power supply module is current-limited and then converted into a suitable voltage by the buck circuit. It then charges the supercapacitor through a unidirectional conduction circuit. During the charging process, the equalization voltage regulation circuit ensures that the charging voltage of the supercapacitor remains stable. At the same time, the buck circuit outputs a power failure detection signal to the DC charging controller. Upon receiving a power failure signal, the DC charging controller enables the power switch circuit to open, releasing the energy stored in the supercapacitor. The released energy then passes through the voltage regulation circuit and the constant current control circuit to provide a stable voltage or current to the peripheral system of the DC charging controller, enabling the DC charging controller to save the working status data of the charging pile.
10. A DC charging controller, characterized in that, include: The power failure state maintenance circuit according to any one of claims 1-8.