Long-life photoconductive switch and preparation method thereof

Abstract

The invention belongs to the technical field of solid-state pulse power, and discloses a long-service-life photoconductive switch and a preparation method thereof.A substrate is arranged in a packaging shell, a photoconductive switch wafer is arranged on the substrate, the anode of the photoconductive switch wafer is connected with an anode outer conductor lead, the cathode of the photoconductive switch wafer is connected with a cathode outer conductor lead, and the anode outer conductor lead is connected with a cathode outer conductor lead. The photoconductive switch wafer is further connected with a light spot optical fiber, the anode outer conductor lead, the cathode outer conductor lead and the light spot optical fiber all extend out of the packaging shell, and the packaging shell is further filled with flexible polydimethylsiloxane. A structure formed by connecting the photoconductive switch wafer, the substrate, the anode outer conductor lead, the cathode outer conductor lead and the light spot optical fiber is embedded into the flexible polydimethylsiloxane. According to the invention, the flexible polydimethylsiloxane material is adopted for packaging, so that the thermal mechanical stress caused by large current under the avalanche effect is effectively relieved through the characteristics of excellent flexibility, chemical inertness, high hydrophobicity and low Young modulus of PDMS, and the core structure of the switch is protected.

Description

Technical Field

[0001] This invention belongs to the field of solid-state pulsed power technology, specifically relating to a long-life photoconductive switch and its fabrication method. Background Technology

[0002] Gallium arsenide (GaAs) photoconductive switches are a novel type of high-power semiconductor optoelectronic switching device developed through the cross-integration of microelectronics, laser, and pulsed power technologies. This device utilizes pulsed laser irradiation of a semiconductor material (gallium arsenide) to change the material's resistivity within an extremely short time (picosecond to nanosecond range), creating a conductive state and thus enabling the generation and control of high-power, ultrafast electrical pulses. Since its inception, GaAs photoconductive switch technology has been widely recognized as a revolutionary breakthrough in the history of high-power, ultra-wideband pulse generation and application, and its unique performance advantages have led to its widespread application in numerous high-end technology fields.

[0003] Specifically, gallium arsenide photoconductive switches have become core components in several high-tech fields due to their significant advantages, such as ultrafast switching speed, low trigger jitter, low parasitic inductance and capacitance, good opto-isolation, and compact structure. For example, (1) in the field of national defense and security: they are used in anti-jamming radar systems, electronic countermeasures systems, and high-power microwave pulse weapons. These scenarios require the switches to work stably under strong electric fields of tens of kV / cm and to withstand high-frequency pulse impacts. (2) in the field of energy: as trigger switches for laser nuclear fusion systems and drivers for high-current ignition devices, they need to withstand instantaneous high current and high repetition frequency operating modes. (3) in the fields of industry and medicine: in ultrafast electron beam accelerators, industrial CT, and cancer radiotherapy equipment, picosecond-level time accuracy and high repetition stability are required. In these high-end applications, the long lifespan and high reliability of the switches have become key factors restricting system performance. However, in the existing technology, gallium arsenide photoconductive switches still face serious lifespan decay and reliability decline problems under high voltage, high current, high frequency, and high temperature conditions. It is of great significance to achieve breakthroughs through material, structural, and process innovations to meet the needs of practical applications.

[0004] Although gallium arsenide photoconductive switches have excellent electrical and optical properties, their lifespan and reliability still face multiple technical challenges in practical applications, especially under harsh working conditions of high voltage, high current, and high repetition frequency. These problems fundamentally restrict the large-scale application of this device in key areas. For example, electrode preparation and interface defects, including edge electric field distortion effect, dielectric-semiconductor interface defects, and mismatch of thermal expansion coefficients between materials. In addition, packaging is a key link to protect the core structure of the switch from damage by high current thermal stress and ensure long-term reliability, but existing packaging technologies also have obvious shortcomings: (1) such as rigid stress mismatch: traditional epoxy resin packaging is a rigid structure with a Young's modulus much higher than that of gallium arsenide. Under the conditions of temperature cycling or mechanical vibration caused by heat accumulation due to high current, this mismatch will generate microcracks inside the brittle material of gallium arsenide or on the surface of the dielectric, forming a leakage current channel, which will eventually lead to an increase in dark state leakage current and loss of complete turn-off capability. (2) insufficient thermal management capability: under high repetition frequency conditions, the heat generated inside the switch cannot be effectively dissipated through traditional packaging. Studies have confirmed that when the diameter of the filamentary current exceeds 10 μm, the local temperature can rise to approximately 600°C, while the glass transition temperature of ordinary epoxy resin is only 150-180°C, leading to carbonization failure of the encapsulation layer. Furthermore, internal stress cracking is easily generated during thermal cycling, especially at the film edges. More seriously, the breakdown field strength of the dielectric film is lower than that of gallium arsenide, becoming a new weak point for breakdown under high voltage and high current. All of these factors contribute to the low reliability and short lifespan of gallium arsenide photoconductive switches in practical applications. Summary of the Invention

[0005] To address the problems existing in the prior art, the present invention aims to provide a long-life photoconductive switch and its fabrication method. The present invention can improve the reliability and lifespan of gallium arsenide photoconductive switches through innovative packaging structures.

[0006] To achieve the above objectives, the present invention adopts the following technical solution: A long-life photoconductive switch includes a package housing, a substrate disposed within the package housing, a photoconductive switch chip disposed on the substrate, an anode connected to an anode outer conductor lead, a cathode connected to a cathode outer conductor lead, and a spot fiber connected to the photoconductive switch chip. The anode outer conductor lead, cathode outer conductor lead, and spot fiber all extend to the outside of the package housing, and the package housing is further filled with flexible polydimethylsiloxane. The structure formed by connecting the photoconductive switch chip, the substrate, the anode outer conductor lead, the cathode outer conductor lead, and the spot fiber is embedded in the flexible polydimethylsiloxane.

[0007] Preferably, the substrate is an aluminum nitride ceramic substrate.

[0008] Preferably, the photoconductive switch chip includes a semi-insulating layer, with an anode surface and a cathode surface on the two sides of the semi-insulating layer. The anode surface is provided with a photoconductive switch anode, and an anode-side insulating passivation layer is provided on the surface of the anode surface outside the photoconductive switch anode. The cathode surface is provided with a photoconductive switch cathode, and a cathode-side insulating passivation layer is provided on the surface of the cathode surface outside the photoconductive switch cathode.

[0009] Preferably, the semi-insulating layer is made of gallium arsenide, and both the anode-side insulating passivation layer and the cathode-side insulating passivation layer are made of silicon nitride.

[0010] Preferably, both the photoconductive switch anode and the photoconductive switch cathode include: a first ohmic contact nickel layer, a first ohmic contact germanium layer, a first ohmic contact gold layer, a second ohmic contact nickel layer, a second ohmic contact gold layer, an encapsulation titanium layer, and an encapsulation gold layer disposed sequentially; wherein the first ohmic contact nickel layer is disposed on the surface of the semi-insulating layer.

[0011] Preferably, the thickness of the semi-insulating layer is 620-630 nm, the thickness of the anode-side insulating passivation layer is 335-345 nm, the thickness of the cathode-side insulating passivation layer is 335-345 nm, the thickness of the first ohmic contact nickel layer is 1-2 nm, the thickness of the first ohmic contact germanium layer is 30-40 nm, the thickness of the first ohmic contact gold layer is 100-110 nm, the thickness of the second ohmic contact nickel layer is 30-40 nm, the thickness of the second ohmic contact gold layer is 125-135 nm, the thickness of the encapsulation titanium layer is 95-105 nm, and the thickness of the encapsulation gold layer is 495-505 nm.

[0012] The present invention provides a method for fabricating a long-life photoconductive switch as described above, comprising the following steps: A substrate is fixedly disposed inside the package shell; the photoconductive switch chip is connected to the anode outer conductor lead, the cathode outer conductor lead and the optical fiber of the light spot, and then bonded to the substrate with gold-plated electrodes using conductive adhesive; then flexible polydimethylsiloxane is vented and encapsulated in the package shell, and then the flexible polydimethylsiloxane is vented and solidified to obtain the long-life photoconductive switch.

[0013] Preferably, the conductive adhesive is a low-temperature indium tin alloy, and the thickness of the low-temperature indium tin alloy coating is 45-55 micrometers. After the photoconductive switch chip is bonded to the substrate, it is baked at 80-100 ℃ to cure the low-temperature indium tin alloy.

[0014] Preferably, the silicone elastomer matrix and the curing agent are mixed in a mass ratio of 1:1 to obtain flexible polydimethylsiloxane; The conditions for the solidification treatment are as follows: degassing at room temperature for 24 hours or at 55-65°C for 7-9 hours.

[0015] Preferably, before connecting the photoconductive switch chip to the anode outer conductor lead, the cathode outer conductor lead, and the optical fiber, the following process is also included: The sidewalls of the photoconductive switch chip were polished using 4000-6000 grit sandpaper, followed by ultrasonic cleaning. The chip was then ultrasonically cleaned with acetone, isopropanol, and anhydrous ethanol for 3-5 minutes in sequence, rinsed with deionized water, and dried with N2. Then, in an oxygen plasma device, the surface of the photoconductive switch chip is treated with oxygen plasma, wherein the oxygen flow rate is 2.5-3.5 sccm, the radio frequency power is 88-92W, and the time is 270-330s.

[0016] The present invention has the following beneficial effects: To address the problems of existing avalanche gallium arsenide (GaAs) photoconductive switches under high voltage and high current environments, such as stress mismatch in the traditional rigid epoxy resin encapsulation structure leading to electrode interface degradation, material damage, rapid performance decay, low reliability, and short lifespan, this invention provides an innovative solution. The core of this invention lies in the use of flexible polydimethylsiloxane (PDMS) material for encapsulation. The aim is to leverage the excellent flexibility, chemical inertness, high hydrophobicity, and low Young's modulus of PDMS to effectively alleviate the thermomechanical stress caused by high current under avalanche effects, protecting the core switch structure (especially the brittle GaAs material, passivation layer, and electrode interface). This significantly improves the reliability of the switch at high repetition rates, ultimately achieving the goal of long-life, highly reliable operation. This invention has significant engineering application value for large-scale pulsed power systems based on GaAs photoconductive switches. Attached Figure Description

[0017] Figure 1 This is the basic structure of a long-life, high-reliability gallium arsenide photoconductive switch in an embodiment of the present invention.

[0018] Figure 2 This is a schematic diagram of a flexible package for a long-life, high-reliability gallium arsenide photoconductive switch in an embodiment of the present invention.

[0019] Figure 3(a) shows the performance of a conventional epoxy resin-encapsulated gallium arsenide photoconductive switch, and Figure 3(b) shows the performance of the novel flexible polydimethylsiloxane-encapsulated gallium arsenide photoconductive switch of the present invention.

[0020] Figure 4(a) shows the measurement results of the optical properties of traditional epoxy resin; Figure 4(b) shows the measurement results of the optical properties of flexible PDMS.

[0021] Figure 5(a) shows the reliability test results of applying a 45kV DC bias voltage to a conventional epoxy resin-encapsulated gallium arsenide photoconductive switch; Figure 5(b) shows the reliability test results of applying a 45kV DC bias voltage to the novel flexible polydimethylsiloxane-encapsulated gallium arsenide photoconductive switch of the present invention.

[0022] In the figure, 1-semi-insulating layer, 2-anode-side insulating passivation layer, 3-first anode ohmic contact metal nickel layer, 4-first anode ohmic contact metal germanium layer, 5-first anode ohmic contact metal gold layer, 6-second anode ohmic contact metal nickel layer, 7-second anode ohmic contact metal gold layer, 8-anode encapsulation metal titanium layer, 9-anode encapsulation metal gold layer, 11-first cathode ohmic contact metal nickel layer, 12-first cathode ohmic contact metal germanium layer, 13-first cathode ohmic contact metal gold layer. 14-Second cathode ohmic contact nickel layer, 15-Second cathode ohmic contact gold layer, 16-Cathode encapsulation titanium layer, 17-Cathode encapsulation gold layer, 18-Cathode-side insulating passivation layer, 20-Anode outer conductor lead, 21-Aluminum nitride ceramic substrate, 22-Gallium arsenide photoconductive switch anode, 23-Flexible polydimethylsiloxane, 24-Fiber optic spot, 25-Gallium arsenide photoconductive switch, 26-Encapsulation shell, 27-Cathode outer conductor lead, 28-Gallium arsenide photoconductive switch cathode. Detailed Implementation

[0023] The present invention will be further described clearly and in detail below with reference to specific embodiments and the accompanying drawings. Those skilled in the art will be able to implement the present invention based on these descriptions. Furthermore, the embodiments of the present invention described below are generally only some, not all, of the embodiments of the present invention. Therefore, all other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort should fall within the scope of protection of the present invention.

[0024] As an optional embodiment, see [link to relevant documentation]. Figure 1 and Figure 2This embodiment of a long-life photoconductive switch includes a package housing 26, within which a substrate is disposed. A photoconductive switch chip is disposed on the substrate. The anode of the photoconductive switch chip is connected to an anode outer conductor lead 20, and the cathode of the photoconductive switch chip is connected to a cathode outer conductor lead 27. A spot fiber 24 is also connected to the photoconductive switch chip. The anode outer conductor lead 20, the cathode outer conductor lead 27, and the spot fiber 24 all extend to the outside of the package housing 26. The interior of the package housing 26 is filled with flexible polydimethylsiloxane. The structure formed by connecting the photoconductive switch chip, the substrate, the anode outer conductor lead 20, the cathode outer conductor lead 27, and the spot fiber 24 is embedded in the flexible polydimethylsiloxane. This invention uses flexible polydimethylsiloxane as the photoconductive switch encapsulation filling material, which has high trigger laser transmittance and can avoid premature switch failure caused by thermal stress due to heat accumulation under high voltage and high current, thus improving reliability and lifespan.

[0025] As an optional embodiment, in this embodiment, the substrate of the photoconductive switch is an aluminum nitride ceramic substrate 21.

[0026] As an optional embodiment, see [link to relevant documentation]. Figure 1 In this embodiment, the photoconductive switch chip includes a semi-insulating layer 1. The two sides of the semi-insulating layer 1 are an anode surface (such as the upper surface of the semi-insulating layer 1) and a cathode surface (such as the lower surface of the semi-insulating layer 1). The left end of the anode surface is provided with a photoconductive switch anode, and the area of ​​the anode surface outside the photoconductive switch anode is provided with an anode-side insulating passivation layer 2. The right end of the cathode surface is provided with a photoconductive switch cathode, and the area of ​​the cathode surface outside the photoconductive switch cathode is provided with a cathode-side insulating passivation layer 18.

[0027] As an optional embodiment, in this embodiment, the material of the semi-insulating layer 1 is gallium arsenide, and the materials of the anode-side insulating passivation layer 2 and the cathode-side insulating passivation layer 18 are both silicon nitride.

[0028] As an optional embodiment, in this embodiment, both the photoconductive switch anode and the photoconductive switch cathode include: a first ohmic contact nickel layer, a first ohmic contact germanium layer, a first ohmic contact gold layer, a second ohmic contact nickel layer, a second ohmic contact gold layer, an encapsulation titanium layer, and an encapsulation gold layer disposed sequentially; wherein, the first ohmic contact nickel layer is disposed on the surface of the semi-insulating layer 1.

[0029] As an optional embodiment, in this embodiment, the thickness of the semi-insulating layer 1 is 625±5nm, the thickness of the anode-side insulating passivation layer 2 is 340±5nm, the thickness of the cathode-side insulating passivation layer 18 is 340±5nm, the thickness of the first ohmic contact nickel layer (including the first anode ohmic contact nickel layer 3 of the anode and the first cathode ohmic contact nickel layer 11 of the cathode) is 1.5±0.5nm, the thickness of the first ohmic contact germanium layer (including the first anode ohmic contact germanium layer 4 of the anode and the first cathode ohmic contact germanium layer 12 of the cathode) is 35±5nm, and the thickness of the first ohmic contact gold layer (including the first anode ohmic contact gold layer 5 of the anode and the first cathode ohmic contact gold layer 12 of the cathode) is 35±5nm. The thickness of the first ohmic contact metal gold layer 13 is 105±5 nm, the thickness of the second ohmic contact metal nickel layer (including the second anode ohmic contact metal nickel layer 6 of the anode and the second cathode ohmic contact metal nickel layer 14 of the cathode) is 35±5 nm, the thickness of the second ohmic contact metal gold layer (including the second anode ohmic contact metal gold layer 7 of the anode and the second cathode ohmic contact metal gold layer 15 of the cathode) is 130±5 nm, the thickness of the encapsulation metal titanium layer (including the anode encapsulation metal titanium layer 8 of the anode and the cathode encapsulation metal titanium layer 16 of the cathode) is 100±5 nm, and the thickness of the encapsulation metal gold layer (including the anode encapsulation metal gold layer 9 of the anode and the cathode encapsulation metal gold layer 17 of the cathode) is 500±5 nm.

[0030] In the above scheme, the value before “±” is the set value (or nominal value) of the corresponding parameter, and the value before “±” is the deviation value of the corresponding parameter. In the following embodiments, only the set value (or nominal value) of the corresponding parameter is given. It can be understood that the relevant parameters in the following embodiments are within the range of the above set value (or nominal value) ± deviation value, and the technical solution is feasible.

[0031] As an optional embodiment, in this embodiment, the material of the semi-insulating layer 1 is gallium arsenide, and the materials of the anode-side insulating passivation layer 2 and the cathode-side insulating passivation layer 18 are both silicon nitride. Both the photoconductive switch anode and the photoconductive switch cathode include: a first ohmic contact nickel layer, a first ohmic contact germanium layer, a first ohmic contact gold layer, a second ohmic contact nickel layer, a second ohmic contact gold layer, an encapsulation titanium layer, and an encapsulation gold layer, sequentially disposed thereon; wherein the first ohmic contact nickel layer is disposed on the surface of the semi-insulating layer 1; the thickness of the semi-insulating layer 1 is 625±5nm. The thickness of the anode-side insulating passivation layer 2 is 340±5 nm, the thickness of the cathode-side insulating passivation layer 18 is 340±5 nm, the thickness of the first ohmic contact nickel layer is 1.5±0.5 nm, the thickness of the first ohmic contact germanium layer is 35±5 nm, the thickness of the first ohmic contact gold layer is 105±5 nm, the thickness of the second ohmic contact nickel layer is 35±5 nm, the thickness of the second ohmic contact gold layer is 130±5 nm, the thickness of the encapsulation titanium layer is 100±5 nm, and the thickness of the encapsulation gold layer is 500±5 nm. The fabrication method of the long-life photoconductive switch in this embodiment includes the following steps: Step 1: Prepare a 4-inch semi-insulating gallium arsenide wafer with a thickness of 625μm.

[0032] Step Two: The 4-inch semi-insulating gallium arsenide wafer described in Step One is cleaned using an initial solvent to remove organic contaminants and coarse particles from the surface of the insulating gallium arsenide wafer. The cleaning sequence is as follows: xylene is used to dissolve strong organic contaminants; acetone is used to further remove organic residues; and isopropanol is used as a transition solvent to remove acetone and has a dehydrating effect. The specific method is as follows: Ultrasonic cleaning is typically performed at room temperature (power should not be too high (ultrasonic power can be between 20~100 W), time approximately 3-5 minutes / step; in this embodiment, the ultrasonic power is 45 W, time is 4 minutes / step) or immersion (10-15 minutes / step) accompanied by stirring. Note: Ultrasonic power must be carefully controlled; excessive power may damage the wafer edges or introduce stress. Rinsing: After each solvent cleaning step, a large amount of fresh solvent of the same purity must be used for rinsing to avoid cross-contamination.

[0033] Step 3: Perform alkaline cleaning on the 4-inch semi-insulating gallium arsenide wafer processed in Step 2 to remove certain organic contaminants and light particles. This is primarily done using a very dilute ammonia solution (e.g., 0.1%-1% solute by mass, 0.5% in this example). The operation time must be very short (tens of seconds to 1 minute, 35 seconds in this example) and requires close monitoring. Specific method: short-time immersion or spraying. Rinse: Immediately rinse thoroughly with plenty of deionized water.

[0034] Step 4: Perform acid cleaning on the 4-inch semi-insulating gallium arsenide wafer after Step 3 to remove native oxides and metal ion contaminants from the gallium arsenide surface. This is one of the most crucial steps in gallium arsenide cleaning. The hydrochloric acid-based solution used (HCl solute mass percentage 36%–38%, preferably 37%) is prepared as follows: hydrochloric acid:deionized water = 1:1 to 1:5 (volume ratio) (1:3 in this embodiment). The temperature is typically at room temperature (in this embodiment, room temperature) or slightly higher (e.g., 40-60°C), and the time is 1–5 minutes (4 minutes in this embodiment, room temperature). Method: Immersion or spraying with continuous stirring. Rinsing: Thorough rinsing with plenty of continuous ultrapure water (UPW, >18.2 MΩ·cm) is essential to completely remove all acid residue and prevent any residue from causing surface re-oxidation or contamination.

[0035] Step 5: Rinse the 4-inch semi-insulating gallium arsenide wafer treated in Step 4 with ultrapure water to thoroughly remove all residual reagents and dissolved contaminants from the previous chemical cleaning step. The specific method is as follows: Apply megohmonic waves (~0.8-1 MHz) to the ultrapure water. Utilizing the high-frequency cavitation effect, submicron particles are removed more effectively, while causing significantly less surface damage than ultrasound. Time: The rinsing time must be sufficiently long (typically 5-10 minutes, 8 minutes in this example) to ensure the resistivity recovers to near the ultrapure water background value.

[0036] Step Six: Dry the 4-inch semi-insulating gallium arsenide wafer processed in Step Five to remove moisture from the wafer surface without leaving watermarks or contaminants. Specifically, this involves spin drying: the wafer is rotated at high speed in a clean spin dryer, using centrifugal force to remove moisture. A high-purity nitrogen (N2) environment is required to prevent oxidation. Isopropanol vapor drying: The wet semi-insulating gallium arsenide wafer is exposed to boiling isopropanol vapor. The isopropanol vapor condenses on the wafer surface, dissolving moisture. As the wafer is lifted to a cooler area above the vapor zone, the isopropanol-water mixture rapidly evaporates, leaving a dry surface. It is crucial that the drying process be carried out in an ultra-clean environment using high-purity gases to avoid introducing new particles or organic matter.

[0037] Step 7: Apply the following to one side of the 4-inch semi-insulating gallium arsenide wafer after Step 6 (e.g., ...). Figure 1 The upper surface (as shown) undergoes an adhesion-enhancing treatment to strengthen the adhesion between the photoresist and the gallium arsenide surface, preventing the photoresist layer from peeling off or being etched during development or subsequent processes. The specific method is as follows: Vapor deposition is used: hexamethyldisilazane vapor is introduced to form a monolayer on the wafer surface. Typical conditions: hexamethyldisilazane vapor atmosphere, hot plate temperature ~120-150℃ (120℃ in this embodiment), time 30-60 seconds (60 seconds in this embodiment).

[0038] Step 8: Perform photoresist coating on the 4-inch semi-insulating gallium arsenide wafer processed in Step 7. Purpose: To uniformly coat the wafer surface with a photoresist of a specific thickness (1.5μm-2μm). Method: Vacuum-adsorb the wafer onto the spin coater turntable. Select AZ5214-E (AZ5214-E is used in this embodiment) or S1800 series photoresist. Low-speed spin coating: 500-1000 rpm (800r / min in this embodiment), 3-10 seconds (6 seconds in this embodiment), to initially spread the photoresist. High-speed spin coating: 3000-6000 rpm (6000r / min in this embodiment), 30-60 seconds (30 seconds in this embodiment), discard excess photoresist to form a uniform thin film. Key: Environmental temperature and humidity control (typically ~22±1℃, 40%-50% RH).

[0039] Step Nine: Perform a soft baking treatment on the 4-inch semi-insulating gallium arsenide wafer processed in Step Eight. Purpose: To remove most of the solvent from the photoresist, improve the mechanical stability and adhesion to the substrate, and stabilize the photoresist thickness. Specific method: Place the coated wafer on a clean, level hot plate. Typical conditions: 90-110℃ (100℃ in this example), 60-90 seconds (80 seconds in this example).

[0040] Step 10: Expose the semi-insulating gallium arsenide wafer processed in Step 9. Purpose: To utilize ultraviolet light passing through a mask (containing the anode pattern) to induce a photochemical reaction in the photoresist (positive photoresist: the exposed area becomes soluble). Method: Precisely align the wafer and mask, and perform exposure using a photolithography machine. The exposure wavelength is i-line 365nm, and the exposure time is 4-6 seconds (6 seconds in this embodiment).

[0041] Step 11: Perform a post-bake treatment on the 4-inch semi-insulating gallium arsenide wafer after the treatment in Step 10. Purpose: To promote the diffusion of acid generated by the photoacid-generating agent in the exposed area, catalyze the deprotection reaction of the photoresist substrate resin, enhance development contrast, and smooth linewidth. Method: Place the wafer on a hot plate as soon as possible after exposure (usually <10 minutes). Typical conditions: ~90-130℃, 60-90 seconds (in this example, the temperature is set to 100℃ and the time is 80 seconds).

[0042] Step 12: Develop the 4-inch semi-insulating gallium arsenide wafer processed in Step 11. Purpose: To dissolve the photoresist in the exposed areas (positive resist) and form the desired anode pattern window. Method: Immerse or spray the wafer in the developer solution. Use tetramethylammonium hydroxide aqueous solution for the positive resist, with a concentration typically ~2%. Development time: Determined experimentally (e.g., around 60 seconds (58-62 seconds)), usually near the endpoint (when the pattern is just clearly open). Immediately after development, spray or rinse with ultrapure water to completely stop the development reaction and remove residual developer and dissolved resist. Finally, dry with high-purity nitrogen or spin dry.

[0043] Step Thirteen: Develop the 4-inch semi-insulating gallium arsenide wafer processed in Step Twelve. Purpose: To further remove residual solvents and moisture, improve the mechanical strength, chemical resistance, and adhesion to the substrate of the photoresist, preparing it for subsequent anolyte deposition and stripping (or etching) processes. Method: Place the developed and dried wafer on a hot plate. Typical conditions: 120-140℃, 5-10 minutes (in this example, the temperature is set at 120℃ and the time is 8 minutes). Excessive temperature or time may cause photoresist flow, pattern deformation, or cracking.

[0044] Step Fourteen: Perform anodic metal deposition on the 4-inch semi-insulating gallium arsenide wafer described in Step Thirteen to form an anode. Ni / Ge / Au / Ni / Au / Ti / Au is evaporated by electron beam. During deposition, the metal will be deposited on both the GaAs surface exposed at the photoresist opening and the photoresist surface.

[0045] Step 15: Strip the 4-inch semi-insulating gallium arsenide wafer processed in Step 14 to remove the photoresist and the metal covering it, leaving only the metal at the opening (anode pattern). Method: Immerse the wafer in a high-efficiency photoresist stripping solution (such as N-methylpyrrolidone or a specialized stripping solution) to dissolve the photoresist. Accelerate the stripping process with ultrasound (careful power to avoid damaging the pattern) or heating (~70-80°C). Thoroughly rinse with plenty of solvent (acetone, isopropanol) and ultrapure water, then dry with N2.

[0046] Step Sixteen: The other side of the 4-inch semi-insulating gallium arsenide wafer processed in Step Fifteen (e.g.) Figure 1 The lower surface (as shown) undergoes an adhesion-enhancing treatment to improve the adhesion between the photoresist and the gallium arsenide surface, preventing the photoresist layer from peeling off or being etched during development or subsequent processes. Method: Vapor deposition is used: hexamethyldisilazane vapor is introduced to form a monolayer on the wafer surface. Typical conditions: hexamethyldisilazane vapor atmosphere, hot plate temperature ~120-150℃ (120℃ in this example), time 30-60 seconds (60 seconds in this example).

[0047] Step 17: Perform photoresist spin coating on the 4-inch semi-insulating gallium arsenide wafer processed in Step 16. Purpose: To uniformly coat the wafer surface with a photoresist of a specific thickness (1.5μm-2μm). Method: Vacuum-adsorb the wafer onto the spin coater turntable. Select AZ5214-E (AZ5214-E is used in this embodiment) or S1800 series photoresist. Low-speed spin coating: 500-1000 rpm (800r / min in this embodiment), 3-10 seconds (6 seconds in this embodiment), to initially spread the photoresist. High-speed spin coating: 3000-6000 rpm (6000r / min in this embodiment), 30-60 seconds (30 seconds in this embodiment), to remove excess photoresist and form a uniform thin film. Key: Environmental temperature and humidity control (typically ~22±1℃, 40%-50% RH).

[0048] Step 18: Perform a soft baking treatment on the 4-inch semi-insulating gallium arsenide wafer processed in Step 17. Purpose: To remove most of the solvent from the photoresist, improve the mechanical stability and adhesion to the substrate, and stabilize the photoresist thickness. Method: Place the coated wafer on a clean, level hot plate. Typical conditions: 90-110℃ (100℃ in this example), 60-90 seconds (80 seconds in this example).

[0049] Step 19: Expose the semi-insulating gallium arsenide wafer processed in Step 18. Purpose: To use ultraviolet light to pass through a mask (containing a cathode pattern) to cause a photochemical reaction in the photoresist (positive photoresist: the exposed area becomes soluble). Method: Precisely align the wafer and the mask, and expose it using a photolithography machine. The exposure wavelength is i-line 365 nm, and the exposure time is 4-6 seconds (6 seconds in this embodiment).

[0050] Step 20: Perform a post-bake treatment on the 4-inch semi-insulating gallium arsenide wafer after the treatment in Step 19. Purpose: To promote the diffusion of acid generated by the photoacid generator in the exposed area, catalyze the deprotection reaction of the photoresist substrate resin, enhance development contrast, and smooth linewidth. Method: Place the wafer on a hot plate as soon as possible after exposure (usually <10 minutes). Typical conditions: ~90-130℃, 60-90 seconds (in this example, the temperature is 120℃ and the time is 80 seconds).

[0051] Step 21: Develop the 4-inch semi-insulating gallium arsenide wafer after Step 20. Purpose: To dissolve the photoresist in the exposed areas (positive resist) to form the desired cathode pattern window. Method: Immerse or spray the wafer in the developer solution. Use tetramethylammonium hydroxide aqueous solution for the positive resist, with a concentration typically ~2.38%. Development time: Determined experimentally (e.g., around 60 seconds (58-62 seconds)), usually near the endpoint (when the pattern is just clearly open). Immediately after development, spray or rinse with ultrapure water to completely stop the development reaction and remove residual developer and dissolved resist. Finally, dry with high-purity nitrogen or spin dry.

[0052] Step 22: Develop the 4-inch semi-insulating gallium arsenide wafer processed in Step 21. Purpose: To further remove residual solvents and moisture, improve the mechanical strength, chemical resistance, and adhesion to the substrate of the photoresist, preparing it for subsequent cathode metal deposition and stripping (or etching) processes. Method: Place the developed and dried wafer on a hot plate. Typical conditions: 120-140℃, 5-10 minutes (in this example, the temperature is set at 120℃ and the time is 8 minutes). Excessive temperature or time may cause photoresist flow, pattern deformation, or cracking.

[0053] Step 23: Perform cathode metal deposition on the 4-inch semi-insulating gallium arsenide wafer processed in Step 22 to form a cathode. Ni / Ge / Au / Ni / Au / Ti / Au is evaporated by electron beam. During deposition, the metal will be deposited on both the GaAs surface exposed at the photoresist opening and the photoresist surface.

[0054] Step 24: Strip the 4-inch semi-insulating gallium arsenide wafer processed in Step 23 to remove the photoresist and the metal covering it, retaining only the metal at the opening (cathode pattern). Method: Immerse the wafer in a high-performance photoresist stripping solution (such as N-methylpyrrolidone or a specialized stripping solution) to dissolve the photoresist. Accelerate the stripping process with ultrasound (careful power to avoid damaging the pattern) or heating (~70-80°C). Rinse thoroughly with plenty of solvent (acetone, isopropanol) and ultrapure water. Dry with nitrogen.

[0055] Step 25: Anneal the 4-inch semi-insulating gallium arsenide wafer processed in Step 24 to form good ohmic contacts. Alloying annealing is performed in a specific atmosphere (such as N2, with a flow rate of 5 sccm during temperature rise, 10 sccm during temperature hold, and 5 sccm during temperature fall) at a temperature of 400±5℃ for 1-2 minutes (1 minute in this embodiment).

[0056] Step 26: Clean the 4-inch semi-insulating gallium arsenide wafer processed in Step 25 by ultrasonic cleaning with acetone, isopropanol, and anhydrous ethanol for 3-5 minutes in sequence (4 minutes in this embodiment), rinse with plenty of deionized water, and dry with N2.

[0057] Step 27: The anode surface of the 4-inch semi-insulating gallium arsenide wafer after the treatment in Step 26 (i.e. Figure 1 The upper surface shown is treated with plasma-enhanced chemical vapor deposition to deposit a silicon nitride passivation layer with a thickness of 340 nm.

[0058] Step 28: A silicon nitride passivation layer with a thickness of 340 nm is deposited on the cathode surface of the 4-inch semi-insulating gallium arsenide wafer after the treatment in Step 27 using plasma-enhanced chemical vapor deposition.

[0059] Step 29: Treat one side surface of the 4-inch semi-insulating gallium arsenide wafer processed in Step 28 (e.g., ...). Figure 1 The upper surface (as shown) undergoes an adhesion-enhancing treatment to strengthen the adhesion between the photoresist and the gallium arsenide surface, preventing the photoresist layer from peeling off or being etched during development or subsequent processes. Method: Vapor deposition is used: hexamethyldisilazane vapor is introduced to form a monolayer on the wafer surface. Typical conditions: hexamethyldisilazane vapor atmosphere, hot plate temperature ~120-150℃ (130℃ in this embodiment), time 30-60 seconds (40 seconds in this embodiment).

[0060] Step 30: Perform photoresist spin coating on the 4-inch semi-insulating gallium arsenide wafer processed in Step 29. Purpose: To uniformly coat the wafer surface with a photoresist of a specific thickness (2μm-3μm, 2.5μm in this embodiment). Method: Vacuum-adsorb the wafer onto the spin coater turntable. Select AZ5214-E (AZ5214-E in this embodiment) or S1800 series photoresist. Low-speed spin coating: 500-1000 rpm, 3-10 seconds (800 rpm, 5 seconds in this embodiment) to initially spread the photoresist. High-speed spin coating: 2000-3000 rpm, 30-60 seconds (2500 rpm, 40 seconds in this embodiment) to remove excess photoresist and form a uniform thin film. Key: Environmental temperature and humidity control (typically ~22±1℃, 40-50% RH).

[0061] Step 31: Perform a soft baking treatment on the 4-inch semi-insulating gallium arsenide wafer after the treatment in Step 30. Purpose: To remove most of the solvent from the photoresist, improve the mechanical stability and adhesion to the substrate, and stabilize the photoresist thickness. Method: Place the coated wafer on a clean, level hot plate. Typical conditions: 90-110℃, 60-90 seconds (in this example, the temperature is 100℃ and the time is 80 seconds).

[0062] Step 32: Expose the semi-insulating gallium arsenide wafer processed in Step 31. Purpose: To use ultraviolet light to pass through a mask (containing the anode pattern) to cause a photochemical reaction in the photoresist (positive photoresist: the exposed area becomes soluble). Method: Precisely align the wafer and the mask, and perform exposure using a photolithography machine. The exposure wavelength is i-line 365 nm, and the exposure time is 4-6 seconds (5 seconds in this embodiment).

[0063] Step 33: Perform a post-bake treatment on the 4-inch semi-insulating gallium arsenide wafer processed in Step 32. Purpose: To promote the diffusion of acid generated by the photoacid generator in the exposed area, catalyze the deprotection reaction of the photoresist substrate resin, enhance development contrast, and smooth linewidth. Method: Place the wafer on a hot plate as soon as possible after exposure (usually <10 minutes). Typical conditions: ~90-130℃, 60-90 seconds (in this example, the temperature is 120℃ and the time is 80 seconds).

[0064] Step 34: Develop the 4-inch semi-insulating gallium arsenide wafer after Step 33. Purpose: To dissolve the photoresist in the exposed areas (positive resist) and form the desired anode pattern window. Method: Immerse or spray the wafer in the developer solution. Use tetramethylammonium hydroxide aqueous solution for the positive resist, typically at a concentration of ~2%. Development time: Determined experimentally (e.g., 58-62 seconds), usually near the endpoint (when the pattern is just clearly open). Immediately after development, spray or rinse with ultrapure water to completely stop the development reaction and remove residual developer and dissolved resist. Finally, dry with high-purity nitrogen or spin dry.

[0065] Step 35: Develop the 4-inch semi-insulating gallium arsenide wafer processed in Step 34. Purpose: To further remove residual solvents and moisture, improve the mechanical strength, chemical resistance, and adhesion to the substrate of the photoresist, preparing it for subsequent anolyte deposition and stripping (or etching) processes. Method: Place the developed and dried wafer on a hot plate. Typical conditions: 120-140℃, 5-10 minutes (in this example, the temperature is 130℃ and the time is 8 minutes). Excessive temperature or time may cause photoresist flow, pattern deformation, or cracking.

[0066] Step 36: The other side surface of the 4-inch semi-insulating gallium arsenide wafer processed in Step 35 (e.g.) Figure 1The lower surface (as shown) undergoes an adhesion-enhancing treatment to strengthen the adhesion between the photoresist and the gallium arsenide surface, preventing the photoresist layer from peeling off or being etched during development or subsequent processes. Method: Vapor deposition is used: hexamethyldisilazane vapor is introduced to form a monolayer on the wafer surface. Conditions: Hexamethyldisilazane vapor atmosphere, hot plate temperature ~120-150℃, time 30-60 seconds (in this embodiment, the temperature is 130℃ and the time is 40 seconds).

[0067] Step 37: Perform photoresist coating on the 4-inch semi-insulating gallium arsenide wafer processed in Step 36. Purpose: To uniformly coat the wafer surface with a photoresist of a specific thickness. Method: Vacuum-adsorb the wafer onto the spin coater turntable. Select AZ5214-E (AZ5214-E is used in this embodiment) or S1800 series photoresist. Low-speed photoresist spreading: 500-1000 rpm, 3-10 seconds (800 rpm, 5 seconds in this embodiment) to initially spread the photoresist. High-speed photoresist spreading: 2000-3000 rpm, 30-60 seconds (2500 rpm, 40 seconds in this embodiment) to remove excess photoresist and form a uniform thin film. Key: Environmental temperature and humidity control (typically ~22±1℃, 40%-50% RH).

[0068] Step 38: Perform a soft baking treatment on the 4-inch semi-insulating gallium arsenide wafer processed in Step 37. Purpose: To remove most of the solvent from the photoresist, improve the mechanical stability and adhesion to the substrate, and stabilize the photoresist thickness. Method: Place the coated wafer on a clean, level hot plate. Typical conditions: 90-110℃, 60-90 seconds (in this example, the temperature is 100℃ and the time is 80 seconds).

[0069] Step 39: Expose the semi-insulating gallium arsenide wafer processed in Step 38. Purpose: To use ultraviolet light to pass through a mask (containing a cathode pattern) to cause a photochemical reaction in the photoresist (positive photoresist: the exposed area becomes soluble). Method: Precisely align the wafer and the mask, and perform exposure using a photolithography machine. The exposure wavelength is i-line 365 nm, and the exposure time is 4-6 seconds (5 seconds in this embodiment).

[0070] Step 40: Perform a post-bake treatment on the 4-inch semi-insulating gallium arsenide wafer after the treatment in Step 39. Purpose: To promote the diffusion of acid generated by the photoacid generator in the exposed area, catalyze the deprotection reaction of the photoresist substrate resin, enhance development contrast, and smooth linewidth. Method: Place the wafer on a hot plate as soon as possible after exposure (usually <10 minutes). Typical conditions: ~90-130℃, 60-90 seconds (in this example, the temperature is 120℃ and the time is 80 seconds).

[0071] Step 41: Develop the 4-inch semi-insulating gallium arsenide wafer after Step 40. Purpose: To dissolve the photoresist in the exposed areas (positive resist) to form the desired cathode pattern window. Method: Immerse or spray the wafer in the developer solution. Use tetramethylammonium hydroxide aqueous solution for the positive resist, typically at a concentration of ~2%. Development time: Determined experimentally (e.g., 58-62 seconds), usually near the endpoint (when the pattern is just clearly open). Immediately after development, spray or rinse with ultrapure water to completely stop the development reaction and remove residual developer and dissolved resist. Finally, dry with high-purity nitrogen or spin dry.

[0072] Step 42: Develop the 4-inch semi-insulating gallium arsenide wafer processed in Step 41. Purpose: To further remove residual solvents and moisture, improve the mechanical strength, chemical resistance, and adhesion to the substrate of the photoresist, preparing it for subsequent anolyte deposition and stripping (or etching) processes. Method: Place the developed and dried wafer on a hot plate. Typical conditions: 120-140℃, 5-10 minutes (in this example, the temperature is 130℃ and the time is 8 minutes). Excessive temperature or time may cause photoresist flow, pattern deformation, or cracking.

[0073] Step 43: Perform silicon nitride etching on the anode surface of the 4-inch semi-insulating gallium arsenide wafer processed in Step 42, with an etching depth of 340 nm.

[0074] Step 44: Perform silicon nitride etching on the cathode surface of the 4-inch semi-insulating gallium arsenide wafer processed in Step 43, with an etching depth of 340 nm.

[0075] Step 45: Divide the 4-inch semi-insulating gallium arsenide wafer processed in Step 44 to a depth equal to the thickness of the semi-insulating gallium arsenide wafer.

[0076] Step 46: Perform a film expansion and dicing process on the 4-inch semi-insulating gallium arsenide wafer processed in Step 45. To ensure that discrete devices can be easily removed from the diced blue film on the glass, a pulling force is applied by the film expander to create a slight gap between the discrete devices.

[0077] Step 47: Perform device stripping on the 4-inch semi-insulating gallium arsenide wafer processed in Step 46. Use resin tweezers to remove the discrete devices (i.e., photoconductive switch chips) one by one from the blue film and place them in the device storage box for packaging.

[0078] Step 48: Separate the devices from the 4-inch semi-insulating gallium arsenide wafer processed in Step 47. Polish the sidewalls of the devices using 4000-6000 grit sandpaper. Step 49: Perform ultrasonic cleaning on the polished discrete devices from Step 48, sequentially using acetone, isopropanol, and anhydrous ethanol for 3-5 minutes (5 minutes in this example), then rinse thoroughly with plenty of deionized water and dry with N2.

[0079] Step 50: Perform plasma repair treatment on the discrete devices processed in Step 49. Place the devices in an oxygen plasma device with a vacuum environment inside the cavity and introduce oxygen (flow rate of 3±0.5 sccm). The radio frequency power is 90±2W and the time is 5 minutes±30 seconds to repair physical damage, electrical defects, contamination channels, etc. caused by the dicing and cutting process.

[0080] Step 51: The discrete components processed in Step 49 are then attached to the gold-plated aluminum nitride ceramic substrate. The anode outer conductor lead 20, cathode outer conductor lead 27, and optical fiber 24 are then attached to the components. The adhesive used is a low-temperature indium tin alloy with a thickness of 50 micrometers, and the hot air gun temperature is 80-100 ℃. In contrast to conventional soldering methods that involve melting solder with a soldering iron at high temperatures (around 300 ℃), this invention uses a low-temperature indium tin alloy as the interconnecting conductive material between the gallium arsenide photoconductive switch, the outer conductor, and the aluminum nitride ceramic substrate, thus avoiding device damage caused by conventional high-temperature soldering. Step 52: After processing in Step 50, the discrete devices that were pasted onto the gold-plated electrode aluminum nitride ceramic substrate are fixed inside the package housing.

[0081] Step 53: Synthesize flexible polydimethylsiloxane by mixing the organosilicon elastomer matrix and curing agent at a mass ratio of 10:1 and stirring thoroughly until homogeneous.

[0082] Step 54: Degas the flexible polydimethylsiloxane mixture from Step 52 by placing it in a drying oven and degassing it at room temperature for 2.5 hours.

[0083] Step 55: Fill the flexible polydimethylsiloxane after degassing as described in step 53 into the encapsulation shell of step 51.

[0084] Step 56: Degas the flexible polydimethylsiloxane encapsulation shell from Step 54 for 2.5 hours at room temperature.

[0085] Step 57: Perform a solidification treatment on the device after degassing and encapsulation in Step 55, degassing for 24 hours at room temperature or 8 hours at 60°C.

[0086] In the above scheme, the value before "±" is the set value (or nominal value) of the corresponding parameter, and the value after "±" is the allowable deviation value of the corresponding parameter; it can be understood that the relevant parameters in the embodiment of the present invention are within the range of the above set value (or nominal value) ± deviation value, and the technical solution is feasible.

[0087] The long-life photoconductive switch obtained in this embodiment, through dark-state characteristic measurements, revealed that after sandpaper polishing in step 48 and plasma repair treatment in step 50, the dark-state current of the device was significantly reduced, as shown in Figures 3(a) and 3(b). Within the low voltage range of -100V to 100V, the contact characteristics of the device were excellent both before and after treatment, but the dark current of the device decreased from 152nA to 7.92nA after treatment. Under a 40 kV high-voltage dark-state test, the dark current of the device decreased from 75μA to 9.0μA after treatment, demonstrating excellent dark-state characteristics. Furthermore, measurements of the optical properties of traditional epoxy resin and flexible PDMS showed that PDMS can effectively reduce surface reflection of the trigger laser (reflectivity as low as 6.2%) and enhance light transmission in the encapsulation material (transmittance as high as 94.32%), which greatly improves the utilization of laser energy. The optical properties of the two materials are shown in Figures 4(a) and 4(b). Finally, to evaluate long-term reliability under high-voltage conditions, a DC bias voltage of 45 kV was applied to both types of devices at a repetition frequency of 5 Hz, as shown in Figures 5(a) and 5(b). The arsenide photoconductive switch encapsulated in epoxy resin began to degrade after 1031 pulses, with its output gradually worsening. By the 1190th pulse, its amplitude had dropped to 12 V (25.5 A). Conversely, the gallium arsenide photoconductive switch encapsulated in polydimethylsiloxane (PDMS) maintained initial amplitude stability during the 3384th pulse. Performance then began to degrade, with the amplitude dropping to 84.67 V (180.15 A) by the 6555th pulse. Further operation led to severe surface flashover at the 6792nd pulse, accelerating device degradation and failure. This demonstrates that the above process and flexible PDMS encapsulation effectively improve the lifetime of high-power gallium arsenide photoconductive switches, providing a reliable solution.

[0088] Gallium arsenide photoconductive switches typically operate under high voltage and fast pulse conditions, requiring extremely high insulation and integrity of the materials. A defective sidewall can become the source of premature breakdown or pulse waveform distortion. Sidewall passivation can significantly improve its breakdown voltage and operational stability. Therefore, this invention effectively solves the fundamental problems caused by dicing by repairing the device with oxygen plasma. (1) Physical damage: Dicing will produce microcracks, stress layers and debris, which are potential sources of reduced mechanical strength of the device; (2) Dicing causes lattice breakage, producing a large number of "dangling bonds", which will become leakage channels and carrier recombination centers, leading to device performance degradation, increased power consumption and decreased reliability; (3) Contamination channels: Rough cut surfaces are more likely to adsorb moisture and impurity ions, which may lead to corrosion or electromigration under long-term use. This is mainly due to the unique advantages of oxygen plasma technology: (1) controllable directionality: by selecting appropriate plasma sources and process parameters, the sidewalls can be covered well to achieve isotropic or anisotropic processing; (2) low temperature process: avoids damage to the existing structure and metallization circuit of the device by high temperature; (3) efficient cleaning and activation: can effectively remove organic contaminants from the sidewalls and activate the surface; (4) repair capability: for example, hydrogen plasma can effectively combine with the dangling bonds on the surface of gallium arsenide to "passivate" it, significantly reduce the surface state density, and improve electrical performance.

[0089] Gallium arsenide (GaAs) photoconductive switches face inherent limitations under repetitive high-current pulse operation. The core issue extends beyond thermal expansion mismatch to mechanical property mismatch, such as the rigidity exhibited by high Young's modulus materials like epoxy resin. This rigidity "confins" thermal strain at the interface, leading to stress concentration, electrode edge crack initiation, and ultimately device fatigue failure. This understanding necessitates a paradigm shift in packaging philosophy—from stress resistance to stress compliance. This invention implements this philosophy by introducing a flexible polydimethylsiloxane (PDMS) encapsulation material. Its decisive advantage lies not only in its thermal expansion coefficient but also in its extremely low Young's modulus. This compliant characteristic allows the encapsulation layer to safely absorb and dissipate strain through a wide range of reversible deformation, thereby decoupling the brittle GaAs material, the metal-semiconductor interface, and destructive stress concentration. This method fundamentally solves the failure problem that traditional rigid encapsulation strategies cannot overcome.

[0090] Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without inventive effort should fall within the scope of protection of the present invention.

[0091] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A long-life photoconductive switch, characterized in that, The package includes a housing (26), in which a substrate is provided, on which a photoconductive switch chip is provided, the anode of the photoconductive switch chip is connected to an anode outer conductor lead (20), the cathode of the photoconductive switch chip is connected to a cathode outer conductor lead (27), and a spot fiber (24) is also connected to the photoconductive switch chip. The anode outer conductor lead (20), the cathode outer conductor lead (27) and the spot fiber (24) all extend to the outside of the housing (26), and the interior of the housing (26) is filled with flexible polydimethylsiloxane. The structure formed by connecting the photoconductive switch chip, the substrate, the anode outer conductor lead (20), the cathode outer conductor lead (27) and the spot fiber (24) is embedded in the flexible polydimethylsiloxane.

2. The long-life photoconductive switch according to claim 1, characterized in that, The substrate is an aluminum nitride ceramic substrate (21).

3. The long-life photoconductive switch according to claim 1, characterized in that, The photoconductive switch chip includes a semi-insulating layer (1), with an anode surface and a cathode surface on the two sides of the semi-insulating layer (1). The anode surface is provided with a photoconductive switch anode, and an anode-side insulating passivation layer (2) is provided on the surface of the anode surface outside the photoconductive switch anode. The cathode surface is provided with a photoconductive switch cathode, and a cathode-side insulating passivation layer (18) is provided on the surface of the cathode surface outside the photoconductive switch cathode.

4. A long-life photoconductive switch according to claim 3, characterized in that, The material of the semi-insulating layer (1) is gallium arsenide, and the materials of the anode-side insulating passivation layer (2) and the cathode-side insulating passivation layer (18) are both silicon nitride.

5. A long-life photoconductive switch according to claim 3, characterized in that, Both the anode and cathode of the photoconductive switch include: a first ohmic contact nickel layer, a first ohmic contact germanium layer, a first ohmic contact gold layer, a second ohmic contact nickel layer, a second ohmic contact gold layer, an encapsulation titanium layer, and an encapsulation gold layer, which are arranged sequentially; wherein, the first ohmic contact nickel layer is disposed on the surface of the semi-insulating layer (1).

6. A long-life photoconductive switch according to claim 5, characterized in that, The thickness of the semi-insulating layer (1) is 620-630 nm, the thickness of the anode-side insulating passivation layer (2) is 335-345 nm, the thickness of the cathode-side insulating passivation layer (18) is 335-345 nm, the thickness of the first ohmic contact nickel layer is 1-2 nm, the thickness of the first ohmic contact germanium layer is 30-40 nm, the thickness of the first ohmic contact gold layer is 100-110 nm, the thickness of the second ohmic contact nickel layer is 30-40 nm, the thickness of the second ohmic contact gold layer is 125-135 nm, the thickness of the encapsulation titanium layer is 95-105 nm, and the thickness of the encapsulation gold layer is 495-505 nm.

7. A method for fabricating a long-life photoconductive switch according to any one of claims 1-6, characterized in that, Includes the following steps: A substrate is fixedly disposed inside the packaging shell (26); the photoconductive switch chip is connected to the anode outer conductor lead (20), the cathode outer conductor lead (27) and the light spot fiber (24), and then bonded to the substrate of the gold-plated electrode using conductive adhesive; then the flexible polydimethylsiloxane is vented and encapsulated inside the packaging shell (26), and then the flexible polydimethylsiloxane is vented and solidified to obtain the long-life photoconductive switch.

8. The method for fabricating a long-life photoconductive switch according to claim 7, characterized in that, The conductive adhesive is made of low-temperature indium tin alloy, and the thickness of the low-temperature indium tin alloy coating is 45-55 micrometers. After bonding the photoconductive switch chip to the substrate, it is baked at 80-100 ℃ to cure the low-temperature indium tin alloy.

9. The method for fabricating a long-life photoconductive switch according to claim 7, characterized in that, A flexible polydimethylsiloxane is obtained by mixing an organosilicon elastomer matrix and a curing agent in a mass ratio of (9~11):

1. The conditions for the solidification treatment are as follows: degassing at room temperature for 24 hours or at 55-65°C for 7-9 hours.

10. The method for fabricating a long-life photoconductive switch according to claim 7, characterized in that, Before connecting the photoconductive switch chip to the anode outer conductor lead (20), the cathode outer conductor lead (27), and the light spot fiber (24), the following process is also included: The sidewalls of the photoconductive switch chip were polished using 4000-6000 grit sandpaper, followed by ultrasonic cleaning. The chip was then ultrasonically cleaned with acetone, isopropanol, and anhydrous ethanol for 3-5 minutes in sequence, rinsed with deionized water, and dried with N2. Then, in an oxygen plasma device, the surface of the photoconductive switch chip is treated with oxygen plasma, wherein the oxygen flow rate is 2.5-3.5 sccm, the radio frequency power is 88-92W, and the time is 270-330s.

Images