Impedance measuring circuit suitable for VLF antenna

Abstract

The invention provides an impedance measurement circuit suitable for a VLF antenna, and belongs to the technical field of VLF antennae, and the impedance measurement circuit comprises the steps: carrying out the amplification and filtering processing of a signal through a signal sampling and conditioning module, and inhibiting the powerful industrial noise and pulse-type sky electric noise interference of a VLF frequency band through combining the operation analysis of a digital processing module. Full-period direct sampling and FPGA are adopted for high-speed digital signal processing, and real-time measurement of antenna impedance is achieved. The digital processing module is used for executing Fourier transform and other algorithms, amplitude and phase information is directly extracted from sampling signals, vector measurement of antenna impedance is achieved, the real part and the imaginary part of the impedance can be accurately decomposed, and the problem that in a traditional resonance method, only scalar data can be obtained, and the precision is low is fundamentally solved. Through cooperative work of the hardware circuit module and the digital processing module, strong noise interference is suppressed, and high-precision, real-time and reliable vector measurement of VLF antenna impedance is realized in a noise environment.

Description

Technical Field

[0001] This invention relates to the field of VLF antenna technology, and more particularly to an impedance measurement circuit suitable for VLF antennas. Background Technology

[0002] When measuring antenna impedance, the antenna essentially functions as a large receiving antenna, where industrial noise, atmospheric noise, and electromagnetic radiation significantly impact its radiation performance. VLF atmospheric noise primarily originates from electromagnetic radiation generated by lightning discharges, characterized by short-duration, high-amplitude pulses, typically reaching hundreds or even thousands of volts. If conventional modern instruments such as LCR impedance analyzers and network analyzers are used to measure antenna impedance in this environment, these high-precision instruments, with their weak anti-interference capabilities, produce distorted data and are highly susceptible to damage. The bridge method, theoretically, can indeed measure antenna impedance. It adjusts the standard impedance within the bridge to balance the impedance being measured, thus obtaining the impedance data of the antenna, and the bridge itself possesses strong resistance to electrical surges. However, for VLF antennas, the atmospheric noise induced by the bridge circuit can overwhelm the signal level, leading to reduced measurement accuracy or even rendering the measurement unusable.

[0003] Currently, the commonly used method is the resonance method for measuring antenna impedance. Its working principle is based on the resonant characteristics of a resonant circuit formed by an inductor and capacitor. When the circuit resonates, the voltage across the capacitor is a quality factor (Q) times the voltage across the circuit. However, its measurement accuracy is relatively low, typically around 10%. The measurement error mainly stems from the fact that the displacement current on the antenna is a vector, while the data displayed by the instrument during the test is a scalar, and the real and imaginary parts cannot be effectively decomposed. Furthermore, complete tuning is impossible during actual measurement, thus reducing the measurement accuracy. Therefore, existing methods pose a challenge to high-precision impedance measurement of VLF antennas under strong noise interference. Summary of the Invention

[0004] This invention provides an impedance measurement circuit suitable for VLF antennas, which overcomes the defects in the prior art and improves the accuracy and efficiency of impedance measurement.

[0005] This invention provides an impedance measurement circuit suitable for VLF antennas. The system includes a hardware circuit module and a digital processing module. The hardware circuit module includes an unbalanced current detection and conditioning circuit, a voltage signal isolation circuit, and an analog-to-digital conversion unit. The unbalanced current detection and conditioning circuit is used to detect the unbalanced current signal generated by the VLF antenna, convert it into a voltage signal, amplify and filter it, and output the first conditioning signal. The voltage signal isolation circuit is used to isolate and buffer the reference voltage signal, maintain signal integrity, and output a second conditioning signal; The analog-to-digital conversion unit is used to synchronously sample and quantize the first conditioning signal and the second conditioning signal, and output the corresponding first digital signal and second digital signal. The digital processing module is connected to the analog-to-digital conversion unit and is used to receive the first digital signal and the second digital signal, calculate the peak-to-peak value of the signal through extreme value detection logic, and perform Fourier transform to extract the amplitude and phase information of the signal, and calculate the real-time impedance of the VLF antenna based on the amplitude and phase information.

[0006] According to the impedance measurement circuit suitable for VLF antennas, the unbalanced current detection and conditioning circuit includes a T-type feedback network transimpedance amplifier and a configurable gain amplification network connected in sequence. The T-type feedback network transimpedance amplifier is used to convert the unbalanced current signal into a voltage signal and perform preliminary amplification, while filtering out high-frequency noise through debiasing and low-pass filtering. The configurable gain amplification network is used to amplify the initially amplified voltage signal a second time, so that its amplitude meets the input requirements of the analog-to-digital conversion unit, and outputs the first conditioning signal.

[0007] According to the impedance measurement circuit suitable for VLF antennas, the unbalanced current detection and conditioning circuit further includes an adaptive filtering circuit. The adaptive filtering circuit is located before the output of the configurable gain amplifier network and the analog-to-digital conversion unit. The adaptive filtering circuit is used to perform real-time noise suppression on the amplified voltage signal before analog-to-digital conversion.

[0008] According to the impedance measurement circuit applicable to VLF antennas, the voltage signal isolation circuit is a buffer with high input impedance and low output impedance, used to isolate the influence of subsequent circuits on the reference voltage signal source.

[0009] According to the impedance measurement circuit suitable for VLF antennas, the analog-to-digital conversion unit is a dual-channel high-speed analog-to-digital converter used to perform full-cycle synchronous sampling of the first conditioning signal and the second conditioning signal.

[0010] According to the impedance measurement circuit suitable for VLF antennas, the digital processing module is a field-programmable gate array (FPGA) configured to perform the following operations: Extremum detection is performed on the first digital signal and the second digital signal to obtain the maximum and minimum values ​​of the waveform samples; The peak-to-peak value of the signal is calculated based on the maximum and minimum values. Perform a Fourier transform on the full-cycle sampled data to extract the amplitude ratio and phase difference of the first digital signal and the second digital signal in the VLF band; Based on the amplitude ratio and phase difference, and in conjunction with the reference impedance value, the load impedance of the VLF antenna is calculated.

[0011] According to the impedance measurement circuit applicable to VLF antennas, the hardware circuit module further includes a pure resistance sampling network, which includes resistors R1 and R2 connected in series, and the resistance values ​​of R1 and R2 are much larger than the impedance of the load being measured. The pure resistance sampling network is used to sample the voltage across the reference impedance and the voltage across the load impedance, and maintains the signal phase relationship unchanged during the sampling process, only scaling the amplitude proportionally.

[0012] According to the impedance measurement circuit suitable for VLF antennas, the digital processing module is implemented by a field-programmable gate array (FPGA).

[0013] The impedance measurement circuit for VLF antennas provided by this invention has the following advantages compared with the prior art: By amplifying and filtering the signal through a signal sampling and conditioning module, combined with the computational analysis of the digital processing module, the powerful industrial noise and pulsed antenna noise interference in the VLF band can be effectively suppressed. By employing full-cycle direct sampling and high-speed digital signal processing using an FPGA, the complex down-conversion and other steps in traditional methods are avoided, resulting in a simple and efficient algorithm that enables real-time measurement of antenna impedance. Furthermore, the architecture combining pure hardware circuitry and digital logic offers higher stability and reliability compared to solutions relying on precision analog devices. By executing algorithms such as Fourier Transform (FFT) through the digital processing module, amplitude and phase information are directly extracted from the sampled signal, achieving vector measurement of antenna impedance. This allows for precise decomposition of the real and imaginary parts of the impedance, fundamentally solving the problem of low accuracy in traditional resonant methods that can only obtain scalar data. This invention, through the collaborative work of the hardware circuit module and the digital processing module, suppresses strong noise interference and achieves high-precision, real-time, and reliable vector measurement of VLF antenna impedance even in noisy environments. Attached Figure Description

[0014] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0015] Figure 1 This is a schematic diagram of an optional impedance measurement circuit for VLF antennas provided in an embodiment of the present invention; Figure 2This is a schematic diagram of an optional impedance measurement circuit provided in an embodiment of the present invention. Detailed Implementation

[0016] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0017] It should be noted that in the description of the embodiments of the present invention, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element. The terms "upper," "lower," etc., indicating orientation or positional relationships are based on the orientation or positional relationships shown in the accompanying drawings and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present invention. Unless otherwise expressly specified and limited, the terms "installed," "connected," and "linked" should be interpreted broadly, for example, as a fixed connection, a detachable connection, or an integral connection; a mechanical connection or an electrical connection; a direct connection or an indirect connection through an intermediate medium; or a connection within two elements. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0018] The impedance measurement circuit for VLF antennas provided in this embodiment of the invention includes: a hardware circuit module and a digital processing module. The hardware circuit module includes an unbalanced current detection and conditioning circuit, a voltage signal isolation circuit, and an analog-to-digital conversion unit. The unbalanced current detection and conditioning circuit is used to detect the unbalanced current signal generated by the VLF antenna, convert it into a voltage signal, amplify and filter it, and output the first conditioning signal. The voltage signal isolation circuit is used to isolate and buffer the reference voltage signal, maintain signal integrity, and output a second conditioning signal; The analog-to-digital conversion unit is used to synchronously sample and quantize the first conditioning signal and the second conditioning signal, and output the corresponding first digital signal and second digital signal. The digital processing module is connected to the analog-to-digital conversion unit and is used to receive the first digital signal and the second digital signal. It calculates the peak-to-peak value of the signal through extreme value detection logic and performs Fourier transform to extract the amplitude and phase information of the signal. Based on the amplitude and phase information, it calculates the real-time impedance of the VLF antenna.

[0019] The present invention will now be described in detail with reference to the accompanying drawings and specific embodiments.

[0020] The impedance measurement system provided by this invention achieves high-precision, real-time vector measurement of VLF antenna impedance through the coordinated operation of hardware circuit modules and digital processing modules, effectively overcoming the measurement challenges in high-noise environments. The hardware circuit module is used to acquire, condition, and digitize the analog signal at the antenna end; the digital processing module is used to perform calculations and analysis on the digitized signal, ultimately extracting the impedance parameters.

[0021] In one specific embodiment Figure 1 A schematic diagram of an optional impedance measurement circuit for VLF antennas provided in an embodiment of the present invention is shown below. Figure 1 The block diagram shown is illustrated. The hardware circuit module specifically includes an unbalanced current detection and conditioning circuit, a voltage signal isolation circuit, and an analog-to-digital converter unit.

[0022] The unbalanced current detection and conditioning circuit is used to detect the unbalanced current signal generated by the VLF antenna. i This unit employs a two-stage signal conditioning architecture to improve detection sensitivity. The first stage uses a T-type feedback network transimpedance amplifier (TIA) to convert the weak imbalance current into a voltage signal and perform preliminary amplification, while filtering out interference and high-frequency noise through a built-in debiasing circuit and low-pass filter. Subsequently, the signal enters the second stage's configurable gain amplifier network (AMP) for further amplification, bringing its amplitude to a level suitable for processing by the subsequent analog-to-digital conversion unit.

[0023] Optionally, an adaptive filtering module is provided before the signal enters the analog-to-digital conversion unit to suppress residual noise interference in the unbalanced voltage response signal in real time. The voltage signal isolation circuit is specifically a buffer (BUF) connected to the measured voltage signal. u 0 is used for isolation to prevent subsequent circuits from affecting the signal source while maintaining signal integrity. The analog-to-digital conversion unit uses a high-speed analog-to-digital converter (ADC) to process the conditioned signal. u 0 and isolated voltage signal Perform full-cycle sampling and quantization to output the corresponding first and second digital signals.

[0024] In a preferred embodiment, the digital processing module is implemented by a field-programmable gate array (FPGA), which receives a first digital signal and a second digital signal from the analog-to-digital converter (ADC). The FPGA, through its internal logic, first performs extremum detection on the digital signals to quickly obtain the maximum value Dmax and minimum value Dmin of the waveform samples, and calculates the peak-to-peak value of the signal accordingly. More importantly, the FPGA executes algorithms such as Fourier transform (FFT), RMS value calculation, and spectrum analysis to accurately extract the voltage signal from the sampled time-domain signal. u 0 and The amplitude information (U0, U1) and phase information (φ0, φ1).

[0025] Based on the extracted amplitude ratio and phase difference, and combined with the known value of the reference bridging impedance Z0, the formula can be used to... (1) The above formula contains (2) Substituting into equation (1), we get: (3) in, Sampling signal U 0、 U 1 and R 1. R 2. Satisfy the following formula (4) In the sampling circuit R 1. R 2 is pure resistance, when R 1. R 2 is much greater than Z L When sampling, the phase of the detected signal across impedance Z0 is not affected; only the amplitude is proportionally reduced. Therefore, the ratio of vector voltages can be expressed as: (5) Among them | U 0|、| U 1| represents the amplitude of the sampled signal. φ 0- φ 1 represents the phase difference. For U 0、 U 1. By analyzing and processing the sampled data, phase and amplitude information can be extracted, and the load impedance can be calculated. Z L .

[0026] (6) The magnitude and phase angle of the load impedance ZL of the VLF antenna are calculated, thereby determining its real-time impedance. The digital processing module directly processes the sampled data, eliminating the need for complex steps such as digital down-conversion and Hilbert transform, resulting in a simple and efficient algorithm.

[0027] Based on the content disclosed in the above embodiments, as an optional embodiment, in an impedance measurement circuit suitable for VLF antennas provided in this embodiment, the unbalanced current detection and conditioning circuit includes a T-type feedback network transimpedance amplifier and a configurable gain amplification network connected in sequence. The T-type feedback network transimpedance amplifier is used to convert the unbalanced current signal into a voltage signal and perform preliminary amplification, while filtering out high-frequency noise through debiasing and low-pass filtering. The configurable gain amplification network is used to amplify the initially amplified voltage signal a second time, so that its amplitude meets the input requirements of the analog-to-digital conversion unit, and outputs the first conditioning signal.

[0028] In this embodiment, the T-type feedback network transimpedance amplifier (TIA) is key to achieving high-sensitivity current detection in the imbalance current detection and conditioning circuit. For example, the TIA can detect weak imbalance currents ranging from nanoamperes to microamperes. i 0 is converted to a voltage signal in the millivolt range. The gain of the configurable gain amplifier network (AMP) can be dynamically adjusted according to the actual signal strength, for example, by controlling a digital potentiometer via an FPGA or by selecting different feedback resistor networks, ensuring that the output signal amplitude is always within the optimal quantization range of the ADC.

[0029] Furthermore, the imbalance current detection and conditioning circuit also includes an adaptive filtering circuit; the adaptive filtering circuit is located before the output of the configurable gain amplifier network and the analog-to-digital conversion unit, and the adaptive filtering circuit is used to perform real-time noise suppression on the amplified voltage signal before analog-to-digital conversion.

[0030] In this embodiment, the adaptive filtering module can use an adaptive filter based on the least mean square (LMS) algorithm to update the filter coefficients in real time according to the signal characteristics, so as to suppress noise in a specific frequency band in the best way.

[0031] Based on the content disclosed in the above embodiments, as an optional embodiment, in an impedance measurement circuit suitable for VLF antennas provided in this embodiment, the voltage signal isolation circuit is a buffer with high input impedance and low output impedance, used to isolate the influence of subsequent circuits on the reference voltage signal source.

[0032] In this embodiment, for the voltage signal isolation circuit, the buffer (BUF) can be constructed using an operational amplifier with a high unity-gain bandwidth product, extremely high input impedance (e.g., greater than 1 GΩ), and extremely low output impedance (e.g., less than 1 Ω) to form a voltage follower circuit. This effectively isolates the loading effect of subsequent circuit loads such as the analog-to-digital converter on the high-impedance signal source (i.e., the voltage sampling point), ensuring the measured voltage signal... u The waveform and amplitude of 0 are not distorted.

[0033] Based on the content disclosed in the above embodiments, as an optional embodiment, this embodiment provides an impedance measurement circuit suitable for VLF antennas, wherein the analog-to-digital conversion unit is a dual-channel high-speed analog-to-digital converter, used to perform full-cycle synchronous sampling of the first conditioning signal and the second conditioning signal.

[0034] In this embodiment, the sampling rate of the analog-to-digital conversion unit (ADC) should be much higher than the highest frequency component of the VLF signal. For example, for a VLF signal with a frequency of 20kHz, the sampling rate can be set to 1MHz or higher to satisfy the Nyquist sampling theorem and ensure the capture of waveform details. The dual-channel ADC needs to maintain synchronous sampling to accurately retain the two voltage signals. u 0 and The original phase relationship between them is the basis for subsequent accurate vector calculations.

[0035] Based on the content disclosed in the above embodiments, as an optional embodiment, in the impedance measurement circuit suitable for VLF antennas provided in this embodiment, the digital processing module is a field-programmable gate array, which is configured to perform the following operations: Extremum detection is performed on the first digital signal and the second digital signal to obtain the maximum and minimum values ​​of the waveform samples; The peak-to-peak value of the signal is calculated based on the maximum and minimum values. Perform a Fourier transform on the full-cycle sampled data to extract the amplitude ratio and phase difference of the first digital signal and the second digital signal in the VLF band; Based on the amplitude ratio and phase difference, and in conjunction with the reference impedance value, the load impedance of the VLF antenna is calculated.

[0036] In this embodiment, for the digital processing module, the extremum detection logic implemented inside the FPGA can track the peak value of the input digital signal in real time through a comparator array. The number of points in the Fourier Transform (FFT) can be configured according to accuracy and speed requirements, such as using a 1024-point or 2048-point FFT to achieve a balance between frequency resolution and computation time. The FPGA directly obtains the spectral components of the signal at a specific frequency (i.e., the test frequency) through FFT operations, thereby accurately reading its amplitude and phase.

[0037] Based on the content disclosed in the above embodiments, as an optional embodiment, in the impedance measurement circuit suitable for VLF antennas provided in this embodiment, the hardware circuit module further includes a pure resistance sampling network, which includes resistors R1 and R2 connected in series, and the resistance values ​​of R1 and R2 are much larger than the impedance of the load being measured. The pure resistance sampling network is used to sample the voltage across the reference impedance and the voltage across the load impedance, and maintains the signal phase relationship unchanged during the sampling process, only scaling the amplitude proportionally.

[0038] In this embodiment, the pure resistive sampling network, and its specific circuit connection can be found in [reference needed]. Figure 2 The reference bridging impedance Z0 is typically a high-precision resistor with a low temperature coefficient and a known resistance value. The sampling resistors R1 and R2 are also high-precision metal film resistors or other purely resistive components, and their sum (R1+R2) is much larger than the maximum expected value of the measured load impedance ZL, for example, more than 10 times greater than ZL. This ensures that the vast majority of the current flowing through Z0 flows into ZL, the shunting effect of the sampling network is negligible, and the sampling process only attenuates the signal amplitude by a fixed proportion, for example, an attenuation ratio of R2 / (R1+R2), without introducing additional phase shift. The voltage signals u0 and u1 are obtained by voltage division from Z0 and ZL respectively through this purely resistive network.

[0039] It is worth noting that the simplified algorithm of the digital processing module is reflected in the fact that, due to the use of a high-speed ADC to directly sample the VLF signal throughout its entire cycle, complete signal waveform data is obtained. Therefore, unlike traditional superheterodyne receivers, it is not necessary to first digitally down-convert the signal to baseband before processing. Furthermore, the FFT transform itself can directly provide the frequency domain amplitude and phase information of the signal, thus eliminating the need to use the Hilbert transform to construct an analytic signal to obtain instantaneous phase and amplitude. This significantly reduces the logic resource consumption and computational latency of the FPGA, improves the real-time performance of the system, and effectively solves the technical problem of high-precision vector impedance measurement in high-noise environments.

[0040] It should be noted that the above embodiments are merely examples to clearly illustrate the technical solutions of the present invention, and are not intended to limit the specific implementation of the present invention. Those skilled in the art can make other variations or modifications based on the above description, and these all fall within the protection scope of the present invention.

[0041] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

[0042] For example, individual ceramic insulator units can have skirts to increase creepage distance; the pre-tightening mechanism can also adopt a center-through tie rod; the number of insulator layers and the quantity per layer can be adjusted according to actual load and voltage requirements. All these variations and modifications should fall within the scope of protection defined by the appended claims.

Claims

1. An impedance measurement circuit suitable for VLF antennas, characterized in that, The system includes a hardware circuit module and a digital processing module. The hardware circuit module includes an imbalance current detection and conditioning circuit, a voltage signal isolation circuit, and an analog-to-digital conversion unit. The unbalanced current detection and conditioning circuit is used to detect the unbalanced current signal generated by the VLF antenna, convert it into a voltage signal, amplify and filter it, and output the first conditioning signal. The voltage signal isolation circuit is used to isolate and buffer the reference voltage signal, maintain signal integrity, and output a second conditioning signal; The analog-to-digital conversion unit is used to synchronously sample and quantize the first conditioning signal and the second conditioning signal, and output the corresponding first digital signal and second digital signal. The digital processing module is connected to the analog-to-digital conversion unit and is used to receive the first digital signal and the second digital signal, calculate the peak-to-peak value of the signal through extreme value detection logic, and perform Fourier transform to extract the amplitude and phase information of the signal, and calculate the real-time impedance of the VLF antenna based on the amplitude and phase information.

2. The impedance measurement circuit for VLF antennas according to claim 1, characterized in that, The imbalance current detection and conditioning circuit includes a T-type feedback network transimpedance amplifier and a configurable gain amplification network connected in sequence. The T-type feedback network transimpedance amplifier is used to convert the unbalanced current signal into a voltage signal and perform preliminary amplification, while filtering out high-frequency noise through debiasing and low-pass filtering. The configurable gain amplification network is used to amplify the initially amplified voltage signal a second time, so that its amplitude meets the input requirements of the analog-to-digital conversion unit, and outputs the first conditioning signal.

3. The impedance measurement circuit for VLF antennas according to claim 2, characterized in that, The imbalance current detection and conditioning circuit also includes an adaptive filter circuit; The adaptive filtering circuit is located before the output of the configurable gain amplifier network and the analog-to-digital conversion unit. The adaptive filtering circuit is used to perform real-time noise suppression on the amplified voltage signal before analog-to-digital conversion.

4. The impedance measurement circuit for VLF antennas according to claim 2, characterized in that, The voltage signal isolation circuit is a buffer with high input impedance and low output impedance, used to isolate the influence of subsequent circuits on the reference voltage signal source.

5. The impedance measurement circuit for VLF antennas according to claim 1, characterized in that, The analog-to-digital conversion unit is a dual-channel high-speed analog-to-digital converter used to perform full-cycle synchronous sampling of the first conditioning signal and the second conditioning signal.

6. The impedance measurement circuit for VLF antennas according to claim 1, characterized in that, The digital processing module is a field-programmable gate array (FPGA), which is configured to perform the following operations: Extremum detection is performed on the first digital signal and the second digital signal to obtain the maximum and minimum values ​​of the waveform samples; The peak-to-peak value of the signal is calculated based on the maximum and minimum values. Perform a Fourier transform on the full-cycle sampled data to extract the amplitude ratio and phase difference of the first digital signal and the second digital signal in the VLF band; Based on the amplitude ratio and phase difference, and in conjunction with the reference impedance value, the load impedance of the VLF antenna is calculated.

7. The impedance measurement circuit for VLF antennas according to claim 1, characterized in that, The hardware circuit module also includes a pure resistance sampling network, which includes resistors R1 and R2 connected in series, and the resistance values ​​of R1 and R2 are much larger than the impedance of the load being measured. The pure resistance sampling network is used to sample the voltage across the reference impedance and the voltage across the load impedance, and maintains the signal phase relationship unchanged during the sampling process, only scaling the amplitude proportionally.

8. The impedance measurement circuit for VLF antennas according to any one of claims 1-7, characterized in that, The digital processing module is implemented using a field-programmable gate array (FPGA).

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