Inter-process communication method, electronic equipment and storage medium

By using semaphore waiting and event-driven mechanisms in shared memory, the problem of balancing processor resource consumption and latency in inter-process communication is solved, achieving low-latency and high-efficiency inter-process communication, which is suitable for autonomous driving systems.

CN121597435APending Publication Date: 2026-03-03GREAT WALL MOTOR CO LTD
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Patent Information

Application Number
CN202511583793.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-10-31
Publication Date
2026-03-03

AI Technical Summary

Technical Problem

Existing inter-process communication technologies cannot simultaneously achieve low processor resource consumption and low communication latency, making them unsuitable for application scenarios with extremely high real-time and processor resource requirements, such as autonomous driving systems.

Method used

By employing semaphore waiting operations and event-driven mechanisms in shared memory, the receiving process remains blocked when there is no data to process, releasing processor resources. The sending process wakes up the receiving process by updating the semaphore, and completes data transmission and notification in shared memory, avoiding data copying and context switching between kernel mode and user mode.

Benefits of technology

It achieves a balance between low processor resource consumption and low communication latency, improves the efficiency and stability of multi-task collaborative processing in complex systems, ensures timely processing of critical data and high system reliability, and is suitable for applications with strict real-time requirements such as autonomous driving.

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Abstract

The invention discloses an inter-process communication method, electronic equipment and a storage medium, and relates to the technical field of communication. According to the scheme, the method comprises the following steps: executing semaphore waiting operation for an associated theme in a shared memory in a receiving end process so as to enter a blocked state and release processing resources; in a sending end process, target communication data is written into a target theme in a shared memory, a semaphore associated with the target theme is triggered to be updated to generate a target event notification, so that all receiving end processes blocked in the semaphore exit a blocked state, and the target event notification is sent to the receiving end process in the receiving end process receiving the target event notification. And obtaining target communication data from the target theme. In the scheme, the receiving end process is kept in the blocked state when no data is processed, and processor resources are not occupied; meanwhile, semaphore notification and data transmission are both completed in the shared memory, data copying and context switching between a kernel mode and a user mode are avoided, and therefore low processor resource occupation and low communication delay are achieved.
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Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to an inter-process communication method, electronic device, and storage medium. Background Technology

[0002] Currently, inter-process communication (IPC) primarily employs two mechanisms: thread polling and multicast notification. However, these two mechanisms present irreconcilable contradictions regarding key performance indicators. Thread polling relies on the receiving process periodically and actively querying data status, achieving low communication latency through continuous high-frequency checks. However, this inevitably leads to sustained high processor resource consumption, resulting in ineffective resource consumption even when no data is being transmitted. While multicast notification uses socket communication to keep processor resource consumption low, its notification data requires multiple copies from user space to kernel space and protocol stack processing, introducing significant communication latency. This inherent performance deficiency makes it impossible for current technologies to achieve an effective balance between low processor resource consumption and low communication latency, making them unsuitable for applications like autonomous driving systems that have extremely high requirements for real-time performance and processing overhead. Summary of the Invention

[0003] This application provides an inter-process communication method, electronic device, and storage medium to solve the problem that existing inter-process communication technologies cannot simultaneously achieve low processor resource consumption and low communication latency. The specific technical solution is as follows: An inter-process communication method, comprising: In the receiving process, a semaphore wait operation is performed on the associated topic in the shared memory to enter a blocked state; wherein, the shared memory is configured with at least one topic, and each topic has a semaphore-based notification mechanism; the receiving process releases processor resources in the blocked state and exits the blocked state after the semaphore is updated; In the sending process, the target communication data is written into the target topic in the shared memory; In the sending process, a target event notification is sent to all receiving processes associated with the target topic by triggering a semaphore update for the target topic; wherein the target topic corresponds to the target communication data; In the receiving process that receives the target event notification, the target communication data is obtained from the target topic in the shared memory.

[0004] Based on the inter-process communication method of this application, the receiving process remains blocked and does not occupy processor resources when there is no data processing, and is immediately awakened when there is data processing to achieve event-driven scheduling. At the same time, since semaphore notification and data transmission are both completed in shared memory, data copying and context switching between kernel mode and user mode are avoided, thus ultimately achieving both low processor resource consumption and low communication latency at the system level.

[0005] Optionally, there are multiple receiving processes, each configured with an independent semaphore. Each topic has a semaphore-based notification mechanism for each associated receiving process. This technical solution achieves fine-grained multi-channel event notification by allocating an independent semaphore to each receiving process. When a topic has data updates, only the receiving processes associated with that topic are awakened and process the data, while other receiving processes remain blocked. This design supports a communication model where one topic corresponds to multiple receiving processes while ensuring high isolation between receiving processes and the system's concurrent processing capabilities, thereby improving the efficiency and stability of multi-task collaborative processing in complex systems.

[0006] Optionally, when there are multiple target communication data points and at least two corresponding target topics, the step of retrieving the target communication data from the target topics in the shared memory during the receiving process that receives the target event notification includes: retrieving the pre-configured priority of each topic in the shared memory during the receiving process that receives the target event notification; and traversing each target topic in the shared memory in descending order of priority during the receiving process to retrieve the corresponding target communication data for each target topic. This technical solution achieves multiple benefits by introducing a priority mechanism for different topics: it ensures that data in high-priority topics always receives priority processing, and even under high system load, it guarantees that the processing latency of critical data is kept to a minimum. Simultaneously, this mechanism effectively avoids the situation where low-priority data blocks critical communication tasks through intelligent scheduling strategies, enabling the system to rationally allocate processing resources according to the actual importance of the business. This design is particularly suitable for real-time computing environments with strict requirements for task timeliness, such as autonomous driving. In autonomous driving systems, for example, obstacle detection data can be set to the highest priority to ensure that it is processed before relatively lower-priority tasks such as navigation map updates. Through this refined priority scheduling mechanism, the system can not only significantly improve the response speed to emergencies, but also optimize the overall allocation efficiency of communication resources, thereby comprehensively improving the determinism, reliability and security of system services.

[0007] Optionally, writing the target communication data into the target topic in the shared memory during the sending process includes: obtaining the pre-configured data type of each topic in the shared memory during the sending process; determining the target topic in the shared memory whose data type matches the target communication data during the sending process; and writing the target communication data into the target topic during the sending process. This technical solution achieves structured organization and type-secure transmission of communication data by pre-setting specific data types for each topic and executing a strict data type matching mechanism during the writing phase. On the one hand, it ensures that data is accurately routed to the corresponding topic according to its semantic features, avoiding logical errors or processing anomalies caused by data mismatch with topic functionality. On the other hand, it enables the receiving process to accurately obtain the required data information based on the data type association topic, improving communication accuracy and system maintainability. Furthermore, this strongly type-constrained communication model helps maintain a clear architecture during system expansion, supports isolated management of different data streams, and provides a fundamental guarantee for the parallel and reliable transmission of multiple types of data in complex systems. It is particularly suitable for scenarios where heterogeneous data such as sensor data, control commands, and status information in autonomous driving systems need to be classified and processed.

[0008] Optionally, writing the target communication data into the target topic in the shared memory during the sending process includes: binding the target communication data and the corresponding verification information to the target topic in the shared memory during the sending process; obtaining the target communication data from the target topic in the shared memory during the receiving process after receiving the target event notification includes: obtaining the target communication data and the verification information from the target topic in the shared memory during the receiving process after receiving the target event notification; and performing integrity verification on the target communication data based on the verification information during the receiving process after receiving the target event notification. This technical solution introduces a binding verification mechanism during data transmission, building a comprehensive data integrity guarantee system based on shared memory communication: the sending process synchronously generates and stores verification information when writing data, and the receiving process executes the verification process before processing data, which can effectively identify data corruption problems caused by abnormal memory access, hardware failure, or concurrency conflicts, ensuring that only complete and accurate data will be used in subsequent processing. This end-to-end verification mechanism significantly improves the reliability and robustness of the communication process, avoids system logic disorder or decision-making errors that may be caused by the propagation of erroneous data, and provides crucial data trustworthiness assurance for safety-critical systems such as autonomous driving. At the same time, this design is highly compatible with shared memory communication architecture, introduces almost no additional performance overhead, and achieves an organic unity of reliability improvement and efficient communication.

[0009] Optionally, the method further includes: if the target communication data fails the integrity verification, executing a preset security processing strategy in the receiving process that receives the target event notification, the preset security processing strategy including at least one of the following: sending a data verification anomaly alarm; requesting data retransmission; generating a data verification anomaly log. This technical solution constructs a complete error isolation and recovery system by triggering a multi-layered, configurable security processing mechanism when verification fails: the receiving process can flexibly choose from alarm, retransmission, or log recording responses according to system configuration or business needs. It can quickly report abnormal states through real-time alarms, attempt to restore data integrity through retransmission requests, and provide a basis for subsequent problem localization and system optimization through detailed log recording. This systematic fault-tolerant processing mechanism significantly enhances the self-healing capability and operational reliability of the communication system, effectively preventing cascading failures caused by a single data error, and providing key technical support for meeting functional safety requirements in safety-critical application scenarios such as autonomous driving.

[0010] Optionally, the sending process and the receiving process run on the same hardware device, and the shared memory belongs to the user space of the hardware device. This technical solution significantly optimizes communication performance at the system architecture level by limiting the communicating parties to the same physical device and utilizing user-space shared memory for data exchange. On the one hand, inter-process communication within the same device completely avoids network stack overhead such as protocol encapsulation and routing selection caused by cross-network transmission, ensuring the shortest data transmission path. On the other hand, this mechanism allows data writing and reading to be completed entirely within user-space operations on shared memory. This is fundamentally different from the traditional inter-process communication process that requires data to be passed as a message to the kernel for distribution. It eliminates the need to enter the kernel through system calls, thereby fundamentally eliminating the performance loss caused by data copying and context switching between kernel and user spaces. This tightly coupled deployment mode minimizes communication latency. Furthermore, by avoiding resource contention caused by kernel involvement, processor resources can be focused more on business logic processing, thereby further reducing the overall system's computational load while ensuring extremely low latency. This provides an optimal inter-process communication solution for localized application scenarios such as autonomous driving, which have extreme requirements for real-time performance and computational efficiency.

[0011] Optionally, the target communication data is real-time data for autonomous driving, the sending process belongs to the vehicle sensor driver, and the receiving process belongs to the vehicle control unit or the autonomous driving control task running on the vehicle processor. This technical solution deeply adapts the communication mechanism based on shared memory event notification to the real-time data processing scenario of the autonomous driving system. By constructing an efficient data path between the sensor driver and the control unit, it achieves extremely fast response from data acquisition to decision execution: the sensor driver, as the sending end, can write perceived data to shared memory with extremely low latency and immediately trigger semaphore notification, while the vehicle control unit or autonomous driving task, as the receiving end, is instantly awakened through the event-driven mechanism and obtains the latest data. This end-to-end efficient communication architecture ensures that the closed-loop response time between environmental perception and vehicle control is minimized, effectively meeting the millisecond or even microsecond real-time requirements of the autonomous driving system for key functions such as obstacle recognition and path planning. At the same time, while ensuring low latency, it significantly reduces processor resource consumption, allowing more computing resources to be used for core algorithms such as perception and decision-making, further improving the overall performance and reliability of the autonomous driving system, and providing a crucial communication foundation for the functional safety and real-time response of the intelligent driving system.

[0012] An electronic device includes: a processor; and a memory arranged to store computer-executable instructions, which, when executed, cause the processor to perform the inter-process communication method described above.

[0013] A computer-readable storage medium storing a computer program that, when executed, implements the above-described inter-process communication method.

[0014] The above description is only an overview of the technical solution of this application. In order to better understand the technical means of this application and to implement it in accordance with the contents of the specification, and to make the above and other objects, features and advantages of this application more obvious and understandable, the following are specific embodiments of this application. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 This is a flowchart illustrating the inter-process communication method according to an embodiment of this application.

[0017] Figure 2This is a schematic diagram of the inter-process communication relationship in the inter-process communication method of this application embodiment.

[0018] Figure 3 This is a schematic diagram of the structure of an inter-process communication device according to an embodiment of this application.

[0019] Figure 4 This is a schematic diagram of the structure of an electronic device according to an embodiment of this application. Detailed Implementation

[0020] To enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this specification, and not all embodiments. Based on the embodiments in this specification, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this specification.

[0021] Currently, in applications such as autonomous driving that are extremely sensitive to real-time performance and processor resources, the performance of inter-process communication is crucial. Existing communication and notification mechanisms mainly have two mainstream implementation methods, but both have inherent drawbacks: One approach is thread polling. In this mechanism, the receiving process starts a dedicated thread to actively check the data status at fixed time intervals, probing for new data arrival through continuous, high-frequency query operations. While this method can achieve lower communication latency by increasing the polling frequency, it comes at the cost of persistently high CPU resource consumption. The core issue is that regardless of whether valid data arrives, the polling action itself continuously consumes processor cycles, resulting in significant resource waste even in idle states. Specifically, the polling overhead of a single process can remain above 2%. As the number of processes in the system increases, this ineffective processor resource consumption accumulates linearly, competing with the core autonomous driving algorithms for valuable computing resources and creating a significant performance bottleneck.

[0022] The second method is multicast notification. This method uses sockets for multicast communication to transmit data arrival events, and its advantage lies in keeping processor resource consumption at a low level. However, its notification path involves a complex processing procedure: notification data needs to be copied from the user space of the publishing end to the kernel space via system calls, then encapsulated and multicasted through the network protocol stack, and finally copied back to the user space from the kernel space by the receiving end via system calls. This series of complex operations involving multiple context switches and data copies inevitably introduces communication latency, making it difficult to meet the microsecond-level instantaneous response requirements of functions such as real-time obstacle detection and avoidance in autonomous driving scenarios.

[0023] This demonstrates that existing communication and notification mechanisms face a dilemma: thread polling sacrifices processor resources for lower communication latency, while multicast notification sacrifices latency performance for lower processor resource usage. Neither approach effectively balances the two key performance indicators of low processor resource usage and low communication latency. This technical bottleneck severely restricts its application in scenarios like the aforementioned autonomous driving.

[0024] In view of this, this application proposes an inter-process communication method, electronic device, and storage medium to solve the problem that existing inter-process communication technologies cannot simultaneously achieve low processor resource consumption and low communication latency. The technical solutions provided by various embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0025] One embodiment of this application provides an inter-process communication method. Figure 1 This is a flowchart illustrating the inter-process communication method, which includes the following steps: S101, the receiving process performs a semaphore wait operation for the associated topic in the shared memory to enter a blocked state; wherein, the shared memory is configured with at least one topic, and each topic has a semaphore-based notification mechanism; the receiving process releases processor resources in the blocked state and exits the blocked state after the semaphore is updated.

[0026] This embodiment is applicable to scenarios requiring efficient communication between multiple processes running on the same hardware device, such as real-time data exchange between sensor data processing and decision control processes in an autonomous driving system. To achieve this goal, this embodiment can use the user-mode shared memory of the hardware device as a cross-process communication channel. This design has dual advantages: Firstly, since all communication processes reside within the same hardware device, the network stack processing overhead, such as protocol encapsulation and routing selection, required for cross-network transmission is completely avoided, achieving optimal data transmission paths. Secondly, data interaction through user-mode shared memory eliminates the need for read / write operations to enter kernel mode via system calls, fundamentally eliminating the performance overhead caused by data copying and context switching between kernel and user modes in traditional multicast notification methods. This significantly reduces processor resource consumption while ensuring low latency.

[0027] Based on this architecture, the shared memory region is divided into multiple independent logical topics. Each topic corresponds to a data communication channel with a specific data type, achieving logical isolation and classified management of data. Each topic is configured with a dedicated event notification mechanism based on semaphores, forming a complete data-notification correspondence. Semaphores, as inter-process synchronization primitives provided by the operating system, play a core role in event triggering and resource scheduling in this scheme: they create and maintain an integer counter and a corresponding waiting queue in shared memory. Receiver processes enter a blocked state by performing a waiting operation and release processor resources. After writing data to a topic, the sending process triggers a semaphore update operation to increment the counter, simultaneously waking up all receiver processes in the waiting queue, thus constructing an efficient event-driven communication mechanism. This design ensures precise synchronization between data readiness and process wake-up—when the sending end completes data writing and triggers a semaphore update, it not only signifies that new data is ready, but more importantly, it immediately wakes up all receiver processes waiting for the semaphore, achieving seamless connection from data readiness to process response. This ensures timely processing of critical data and maximizes the utilization efficiency of processor resources.

[0028] In summary, this event-driven communication mechanism ensures that the receiving process does not occupy processor resources when there are no data processing tasks, fundamentally avoiding the resource waste caused by polling. Simultaneously, once new data arrives, the receiving process can be immediately awakened and put into operation, achieving a highly efficient resource scheduling mode of "processing tasks immediately when available and completely sleeping when there are no tasks." This resource management mechanism is particularly suitable for applications with extremely high real-time requirements, such as autonomous driving, ensuring timely processing of critical data while maximizing the utilization efficiency of processor resources.

[0029] S102, the target communication data is written to the target topic in shared memory during the sending process.

[0030] S103, in the sending process, by triggering the semaphore update of the target topic, a target event notification is sent to all receiving processes associated with the target topic; wherein, the target topic corresponds to the target communication data.

[0031] In S102 and S103 above, this embodiment achieves data classification management and precise routing by establishing independent topic channels for different data types in shared memory: each topic is bound to a specific data type upon creation, defining its data format and business semantics; when the sending process transmits data, it automatically matches the corresponding topic channel according to the characteristics of the data content, ensuring accurate semantic routing of the data; the receiving process can associate specific topics as needed to accurately obtain the required data, avoiding receiving information with incorrect format or semantics. This strong type constraint not only ensures that data of different natures are logically completely isolated, guaranteeing the reliability of transmission, but also significantly improves the maintainability and processing efficiency of the system. Especially in application scenarios of complex systems such as autonomous driving, the value of this communication paradigm is particularly prominent. When multiple heterogeneous data streams need to be processed simultaneously, including raw perception data collected by sensors, control commands generated by the decision-making system, and vehicle operating status information, these data not only differ in format, but also have significant differences in real-time requirements, processing logic, and security levels. The strongly typed topic mechanism in this embodiment provides a natural isolation channel for these heterogeneous data, ensuring that various types of data can be transmitted in parallel without interference, while maintaining their respective data integrity and processing timeliness. This carefully designed communication architecture lays a solid technical foundation for building a highly reliable and real-time autonomous driving system, enabling various types of critical data to flow safely and efficiently within complex software systems.

[0032] In practical deployments, this embodiment typically needs to support scenarios where multiple receiving processes run in parallel. To effectively address this one-to-many communication requirement, each receiving process is allocated an independent semaphore resource, and each data topic establishes a dedicated notification channel based on the corresponding semaphore for each receiving process associated with it. This architecture design implements a fine-grained multi-channel event notification mechanism. Each semaphore maintains independent state management and a waiting queue, ensuring that the wake-up and data processing of any receiving process do not interfere with other receiving processes associated with the same topic. This highly isolated design guarantees the operational independence between multiple receiving processes; even if a receiving process is temporarily unable to respond in time due to a large processing load, it will not affect the normal reception and processing of data by other receiving processes. This parallel notification architecture demonstrates significant advantages when data needs to be transmitted to multiple receiving processes simultaneously. After the sending process writes the data to shared memory, it triggers the semaphores of all associated receiving processes simultaneously through atomic operations. This process is completed in a very short time with almost no additional synchronization overhead. All receiver processes associated with this topic can be woken up almost simultaneously and begin parallel data processing, significantly improving the system's throughput efficiency in high-concurrency scenarios. Of particular note is that this architecture provides excellent system stability while ensuring high performance. Because the receiver processes are completely isolated, an anomaly or crash in one process will not affect the normal operation of other processes, laying a solid foundation for building a highly reliable distributed system. In applications such as autonomous driving and industrial control, where system stability requirements are extremely high, this communication mechanism, which guarantees both real-time performance and system robustness, is of great value, providing reliable technical support for multi-task collaborative processing in complex environments.

[0033] Once the target communication data is successfully written to the target topic, the sending process immediately triggers update operations for all semaphores associated with that topic. This semaphore update constitutes the core mechanism of event notification—each updated semaphore immediately wakes up the corresponding receiving process waiting for that semaphore. Importantly, this notification mechanism is fully synchronous and triggered instantly; once the data writing is complete, all relevant receiving processes receive the notification almost simultaneously, enabling them to immediately begin attempting to acquire the target communication data. This sophisticated coordination mechanism ensures extremely rapid response throughout the entire process, from data readiness to process wake-up, providing reliable infrastructure support for high real-time applications.

[0034] S104, in the receiving process that receives the target event notification, the target communication data is obtained from the target topic in shared memory.

[0035] In this embodiment, after the receiving process is awakened by the target event notification, its core task is to obtain the target communication data from the target topic in shared memory, completing the final step of cross-process communication. That is, all communication processes run on the same physical device and exchange data by directly reading and writing to user-mode shared memory. This design brings two key advantages: in terms of data transmission path, the path from writing to reading is minimized because the processing overhead of the network protocol stack is completely avoided; in terms of system resource usage, all data operations are completed in user space without kernel involvement, fundamentally eliminating the performance loss caused by data copying and context switching between kernel and user modes. The actual effect of this deployment mode is reflected in two key indicators: communication latency is reduced to a minimum, while processor resource consumption is significantly optimized. Specifically, because resource contention caused by kernel scheduling is avoided, the CPU can focus more on actual business logic calculations rather than being consumed in the communication process itself. This optimization of resource usage is particularly evident when the system load is high. For application scenarios such as autonomous driving, which have strict requirements for real-time performance and computational efficiency, this communication scheme provides an ideal solution. The system ensures that the entire processing chain, from sensor data acquisition to control command generation, meets stringent timing requirements, while prioritizing limited computing resources for critical decision-making and control tasks. This efficient inter-process communication mechanism provides a crucial foundation for building highly reliable and real-time autonomous driving systems.

[0036] To ensure timely processing of critical business data, this embodiment sets independent priority parameters for each topic in shared memory. During actual operation, when multiple target communication data exist and correspond to at least two different target topics, the receiving process initiates a priority scheduling mechanism: first, it scans the priority parameters of all target topics, then establishes processing queues in descending order of priority, and sequentially retrieves the corresponding target communication data from each target topic. Furthermore, for multiple target topics with the same priority, the receiving process can use auxiliary strategies such as creation time or topic ID order to determine the processing order, ensuring the determinism of the scheduling process. This priority-based sequential processing mechanism has significant practical value. It ensures that high-priority target topics always receive priority processing rights. For example, in an autonomous driving system, a target topic carrying obstacle detection data can be processed before a target topic carrying map update data, enabling the system to respond to sudden safety risks first. Simultaneously, this mechanism effectively avoids the situation where low-priority target topics block high-priority target topics through a reasonable queuing strategy, ensuring the effective utilization of system resources. From a system optimization perspective, this priority scheduling design brings multiple benefits. First, it minimizes the processing latency of data in high-priority target topics, which is crucial for security-critical applications. Second, it enables the system to dynamically adjust the processing order of target topics based on actual business needs, improving the intelligence level of resource scheduling. Furthermore, the clear prioritization of target topics provides a clear basis for system performance analysis and optimization.

[0037] Furthermore, to ensure the accuracy and integrity of data transmission, this embodiment also establishes a data verification mechanism. During the data writing phase, the sending process generates corresponding verification information for the target communication data and binds both as a complete data unit into the target topic in shared memory. This verification information can be a checksum calculated using a specific algorithm, a cyclic redundancy check code, or other forms of digital fingerprint, capable of uniquely identifying the integrity of the data. When the receiving process is awakened, it synchronously acquires the target communication data and its corresponding verification information, and performs integrity verification on the target communication data based on the verification information. That is, the receiving process uses the same verification algorithm as the sending process to perform real-time calculations on the acquired data and compares the calculation results with the received verification information. This integrity verification process can promptly detect potential transmission errors, memory access anomalies, or other data corruption issues before the data is officially used. If the target communication data passes the integrity verification, the receiving process can safely use the target communication data to continue subsequent processing. If the target communication data fails integrity verification, the receiving process will initiate a pre-defined multi-layered security handling procedure. For example, for critical data errors requiring immediate response, a real-time alarm signal can be sent; for data transmissions allowed to be retried, a data retransmission request can be initiated; and a detailed verification exception log can be generated, providing a reliable basis for subsequent problem analysis and system optimization. This end-to-end verification mechanism not only effectively prevents cascading failures caused by a single data error but also significantly improves the system's self-healing capabilities and operational reliability. Especially in safety-sensitive application scenarios such as autonomous driving, this mechanism provides crucial protection for ensuring the accurate transmission of critical data, enabling the entire communication system to maintain stable operation even in the event of intermittent errors, and building a solid and reliable data transmission foundation for upper-layer applications.

[0038] It should be noted that the communication method proposed in this embodiment can be deeply integrated into the operating system level, with the operating system itself uniformly coordinating and managing the complete communication process between the sending and receiving processes. Specifically, the operating system, through its underlying process scheduling mechanism, controls the receiving process to perform semaphore waiting operations, causing it to enter a blocked state and release processor resources. Simultaneously, it monitors the data writing behavior of the sending process and accurately triggers the semaphore update operation after the data is successfully written to shared memory. When the semaphore state changes, the operating system immediately responds to this event, quickly waking up all receiving processes blocked by the semaphore and reallocating processor resources to these processes, ensuring they can promptly execute data reading and subsequent processing tasks. This communication mechanism, fully managed by the operating system at the system level, significantly improves the reliability and timeliness of the communication process through the atomicity guarantee of semaphore operations and the real-time response of process scheduling, thus providing a stable and reliable underlying communication guarantee for high real-time application scenarios such as autonomous driving and industrial control.

[0039] To help better understand the inter-process communication mechanism of this embodiment, it is now combined with Figure 2 The architecture diagram shown below provides a detailed explanation. Assume a hardware device is running 2 sending processes and 3 receiving processes. Each receiving process is configured with an independent semaphore resource: receiving process 1 uses semaphore 1, receiving process 2 uses semaphore 2, and receiving process 3 uses semaphore 3. Six independent topics (topics 1 to 6) are divided within the shared memory region, and each topic establishes a notification mechanism corresponding to its associated receiving process. Figure 2 The specific configuration relationships are as follows: Receiver process 1 subscribes to topics 1 through 5, therefore these five topics are configured with a notification channel based on semaphore 1; Receiver process 2 subscribes to topics 1, 3, and 6, these three topics are configured with a notification mechanism based on semaphore 2; Receiver process 3 subscribes to topics 3 through 6, these four topics are configured with a notification mechanism based on semaphore 3. Under normal system operation, when no new notification data arrives, all three receiver processes are in a blocked state waiting for semaphores, at which point they do not occupy any processor computing resources. When sender process 2 writes new target communication data to topic 6, the communication mechanism of topic 6 will immediately trigger the update operations of its associated semaphores 2 and 3. This operation will simultaneously wake up receiver processes 2 and 3, which are waiting for these two semaphores, causing them to exit the blocked state and begin occupying processor resources to immediately read the target communication data from topic 6 and perform corresponding business processing. Furthermore, no association is established between topic 6 and receiver process 1, therefore receiver process 1 continues to remain in a blocked state, without incurring any unnecessary resource consumption.

[0040] It should be noted that the application prospects of the communication scheme described in this embodiment are not unique, and this article does not make specific limitations. Taking the typical application scenario of autonomous driving as an example, the target communication data in this case are various real-time data of autonomous driving, including but not limited to environmental perception data, vehicle status data, and decision control commands collected by sensors. In this scenario, the sending process usually belongs to the vehicle sensor driver module, which is responsible for collecting and processing data from perception devices such as LiDAR, cameras, and millimeter-wave radar; while the receiving process belongs to the vehicle control unit or various autonomous driving control tasks running on the vehicle processor, such as obstacle recognition modules, path planning modules, and decision control modules. This embodiment, based on the shared memory event notification communication mechanism, is deeply adapted to the strict requirements of autonomous driving systems for real-time data processing. By constructing an efficient data path from sensor driver to control unit, it achieves a high-speed response closed loop from data acquisition to decision execution. Specifically, the sensor driver, as the sending end, can write perception data to the shared memory area with extremely low latency and immediately trigger the corresponding semaphore notification mechanism; while the vehicle control unit or autonomous driving task, as the receiving end, is instantly awakened through the event-driven mechanism to obtain the latest data from the shared memory. This highly efficient end-to-end communication architecture ensures that the closed-loop response time between environmental perception and vehicle control is minimized, effectively meeting the millisecond- or even microsecond-level real-time requirements of autonomous driving systems for critical functions such as obstacle recognition, path planning, and emergency braking. Simultaneously, while guaranteeing extremely low communication latency, this solution significantly reduces processor resource consumption, allowing more valuable computing resources to be used for core algorithms such as perception fusion and decision planning, thereby improving the overall performance and operational reliability of the autonomous driving system. This efficient inter-process communication mechanism provides a crucial foundation for the functional safety and real-time response of intelligent driving systems, enabling the transmission and processing of various critical data within strict time limits, laying a solid technical foundation for building highly safe and reliable autonomous driving systems.

[0041] In addition, corresponding to Figure 1 The method shown in this application, in another embodiment, also provides an inter-process communication device. Wherein, Figure 3 This is a schematic diagram of the inter-process communication device 300, including: The waiting module 310 is used to perform a semaphore waiting operation on a related topic in the shared memory in the receiving process to enter a blocked state; wherein, the shared memory is configured with at least one topic, and each topic has a semaphore-based notification mechanism; the receiving process releases processor resources in the blocked state and exits the blocked state after the semaphore is updated.

[0042] The publishing module 320 is used to write target communication data into the target topic in the shared memory during the sending process; The notification module 330 is used to send a target event notification to all receiving processes associated with the target topic by triggering a semaphore update of the target topic in the sending process; wherein the target topic corresponds to the target communication data.

[0043] The acquisition module 340 is used to acquire the target communication data from the target topic in the shared memory during the receiving process that receives the target event notification.

[0044] Optionally, there are multiple receiving processes, each configured with an independent semaphore. Each topic has a semaphore-based notification mechanism for each associated receiving process. This technical solution achieves fine-grained multi-channel event notification by allocating an independent semaphore to each receiving process. When a topic has data updates, only the receiving processes associated with that topic are awakened and process the data, while other receiving processes remain blocked. This design supports a communication model where one topic corresponds to multiple receiving processes while ensuring high isolation between receiving processes and the system's concurrent processing capabilities, thereby improving the efficiency and stability of multi-task collaborative processing in complex systems.

[0045] Optionally, when there are multiple target communication data points and at least two corresponding target topics, the acquisition module 340, in the receiving process that receives the target event notification, acquires the target communication data from the target topics in the shared memory. This includes: in the receiving process that receives the target event notification, acquiring the pre-configured priority of each topic in the shared memory; and in the receiving process, traversing each target topic in the shared memory in descending order of priority to acquire the corresponding target communication data for each target topic. This technical solution achieves multiple benefits by introducing a priority mechanism for different topics: it ensures that data in high-priority topics always receives priority processing, and even under high system load, it guarantees that the processing latency of critical data is kept to a minimum. Simultaneously, this mechanism, through intelligent scheduling strategies, effectively avoids the situation where low-priority data blocks critical communication tasks, enabling the system to rationally allocate processing resources according to the actual importance of the business. This design is particularly suitable for real-time computing environments with stringent timeliness requirements, such as autonomous driving. In autonomous driving systems, obstacle detection data can be set as the highest priority, ensuring it is processed before relatively lower-priority tasks such as navigation map updates. Through this fine-grained priority scheduling mechanism, the system can not only significantly improve the response speed to emergencies but also optimize the overall allocation efficiency of communication resources, thereby comprehensively improving the determinism, reliability, and security of system services.

[0046] Optionally, the publishing module 320 writes the target communication data into the target topic in the shared memory during the sending process, including: obtaining the pre-configured data type of each topic in the shared memory during the sending process; determining the target topic in the shared memory whose data type matches the target communication data during the sending process; and writing the target communication data into the target topic during the sending process. This technical solution achieves structured organization and type-secure transmission of communication data by pre-setting specific data types for each topic and executing a strict data type matching mechanism during the writing phase. On the one hand, it ensures that data is accurately routed to the corresponding topic according to its semantic characteristics, avoiding logical errors or processing anomalies caused by data mismatch with topic functionality. On the other hand, it enables the receiving process to accurately obtain the required data information based on the data type association topic, improving communication accuracy and system maintainability. Furthermore, this strongly type-constrained communication model helps maintain a clear architecture during system expansion, supports isolated management of different data streams, and provides a fundamental guarantee for the parallel and reliable transmission of multiple types of data in complex systems. It is particularly suitable for scenarios where heterogeneous data such as sensor data, control commands, and status information in autonomous driving systems need to be classified and processed.

[0047] Optionally, the publishing module 320, in its sending process, writes the target communication data into the target topic in the shared memory, including: binding the target communication data and the corresponding verification information into the target topic in the shared memory; correspondingly, the acquiring module 340, in its receiving process after receiving the target event notification, acquires the target communication data from the target topic in the shared memory, including: acquiring the target communication data and the verification information from the target topic in the shared memory; and performing integrity verification on the target communication data based on the verification information. This technical solution, by introducing a binding verification mechanism during data transmission, constructs a comprehensive data integrity guarantee system based on shared memory communication: the sending process synchronously generates and stores verification information when writing data, and the receiving process executes the verification process before processing data, effectively identifying data corruption problems caused by abnormal memory access, hardware failure, or concurrency conflicts, ensuring that only complete and accurate data is used in subsequent processing. This end-to-end verification mechanism significantly improves the reliability and robustness of the communication process, avoids system logic disorder or decision-making errors that may be caused by the propagation of erroneous data, and provides crucial data trustworthiness assurance for safety-critical systems such as autonomous driving. At the same time, this design is highly compatible with shared memory communication architecture, introduces almost no additional performance overhead, and achieves an organic unity of reliability improvement and efficient communication.

[0048] Optionally, the device further includes: A security processing module is used to execute a preset security processing strategy in the receiving process that receives the target event notification if the target communication data fails the integrity verification. The preset security processing strategy includes at least one of the following: sending a data verification anomaly alarm; requesting data retransmission; and generating a data verification anomaly log. This technical solution constructs a complete error isolation and recovery system by triggering a multi-layered, configurable security processing mechanism when verification fails. The receiving process can flexibly choose from alarm, retransmission, or log recording responses based on system configuration or business needs. It can quickly report abnormal states through real-time alarms, attempt to restore data integrity through retransmission requests, and provide a basis for subsequent problem localization and system optimization through detailed log recording. This systematic fault-tolerant processing mechanism significantly enhances the self-healing capability and operational reliability of the communication system, effectively preventing cascading failures caused by a single data error. Simultaneously, it provides key technical support for meeting functional safety requirements in safety-critical application scenarios such as autonomous driving.

[0049] Optionally, the sending process and the receiving process run on the same hardware device, and the shared memory belongs to the user space of the hardware device. This technical solution significantly optimizes communication performance at the system architecture level by limiting the communicating parties to the same physical device and utilizing user-space shared memory for data exchange. On the one hand, inter-process communication within the same device completely avoids network stack overhead such as protocol encapsulation and routing selection caused by cross-network transmission, ensuring the shortest data transmission path. On the other hand, this mechanism allows data writing and reading to be completed entirely within user-space operations on shared memory. This is fundamentally different from the traditional inter-process communication process that requires data to be passed as a message to the kernel for distribution. It eliminates the need to enter the kernel through system calls, thereby fundamentally eliminating the performance loss caused by data copying and context switching between kernel and user spaces. This tightly coupled deployment mode minimizes communication latency. Furthermore, by avoiding resource contention caused by kernel involvement, processor resources can be focused more on business logic processing, thereby further reducing the overall system's computational load while ensuring extremely low latency. This provides an optimal inter-process communication solution for localized application scenarios such as autonomous driving, which have extreme requirements for real-time performance and computational efficiency.

[0050] Optionally, the target communication data is real-time data for autonomous driving, the sending process belongs to the vehicle sensor driver, and the receiving process belongs to the vehicle control unit or the autonomous driving control task running on the vehicle processor. This technical solution deeply adapts the communication mechanism based on shared memory event notification to the real-time data processing scenario of the autonomous driving system. By constructing an efficient data path between the sensor driver and the control unit, it achieves extremely fast response from data acquisition to decision execution: the sensor driver, as the sending end, can write perceived data to shared memory with extremely low latency and immediately trigger semaphore notification, while the vehicle control unit or autonomous driving task, as the receiving end, is instantly awakened through the event-driven mechanism and obtains the latest data. This end-to-end efficient communication architecture ensures that the closed-loop response time between environmental perception and vehicle control is minimized, effectively meeting the millisecond or even microsecond real-time requirements of the autonomous driving system for key functions such as obstacle recognition and path planning. At the same time, while ensuring low latency, it significantly reduces processor resource consumption, allowing more computing resources to be used for core algorithms such as perception and decision-making, further improving the overall performance and reliability of the autonomous driving system, and providing a crucial communication foundation for the functional safety and real-time response of the intelligent driving system.

[0051] It should be noted that the specific methods by which each module performs operations in the inter-process communication device described in the above embodiments have been described in detail in the embodiments of the method, and will not be elaborated here.

[0052] In addition, another embodiment of this application provides an electronic device. Figure 4 This is a schematic diagram of the electronic device, including a memory 401 and a processor 402. The memory 401 stores executable program code 4011, and the processor 402 is used to call and execute the executable program code 4011 to perform the electronic device control method provided in the above embodiment. The corresponding steps include: In the receiving process, a semaphore wait operation is performed on the associated topic in the shared memory to enter a blocked state; wherein, the shared memory is configured with at least one topic, and each topic has a semaphore-based notification mechanism; the receiving process releases processor resources in the blocked state and exits the blocked state after the semaphore is updated.

[0053] In the sending process, the target communication data is written into the target topic in the shared memory.

[0054] In the sending process, a target event notification is sent to all receiving processes associated with the target topic by triggering a semaphore update of the target topic; wherein the target topic corresponds to the target communication data.

[0055] In the receiving process that receives the target event notification, the target communication data is obtained from the target topic in the shared memory.

[0056] The beneficial effects of the above embodiments can be referred to the beneficial effects of the corresponding methods provided above, and will not be repeated here.

[0057] This embodiment can divide the electronic device into functional modules according to the above method example. For example, each module can correspond to a separate functional module, or two or more functions can be integrated into one processing module. The integrated module can be implemented in hardware. It should be noted that the module division in this embodiment is illustrative and only represents one logical functional division. In actual implementation, there may be other division methods.

[0058] When each functional module is divided according to its corresponding function, the electronic device may include: a waiting module, a publishing module, a notification module, and an acquisition module. It should be noted that all relevant content of each step involved in the above method embodiments can be referenced from the functional descriptions of the corresponding functional modules, and will not be repeated here.

[0059] When using integrated units, the electronic device may include a processing module and a storage module. The processing module is used to control and manage the operation of the electronic device. The storage module is used to support the execution of program code and data by the electronic device.

[0060] The processing module may be a processor or a controller, which can implement or execute the various exemplary logic blocks, modules, and circuits described in conjunction with the disclosure of this application. The processor may also be a combination of functions that implement computing capabilities, such as a combination of one or more microprocessors, a combination of digital signal processing (DSP) and microprocessors, etc., and the storage module may be a memory.

[0061] Furthermore, another embodiment of this application provides a computer-readable storage medium storing computer program code. When the computer program code is executed on a computer, the computer performs the aforementioned method steps to implement the inter-process communication method provided in the above embodiments, which includes the following steps: In the receiving process, a semaphore wait operation is performed on the associated topic in the shared memory to enter a blocked state; wherein, the shared memory is configured with at least one topic, and each topic has a semaphore-based notification mechanism; the receiving process releases processor resources in the blocked state and exits the blocked state after the semaphore is updated.

[0062] In the sending process, the target communication data is written into the target topic in the shared memory.

[0063] In the sending process, a target event notification is sent to all receiving processes associated with the target topic by triggering a semaphore update of the target topic; wherein the target topic corresponds to the target communication data.

[0064] In the receiving process that receives the target event notification, the target communication data is obtained from the target topic in the shared memory.

[0065] Through the above description of the embodiments, those skilled in the art will understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0066] In the embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0067] In the description of this application, it should be understood that if the terms "upper", "lower", "front", "rear", "left" and "right" are used to indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, they are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the position or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0068] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes the element.

[0069] The above are merely embodiments of this application and are not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

Claims

1. An inter-process communication method, characterized in that, include: In the receiving process, a semaphore wait operation is performed on the associated topic in the shared memory to enter a blocked state; wherein, the shared memory is configured with at least one topic, and each topic has a semaphore-based notification mechanism; the receiving process releases processor resources in the blocked state and exits the blocked state after the semaphore is updated; In the sending process, the target communication data is written into the target topic in the shared memory; In the sending process, a target event notification is sent to all receiving processes associated with the target topic by triggering a semaphore update for the target topic; wherein the target topic corresponds to the target communication data; In the receiving process that receives the target event notification, the target communication data is obtained from the target topic in the shared memory.

2. The method according to claim 1, characterized in that, There are multiple receiving processes, each of which is configured with an independent semaphore. Each topic has a semaphore-based notification mechanism for each associated receiving process.

3. The method according to claim 1, characterized in that, When there are multiple target communication data points, and each corresponds to at least two target topics, the step of retrieving the target communication data from the target topics in the shared memory during the receiving process that receives the target event notification includes: In the receiving process that receives the target event notification, the pre-configured priority of each topic in the shared memory is obtained; In the receiving process, each target topic in the shared memory is traversed in descending order of priority to obtain the target communication data corresponding to each target topic.

4. The method according to claim 1, characterized in that, The step of writing the target communication data into the target topic in the shared memory during the sending process includes: In the sending process, the data type pre-configured for each topic in the shared memory is obtained; In the sending process, a target topic whose data type in the shared memory matches the target communication data is determined; In the sending process, the target communication data is written into the target topic.

5. The method according to claim 1, characterized in that, The step of writing the target communication data into the target topic in the shared memory during the sending process includes: In the sending process, the target communication data and the corresponding verification information are bound and written into the target topic in the shared memory; The step of retrieving the target communication data from the target topic in the shared memory during the receiving process that receives the target event notification includes: In the receiving process that receives the target event notification, the target communication data and the verification information are obtained from the target topic in the shared memory; In the receiving process that receives the target event notification, the integrity of the target communication data is verified based on the verification information.

6. The method according to claim 5, characterized in that, Also includes: If the target communication data fails the integrity verification, a preset security processing strategy is executed in the receiving process that receives the target event notification. The preset security processing strategy includes at least one of the following: Send a data verification error alarm; Request data retransmission; Generate a data verification exception log.

7. The method according to any one of claims 1 to 6, characterized in that, The sending process and the receiving process run on the same hardware device, and the shared memory belongs to the user mode of the hardware device.

8. The method according to any one of claims 1 to 6, characterized in that, The target communication data is real-time data for autonomous driving. The sending process belongs to the vehicle sensor driver, and the receiving process belongs to the vehicle control unit or the autonomous driving control task running on the vehicle processor.

9. An electronic device, comprising: processor; And a memory arranged to store computer-executable instructions, characterized in that, when executed, the executable instructions cause the processor to perform the method as described in any one of claims 1 to 8.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed, implements the method as described in any one of claims 1 to 8.