Method for reducing electromagnetic interference of chip
By reducing the chip's operating voltage and increasing on-chip capacitors, the circuit structure is optimized, solving the problems of high cost or the need for additional external circuits in existing technologies. This achieves the effect of effectively reducing chip electromagnetic interference without increasing cost or space.
Patent Information
- Application Number
- CN202411123342.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-15
- Publication Date
- 2026-03-03
AI Technical Summary
Existing technologies for reducing chip electromagnetic interference are costly or require additional external circuitry, making them difficult to promote in cost-sensitive industries, and existing solutions are insufficient to meet customer needs.
By reducing the chip's operating voltage and increasing on-chip capacitance, the circuit structure is optimized. EDA tools are used to increase capacitance within the chip, reducing electromagnetic radiation without adding external components or materials.
Without increasing cost and space, it effectively reduces chip electromagnetic interference, ensures normal circuit operation, and saves space and cost.
Smart Images
Figure CN121597628A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of chip processing technology, and specifically relates to a method for reducing electromagnetic interference in chips. Background Technology
[0002] In the prior art, electromagnetic interference (EMI) refers to electromagnetic signals that can interfere with system performance. This interference affects circuits through power supply transmission. It is a critical design challenge for manufacturers of automotive, medical, and test and measurement equipment.
[0003] Limited and ever-shrinking circuit board space, tight design cycles, and increasingly complex circuits all make it very difficult to obtain chips with low interference. With the development of digital circuit technology, chips are becoming larger and larger, consuming more and more power, and the interference they may generate is becoming more and more serious.
[0004] To address this issue, several solutions have been proposed, including shielding based on package design and shielding based on dedicated filtering devices.
[0005] Package-based solutions reduce radiation by adding shielding materials to the outside of the chip; for example, adding a protective shell that can absorb radiation, or contact pins that can reduce radiation.
[0006] Solution based on filtering devices uses specialized devices to filter unwanted radiation. For example, capacitors can filter out some of the radiation energy, and reactance can filter out some of the radiation energy.
[0007] However, the existing technology has the following problems:
[0008] Existing solutions either increase costs, making them difficult to promote in cost-sensitive industries, or require additional external circuits, which are difficult to add arbitrarily in many application scenarios. Even if cost is not a concern, they are still difficult to meet customer needs.
[0009] In addition, the technical terms in this field also include:
[0010] ASIC (Application-Specific Integrated Circuit): This refers to a custom integrated circuit designed according to specific application requirements.
[0011] SOC: System on a chip, which implements a system on a single chip, including CPU, memory, peripherals, etc.
[0012] Decap: Decoupling capacitor, a type of on-chip capacitor.
[0013] CPU: Central Processing Unit, which executes an instruction set. Programs are compiled and executed on the CPU. EMI: Electromagnetic Interference.
[0014] MCU: Microcontroller.
[0015] Packaging: The outer casing used to mount semiconductor integrated circuit chips, which serves to fix, seal, and protect the chips.
[0016] EDA Tools: EDA, short for Electronic Design Automation, refers to the design process that utilizes computer-aided design (CAD) software to complete the functional design, synthesis, verification, and physical design (including placement, routing, layout, and design rule checking) of Very Large Scale Integration (VLSI) chips. EDA software tools can be broadly categorized into three types: chip design aids, programmable chip design aids, and system design aids. Currently, the EDA software widely used in my country and with significant influence includes system design aids and programmable chip design aids: Protel, Altium Designer, OrCAD, PCAD, LSIogic, MicroSim, ISE, Modelsim, Matlab, etc. These tools possess powerful functions and can generally be used in several areas. For example, many can perform circuit design and simulation, as well as automatic PCB placement and routing, and can output various netlist files and interfaces with third-party software. Summary of the Invention
[0017] To address the aforementioned issues, the purpose of this application is to reduce the electromagnetic radiation emitted by the chip without adding additional external circuitry or relying on special packaging materials. This application proposes a method based on on-chip capacitors and reducing operating voltage to reduce the electromagnetic radiation generated by the chip. Since it is implemented internally within the chip, it does not increase costs or occupy external space, and customers will not experience any inconvenience or incur additional costs.
[0018] Specifically, the present invention provides a method for reducing electromagnetic interference in a chip, wherein the method, in addition to reducing voltage, also simultaneously increases an on-chip capacitor for energy storage, including:
[0019] Reduce the operating voltage by 30%, for example, from 1.5V to 1.35V. Perform simulation after reducing the voltage to ensure the circuit can work normally. At the same time, optimize the operating circuit to ensure that the optimized operating circuit functions normally under low voltage. Optimization includes removing redundant calculation and control logic in the circuit. For example, what is an adder in the code can be simplified to a shifter in the actual circuit.
[0020] In addition to reducing voltage, the on-chip capacitors inside the chip are increased as much as possible within the chip area limits, generally not exceeding 1000pF. This is equivalent to storing some energy on the chip. When energy is needed, it is preferentially released from the energy stored in the chip, thus reducing external energy consumption. Increasing the internal capacitors allows the capacitors to charge when the chip is not in operation and to discharge and provide energy to the circuit when the chip is in operation. By reducing the energy consumed in the working state and providing additional energy storage capacity, the external energy consumed by the chip can be reduced, thereby reducing the electromagnetic interference generated by the chip.
[0021] The method for optimizing the normal operating circuit includes:
[0022] Increase the circuit's driving capability by increasing the circuit size, which is provided in the circuit library, to achieve better performance;
[0023] Gradually increase the driving capability by increasing the size of the circuit, which is provided in the circuit library. Evaluate whether it meets the requirements, i.e., simulate to see if the circuit is normal. If it does not meet the requirements, continue to increase the size until the evaluation shows that it meets the requirements.
[0024] The aforementioned method of optimizing the normal operating circuit while reducing voltage ensures that the optimized circuit functions normally under low voltage conditions. This is achieved through two means:
[0025] On the one hand, the design simplifies the normal operating circuit, making the structure of the operating circuit more concise and eliminating unnecessary calculation and control logic; this includes using specific division operations, where "specific" refers to division by integer powers of 2 such as 4 / 8 / 16, which can be replaced by bit shifting, that is, dividing by 2 to the power of n is equivalent to shifting right by n bits; dividing by 4 is equivalent to shifting right by 2 bits.
[0026] On the other hand, by using synthesis tools, including DesignCompiler, to increase the synthesis frequency of the synthesis tool and the operating frequency of the circuit in normal operating mode, the circuit can be guaranteed to work at lower operating voltages.
[0027] The addition of on-chip capacitors is achieved through EDA tools, which is a basic function of EDA tools. Adding capacitors of a specified capacity inside the chip is achieved through the TCL command provided by the tool, thereby reducing external power consumption.
[0028] The TCL command provided by the tool can be used to achieve the following: Assuming a 300pF capacitor is added, you can enter addDeCap 300pF on the tool's TCL command line.
[0029] The method is based on the power consumption calculation formula: power consumption = voltage squared × capacitance. It can be seen that power consumption is proportional to the square of voltage. Therefore, reducing the voltage can reduce power consumption, and at the same time, the normal function of the circuit is not affected.
[0030] The method further includes the following steps:
[0031] S1, optimize the working circuit;
[0032] S2, determine if the optimized working circuit is normal? If not, return to step S1; if yes, continue to the next step;
[0033] S3, reduce the operating voltage; at the same time, increase the on-chip capacitor; assuming a 10% voltage reduction, simulate to see if it works normally; increase the on-chip capacitor to no more than 1000pF for better circuit power supply;
[0034] S4. Further determine whether reducing the operating voltage is normal, i.e., check if the simulation circuit is normal. If yes, return to step S3; if no, stop reducing the voltage.
[0035] Therefore, the advantage of this application is:
[0036] 1. No additional external circuitry is required, saving space.
[0037] 2. No special manufacturing materials are required, saving costs.
[0038] 3. Reduce electromagnetic interference while ensuring the circuit functions properly. Attached Figure Description
[0039] The accompanying drawings, which are provided to further illustrate the invention and form part of this application, are not intended to limit the scope of the invention.
[0040] Figure 1 This is a schematic diagram illustrating the slight fluctuations in power supply as the electrical load changes.
[0041] Figure 2 This is a flowchart illustrating the method used in this application. Detailed Implementation
[0042] To better understand the technical content and advantages of the present invention, the present invention will now be described in further detail with reference to the accompanying drawings.
[0043] This invention relates to a method for reducing electromagnetic interference (EMI) from a chip. Specifically, it addresses EMI emitted by the chip through its power supply by reducing the voltage, thereby decreasing the radiated energy and ultimately reducing the output interference energy. This application proposes a solution based on on-chip capacitors and reduced operating voltage.
[0044] Electromagnetic radiation is closely related to energy consumption; fluctuations in energy consumption cause fluctuations in the electromagnetic field; maintaining stable energy consumption can reduce electromagnetic radiation. Figure 1 As shown, the actual power supply is not a stable output; it experiences slight fluctuations as the electrical load changes. Explanation: The waveform changes periodically, from peak to trough, then back to peak, and then back to trough.
[0045] According to the power consumption calculation formula: power consumption = voltage squared × capacitance, power consumption is directly proportional to the square of voltage; reducing voltage is the most obvious way to reduce power consumption; the difficulty in reducing voltage lies in ensuring that the normal function of the circuit is not affected.
[0046] This application proposes reducing the voltage, with the reduction range controlled within 30%, for example, reducing from 1.5V to 1.35V. After reducing the voltage, simulation is performed to ensure the circuit can function normally, and the normal operating circuit is optimized. Optimization methods include: increasing the circuit's driving capability by increasing the circuit size (provided in a circuit library) to achieve better performance; gradually increasing the driving capability by increasing the circuit size (also provided in a circuit library), evaluating whether it meets the requirements (i.e., simulation to check if the circuit functions normally; if not, continuing to increase the size); and ensuring the operating circuit can function normally at low voltage. This can be achieved through two methods:
[0047] On the one hand, the design simplifies the normal operating circuit, making the structure of the working circuit more concise and removing unnecessary redundant calculation and control logic on the circuit. For example, what is an adder in the code can be simplified to a shifter in the actual circuit. This includes specific division operations, such as division by integer powers of 2 like 4 / 8 / 16, which can be replaced by shifting. Specific remainder operations, such as division by the power of 2, which is equivalent to right shifting by n bits, can be replaced by bitwise operations.
[0048] On the other hand, by using the synthesis tool DesignCompiler, the synthesis frequency of the tool can be increased, thereby increasing the operating frequency of the circuit in normal operating mode, so as to ensure that the circuit can also work at a lower operating voltage.
[0049] This application also proposes that, in addition to reducing the voltage, the on-chip capacitors inside the chip should be increased as much as possible within the chip area limits, generally not exceeding 1000pF. This should be achieved using EDA tools, which is a basic function of EDA tools. Essentially, some energy is stored on the chip, and when energy is needed, it is released preferentially from the stored energy, thus reducing external energy consumption. Methods include: adding a capacitor of a specified capacity inside the chip, implemented using the TCL command provided by the tool. For example, to add a 300pF capacitor, one can enter `addDeCap300pf` on the tool's TCL command line to reduce external energy consumption. Adding internal capacitors allows the capacitors to charge when the chip is not in operation and discharge to provide energy to the circuit during operation.
[0050] By reducing the energy consumed during operation and providing additional energy storage capacity, the external energy consumed by the chip can be greatly reduced, thereby reducing the electromagnetic interference generated by the chip.
[0051] like Figure 2 As shown, the method further includes the following steps:
[0052] S1, optimize the working circuit;
[0053] S2, determine if the optimized working circuit is normal? If not, return to step S1; if yes, continue to the next step;
[0054] S3, reduce the operating voltage; at the same time, increase the on-chip capacitor; assuming a 10% voltage reduction, simulate to see if it works normally; increase the on-chip capacitor to no more than 1000pF for better circuit power supply;
[0055] S4. Further determine whether reducing the operating voltage is normal, i.e., check if the simulation circuit is normal. If yes, return to step S3; if no, stop reducing the voltage.
[0056] In summary, this application achieves a similar effect to this solution by using on-chip capacitors while reducing voltage. Existing technologies require special manufacturing materials or additional external circuitry, which increases cost and area.
[0057] Lowering voltage while optimizing circuitry: This invention does not simply reduce voltage, but also optimizes the operating circuitry; while simply reducing voltage can indeed reduce electromagnetic interference, it will also affect the normal operation of the circuit.
[0058] Adding on-chip capacitors: In addition to reducing voltage, this invention also adds on-chip capacitors for energy storage. This is a basic function of EDA tools. Adding a capacitor of a specified capacity inside the chip is achieved through the TCL command provided by the tool, further reducing external power consumption. For example, to add a 300pF capacitor, enter addDeCap 300pF on the TCL command line of the tool.
[0059] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, various modifications and variations can be made to the embodiments of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.
Claims
1. A method for reducing electromagnetic interference in a chip, characterized in that, The method, in addition to reducing the voltage, also simultaneously adds an on-chip capacitor for energy storage, including: Reduce the operating voltage, keeping the reduction within 30%; perform simulation after voltage reduction to ensure the circuit functions normally, and optimize the operating circuit to ensure normal operation under low voltage; optimization includes removing redundant calculation and control logic from the circuit. In addition to reducing voltage, the on-chip capacitors inside the chip are increased as much as possible within the chip area limits, but not exceeding 1000pF. This is equivalent to storing some energy on the chip. When energy is needed, it is released first from the energy stored in the chip, thus reducing external energy consumption. Increasing the internal capacitors allows the capacitors to charge when the chip is not in operation and to discharge and provide energy to the circuit when the chip is in operation. By reducing the energy consumed in the working state and providing additional energy storage capacity, the external energy consumed by the chip can be reduced, thereby reducing the electromagnetic interference generated by the chip.
2. The method for reducing electromagnetic interference in a chip according to claim 1, characterized in that, The method for optimizing the normal operating circuit includes: Increase the circuit's driving capability by increasing the circuit size, which is provided in the circuit library, to achieve better performance; Gradually increase the driving capability by increasing the size of the circuit, which is provided in the circuit library. Evaluate whether it meets the requirements, i.e., simulate to see if the circuit is normal. If it does not meet the requirements, continue to increase the size until the evaluation shows that it meets the requirements.
3. The method for reducing electromagnetic interference in a chip according to claim 1, characterized in that, The aforementioned method of optimizing the normal operating circuit while reducing voltage ensures that the optimized circuit functions normally under low voltage conditions. This is achieved through two means: On the one hand, the design simplifies the normal operating circuit, making the structure of the operating circuit more concise and eliminating unnecessary calculation and control logic; this includes using specific division operations, where "specific" refers to division by integer powers of 2 such as 4 / 8 / 16, which can be replaced by shifting, i.e., dividing by 2 to the power of n is equivalent to shifting right by n bits; On the other hand, by using synthesis tools, including DesignCompiler, to increase the synthesis frequency of the synthesis tool and the operating frequency of the circuit in normal operating mode, the circuit can be guaranteed to work at lower operating voltages.
4. The method for reducing electromagnetic interference in a chip according to claim 1, characterized in that, The addition of on-chip capacitors is achieved through EDA tools, which is a basic function of EDA tools. Adding capacitors of a specified capacity inside the chip is achieved through the TCL command provided by the tool, thereby reducing external power consumption.
5. The method for reducing electromagnetic interference in a chip according to claim 4, characterized in that, The TCL command provided by the tool can be used to achieve the following: Assuming a 300pF capacitor is added, you can enter addDeCap300pF on the tool's TCL command line.
6. The method for reducing electromagnetic interference in a chip according to claim 1, characterized in that, The method is based on the power consumption calculation formula: power consumption = voltage squared × capacitance. It can be seen that power consumption is proportional to the square of voltage. Therefore, reducing the voltage can reduce power consumption, and at the same time, the normal function of the circuit is not affected.
7. The method for reducing electromagnetic interference in a chip according to claim 1, characterized in that, The method further includes the following steps: S1, optimize the working circuit; S2, determine if the optimized working circuit is normal? If not, return to step S1; if yes, continue to the next step; S3, reduce the operating voltage; at the same time, increase the on-chip capacitor; assuming a 10% voltage reduction, simulate to see if it works normally; increase the on-chip capacitor to no more than 1000pF for better circuit power supply; S4. Further determine whether reducing the operating voltage is normal, i.e., check if the simulation circuit is normal. If yes, return to step S3; if no, stop reducing the voltage.