Light-emitting control circuit and control method
By combining the current control module, the time control module, and the voltage stabilization module, the problem of unstable gate voltage of thin-film transistors in the TFT driving circuit is solved, achieving uniform brightness and flicker-free display, and improving grayscale expansion and display effect.
Patent Information
- Application Number
- CN202411123579.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-15
- Publication Date
- 2026-03-03
AI Technical Summary
The unstable gate voltage of the thin-film transistor in the existing TFT driving circuit leads to unstable threshold voltage compensation, which in turn leads to unstable voltage pulse width, resulting in uneven display brightness or flickering.
A combination of a current control module, a time control module, and a voltage stabilization module is used. The voltage stabilization module performs a positive electrode reset on the light-emitting device, controls the change of the transistor's on-state time, and adjusts the voltage pulse width time to achieve stable control of the light emission time.
It achieves uniform and flicker-free display brightness, improves grayscale expansion and display effect, ensures the stability of light emission time and turn-off time, and enhances the brightness uniformity and grayscale modulation reliability of display devices.
Smart Images
Figure CN121600837A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of light emission control technology, and in particular to a light emission control circuit and control method. Background Technology
[0002] Grayscale expansion is an image processing technique used to enhance the contrast of grayscale images, making details in the image clearer. This technique improves the visual effect of an image by adjusting the distribution of grayscale values, expanding grayscale values that were originally concentrated in a certain range to the entire grayscale range.
[0003] In existing technologies, TFT (Thin Film Transistor) driving is a crucial component in Liquid Crystal Displays (LCDs), Organic Light Emitting Diode (OLED) displays, and Micro-LED displays. The main function of the TFT driving circuit is to control each pixel on the display panel, ensuring it displays the correct color and brightness.
[0004] Because existing circuits suffer from unstable gate voltages due to changes in thin-film transistor (TFT) characteristics, the threshold voltage compensation of TFTs becomes unstable, leading to unstable TFT states and ultimately unstable voltage pulse widths, resulting in uneven display brightness or flickering. Summary of the Invention
[0005] Therefore, it is necessary to provide a light-emitting control circuit and control method that can maintain uniform display brightness and prevent flickering.
[0006] A phase converter, comprising:
[0007] A current control module, which is used to control the on / off state of the display circuit based on a trigger voltage;
[0008] A time control module, the output of which is connected to a current control module via a voltage stabilization module, wherein the time control module controls the conduction time of the trigger voltage based on a trigger pulse;
[0009] A voltage stabilization module is provided, wherein the input terminal of the voltage stabilization module is connected to the output terminal of the time control module, and the output terminal of the voltage stabilization module is connected to the input terminal of the current control module. The voltage stabilization module is used to stabilize the trigger voltage.
[0010] In one embodiment, the current control module includes:
[0011] An eighth transistor is provided, the source of which is used to acquire an analog voltage input signal. The drain of the eighth transistor is connected to a second transistor, and the drain of the eighth transistor is connected to the source of the second transistor. The source of the eighth transistor is connected to the gate of the second transistor through a first capacitor. The drain of the second transistor is connected to a third transistor, and the drain of the second transistor is connected to the source of the third transistor. The gate of the third transistor is connected to a trigger voltage, and the gate of the third transistor also receives a first initial signal through a fifth capacitor. The drain of the third transistor is connected to a fourth transistor, and the drain of the third transistor is connected to the source of the fourth transistor. The gate of the fourth transistor is used to receive the first trigger signal. The drain of the fourth transistor is connected to a diode, and the drain of the fourth transistor is connected to the anode of the diode. The cathode of the diode is grounded.
[0012] In one embodiment, the time control module includes:
[0013] The fourteenth transistor has its source used to acquire an analog voltage input signal. Its drain is connected to a first transistor, and the drain of the fourteenth transistor is connected to the source of the first transistor. The source of the fourteenth transistor is connected to the gate of the first transistor via a second capacitor. The gate of the first transistor is connected to a third capacitor to receive a ramp signal. The drain of the first transistor is connected to a ninth transistor, and the drain of the first transistor is connected to the source of the ninth transistor. The gate of the ninth transistor is connected to a second trigger signal. The drain of the ninth transistor is connected to a thirteenth transistor, and the drain of the ninth transistor is connected to the source of the thirteenth transistor. The gate of the thirteenth transistor is used to receive a setting signal, and the drain of the thirteenth transistor is used to receive a first initial signal.
[0014] In one embodiment, the voltage stabilization module includes:
[0015] A first inverter has its input connected to the source of the thirteenth transistor. The output of the first inverter is connected to a second inverter, which is also connected to its input. The output of the second inverter is connected to a first transmission gate and a second transmission gate. The input of the second inverter is connected to the control terminal of the first transmission gate. The inversion control terminal of the first transmission gate is connected to the control terminal of the second transmission gate. The inversion control terminal of the second transmission gate is connected to the input of the second inverter. The input of the first transmission gate receives an analog voltage input signal. The output of the first transmission gate is connected to the gate of the third transistor. The input of the second transmission gate receives a first initial signal. The output of the second transmission gate is connected to the gate of the third transistor.
[0016] In one embodiment, the voltage stabilizing module further includes:
[0017] The fifteenth transistor has a gate for receiving a second trigger signal, a source connected to the connection point of the second capacitor and the source of the fourteenth transistor, and a drain connected to the connection point of the first capacitor and the source of the eighth transistor.
[0018] In one embodiment, the voltage stabilizing module further includes:
[0019] A first inverter has its input terminal connected to the source of the thirteenth transistor. The output terminal of the first inverter is connected to the eighteenth transistor, whose gate is connected to the output terminal. The drain of the eighteenth transistor is used to connect to a first initial signal. The source of the eighteenth transistor is connected to the seventeenth transistor, whose drain is connected to the eighteenth transistor. The source of the seventeenth transistor is connected to the sixteenth transistor, whose drain is connected to the source of the seventeenth transistor. The source of the sixteenth transistor is used to connect to an analog voltage input signal. The gates of the sixteenth and seventeenth transistors are respectively connected to a reset signal.
[0020] A first transmission gate is connected at the connection between the drain of the sixteenth transistor and the source of the seventeenth transistor. The control terminal of the first transmission gate is connected to the input terminal of the first inverter, and the inversion control terminal of the first transmission gate is connected to the output terminal of the first inverter. The input terminal of the first transmission gate is used to connect an analog voltage input signal. The output terminal of the first transmission gate is connected to a third inverter, and the output terminal of the first transmission gate is connected to the input terminal of the third inverter. The output terminal of the third inverter is connected to a fourth inverter, and the input terminal of the fourth inverter is connected to the output terminal of the third inverter. The output terminal of the fourth inverter is connected to the gate of the third transistor.
[0021] In one embodiment, the current control module further includes:
[0022] The eighth transistor voltage compensation unit is used to compensate the threshold voltage of the eighth transistor. The eighth transistor voltage compensation unit includes a fifth transistor. The drain of the fifth transistor is connected to the connection between the drain of the eighth transistor and the source of the second transistor. The source of the fifth transistor is used to receive a first data signal, and the gate of the fifth transistor is used to receive a fourth trigger signal.
[0023] The second transistor voltage compensation unit is used to compensate the threshold voltage of the second transistor. The second transistor voltage compensation unit includes a seventh transistor. The drain of the seventh transistor is connected to the connection between the drain of the second transistor and the source of the third transistor. The source of the seventh transistor is connected to the connection between the drain of the sixth transistor and the gate of the second transistor. The gate of the seventh transistor is used to receive a fourth trigger signal.
[0024] In one embodiment, the current control module includes:
[0025] A first capacitor initialization unit initializes the voltage of a first capacitor based on a fifth trigger signal. The first capacitor initialization unit includes a sixth transistor, the gate of which is used to receive the fifth trigger signal, the source of which is used to receive a first initial signal, and the drain of which is connected to the gate of a second transistor.
[0026] In one embodiment, the time control module further includes:
[0027] The fourteenth transistor voltage compensation unit is used to compensate the threshold voltage of the fourteenth transistor. The first transistor voltage compensation unit includes a tenth transistor. The source of the tenth transistor is used to receive a third trigger signal. The drain of the tenth transistor is connected to the connection between the drain of the fourteenth transistor and the source of the first transistor. The gate of the tenth transistor is used to receive the third trigger signal.
[0028] The first transistor voltage compensation unit is used to compensate the threshold voltage of the first transistor. The first transistor voltage compensation unit includes an eleventh transistor. The drain of the eleventh transistor is connected to the connection between the drain of the first transistor and the source of the ninth transistor. The source of the eleventh transistor is connected to the connection between the third capacitor and the gate of the first transistor. The gate of the eleventh transistor is used to receive a third trigger signal.
[0029] Secondly, this application also provides a control method for a light-emitting control circuit, the method comprising:
[0030] The voltage of the first capacitor is initialized based on the fifth trigger signal using the first initial signal;
[0031] Based on the fourth trigger signal, the third capacitor is initialized through the twelfth transistor and the fifth and seventh transistors are turned on. The first data signal is written to the source of the second transistor and voltage compensation is performed on the second transistor.
[0032] The voltage of the first transistor is compensated based on the third trigger signal, and the thirteenth transistor is turned on. The gate of the third transistor is set to the negative voltage first initial signal.
[0033] Based on the second trigger signal, the eighth, ninth and fourteenth transistors are turned on, the third transistor is turned on through the first inverter and the second inverter, and the fifth capacitor is charged through the voltage stabilization module.
[0034] The fourth transistor is turned on based on the first trigger signal. The on-state time of the first transistor is adjusted by writing a ramp signal, thereby controlling the on-state time of the third transistor.
[0035] The above-mentioned light-emitting control circuit and method reset the light-emitting device to prevent charge residue by stabilizing the voltage module; and control the gate voltage of the transistor, thereby adjusting the change of the transistor's on-state time. By adjusting the change of the transistor's on-state time, the voltage pulse width time is adjusted, and by controlling the transistor's conduction time, the change of the light-emitting time is finally achieved to adjust the change of the display grayscale. Attached Figure Description
[0036] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0037] Figure 1 This is a schematic diagram of the light-emitting control circuit in an embodiment of this application;
[0038] Figure 2 This is a circuit diagram of the time control module;
[0039] Figure 3 This is a circuit diagram of the current control module;
[0040] Figure 4 A circuit diagram of a voltage stabilization module;
[0041] Figure 5 This is a schematic diagram of the light emission control circuit in another embodiment;
[0042] Figure 6 This is a circuit diagram of the voltage stabilization module in another embodiment;
[0043] Figure 7 This is a timing diagram of the light emission control circuit in an embodiment of this application.
[0044] Explanation of reference numerals in the attached figures:
[0045] 100. Current control module; 200. Time control module; 300. Voltage stabilization module. Detailed Implementation
[0046] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.
[0047] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
[0048] It is understood that the terms "first," "second," etc., used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.
[0049] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have electrical signal or data transmission with each other.
[0050] It is understandable that "at least one" refers to one or more, and "multiple" refers to two or more. "At least a part of an element" refers to part or all of an element.
[0051] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, the term “and / or” as used in this specification includes any and all combinations of the associated listed items.
[0052] When the ramp signal (i.e., Data_t) is written and the third trigger signal (i.e., Gn) is input at a low level, and during the threshold voltage compensation of the first transistor T1, it is easily affected by the voltage at point PW or the leakage current of the thirteenth transistor T13 and the twelfth transistor T12, resulting in unstable potential at point S, unstable threshold voltage compensation of the first transistor T1, and unstable state of the first transistor T1. Finally, after the second trigger signal EM2 is turned on, the voltage at point PW becomes unstable and the voltage pulse width becomes unstable. The effective high level of PW is narrow and the width is uneven, which ultimately leads to unstable conduction time and current of the third transistor T3, resulting in unstable and uneven LED brightness.
[0053] like Figure 1 As shown, one embodiment of the light-emitting control circuit includes a current control module, a time control module, and a voltage stabilization module. The current control module is used to control the on / off state and brightness of the LED circuit based on a trigger signal. The time control module is used to control the conduction time of the first transistor according to the trigger signal. The voltage stabilization module is used to improve and stabilize the LED light-emitting time and current by introducing voltage stabilization at points S and PW and increasing the voltage amplitude, thereby achieving better grayscale expansion and display effects.
[0054] like Figure 1 and Figure 2 As shown, the current control module includes:
[0055] The eighth transistor has its source used to acquire an analog voltage input signal. Its drain is connected to a second transistor, and the drain of the eighth transistor is connected to the source of the second transistor. The source of the eighth transistor is connected to the gate of the second transistor via a first capacitor. The drain of the second transistor is connected to a third transistor, and the drain of the second transistor is connected to the source of the third transistor. The gate of the third transistor is connected to a trigger voltage, and its gate also receives a low-level signal via a fifth capacitor. The drain of the third transistor is connected to a fourth transistor, and the drain of the third transistor is connected to the source of the fourth transistor. The gate of the fourth transistor is used to receive a first trigger signal. The drain of the fourth transistor is connected to a diode, and the drain of the fourth transistor is connected to the anode of the diode. The cathode of the diode is grounded.
[0056] like Figure 1 and Figure 3As shown, the time control module includes: a fourteenth transistor, the source of which is used to acquire an analog voltage input signal; a first transistor connected to the drain of the fourteenth transistor; the drain of the fourteenth transistor connected to the source of the first transistor; the source of the fourteenth transistor connected to the gate of the first transistor via a second capacitor; the gate of the first transistor connected to a ramp signal via a third capacitor; a ninth transistor connected to the drain of the first transistor; the drain of the first transistor connected to the source of the ninth transistor; the gate of the ninth transistor connected to a second trigger signal; a thirteenth transistor connected to the drain of the ninth transistor; the drain of the ninth transistor connected to the source of the thirteenth transistor; the gate of the thirteenth transistor used to receive a setting signal; and a low-level signal connected to the drain of the thirteenth transistor.
[0057] like Figure 1 and Figure 4 As shown, the voltage stabilization module includes:
[0058] A first inverter has its input connected to the source of the thirteenth transistor. A second inverter is connected to the output of the first inverter, and its output is connected to the input of the second inverter. The output of the second inverter is connected to a first transmission gate and a second transmission gate. The input of the second inverter is connected to the control terminal of the first transmission gate. The inversion control terminal of the first transmission gate is connected to the control terminal of the second transmission gate. The inversion control terminal of the second transmission gate is connected to the input of the second inverter. The input of the first transmission gate is used to receive an analog voltage input signal. The output of the first transmission gate is connected to the gate of the third transistor. The input of the second transmission gate is used to receive a first initial signal. The output of the second transmission gate is connected to the gate of the third transistor.
[0059] It is worth mentioning that the voltage stabilization module also includes:
[0060] The fifteenth transistor has a gate for receiving a second trigger signal, a source connected to the connection between the second capacitor and the source of the fourteenth transistor, and a drain connected to the connection between the first capacitor and the source of the eighth transistor.
[0061] In the above embodiment, when EM2 is turned on, VDDW is applied to one end of C2 through T15 to compensate for the IRDrop of VDD and ensure the stable maintenance of the power supply voltage of the current control part. At the same time, PW point is set to low level. T3 is turned on continuously so that the light-emitting device is controlled only by current, so that the LED device works at high current density and high luminous efficiency to achieve higher brightness requirements.
[0062] like Figure 5 and Figure 6 As shown, in another embodiment, the voltage stabilization module further includes:
[0063] A first inverter has its input terminal connected to the source of the thirteenth transistor. The output terminal of the first inverter is connected to the eighteenth transistor, whose gate is connected to the output terminal. The drain of the eighteenth transistor is used to connect to a first initial signal. The source of the eighteenth transistor is connected to the seventeenth transistor, whose drain is connected to the eighteenth transistor. The source of the seventeenth transistor is connected to the sixteenth transistor, whose drain is connected to the source of the seventeenth transistor. The source of the sixteenth transistor is used to connect to an analog voltage input signal. The gates of the sixteenth and seventeenth transistors are respectively connected to a reset signal.
[0064] A first transmission gate is connected at the connection between the drain of the sixteenth transistor and the source of the seventeenth transistor. The control terminal of the first transmission gate is connected to the input terminal of the first inverter, and the inversion control terminal of the first transmission gate is connected to the output terminal of the first inverter. The input terminal of the first transmission gate is used to connect an analog voltage input signal. The output terminal of the first transmission gate is connected to a third inverter, and the output terminal of the first transmission gate is connected to the input terminal of the third inverter. The output terminal of the third inverter is connected to a fourth inverter, and the input terminal of the fourth inverter is connected to the output terminal of the third inverter. The output terminal of the fourth inverter is connected to the gate of the third transistor.
[0065] In this embodiment, the voltage stabilization module can keep the voltage at point PW stable at a high level of VDDW or a low level of VGL, ensuring stable light emission and shutdown times. The Reset signal is also low when EM2 is low, turning on the sixteenth transistor and outputting the VDDW signal. In certain special cases or applications, or at other times, it is set to a high level, causing point PW to be set to a constant low level. T3 remains on, allowing the light-emitting device to be controlled only by current, enabling the LED device to operate in a high current density and high luminous efficiency state to achieve higher brightness requirements or a constant-on state for special applications.
[0066] like Figure 1 and Figure 2 As shown, the current control module also includes:
[0067] The eighth transistor voltage compensation unit is used to compensate the threshold voltage of the eighth transistor. The eighth transistor voltage compensation unit includes a fifth transistor. The drain of the fifth transistor is connected to the connection between the drain of the eighth transistor and the source of the second transistor. The source of the fifth transistor is used to receive a first data signal, and the gate of the fifth transistor is used to receive a fourth trigger signal.
[0068] The second transistor voltage compensation unit is used to compensate the threshold voltage of the second transistor. The second transistor voltage compensation unit includes a seventh transistor. The drain of the seventh transistor is connected to the connection between the drain of the second transistor and the source of the third transistor. The source of the seventh transistor is connected to the connection between the drain of the sixth transistor and the gate of the second transistor. The gate of the seventh transistor is used to receive a fourth trigger signal.
[0069] like Figure 1 and Figure 2 As shown, the current control module also includes:
[0070] The first capacitor initialization unit initializes the voltage of the first capacitor based on the fifth trigger signal. The first capacitor initialization unit includes a sixth transistor, the gate of the sixth transistor is used to receive the fifth trigger signal, the source of the sixth transistor is used to receive the first initial signal, and the drain of the sixth transistor is connected to the gate of the second transistor.
[0071] When the Gn-2 signal (i.e. the fifth trigger signal) arrives, capacitor C1 and PA are initialized to Vinit1 via T6, and the positive electrode of the light-emitting device is reset via T22 to prevent charge residue.
[0072] like Figure 1 and Figure 3 As shown, the time control module also includes:
[0073] The fourteenth transistor voltage compensation unit is used to compensate the threshold voltage of the fourteenth transistor. The first transistor voltage compensation unit includes a tenth transistor. The source of the tenth transistor is used to receive a third trigger signal. The drain of the tenth transistor is connected to the connection between the drain of the fourteenth transistor and the source of the first transistor. The gate of the tenth transistor is used to receive the third trigger signal.
[0074] The first transistor voltage compensation unit is used to compensate the threshold voltage of the first transistor. The first transistor voltage compensation unit includes an eleventh transistor. The drain of the eleventh transistor is connected to the connection between the drain of the first transistor and the source of the ninth transistor. The source of the eleventh transistor is connected to the connection between the third capacitor and the gate of the first transistor. The gate of the eleventh transistor is used to receive a third trigger signal.
[0075] like Figure 1 and Figure 3 As shown, the time control module also includes:
[0076] The third capacitor initialization unit initializes the voltage of the third capacitor based on the fourth trigger signal. The third capacitor initialization unit includes a twelfth transistor. The source of the twelfth transistor is used to receive the second initial signal, and the drain of the twelfth transistor is connected to the connection between the third capacitor and the gate of the first transistor.
[0077] The aforementioned light-emitting control circuit and method, through a hybrid analog-digital driving approach, combines the advantages of both digital and analog driving, enabling better grayscale expansion and brightness uniformity of the display device. The conversion from analog to digital driving improves the stability of the digital driving and the reliability of grayscale modulation. Simultaneously, it enhances voltage amplitude and stability, ensuring the stability and continuity of the display device's light emission, further increasing the grayscale expansion effect. This allows the voltage at point PW to quickly and stably maintain a high level at VDDW or a low level at Vinit1, ensuring stable light-emitting and off-time. When EM2 is on, VDDW is applied to one end of C2 via T15, compensating for the IRDrop in VDD and ensuring stable power supply voltage in the current control section. Simultaneously, point PW is set to a low level, and T3 remains on, allowing the light-emitting device to operate solely under current control, enabling the LED to operate at high current density and high luminous efficiency to achieve higher brightness requirements.
[0078] IRDrop refers to the voltage drop that occurs when current flows through a resistor. The impact of IRDrop in a display panel is mainly reflected in the power distribution network. When current flows from the power supply (VDD) to the driving circuit of each pixel, the voltage gradually decreases due to the resistance of the power supply line, resulting in uneven voltage: different driving voltages at different locations lead to uneven display brightness and color; and the display quality deteriorates, especially for large-size or high-resolution display panels, affecting the display effect.
[0079] like Figure 1 and Figure 5 As shown, based on the same inventive concept, this application also provides a control method for implementing the light-emitting control circuit mentioned above, the method comprising:
[0080] The voltage of the first capacitor is initialized based on the fifth trigger signal using the first initial signal;
[0081] Based on the fourth trigger signal, the third capacitor is initialized through the twelfth transistor and the fifth and seventh transistors are turned on. The first data signal is written to the source of the second transistor and voltage compensation is performed on the second transistor.
[0082] The voltage of the first transistor is compensated based on the third trigger signal, and the thirteenth transistor is turned on. The gate of the third transistor is set to the negative voltage first initial signal.
[0083] Based on the second trigger signal, the eighth, ninth and fourteenth transistors are turned on, the third transistor is turned on through the first inverter and the second inverter, and the fifth capacitor is charged through the first inverter, the second inverter, the first transmission gate and the second transmission gate.
[0084] It is worth mentioning that, in another embodiment of this application, the fifth capacitor can also be charged through the first inverter, the first transmission gate, the sixteenth transistor, the seventeenth transistor, the eighteenth transistor, the third inverter, and the fourth inverter.
[0085] The fourth transistor is turned on based on the first trigger signal. The on-state time of the first transistor is adjusted by writing a ramp signal, thereby controlling the on-state time of the third transistor.
[0086] In the description of this specification, references to terms such as "some embodiments," "other embodiments," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.
[0087] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.
[0088] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these modifications and improvements all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.
Claims
1. A light-emitting control circuit, characterized in that, include: A current control module, which is used to control the on / off state of the display circuit based on a trigger voltage; A time control module, the output of which is connected to a current control module via a voltage stabilization module, wherein the time control module controls the conduction time of the trigger voltage based on a trigger pulse; A voltage stabilization module is provided, wherein the input terminal of the voltage stabilization module is connected to the output terminal of the time control module, and the output terminal of the voltage stabilization module is connected to the input terminal of the current control module. The voltage stabilization module is used to stabilize the trigger voltage.
2. The light-emitting control circuit according to claim 1, characterized in that, The current control module includes: An eighth transistor is provided, the source of which is used to acquire an analog voltage input signal. The drain of the eighth transistor is connected to a second transistor, and the drain of the eighth transistor is connected to the source of the second transistor. The source of the eighth transistor is connected to the gate of the second transistor through a first capacitor. The drain of the second transistor is connected to a third transistor, and the drain of the second transistor is connected to the source of the third transistor. The gate of the third transistor is connected to a trigger voltage, and the gate of the third transistor also receives a first initial signal through a fifth capacitor. The drain of the third transistor is connected to a fourth transistor, and the drain of the third transistor is connected to the source of the fourth transistor. The gate of the fourth transistor is used to receive the first trigger signal. The drain of the fourth transistor is connected to a diode, and the drain of the fourth transistor is connected to the anode of the diode. The cathode of the diode is grounded.
3. The light-emitting control circuit according to claim 1, characterized in that, The time control module includes: The fourteenth transistor has its source used to acquire an analog voltage input signal. Its drain is connected to a first transistor, and the drain of the fourteenth transistor is connected to the source of the first transistor. The source of the fourteenth transistor is connected to the gate of the first transistor via a second capacitor. The gate of the first transistor is connected to a third capacitor to receive a ramp signal. The drain of the first transistor is connected to a ninth transistor, and the drain of the first transistor is connected to the source of the ninth transistor. The gate of the ninth transistor is connected to a second trigger signal. The drain of the ninth transistor is connected to a thirteenth transistor, and the drain of the ninth transistor is connected to the source of the thirteenth transistor. The gate of the thirteenth transistor is used to receive a setting signal, and the drain of the thirteenth transistor is used to receive a first initial signal.
4. The light-emitting control circuit according to claim 3, characterized in that, The voltage stabilization module includes: A first inverter has its input connected to the source of the thirteenth transistor. The output of the first inverter is connected to a second inverter, which is also connected to its input. The output of the second inverter is connected to a first transmission gate and a second transmission gate. The input of the second inverter is connected to the control terminal of the first transmission gate. The inversion control terminal of the first transmission gate is connected to the control terminal of the second transmission gate. The inversion control terminal of the second transmission gate is connected to the input of the second inverter. The input of the first transmission gate receives an analog voltage input signal. The output of the first transmission gate is connected to the gate of the third transistor. The input of the second transmission gate receives a first initial signal. The output of the second transmission gate is connected to the gate of the third transistor.
5. The light-emitting control circuit according to claim 4, characterized in that, The voltage stabilization module also includes: The fifteenth transistor has a gate for receiving a second trigger signal, a source connected to the connection point of the second capacitor and the source of the fourteenth transistor, and a drain connected to the connection point of the first capacitor and the source of the eighth transistor.
6. The light-emitting control circuit according to claim 3, characterized in that, The voltage stabilization module also includes: A first inverter has its input terminal connected to the source of the thirteenth transistor. The output terminal of the first inverter is connected to the eighteenth transistor, whose gate is connected to the output terminal. The drain of the eighteenth transistor is used to connect to a first initial signal. The source of the eighteenth transistor is connected to the seventeenth transistor, whose drain is connected to the eighteenth transistor. The source of the seventeenth transistor is connected to the sixteenth transistor, whose drain is connected to the source of the seventeenth transistor. The source of the sixteenth transistor is used to connect to an analog voltage input signal. The gates of the sixteenth and seventeenth transistors are respectively connected to a reset signal. A first transmission gate is connected at the connection between the drain of the sixteenth transistor and the source of the seventeenth transistor. The control terminal of the first transmission gate is connected to the input terminal of the first inverter, and the inversion control terminal of the first transmission gate is connected to the output terminal of the first inverter. The input terminal of the first transmission gate is used to connect an analog voltage input signal. The output terminal of the first transmission gate is connected to a third inverter, and the output terminal of the first transmission gate is connected to the input terminal of the third inverter. The output terminal of the third inverter is connected to a fourth inverter, and the input terminal of the fourth inverter is connected to the output terminal of the third inverter. The output terminal of the fourth inverter is connected to the gate of the third transistor.
7. The light-emitting control circuit according to claim 2, characterized in that, The current control module also includes: The eighth transistor voltage compensation unit is used to compensate the threshold voltage of the eighth transistor. The eighth transistor voltage compensation unit includes a fifth transistor. The drain of the fifth transistor is connected to the connection between the drain of the eighth transistor and the source of the second transistor. The source of the fifth transistor is used to receive a first data signal, and the gate of the fifth transistor is used to receive a fourth trigger signal. The second transistor voltage compensation unit is used to compensate the threshold voltage of the second transistor. The second transistor voltage compensation unit includes a seventh transistor. The drain of the seventh transistor is connected to the connection between the drain of the second transistor and the source of the third transistor. The source of the seventh transistor is connected to the connection between the drain of the sixth transistor and the gate of the second transistor. The gate of the seventh transistor is used to receive a fourth trigger signal.
8. The light-emitting control circuit according to claim 2, characterized in that, The current control module includes: A first capacitor initialization unit initializes the voltage of a first capacitor based on a fifth trigger signal. The first capacitor initialization unit includes a sixth transistor, the gate of which is used to receive the fifth trigger signal, the source of which is used to receive a first initial signal, and the drain of which is connected to the gate of a second transistor.
9. The light-emitting control circuit according to claim 3, characterized in that, The time control module also includes: The fourteenth transistor voltage compensation unit is used to compensate the threshold voltage of the fourteenth transistor. The first transistor voltage compensation unit includes a tenth transistor. The source of the tenth transistor is used to receive a third trigger signal. The drain of the tenth transistor is connected to the connection between the drain of the fourteenth transistor and the source of the first transistor. The gate of the tenth transistor is used to receive the third trigger signal. The first transistor voltage compensation unit is used to compensate the threshold voltage of the first transistor. The first transistor voltage compensation unit includes an eleventh transistor. The drain of the eleventh transistor is connected to the connection between the drain of the first transistor and the source of the ninth transistor. The source of the eleventh transistor is connected to the connection between the third capacitor and the gate of the first transistor. The gate of the eleventh transistor is used to receive a third trigger signal.
10. A control method for a light-emitting control circuit, characterized in that, Applied to any one of the light-emitting control circuits described in claims 1-9, the control method includes the following steps: The voltage of the first capacitor is initialized based on the fifth trigger signal using the first initial signal; Based on the fourth trigger signal, the third capacitor is initialized through the twelfth transistor and the fifth and seventh transistors are turned on. The first data signal is written to the source of the second transistor and voltage compensation is performed on the second transistor. The voltage of the first transistor is compensated based on the third trigger signal, and the thirteenth transistor is turned on. The gate of the third transistor is set to the negative voltage first initial signal. Based on the second trigger signal, the eighth, ninth and fourteenth transistors are turned on, the third transistor is turned on through the first inverter and the second inverter, and the fifth capacitor is charged through the voltage stabilization module. The fourth transistor is turned on based on the first trigger signal. The on-state time of the first transistor is adjusted by writing a ramp signal, thereby controlling the on-state time of the third transistor.