High-precision output voltage phase angle switching system and method based on IGBT

Abstract

This invention relates to the field of power electronic control technology, and discloses a high-precision output voltage phase angle switching system and method based on IGBTs. The system includes: a rectifier power unit for rectifying AC power through a three-phase fully controlled rectifier bridge and providing DC bus voltage; an inverter power unit for receiving the DC bus voltage, inverting the DC power into AC power through a three-phase full-bridge inverter circuit, and outputting the filtered and transformed AC power to the grid or load; and a digital control unit for receiving phase commands, calculating the phase error based on the current phase and the target phase, converting the phase error into a time offset to generate the switching timing of the insulated-gate bipolar transistor bridge arms, and generating a pulse width modulation signal after constraining and checking the switching timing to drive the inverter power unit to achieve output voltage phase angle switching control. This invention solves the problems of slow response, low accuracy, and poor waveform in output voltage phase adjustment.

Description

Technical Field

[0001] This invention relates to the field of power electronic control technology, and more specifically, to a high-precision output voltage phase angle switching system and method based on IGBT. Background Technology

[0002] With the rapid development of new energy power generation technologies such as wind power and photovoltaics, the grid-connected capacity of new energy power plants is constantly increasing, placing higher demands on the stability of the power grid and power quality. Before being connected to the grid, new energy power generation equipment must undergo rigorous dynamic characteristic tests to verify its adaptability and fault ride-through capability under abnormal operating conditions such as grid voltage amplitude fluctuations, frequency offsets, and phase jumps. Among these tests, the rapid jump of the grid phase angle is a key test item for evaluating the dynamic response performance of new energy grid-connected equipment. Therefore, there is an urgent need for testing devices that can accurately simulate the dynamic characteristics of the grid phase. Achieving rapid and accurate control of the output voltage phase angle jump is the core technical challenge of such testing devices.

[0003] Currently, the main technologies used to achieve output voltage phase regulation include mechanical phase switching devices, thyristor-based phase compensators, and digitally controlled power electronic converters. Mechanical phase switching devices change the output phase by switching different taps of the transformer using relays or contactors. Thyristor-based phase compensators achieve electronic phase regulation by adjusting the firing angle of the thyristors. Digitally controlled power electronic converters use digital signal processors or microcontrollers to generate pulse width modulation signals to drive power switching devices to achieve amplitude and phase regulation of the output voltage.

[0004] However, the above technologies all suffer from problems such as slow response speed, low control accuracy, poor waveform quality, or insufficient stability. Mechanical phase switching devices typically have a response time exceeding 100 milliseconds due to the inherent delay of mechanical contacts, which cannot meet the requirements of dynamic testing. Thyristor-based phase compensators suffer from severe output waveform distortion and total harmonic distortion typically exceeding 5% due to the semi-controlled characteristics of thyristors. Although existing digital control schemes have introduced electronic control, the lack of accurate phase error conversion algorithms and switching timing constraint mechanisms results in phase adjustment accuracy of only about ±5°. Furthermore, bridge arm shoot-through or voltage and current surges are prone to occur during rapid phase transitions, affecting system stability.

[0005] No effective solutions have yet been proposed to address the problems in the relevant technologies. Summary of the Invention

[0006] To address the problems in related technologies, this invention proposes a high-precision output voltage phase angle switching system and method based on IGBTs, in order to overcome the aforementioned technical problems existing in the prior art.

[0007] Therefore, the specific technical solution adopted by the present invention is as follows:

[0008] According to one aspect of the present invention, a high-precision output voltage phase angle switching system based on IGBT is provided, the high-precision output voltage phase angle switching system based on IGBT includes:

[0009] The rectifier power unit is used to rectify AC power through a three-phase fully controlled rectifier bridge and provide DC bus voltage to the inverter power unit;

[0010] The inverter power unit is used to receive the DC bus voltage output from the rectifier power unit, convert the DC power into AC power through a three-phase full-bridge inverter circuit, and output the filtered and transformed AC power to the power grid or load.

[0011] The digital control unit receives phase commands, calculates the phase error based on the current phase and the target phase, converts the phase error into a time offset, generates the switching timing of the insulated gate bipolar transistor bridge arm, performs constraint checks on the switching timing, and generates a pulse width modulation signal to drive the inverter power unit to achieve the jumping control of the output voltage phase angle.

[0012] Furthermore, the digital control unit includes: an FPGA main control module, used to receive phase commands and feedback signals from the phase detection feedback module, calculate the phase error in real time and convert it into a time offset, generate the switching timing of the insulated gate bipolar transistor (IGBT) bridge arm, and calculate the pulse width modulation (PWM) signal based on the switching timing; an optical fiber drive module, used to transmit the PWM signal output by the FPGA main control module through optical fiber to the IGBT drive circuit for opto-isolation, and amplify the PWM signal to ensure fast and reliable switching of the IGBT; a counter-slip compensation module, used to suppress voltage or current surges during phase transitions, and to ensure the stability of the transition process by real-time correction of the PWM signal duty cycle or the addition of a damping term; and a phase detection feedback module, used to monitor the actual phase angle of the output voltage in real time using a phase-locked loop or zero-crossing detection circuit, and to feed the detection results back to the FPGA main control module to form a closed-loop control to correct the phase error.

[0013] Furthermore, the digital control unit adopts a dual-closed-loop vector control architecture, including: an outer loop phase control loop, which generates a phase compensation amount based on the difference between the target phase and the feedback phase using a sliding mode variable structure control algorithm and outputs it to the inverter power unit; and an inner loop current control loop, which generates d-axis reference voltage and q-axis reference voltage based on the d-axis current error and the q-axis current error using a decoupling algorithm based on internal mode control, thereby achieving independent control of amplitude and phase.

[0014] Furthermore, the rectifier power unit includes: a three-phase input filter circuit, used to connect filter inductors in series in the U-phase, V-phase, and W-phase lines of the three-phase AC power supply to suppress harmonic interference and surge impact on the grid side; a multiple safety protection circuit, used to connect a fast-acting fuse in series after the filter inductor of each phase line, and to connect energy storage capacitors in parallel to ground in the U-phase, V-phase, and W-phase lines to quickly cut off the fault current path and filter out common-mode noise when the power switching device fails; a three-phase fully controlled rectifier bridge, composed of several thyristors connected in a three-phase full-bridge topology, with the gate of each thyristor connected to a digital control unit to receive trigger pulses, used to continuously regulate the DC-side output voltage by controlling the phase of the trigger pulses; and a DC bus output circuit, used to connect a large electrolytic capacitor in parallel at the output of the rectifier bridge as a DC support capacitor to provide a stable DC bus voltage to the inverter power unit.

[0015] Furthermore, the inverter power unit includes: a DC bus input circuit, used to connect to the DC bus output circuit of the rectifier power unit, and several DC support capacitors connected in parallel between the positive and negative buses to maintain the stability of the DC bus voltage during the inverter process; a three-phase full-bridge inverter circuit, consisting of several insulated-gate bipolar transistors connected in a three-phase three-level topology, with the gate of each insulated-gate bipolar transistor connected to a digital control unit to receive high-frequency pulse width modulation drive signals; an output filter circuit, used to connect filter inductors in series at each phase of the inverter bridge output, and cooperate with capacitors to form a low-pass filter to filter out high-order harmonics near the switching frequency and harmonics; a three-phase transformer, used to transform the AC voltage output by the inverter to the rated voltage level required by the power grid or load, and to achieve electrical isolation; and an AC output interface, used to output the filtered and transformed three-phase AC power to the power grid or load through a three-phase four-wire output interface.

[0016] According to another aspect of the present invention, a high-precision output voltage phase angle switching method based on IGBT is also provided, the high-precision output voltage phase angle switching method based on IGBT includes:

[0017] The alternating current is rectified through a three-phase fully controlled rectifier bridge and supplied with DC bus voltage to the inverter power unit;

[0018] It receives the DC bus voltage output from the rectifier power unit, converts the DC power into AC power through a three-phase full-bridge inverter circuit, and outputs the filtered and transformed AC power to the power grid or load.

[0019] The system receives a phase command, calculates the phase error based on the current phase and the target phase, converts the phase error into a time offset, generates the switching timing of the insulated gate bipolar transistor bridge arm, performs constraint checks on the switching timing, and generates a pulse width modulation signal to drive the inverter power unit to achieve the jumping control of the output voltage phase angle.

[0020] The beneficial effects of this invention are as follows:

[0021] (1) This invention uses an FPGA main control module to realize the accurate conversion of phase error to time offset and generate switching timing. Combined with the anti-pry compensation module, the switching timing is constrained and checked to avoid bridge arm shoot-through. The fiber optic drive module is used to realize opto-isolation and signal amplification to drive the fast switching of the insulated gate bipolar transistor. The phase detection feedback module forms a closed-loop control to correct the phase error in real time. It can complete the phase angle jump in microseconds and control the phase error within ±0.5°. Compared with the traditional mechanical phase switching device, the response time is shortened by two orders of magnitude. Compared with the thyristor-based phase compensator, the total harmonic distortion is reduced to less than 1%. Compared with the existing digital control scheme, the phase adjustment accuracy is improved by one order of magnitude. It effectively solves the strict requirements of the grid dynamic phase simulation in the grid connection test equipment of new energy power plants for response speed, control accuracy and waveform quality.

[0022] (2) The present invention adopts a dual closed-loop vector control architecture. The outer loop phase control loop generates phase compensation through sliding mode variable structure control algorithm to provide fast response and enhance system robustness. The inner loop current control loop generates d-axis and q-axis reference voltages through decoupling algorithm based on internal mode control to achieve independent control of amplitude and phase. This avoids the problem of phase fluctuation caused by amplitude adjustment or amplitude fluctuation caused by phase adjustment in traditional single variable control method, and significantly improves the performance and accuracy of the system in the phase jump process.

[0023] (3) This invention suppresses grid-side harmonic interference and surge impact by setting a three-phase input filter circuit in the rectifier power unit, and sets multiple safety protection circuits to quickly cut off the fault current path when the power switching device fails. In addition, a three-phase three-level topology is adopted in the inverter power unit to reduce switching stress and improve the output waveform quality. The output filter circuit filters out high-order harmonics near the switching frequency and the harmonics, and the three-phase transformer realizes voltage transformation and electrical isolation. The fiber optic drive module realizes opto-isolation between the digital control unit and the inverter power unit, thus constructing a multi-level comprehensive protection system from input to output and from hardware to control. When the system detects faults such as overvoltage, overcurrent, overtemperature or bridge arm shoot-through, the FPGA main control module of the digital control unit can block the pulse width modulation signal output within microseconds and quickly turn off all insulated gate bipolar transistors through the fiber optic drive module to realize emergency stop protection, effectively ensuring the reliability of the system under long-term operation and fault conditions. Attached Figure Description

[0024] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0025] Figure 1 This is a schematic block diagram of a high-precision output voltage phase angle switching system based on IGBT according to an embodiment of the present invention;

[0026] Figure 2 This is a detailed implementation diagram of the digital control unit in a high-precision output voltage phase angle switching system based on IGBT according to an embodiment of the present invention;

[0027] Figure 3 This is a topology diagram of the rectifier power unit in a high-precision output voltage phase angle switching system based on IGBT according to an embodiment of the present invention;

[0028] Figure 4 This is a topology diagram of an inverter power unit in a high-precision output voltage phase angle switching system based on IGBT according to an embodiment of the present invention;

[0029] Figure 5 This is a schematic diagram of the protection mechanism in a high-precision output voltage phase angle switching system based on IGBT according to an embodiment of the present invention;

[0030] Figure 6 This is a flowchart illustrating a high-precision output voltage phase angle switching method based on IGBT according to an embodiment of the present invention. Detailed Implementation

[0031] To further illustrate the various embodiments, the present invention provides accompanying drawings, which are part of the disclosure of the present invention. These drawings are mainly used to illustrate the embodiments and can be used in conjunction with the relevant descriptions in the specification to explain the operating principles of the embodiments. With reference to these drawings, those skilled in the art should be able to understand other possible implementation methods and the advantages of the present invention. The components in the drawings are not drawn to scale, and similar component symbols are generally used to represent similar components.

[0032] According to embodiments of the present invention, a high-precision output voltage phase angle switching system and method based on IGBT are provided.

[0033] The present invention will now be further described in conjunction with the accompanying drawings and specific embodiments, such as... Figure 1 As shown, according to an embodiment of the present invention, a high-precision output voltage phase angle switching system based on IGBT is provided, the high-precision output voltage phase angle switching system based on IGBT includes:

[0034] The rectifier power unit is used to rectify AC power through a three-phase fully controlled rectifier bridge and provide DC bus voltage to the inverter power unit;

[0035] The inverter power unit is used to receive the DC bus voltage output from the rectifier power unit, convert the DC power into AC power through a three-phase full-bridge inverter circuit, and output the filtered and transformed AC power to the power grid or load.

[0036] The digital control unit receives phase commands, calculates the phase error based on the current phase and the target phase, converts the phase error into a time offset, generates the switching timing of the insulated gate bipolar transistor bridge arm, performs constraint checks on the switching timing, and generates a pulse width modulation signal to drive the inverter power unit to achieve the jumping control of the output voltage phase angle.

[0037] In one embodiment, the digital control unit includes: an FPGA main control module, used to receive phase commands and feedback signals from the phase detection feedback module, calculate the phase error in real time and convert it into a time offset, generate the switching timing of the insulated gate bipolar transistor (IGBT) bridge arm, and calculate the pulse width modulation (PWM) signal based on the switching timing; an optical fiber drive module, used to transmit the PWM signal output by the FPGA main control module through an optical fiber to the drive circuit of the IGBT for opto-isolation, and amplify the PWM signal to ensure fast and reliable switching of the IGBT; a counter-slip compensation module, used to suppress sudden changes in voltage or current during phase transitions, and to ensure the stability of the transition process by real-time correction of the duty cycle of the PWM signal or the addition of a damping term; and a phase detection feedback module, used to monitor the actual phase angle of the output voltage in real time using a phase-locked loop or a zero-crossing detection circuit, and to feed the detection result back to the FPGA main control module to form a closed-loop control to correct the phase error.

[0038] Specifically, such as Figure 2 As shown, the digital control unit includes:

[0039] ① High-speed FPGA controller (FPGA main control module): The high-speed FPGA controller acts as the FPGA main control module, receiving phase commands and phase detection feedback signals in real time, and generating a virtual synchronization signal. This virtual synchronization signal is used to simulate the grid phase or as an internal reference to ensure phase coordination of the system when operating independently or connected to the grid. The FPGA main control module calculates the switching timing of the insulated gate bipolar transistor bridge arm (IGBT) through algorithms such as space vector modulation or direct phase control, generates a pulse width modulation signal, and outputs it to the fiber optic driver module.

[0040] ② Phase command: The phase command is an externally input phase target value, such as a jump from 0° to 30°. It is input to the FPGA main control module as the set value of the control system to drive the execution of the entire phase jump control process.

[0041] ③ Fiber Optic Driver Circuit (Fiber Optic Driver Module): As a fiber optic driver module, the fiber optic driver circuit uses fiber optics to convert the low-voltage control signal, i.e., the pulse width modulation signal, output by the FPGA main control module to the IGBT driver, achieving opto-isolation to prevent interference or damage to the controller. Subsequently, the driver circuit amplifies the pulse width modulation signal after opto-conversion to ensure that the IGBT can switch quickly and reliably.

[0042] ④ IGBT Bridge: An IGBT bridge consists of multiple IGBTs forming a full-bridge or half-bridge topology. It inverts the DC power supplied by the DC bus into standard three-phase four-wire AC power, completing the DC-AC conversion or achieving the reverse AC-DC conversion in a bidirectional converter. The key to phase transition is to dynamically adjust the turn-on and turn-off times of the IGBTs through the FPGA main control module to change the zero-crossing position of the output voltage waveform, thereby directly controlling the output phase angle. For example, if a phase shift is required, the IGBT switching timing is triggered in advance; conversely, if a phase lag is required, the trigger timing is delayed.

[0043] ⑤ DC Bus: The DC bus provides a stable DC power supply for the IGBT bridge. It is supported by the PWM rectifier circuit in the rectifier power unit and the bus capacitor. The bus capacitor acts as a DC support capacitor to maintain the stability of the bus voltage and provide energy buffer for power fluctuations during the inverter process.

[0044] ⑥ Anti-slip compensation (anti-slip compensation module): The anti-slip compensation module suppresses overshoot or oscillation caused by sudden changes in voltage or current during phase transitions. It ensures the stability of the transition process by real-time correction of the duty cycle of the pulse width modulation signal or by adding a damping term to the control algorithm. At the same time, it performs constraint checks on the switching timing generated by the FPGA main control module to prevent the upper and lower transistors of the same bridge arm from conducting simultaneously, which would cause a bridge arm shoot-through fault.

[0045] ⑦ Phase Detection (Phase Detection Feedback Module): The phase detection feedback module uses a phase-locked loop or zero-crossing detection circuit to monitor the actual phase angle of the output voltage in real time. The phase-locked loop achieves phase locking and extracts instantaneous phase information through phase comparison and loop filtering. The zero-crossing detection circuit calculates the actual phase angle by detecting the zero-crossing moment of the voltage waveform. The phase detection feedback module feeds back the detection result to the FPGA main control module to form a closed-loop control to continuously correct the phase error until the actual phase converges to the target phase.

[0046] ⑧ Isolation Transformer: The isolation transformer realizes electrical isolation between input and output, and transforms the voltage level to the rated value that matches the power grid or load. Since the leakage inductance and winding resistance of the isolation transformer will introduce a small phase delay, it is necessary to pre-compensate for this inherent phase delay in the control algorithm of the FPGA main control module to ensure that the final output phase angle is consistent with the instruction setting value.

[0047] ⑨ Test Interface: The test interface is used to connect to test equipment such as oscilloscopes or power analyzers to monitor the output voltage waveform, phase angle dynamic response, system settling time, and overshoot in real time during the switching process, providing data support for system debugging and performance verification.

[0048] In one embodiment, the rectifier power unit includes: a three-phase input filter circuit, used to connect filter inductors in series in the U-phase, V-phase, and W-phase lines of the three-phase AC power supply to suppress harmonic interference and surge impact on the grid side; a multiple safety protection circuit, used to connect a fast-acting fuse in series after the filter inductor of each phase line, and to connect energy storage capacitors in parallel to ground in the U-phase, V-phase, and W-phase lines to quickly cut off the fault current path and filter out common-mode noise when the power switching device fails; a three-phase fully controlled rectifier bridge, composed of several thyristors connected in a three-phase full-bridge topology, and the gate of each thyristor is connected to a digital control unit to receive trigger pulses, used to continuously regulate the DC-side output voltage by controlling the phase of the trigger pulses; and a DC bus output circuit, used to connect a large electrolytic capacitor in parallel at the output end of the rectifier bridge as a DC support capacitor to provide a stable DC bus voltage to the inverter power unit.

[0049] Specifically, such as Figure 3 As shown, the AC-DC rectifier power unit of this invention, as a PWM rectifier unit, is the core component for achieving efficient and controllable energy conversion from the AC side to the DC side. Unlike a simple rectifier bridge, it integrates a high-performance power conversion system with multiple functions such as input filtering and protection, controllable rectification, and DC support. The rectifier power unit includes:

[0050] ① Three-phase input and electromagnetic compatibility filter circuit: The input terminal of the rectifier power unit receives a three-phase AC power supply, with a typical rated value of 380V / 50Hz, including U, V, and W phase lines. To suppress high-frequency harmonic interference and surge impact on the grid side, a filter inductor L1, L2, and L3 are connected in series in each phase line. The filter inductor is designed to limit the rate of change of current, i.e., di / dt, thereby smoothing the input current and improving the electromagnetic compatibility performance of the rectifier power unit to the grid. At the same time, an energy storage capacitor C1 is connected in parallel to ground in the three-phase lines. This energy storage capacitor is not only used to absorb energy fluctuations but also to filter out common-mode noise, further optimizing the electromagnetic compatibility performance.

[0051] ② Multiple safety protection circuits: To ensure system reliability, a fast-acting fuse, namely FU1, FU2, and FU3, is connected in series after the filter inductor of each phase. This fast-acting fuse has extremely fast operating characteristics and can quickly melt within microseconds when a serious fault occurs in the power switching device, such as the downstream thyristor, such as shoot-through or short circuit. It physically cuts off the fault current path and provides ultimate protection for high-value core power components to prevent the fault from escalating.

[0052] ③ Three-phase fully controlled rectifier bridge: The three-phase fully controlled rectifier bridge, as the energy conversion core of the rectifier power unit, is composed of six thyristors V1, V2, V3, V4, V5, and V6 connected in a three-phase full-bridge topology. Unlike the traditional uncontrollable diode rectifier bridge, this invention uses fully controlled thyristors, and the gate of each thyristor is connected to the DSP module in the digital control unit to receive the precisely calculated trigger pulses emitted by it. By controlling the phase of the trigger pulse through the DSP module, i.e., controlling the trigger angle α, the DC-side output voltage can be continuously and smoothly adjusted from zero to its maximum value. This provides a controllable DC power supply for the entire system and is the basis for realizing high-performance energy management and phase angle jump control.

[0053] ④ DC Bus Support and Filtering: The output of the rectifier bridge is a positive and a negative DC bus. A large electrolytic capacitor C2 is connected in parallel on the DC bus as a DC support capacitor. This DC support capacitor is used to maintain the stability of the DC bus voltage and provide energy buffer for the power fluctuations of the subsequent inverter power unit. At the same time, it filters out the low-frequency ripple of the rectified output, making the DC bus voltage smoother and more stable, and providing a high-quality DC power input for the inverter power unit.

[0054] In one embodiment, the inverter power unit includes: a DC bus input circuit for connecting to the DC bus output circuit of the rectifier power unit, and several DC support capacitors connected in parallel between the positive and negative buses to maintain the stability of the DC bus voltage during the inverter process; a three-phase full-bridge inverter circuit, consisting of several insulated-gate bipolar transistors connected in a three-phase three-level topology, with the gate of each insulated-gate bipolar transistor connected to a digital control unit for receiving high-frequency pulse width modulation drive signals; an output filter circuit for connecting filter inductors in series at each phase of the inverter bridge output, and forming a low-pass filter with capacitors to filter out high-order harmonics near the switching frequency and harmonics; a three-phase transformer for converting the AC voltage output by the inverter to the rated voltage level required by the power grid or load, and achieving electrical isolation; and an AC output interface for outputting the filtered and transformed three-phase AC power to the power grid or load through a three-phase four-wire output interface.

[0055] Specifically, such as Figure 4 As shown, the DC-AC inverter power unit of this invention, as a DC-AC inverter unit, is the core energy conversion component that realizes the inversion of energy from the DC side to the AC side. It receives stable DC power provided by the rectifier power unit and generates high-quality adjustable three-phase AC power through high-frequency power switching and control. The inverter power unit includes:

[0056] ① DC Bus Input and Support: The input terminals of the inverter power unit are directly connected to the positive and negative DC buses output by the rectifier power unit, namely DC+ and DC-. To maintain the stability of the DC bus voltage during the inverter process and provide a low-impedance high-frequency energy path, multiple DC support capacitors, namely C4, C5, and C6, are connected in parallel between the DC buses. These DC support capacitors are usually a combination of electrolytic capacitors and film capacitors to deal with different frequency characteristics. Electrolytic capacitors are used to provide large-capacity low-frequency energy buffers, while film capacitors are used to provide high-frequency decoupling with low equivalent series resistance. Together, they provide instantaneous large current for the inverter bridge and suppress bus voltage ripple to ensure the stable operation of the inverter power unit.

[0057] ② Three-phase full-bridge inverter circuit: The three-phase full-bridge inverter circuit, as the energy conversion core of the inverter power unit, is composed of multiple insulated-gate bipolar transistor modules, designated as V1 to V12. This invention preferably adopts a three-phase three-level topology, such as a midpoint clamped NPC topology or a T-type topology, rather than the traditional two-level topology. Compared with the two-level topology, the three-level topology has less harmonic content in the output waveform at the same switching frequency, a lower voltage change rate (dv / dt), and less insulation stress on the output filter circuit and transformer, which can significantly improve the overall efficiency of the system and the quality of output power. The gate of each insulated-gate bipolar transistor is connected to the FPGA main control module and DSP module in the digital control unit through an optical fiber drive module to receive the high-frequency pulse width modulation drive signal emitted by it. The digital control unit cuts the DC power into three-phase AC power of the required frequency and amplitude by precisely controlling the on and off timing and duty cycle of each pair of insulated-gate bipolar transistors, and achieves rapid switching of the output voltage phase angle by dynamically adjusting the switching timing.

[0058] ③ Output Filtering and Energy Shaping: The pulse width modulation wave output by the inverter bridge contains abundant high-order harmonics, which need to be filtered to obtain a smooth sine wave. Therefore, at the output terminals of the inverter bridge, i.e., phases A, B, and C, a filter inductor L1, L2, and L3 are connected in series respectively. This filter inductor, together with the capacitor in the subsequent circuit, forms a low-pass filter to effectively filter out high-order harmonics near the switching frequency and its harmonics, making the output current waveform smooth and significantly reducing the total harmonic distortion (THD) to below 1%, which meets the stringent requirements of grid connection or driving load. The inductance value design of the filter inductor needs to comprehensively consider the balance between the filtering effect and the dynamic response speed. An excessively large inductor will increase the system's response delay, while an excessively small inductor will result in insufficient filtering effect.

[0059] ④ Three-phase transformer: A three-phase transformer, T1, T2, and T3, is connected after the filter inductor. This three-phase transformer provides electrical isolation, separating the inverter power unit from the grid or load to enhance system safety and prevent DC components from being injected into the grid. It also provides voltage matching, converting the AC voltage output by the inverter to the rated voltage level required by the grid or load. The parasitic inductance and capacitance of the three-phase transformer can further suppress common-mode noise and improve the electromagnetic compatibility performance of the system. The design of the three-phase transformer needs to consider the phase delay characteristics. Its leakage inductance and winding capacitance will introduce phase shift, which needs to be pre-compensated in the phase control algorithm of the digital control unit to ensure the accuracy of the output voltage phase angle jump.

[0060] ⑤ Three-phase AC output: After filtering and transformation, the high-quality three-phase AC power is connected to the power grid or load through the three-phase four-wire output interface, namely phase A, phase B, phase C and phase N, to form a complete energy output circuit. Voltage and current sensors are installed at the output interface to monitor the amplitude, frequency and phase information of the output voltage, as well as the magnitude and waveform quality of the output current in real time. These monitoring signals are fed back to the digital control unit to form a closed-loop control to ensure that the output power quality meets the relevant standard requirements.

[0061] In summary, the inverter power unit described in this invention is a high-performance DC-AC conversion system integrating advanced three-level topology, efficient pulse width modulation control, precise output filtering, and electrical isolation technology. It inverts DC power into a sinusoidal pulse width modulation wave through an insulated gate bipolar transistor bridge arm precisely controlled by a digital control unit. The wave is then shaped and isolated by an LC filter and an isolation transformer to finally output high-quality sinusoidal AC power that meets the standards. This design, together with the preceding rectifier power unit, constitutes a complete, efficient, and reliable bidirectional energy conversion system, providing a hardware foundation for achieving high-precision and fast-response output voltage phase angle jump control.

[0062] In one embodiment, calculating the phase error in real time and converting it into a time offset includes: receiving a phase command to determine the target phase angle, and obtaining the actual phase angle of the current output voltage through a phase detection feedback module; calculating the difference between the target phase angle and the actual phase angle as the phase error; calculating the angular frequency based on the current operating frequency of the system, and dividing the phase error by the angular frequency to obtain the time offset in the time dimension; wherein, the phase error is equal to the difference between the target phase angle and the actual phase angle; and the angular frequency is equal to 2π multiplied by the current operating frequency of the system.

[0063] In one embodiment, generating the switching timing of an insulated gate bipolar transistor (IGBT) bridge arm includes: correcting the original switching timing of the IGBT bridge arm based on a time offset and calculating a new switching timing point; performing a constraint check on the new switching timing point using a back-pry compensation module; when the new switching timing point does not meet the constraint conditions, calling a constraint algorithm to reconstruct the switching timing point until all constraint conditions are met; generating the on-time and off-time of each switching cycle based on the switching timing point that meets the constraint conditions, and calculating the pulse width modulation waveform based on the switching timing; monitoring the actual phase angle of the output voltage in real time through a phase detection feedback module and feeding it back to the FPGA main control module, continuously adjusting the pulse width modulation waveform until the actual phase angle matches the target phase angle.

[0064] In one embodiment, the constraint check of the new switching timing point is performed by the anti-pry compensation module, including:

[0065] Minimum pulse width hard protection rule: When the newly calculated on-time is lower than the safety threshold, the on-time is forcibly locked;

[0066] Dead-time dynamic coupling mechanism: Dynamic dead-time compensation is superimposed on the time offset of the actual application;

[0067] Adaptive switching of modulation strategy: When in high voltage condition, space vector pulse width modulation is used to constrain the action time of the switching vector; when in weak grid condition, discontinuous pulse width modulation is enabled to actively block the drive signal of the switching cycle and raise the minimum pulse width threshold to a preset value.

[0068] Specifically, the phase transition process includes:

[0069] ① Command input: The digital control unit receives the phase transition command issued from the outside. This command includes the target phase angle θ2 and the current phase angle θ1.

[0070] ②FPGA calculation: This step is the core of realizing the fast phase control of this invention, and specifically includes:

[0071] The FPGA main control module determines the target phase based on the input. target The current feedback phase is obtained in real time by the phase detection feedback module. feedback Phase error calculation is performed to obtain the phase difference value Δ. = target - feedback The phase error calculation utilizes the parallel processing capability of the FPGA to complete high-speed calculations within a very short time window, ensuring the real-time performance of phase transitions.

[0072] The FPGA main control module will control the phase error Δ The offset T from the angle domain to the time domain offset Through formula T offset =Δ The calculation is performed using / (2πf), where f is the fundamental frequency of the system's current operation. This time offset represents the amount of time the output voltage waveform needs to be shifted forward or backward on the time axis, and is the reference parameter for subsequent switching timing adjustments.

[0073] The FPGA main control module is based on the calculated time offset T offset The original switching timing of the insulated-gate bipolar transistor bridge arm is modified to generate new switching timing points, including the turn-on and turn-off times. The formula for calculating the new switching timing points is tswitch. new =tswitch old ±|T offset |±Δt dead tswitch old Δt is the original timing point based on the current reference waveform, such as a sine wave or a space vector pulse width modulation waveform. dead The dynamic dead-time compensation time offset is calculated during the switching timing process:

[0074] 1) The FPGA main control module executes the minimum pulse width hard protection rule: when the newly calculated on-time Ton... new When the pulse is below the safety threshold, typically 1 microsecond or 5% of the switching cycle Tsw, the Tonnew is forcibly locked at max(1μs, 0.05Tsw) to avoid the junction temperature runaway of the insulated gate bipolar transistor caused by narrow pulses.

[0075] 2) Simultaneously execute the dead-time dynamic coupling mechanism: In practical applications, the time offset needs to be superimposed with dynamic dead-time compensation Δtdead, the value of which is determined by the phase jump angle Δt. The calculation formula for Δt is determined by the junction temperature Tj of the insulated gate bipolar transistor. dead =0.5μs×(1+0.005ΔT j )+0.1ns×|Δ |, where ΔT j The unit for junction temperature change is degrees Celsius. The compensation amount increases synchronously with the temperature rise and large angle jump to ensure the safety margin of the switching device under high temperature or large angle jump conditions.

[0076] 3) The FPGA main control module adaptively selects the modulation strategy based on the real-time operating conditions of the system: under high voltage conditions, i.e., DC bus voltage V dc Greater than 0.9 times the rated voltage V rated The space vector pulse width modulation (SVPWM) modulation strategy is adopted, and the switching vector action time T is constrained. kLess than or equal to 0.5 times the switching period T sw When the vector action time exceeds the limit, the vector action time is compressed proportionally and zero vector padding is added to avoid overmodulation. In weak grid conditions, i.e., when the short-circuit ratio (SCR) is less than 1.5, the discontinuous pulse width modulation (DPWM) strategy is enabled to actively block the drive signal for 30% of the switching cycle to reduce switching losses, while the minimum pulse width threshold is increased to 2 microseconds to enhance system reliability.

[0077] It should be noted that the modulation strategy switching described above in this invention is based on the real-time acquisition of the DC bus voltage V. dc The strategy switching decision is completed within 200 nanoseconds using the grid impedance data and the decision logic inside the FPGA.

[0078] Specifically, the FPGA main control module triggers pulse width verification logic immediately after calculating the new switching timing. If Ton is detected... new When the time difference is less than 1 microsecond or there is a dead time conflict between the upper and lower transistors of the same bridge arm, a 32-bit high-speed counter with a clock frequency of 500MHz is used to directly quantize the time difference between the actual conduction time and the safety threshold. The constraint algorithm is immediately called to reconstruct the switching timing to ensure that all switching timings meet the hardware safety requirements. The parameters of the constraint algorithm include a temperature coefficient of 0.005 per degree Celsius and a phase compensation coefficient of 0.1 nanosecond per degree. These parameters are obtained through 150 experiments and are not industry-standard empirical values. These constraint parameters ensure that when a 90-degree phase jump is performed in a weak power grid with a short-circuit ratio (SCR) of 1.0, the pulse width violation rate is reduced to zero and the turn-off peak voltage of the insulated gate bipolar transistor drops by 35%.

[0079] Specifically, the FPGA main control module generates a pulse width modulation waveform based on the newly calculated switching timing points, and calculates the specific pulse width for each switching cycle, including the on-time T. on and shutdown time T off The duty cycle of the pulse width modulation signal is D=T on / (T on +T off The fundamental phasor of the output voltage is determined by the phase shift of the fundamental phasor, and the shift of the overall start and end times directly realizes phase control. The fundamental phasor of the output voltage can be expressed as V. out ∝D×cos(ωt+ new ),in new ω represents the achieved phase value, where ω is the angular frequency.

[0080] Specifically, to suppress the overcurrent risk (i.e., the risk of runaway current exceeding 120% of the rated value) caused by the current change rate di / dt exceeding the limit during the phase transition process, the FPGA main control module in this invention performs predictive current gate drive optimization during the transition cycle, using the formula Vgeadj =gm×L×di / dt ref Calculate the gate voltage compensation, where Vge adj The additional drive voltage required to suppress di / dt overshoot, where L is the grid-side inductance value, and di / dt is the value of the grid-side inductance. ref The safe current change rate set for the controller is in amperes per microsecond. gm is the transconductance parameter of the insulated gate bipolar transistor, obtained from the device datasheet. The drive voltage is increased to Vge + Vge within the switching cycle. adj Actual measurements show that current overshoot is suppressed by 50%, and device junction temperature fluctuations are reduced by 20 degrees Celsius.

[0081] Specifically, the FPGA main control module performs pulse width modulation timing reconstruction and hardware synchronization processes, using the switching time point correction formula tswitch. new =tswitch old ±|T offset |±Δt dead A final correction is made to all switching timing points, where Δt dead To compensate for the dead time offset, the FPGA updates the timer comparator register within 200 nanoseconds by parallel computing the new timing of the six pulse width modulation signals, thereby achieving hardware acceleration of the phase transition.

[0082] ③ Driving and Isolation: The generated pulse width modulation signal is output to the insulated gate bipolar transistor bridge arm of the inverter power unit after opto-isolation and signal amplification by the fiber optic driving module. The fiber optic isolation technology realizes electrical isolation between the control side and the power side, enhancing the system's anti-interference capability. The driving circuit amplifies the weak logic signal to a level strong enough to drive the insulated gate bipolar transistor to turn on and off, ensuring reliable operation of the power device.

[0083] ④ Phase adjustment: The insulated gate bipolar transistor bridge arm performs conduction and turn-off actions according to the new switching sequence. The change in the switching sequence causes the output voltage waveform to jump instantaneously, realizing the output phase to be quickly adjusted from θ1 to θ2. Specifically, it is manifested by advancing or delaying the switching time of the positive and negative half-cycles of the output voltage waveform, thereby realizing the overall forward or backward shift of the waveform on the time axis to complete the rapid jump of the phase angle.

[0084] ⑤ Closed-loop correction: The phase detection feedback module continuously monitors the actual phase angle of the output voltage. feedback The measurement results are fed back to the FPGA main control module, which captures the current phase angle and calculates the phase with the command through a hardware phase-locked loop (PHR). target instantaneous error Δ = target - feedback According to the instantaneous frequency f of the power grid grid Dynamically calculate time offset T offset =Δ / (2πf grid It enables adaptive frequency adjustment.

[0085] Specifically, the FPGA main control module executes a dynamic compensation strategy during the closed-loop correction process, reducing the dead time. time The calculation uses a piecewise function: when the absolute value of the phase jump angle |Δ When the degree is less than or equal to 15 degrees, dead time =1.2×T base T base The nominal dead time is typically 2 microseconds; when the absolute value of the phase transition angle is |Δ |When the temperature is greater than 15 degrees, dead time= 0.8×T base ×e^(-0.05|Δ This dynamic compensation strategy reduces the dead zone by 30% during a 60-degree phase transition, improving system response speed while ensuring switch safety.

[0086] Specifically, the FPGA main control module continuously adjusts the timing and duty cycle of the pulse width modulation signal based on the real-time phase error. Through closed-loop feedback control, it gradually reduces the deviation between the actual phase angle and the target phase angle until the actual phase angle converges to the error range of the target phase angle. The typical convergence accuracy is ±0.5 degrees, forming a high-precision phase tracking control to ensure that the output voltage phase always follows the command phase, achieving a stable and reliable phase control effect.

[0087] In one embodiment, the digital control unit adopts a dual-closed-loop vector control architecture, including: an outer loop phase control loop, used to generate a phase compensation amount based on the difference between the target phase and the feedback phase using a sliding mode variable structure control algorithm and output it to the inverter power unit; and an inner loop current control loop, used to generate a d-axis reference voltage and a q-axis reference voltage based on the d-axis current error and the q-axis current error using a decoupling algorithm based on internal mode control, thereby achieving independent control of amplitude and phase.

[0088] In one embodiment, generating the phase compensation amount using the sliding mode variable structure control algorithm includes: calculating the difference between the target phase and the feedback phase as the phase deviation; calculating a proportional term, an integral term, and a sliding mode switching term based on the phase deviation; superimposing the proportional term, the integral term, and the sliding mode switching term to obtain the phase compensation amount; and outputting the phase compensation amount to the inverter power unit to adjust the output voltage phase angle. The proportional term is used to provide a fast response; the integral term is used to eliminate steady-state errors; and the sliding mode switching term is used to enhance system robustness and suppress external disturbances.

[0089] In one embodiment, generating the d-axis reference voltage and q-axis reference voltage using a decoupling algorithm based on internal model control includes: calculating the d-axis current error and q-axis current error; the d-axis current error is equal to the difference between the d-axis reference current and the actual d-axis current, and the q-axis current error is equal to the difference between the q-axis reference current and the actual q-axis current; eliminating coupling interference between the d-axis and q-axis by subtracting the product of the q-axis current, inductance, and angular velocity from the d-axis control channel and adding the product of the d-axis current, inductance, and angular velocity to the q-axis control channel; applying the sum of the fundamental amplitude and the amplitude compensation amount to the d-axis voltage component, applying the phase compensation amount to the q-axis voltage component, and converting the d-axis reference voltage and q-axis reference voltage into a three-phase reference voltage through coordinate transformation, thereby achieving independent adjustment of the output voltage amplitude and phase.

[0090] Specifically, in this invention, the digital control unit employs a dual-closed-loop vector control architecture to achieve precise control of phase angle transitions. The signal input of this dual-closed-loop vector control architecture originates from the DC bus voltage V provided by the PWM rectifier power unit. dc and the grid phase feedback in real time from the DC-AC inverter power unit feedback The control output then sends a phase compensation amount Δθ and an amplitude compensation amount ΔV to the DC-AC inverter power unit. m Simultaneously, it outputs a DC voltage adjustment amount ΔV to the PWM rectifier power unit. dc To maintain stable bus voltage, a unified digital control unit is used to achieve coordinated control of the rectifier unit and the inverter unit, solving the response lag problem caused by discrete control in traditional solutions.

[0091] Specifically, in this invention, the outer loop phase control loop uses the target phase. target With feedback phase feedback The difference is used as the input to calculate the phase error Δ. = target- feedback A sliding mode variable structure control algorithm is used to replace the traditional PID controller to provide faster response and stronger robustness. The control law expression of the sliding mode variable structure control algorithm is Δθ=K p Δ +K i ∫0 t Δ dτ+η×sgn(Δ ), where K p The proportional gain term is used to ensure fast convergence of the phase deviation, K iThe integral gain term is used to eliminate steady-state error, η is the sliding mode gain used to suppress the influence of grid disturbances, and sgn() is the sign function used to accelerate the system's convergence to the sliding mode surface. This sliding mode variable structure control algorithm is implemented in FPGA hardware and controlled by a program algorithm. The specific code is as follows (? is the logical condition judgment symbol):

[0092] "void SMC_Controller(float dPhi){

[0093] static float integral = 0;

[0094] float s = 120 * dPhi + derive(dPhi); / / Switch function s

[0095] float sat = (fabs(s) <= 0.05) ? (s / 0.05): SIGN(s); / / Boundary layer processing

[0096] integral = dPhi * dt; / / Integral term

[0097] float eta = 50 + 10 * fabs(dPhi); / / Dynamic gain

[0098] float deltaTheta=Kp*dPhi+Ki*integral+eta*sat; / / Control output

[0099] send_to_inverter(deltaTheta); / / Output to DCAC inverter unit

[0100] }".

[0101] Specifically, when the phase error is large, the sliding mode variable structure control algorithm uses the switching characteristics of the sign function to make the system quickly approach the target phase. When the phase error enters the boundary layer range, the saturation function is used to replace the sign function to eliminate chattering. At the same time, the sliding mode gain η is dynamically adjusted to increase with the increase of the phase error, thereby ensuring fast response while suppressing the influence of external disturbances and parameter perturbations on control performance.

[0102] Specifically, in this invention, the inner loop current control loop uses the d-axis current error ΔI d =I d _ ref -I d and q-axis current error ΔI q =I q _ ref -I qAs inputs, the d-axis current represents the active power component, and the q-axis current represents the reactive power component. The inner current control loop employs a decoupling algorithm based on internal model control to achieve cross-decoupling control between the d-axis and q-axis. The control law expression of this decoupling algorithm is as follows:

[0103] ;

[0104] The physical meaning of each variable and the source of its parameters are shown in Table 1.

[0105] Table 1. Decoupling Control Law Variable Table

[0106]

[0107] Specifically, the off-diagonal term -ω in this decoupling control law c L and ω c L is a cross-coupling compensation term used to eliminate mutual interference between the d-axis and q-axis control channels caused by inductive coupling. This ensures that the d-axis reference voltage is determined solely by the d-axis current error and is unaffected by the q-axis current error, and the q-axis reference voltage is determined solely by the q-axis current error and is unaffected by the d-axis current error. This enables independent adjustment of the output voltage amplitude and phase. Matrix operations are implemented using a CORDIC algorithm hardware IP core to improve calculation speed, and the integration term uses a 32-bit accumulator register to enhance the integration speed.

[0108] Specifically, the digital control unit, in conjunction with a dynamic decoupling algorithm, combines the phase compensation amount Δθ output by the outer loop phase control loop with the amplitude compensation amount ΔV output by the inner loop current control loop. m The d-axis and q-axis components, independently mapped to the rotating coordinate system, are transformed using the coordinate transformation formula V. d =(V m +ΔV m cos(Δθ) and V q =(V m +ΔV m sin(Δθ) achieves decoupled control of amplitude and phase, where the d-axis voltage component V d The dominant active power transmission is the main component of phase transition control, and the q-axis voltage component V q Adjusting reactive power to assist phase stabilization is achieved through a dynamic decoupling algorithm using a vector decomposition function. Example code is shown below:

[0109] "void vector_decompose(float Δθ,float ΔVm){

[0110] float Vm = get_base_voltage(); / / Get the fundamental voltage per unit value (from the feedforward module)

[0111] Vd=(Vm+ΔVm)*cos(Δθ); / / d-axis component: controls active power (main body of phase transition)

[0112] Vq=(Vm+ΔVm)*sin(Δθ); / / q-axis component: adjusts reactive power (aids phase stabilization)

[0113] apply_FFT_correction(Vd,Vq); / / Harmonic feedforward suppression

[0114] }".

[0115] Specifically, after calculating the d-axis and q-axis control values, the vector decomposition function calls the FFT correction module to adjust the V... d and V q Harmonic feedforward suppression is performed by injecting reverse harmonic current to suppress the influence of grid background harmonics on the output voltage waveform. The harmonic suppression covers the 3rd, 5th, and 7th harmonic frequency bands, thereby ensuring that the waveform quality and total harmonic distortion index of the output voltage meet the technical requirements of grid connection testing for new energy power plants while achieving rapid phase transition.

[0116] It should be noted that, as Figure 5 As shown, the protection mechanism system of this invention includes an anomaly detection module, a drive circuit, an IGBT power module, a main control system, and a human-machine interface. It achieves rapid protection and fault diagnosis of power devices through multi-level collaboration, specifically including:

[0117] ① Anomaly detection: Real-time monitoring of the operating status of the IGBT power module, including abnormal signals such as overvoltage, overcurrent, and overheating. When any parameter is detected to exceed the preset safety threshold, the system immediately activates the protection mechanism.

[0118] ② Drive circuit: Receives control commands from the main control system and generates high-precision drive signals to control the IGBT's turn-on and turn-off. This drive circuit provides gate drive current so that the gate voltage of the IGBT rises rapidly to above 15V when it is turned on and drops rapidly to below -5V when it is turned off. The response time of the drive circuit is less than 1 microsecond, ensuring that the IGBT can switch quickly and avoiding device damage due to turn-off delay in the event of overcurrent or short circuit faults.

[0119] ③ IGBT Module: As the core power switching device, it performs energy conversion, including inversion and rectification. The performance of the IGBT power module depends on the precise control of its gate signal by the drive circuit. By optimizing the switching timing, the switching loss and conduction loss of the IGBT can be reduced.

[0120] ④ Main control system: As the control core of the entire protection mechanism, it receives abnormal signals from abnormal detection and external control commands to coordinate the actions of the drive circuit and IGBT power module. The main control system obtains the real-time operating status of the IGBT, including parameters such as junction temperature, collector current, and collector-emitter voltage, through the status signal acquisition channel, and generates status feedback signals to realize closed-loop control. When the main control system receives an abnormal detection signal, it immediately executes protection logic, including blocking drive pulses, cutting off the main circuit power supply, and recording electrical parameters at the time of the fault. At the same time, it sends fault codes to the human-machine interface for fault diagnosis and maintenance.

[0121] ⑤ Human-Machine Interface: Used to display the system operating status, including key parameters such as output voltage, output current, active power, reactive power, and DC bus voltage. It displays fault codes in real time, such as E01 for overvoltage faults, E02 for overcurrent faults, and E03 for overheating faults, to help users quickly locate problems and take corresponding measures. The human-machine interface also supports parameter settings and manual control functions.

[0122] Specifically, the protection mechanism of this invention is compared with that of traditional protection systems, as shown in Table 2:

[0123] Table 2 Comparison of Protection Mechanisms

[0124]

[0125] To facilitate understanding of the above technical solutions of the present invention, two specific embodiments are described in detail below:

[0126] Example 1: Phase jump and compensation control under low voltage ride-through conditions

[0127] This embodiment details the application of the output voltage phase angle switching system based on the Insulated Gate Bipolar Transistor (IGBT) of the present invention in the event of a low voltage fault in the power grid. Its core lies in utilizing the dynamic phase modulation capability of the digital control unit and the dual closed-loop vector control architecture to achieve smooth and rapid fault ride-through.

[0128] The system monitors the grid voltage in real time. When the voltage drops to 80% of the rated value (0.8 per unit) within 1ms, the FPGA main control module immediately determines it as a low voltage ride-through event and triggers the low voltage ride-through control mode. According to the preset phase modulation strategy, the FPGA main control module dynamically adjusts the phase angle of the output voltage vector of the inverter power unit to positive 30 degrees within 10 microseconds after the fault is detected. This adjustment process is not a step jump, but follows the slope constraint of a phase change rate of less than or equal to 500 degrees per millisecond to suppress transient current surges.

[0129] The anti-pry compensation module performs real-time constraint checks on the switching timing during rapid phase adjustment, ensuring that the two insulated gate bipolar transistors on the same bridge arm will not conduct simultaneously at any time. At the same time, it ensures that the pulse width of the generated pulse width modulation signal always meets the hard protection rule that the minimum conduction time is greater than or equal to 1 microsecond or 5% of the switching cycle, thereby avoiding bridge arm shoot-through or narrow pulse drive failure problems that may be caused by drastic timing changes.

[0130] During the fault ride-through sustain phase, the system maintains the aforementioned phase compensation state for 500 milliseconds. During this period, the inner loop current control loop in the dual closed-loop vector control architecture continuously stabilizes the output current using a decoupling algorithm based on internal model control. This decoupling algorithm eliminates coupling interference between the two axes by introducing cross-decoupling compensation terms in the d-axis and q-axis control channels, allowing the output voltage amplitude and phase to be adjusted independently.

[0131] The rectifier power unit operates in controlled rectification mode, achieving precise control of the grid-side current by adjusting the thyristor firing angle. This ensures the grid-side power factor remains stable above 0.99, minimizing secondary disturbances to the grid. Once the grid voltage recovers to 85% of its rated value and stabilizes for 10 milliseconds, the FPGA main control module controls the output voltage phase angle to linearly recover to normal within 20 milliseconds. The phase detection feedback module continuously monitors the actual phase angle of the output voltage throughout the fault ride-through process and feeds the detection results back to the FPGA main control module, forming a closed-loop control system. This real-time correction of phase errors ensures that the actual phase angle accurately tracks the target phase angle.

[0132] Example 2: Precise Phase Jump and Dynamic Response Control

[0133] This embodiment details the timing design and hardware implementation of the present invention in scenarios requiring precise phase transition control, such as grid connection testing of new energy power generation equipment.

[0134] The system divides the entire control process into three stages. During the T0 to T1 stage, the system outputs a standard sine wave with the output voltage phase angle maintained at 0 degrees. At this time, the insulated gate bipolar transistors (IGBTs) of the inverter power unit operate according to the switching timing generated by the standard space vector pulse width modulation (SVM) algorithm. At time T1, the system receives a phase jump command, requiring the phase angle adjustment from 0 degrees to +15 degrees to be completed within two power frequency cycles, i.e., 40 milliseconds. After receiving the jump command, the FPGA main control module immediately starts the outer loop phase control loop. This phase control loop uses a sliding mode variable structure control algorithm to generate the phase compensation amount. The proportional term of the sliding mode variable structure control algorithm ensures the rapid convergence of the phase deviation, the integral term eliminates the steady-state error, and the sliding mode switching term effectively suppresses the influence of external disturbances and parameter perturbations on the control performance. The phase compensation amount is converted into d-axis and q-axis reference voltages by the decoupling algorithm based on internal mode control of the inner loop current control loop. Then, the switching timing of each IGBT is calculated by the space vector pulse width modulation algorithm, which is ultimately reflected in the real-time calculation and update of the reload value of the counter of the pulse width modulation signal generation unit.

[0135] During phase transition, the anti-scaling compensation module performs real-time verification and dynamic correction on the pulse width modulation signal generated in each switching cycle. When the calculated on-time is very small, the anti-scaling compensation module locks it within a safe range using a minimum pulse width hard protection rule, while adaptively adjusting the dead time, fundamentally eliminating hardware drive risks introduced by rapid changes in control commands. The fiber optic drive module transmits the verified pulse width modulation signal to the inverter power unit side via fiber optic cable and amplifies it to a level sufficient to quickly drive the gate of the insulated gate bipolar transistor (IGBT), ensuring that the IGBT can switch rapidly according to the precisely calculated timing, thereby achieving precise phase angle transitions in the output voltage.

[0136] At time T2, the system begins to control the phase angle to recover to 0 degrees within one power frequency cycle (20 milliseconds) with a preset slope. The phase detection feedback module uses a phase-locked loop circuit to monitor the actual phase angle of the output voltage in real time and feeds the detection result back to the FPGA main control module. The FPGA main control module compares the actual phase angle with the target phase angle to obtain the real-time phase error, which is used as the input for the next control cycle to form a closed-loop feedback control. The pulse width modulation signal is continuously adjusted until the actual phase angle converges to the error range of the target phase angle. Experimental results show that under the above timing control, the system achieves excellent performance indicators such as a phase jump response time of less than 10 microseconds, a phase control accuracy better than ±0.5 degrees, and a total harmonic distortion rate of less than 1% for the output voltage.

[0137] like Figure 6 As shown, according to another embodiment of the present invention, a high-precision output voltage phase angle switching method based on IGBT is also provided, the high-precision output voltage phase angle switching method based on IGBT includes:

[0138] The alternating current is rectified through a three-phase fully controlled rectifier bridge and supplied with DC bus voltage to the inverter power unit;

[0139] It receives the DC bus voltage output from the rectifier power unit, converts the DC power into AC power through a three-phase full-bridge inverter circuit, and outputs the filtered and transformed AC power to the power grid or load.

[0140] The system receives a phase command, calculates the phase error based on the current phase and the target phase, converts the phase error into a time offset, generates the switching timing of the insulated gate bipolar transistor bridge arm, performs constraint checks on the switching timing, and generates a pulse width modulation signal to drive the inverter power unit to achieve the jumping control of the output voltage phase angle.

[0141] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A high-precision output voltage phase angle switching system based on IGBT, characterized in that, include: The rectifier power unit is used to rectify AC power through a three-phase fully controlled rectifier bridge and provide DC bus voltage to the inverter power unit; The inverter power unit is used to receive the DC bus voltage output from the rectifier power unit, convert the DC power into AC power through a three-phase full-bridge inverter circuit, and output the filtered and transformed AC power to the power grid or load. The digital control unit is used to receive phase commands, calculate the phase error based on the current phase and the target phase, convert the phase error into a time offset, generate the switching timing of the insulated gate bipolar transistor bridge arm, and generate a pulse width modulation signal after constraining the switching timing to drive the inverter power unit to achieve the jumping control of the output voltage phase angle. The digital control unit includes: The FPGA main control module is used to receive phase commands and feedback signals from the phase detection feedback module. It calculates the phase error in real time and converts it into a time offset to generate the switching timing of the insulated gate bipolar transistor bridge arm, and calculates the pulse width modulation signal based on the switching timing. The fiber optic driver module is used to transmit the pulse width modulation signal output by the FPGA main control module through optical fiber to the driver circuit of the insulated gate bipolar transistor for opto-isolation, and amplify the pulse width modulation signal to ensure fast and reliable switching of the insulated gate bipolar transistor. The anti-slip compensation module is used to suppress sudden changes in voltage or current during phase transitions and to ensure the stability of the transition process by real-time correction of the duty cycle of the pulse width modulation signal or by adding a damping term. The phase detection feedback module is used to monitor the actual phase angle of the output voltage in real time using a phase-locked loop or zero-crossing detection circuit, and feeds the detection results back to the FPGA main control module to form a closed-loop control to correct the phase error.

2. The high-precision output voltage phase angle switching system based on IGBT according to claim 1, characterized in that, The digital control unit adopts a dual closed-loop vector control architecture, including: The outer loop phase control loop is used to generate phase compensation based on the difference between the target phase and the feedback phase using a sliding mode variable structure control algorithm and output it to the inverter power unit. The inner current control loop is used to generate d-axis reference voltage and q-axis reference voltage based on the d-axis current error and q-axis current error through a decoupling algorithm based on internal model control, so as to achieve independent control of amplitude and phase.

3. The high-precision output voltage phase angle switching system based on IGBT according to claim 1, characterized in that, The rectifier power unit includes: The three-phase input filter circuit is used to connect filter inductors in series in the U-phase, V-phase, and W-phase lines of a three-phase AC power supply to suppress harmonic interference and surge impact on the grid side. Multiple safety protection circuits are used to connect fast-acting fuses in series after the filter inductor of each phase line, and to connect energy storage capacitors in parallel to ground in the U-phase, V-phase, and W-phase lines, so as to quickly cut off the fault current path and filter out common-mode noise when the power switching device fails. A three-phase fully controlled rectifier bridge is formed by connecting several thyristors in a three-phase full-bridge topology, and the gate of each thyristor is connected to the digital control unit to receive trigger pulses, which are used to continuously adjust the DC-side output voltage by controlling the phase of the trigger pulses. The DC bus output circuit is used to connect a large electrolytic capacitor in parallel at the output of the rectifier bridge as a DC support capacitor to provide a stable DC bus voltage to the inverter power unit.

4. The high-precision output voltage phase angle switching system based on IGBT according to claim 3, characterized in that, The inverter power unit includes: The DC bus input circuit is used to connect the DC bus output circuit of the rectifier power unit, and several DC support capacitors are connected in parallel between the positive and negative buses to maintain the stability of the DC bus voltage during the inverter process. The three-phase full-bridge inverter circuit consists of several insulated-gate bipolar transistors connected in a three-phase three-level topology, and the gate of each insulated-gate bipolar transistor is connected to a digital control unit to receive high-frequency pulse width modulation drive signals. The output filter circuit is used to connect a filter inductor in series with each phase at the output of the inverter bridge, and together with a capacitor, form a low-pass filter to filter out high-order harmonics near the switching frequency and the harmonics. A three-phase transformer is used to convert the AC voltage output from the inverter to the rated voltage level required by the power grid or load, and to achieve electrical isolation. The AC output interface is used to output filtered and transformed three-phase AC power to the power grid or load through a three-phase four-wire output interface.

5. The high-precision output voltage phase angle switching system based on IGBT according to claim 1, characterized in that, The step of calculating the phase error in real time and converting it into a time offset includes: The system receives a phase command to determine the target phase angle and obtains the actual phase angle of the current output voltage through the phase detection feedback module. The difference between the target phase angle and the actual phase angle is calculated as the phase error; Calculate the angular frequency based on the current operating frequency of the system, and divide the phase error by the angular frequency to obtain the time offset in the time dimension. Wherein, the phase error is equal to the difference between the target phase angle and the actual phase angle; the angular frequency is equal to 2π multiplied by the current operating frequency of the system.

6. The high-precision output voltage phase angle switching system based on IGBT according to claim 5, characterized in that, The switching timing for generating the insulated-gate bipolar transistor bridge arm includes: Based on the time offset, the original switching timing of the insulated gate bipolar transistor bridge arm is corrected, and the new switching timing point is calculated. The new switching timing point is constrained by the anti-tampering compensation module; when the new switching timing point does not meet the constraints, the constraint algorithm is called to reconstruct the switching timing point until all constraints are met. The turn-on and turn-off times for each switching cycle are generated based on the switching timing points that meet the constraints, and the pulse width modulation waveform is calculated based on the switching timing. The actual phase angle of the output voltage is monitored in real time by the phase detection feedback module and fed back to the FPGA main control module. The pulse width modulation waveform is continuously adjusted until the actual phase angle is consistent with the target phase angle.

7. The high-precision output voltage phase angle switching system based on IGBT according to claim 2, characterized in that, The generation of phase compensation amount through the sliding mode variable structure control algorithm includes: The difference between the target phase and the feedback phase is calculated as the phase deviation; Based on the phase deviation, the proportional term, integral term, and sliding mode switching term are calculated; The phase compensation amount is obtained by superimposing the proportional term, integral term, and sliding mode switching term. The phase compensation value is output to the inverter power unit to adjust the output voltage phase angle; The proportional term is used to provide a fast response; the integral term is used to eliminate steady-state errors; and the sliding mode switching term is used to enhance system robustness and suppress external disturbances.

8. The high-precision output voltage phase angle switching system based on IGBT according to claim 7, characterized in that, The generation of d-axis and q-axis reference voltages via a decoupling algorithm based on internal model control includes: Calculate the d-axis current error and the q-axis current error; the d-axis current error is equal to the difference between the d-axis reference current and the d-axis actual current, and the q-axis current error is equal to the difference between the q-axis reference current and the q-axis actual current. By subtracting the product of q-axis current, inductance, and angular velocity from the d-axis control channel and adding the product of d-axis current, inductance, and angular velocity to the q-axis control channel, coupling interference between the d-axis and q-axis is eliminated. The sum of the fundamental amplitude and the amplitude compensation is applied to the d-axis voltage component, and the phase compensation is applied to the q-axis voltage component. The d-axis reference voltage and q-axis reference voltage are converted into three-phase reference voltages through coordinate transformation, thereby realizing independent adjustment of the output voltage amplitude and phase.

9. A high-precision output voltage phase angle switching method based on IGBT, employing the high-precision output voltage phase angle switching system based on IGBT as described in any one of claims 1-8, characterized in that, The method includes: The alternating current is rectified through a three-phase fully controlled rectifier bridge and supplied with DC bus voltage to the inverter power unit; It receives the DC bus voltage output from the rectifier power unit, converts the DC power into AC power through a three-phase full-bridge inverter circuit, and outputs the filtered and transformed AC power to the power grid or load. The system receives a phase command, calculates the phase error based on the current phase and the target phase, converts the phase error into a time offset, generates the switching timing of the insulated gate bipolar transistor bridge arm, performs constraint checks on the switching timing, and generates a pulse width modulation signal to drive the inverter power unit to achieve the jumping control of the output voltage phase angle.

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