LDPC coding and decoding method and related device

Abstract

The invention provides an LDPC (Low Density Parity Check) coding and decoding method and a related device, and the method comprises the steps: carrying out the LDPC coding of an information bit sequence according to a check matrix, and obtaining a first code word; the check matrix corresponds to a first basis matrix, the first basis matrix comprises c first local code basis matrixes and c first global code basis matrixes, the first local code basis matrixes are determined according to a second basis matrix, and the second basis matrix is predefined; the first global code basis matrix is determined according to a third basis matrix, the third basis matrix is determined according to the second basis matrix and the first local code basis matrix, and c is an integer greater than 1; sending the first code word; the first basis matrix is obtained by searching in the predefined second basis matrix, and compared with searching in any space, the searching space can be greatly reduced.

Description

Technical Field

[0001] This application relates to the field of communications, and in particular to LDPC encoding and decoding methods and related apparatus. Background Technology

[0002] Channel coding is one of the core technologies in wireless communication. The complete channel coding process includes adding cyclic redundancy check (CRC) codes, block segmentation, error correction coding, rate adaptation, block concatenation, data interleaving, and data scrambling. Error correction coding is the most critical part. Its purpose is to ensure that the receiver can automatically correct errors in data transmission with minimal redundancy overhead. At the same bit error rate, the lower the overhead, the higher the coding efficiency. Traditional channel coding and decoding generally include linear block codes (such as Hamming codes and Gray codes), convolutional codes, and concatenated codes. These codes have their own characteristics and performance, and are suitable for different scenarios.

[0003] In 3G and 4G mobile communication systems, Turbo codes, defined by the 3rd Generation Partnership Project (3GPP) standard, are convolutional codes with excellent performance, approaching the limits of Shannon's theory. In the 5G era, data transmission rates are orders of magnitude higher than in 4G. For Turbo codes, their serial-processing-based decoders struggle to effectively support such high-speed data transmission. Simultaneously, the 5G era has brought about richer service applications and new requirements for channel coding. For example, massive machine-type communications (mMTC) require smaller data packets, while ultra-reliable low-latency communication (URLLC) demands high levels of encoding / decoding latency and low error rates. Therefore, based on the key channel coding requirements of these three major 5G application scenarios, the 5G standard ultimately adopted low-density parity-check (LDPC) codes and polar codes. Compared to traditional linear block codes and convolutional codes, these two types of codes have superior performance and can approach the limits of Shannon theory very closely. However, they also have their own characteristics in terms of applicable scenarios and the complexity of the codec.

[0004] In environments with low signal-to-noise ratios (SNR), existing LDPC encoding and decoding methods (such as those used in 5G) are ill-equipped to handle burst errors. Therefore, it is necessary to research LDPC methods that can effectively resist burst errors in low SNR environments. Summary of the Invention

[0005] This application provides LDPC encoding and decoding methods and related apparatus, which can effectively resist sudden errors and improve system performance.

[0006] In a first aspect, embodiments of this application provide an LDPC encoding method, which is applied to a first communication device. This method can be implemented by the first communication device or components within the first communication device (e.g., circuits, processors, chips, or chip systems). The following description uses an implementation by a first communication device as an example. The first communication device can be a terminal device or a network device. The method includes: the first communication device performing low-density paritycheck (LDPC) encoding on an information bit sequence according to a parity check matrix to obtain a first codeword; the parity check matrix corresponds to a first base matrix, which includes c first local code base matrices and c first global code base matrices, the first local code base matrices being determined based on a second base matrix, which is predefined; the first global code base matrix being determined based on a third base matrix, which is determined based on the second base matrix and the first local code base matrices, where c is an integer greater than 1; and transmitting the first codeword.

[0007] In this embodiment, since the first basis matrix includes c first local code basis matrices and c first global code basis matrices, the parity check matrix corresponding to the first basis matrix is ​​a globally coupled (GC) LDPC with a cascaded structure composed of multiple local matrices and global matrices. Because its multiple local codes can be decoded independently, error propagation can be reduced in environments with low signal-to-noise ratios. Furthermore, the multiple local codes collectively satisfy the constraints of the global parity check nodes, effectively resisting sudden errors and improving system performance. In addition, the first local code basis matrix is ​​determined based on the second basis matrix, and the first global code basis matrix is ​​determined based on the third basis matrix. It should be understood that the first basis matrix is ​​obtained by searching within a predefined second basis matrix, which significantly reduces the search space compared to searching in an arbitrary space.

[0008] In one possible implementation, the second base matrix is ​​the base matrix of the LDPC specified in the new radio (NR) standard; thus, the first base matrix can have rate-compatible characteristics, or in other words, a rate-compatible structure.

[0009] In one possible implementation, the first local code base matrix is ​​determined based on the second base matrix, comprising: the first local code base matrix is ​​a matrix of m0 rows and n0 columns obtained by selecting m0 rows from the second base matrix; the first global code base matrix is ​​determined based on the third base matrix, comprising: the first global code base matrix is ​​obtained by selecting r rows from the third base matrix, the threshold value of the first base matrix is ​​less than or equal to the threshold value of the fourth base matrix, the fourth base matrix includes the c first local code base matrices and c second global code base matrices, the second global code base matrix is ​​obtained by selecting any r rows from the third base matrix, where m0 and n0 are integers greater than 1, and r is a positive integer; thus, the first base matrix with a lower threshold value can be determined based on the predefined second base matrix.

[0010] In one possible implementation, the third basis matrix is ​​determined based on the second basis matrix and the first local code basis matrix, including: the third basis matrix is ​​determined based on each row of the second basis matrix except for the m0 local rows, where the m0 local rows of the second basis matrix are the m0 rows selected from the second basis matrix; thus, a first basis matrix with a lower threshold value can be determined based on a predefined second basis matrix.

[0011] In one possible implementation, the c first global code base matrices are c identical matrices.

[0012] In one possible implementation, at least two of the c first global code base matrices are different, the c first global code base matrices correspond one-to-one with the c first local code base matrices, and the first global code base matrix is ​​any one of the c first global code base matrices.

[0013] Secondly, embodiments of this application provide an LDPC decoding method, which is applied to a second communication device. This method can be implemented by the second communication device or components within the second communication device (e.g., circuits, processors, chips, or chip systems). The following description uses an implementation in a second communication device as an example. The second communication device can be a terminal device or a network device. The method includes: the second communication device receiving a first signal; determining a first log-likelihood rate (LLR) sequence corresponding to the first signal, and decoding the first LLR sequence according to a parity-check matrix; the parity-check matrix corresponds to a first base matrix, which includes c first local code base matrices and c first global code base matrices, wherein the first local code base matrices are determined based on a second base matrix, which is predefined; the first global code base matrix is ​​determined based on a third base matrix, which is determined based on the second base matrix and the first local code base matrices, where c is an integer greater than 1.

[0014] In this embodiment, since the first base matrix includes c first local code base matrices and c first global code base matrices, the parity check matrix corresponding to the first base matrix is ​​a GC LDPC with a cascaded structure composed of multiple local matrices and global matrices. Because its multiple local codes can be decoded independently, when the second communication device decodes the first LLR sequence according to the parity check matrix, error propagation can be reduced in environments with low signal-to-noise ratios. Furthermore, the multiple local codes jointly satisfy the constraints of the global parity check nodes, effectively resisting sudden errors and improving system performance. In addition, the first local code base matrix is ​​determined based on the second base matrix, and the first global code base matrix is ​​determined based on the third base matrix. It should be understood that the first base matrix is ​​obtained by searching within a predefined second base matrix, which significantly reduces the search space compared to searching in an arbitrary space.

[0015] In one possible implementation, the second basis matrix is ​​the basis matrix of LDPC as specified in the NR standard; thus, the first basis matrix can have rate-compatible characteristics, or in other words, a rate-compatible structure.

[0016] In one possible implementation, the first local code base matrix is ​​determined based on the second base matrix, comprising: the first local code base matrix is ​​a matrix of m0 rows and n0 columns obtained by selecting m0 rows from the second base matrix; the first global code base matrix is ​​determined based on the third base matrix, comprising: the first global code base matrix is ​​obtained by selecting r rows from the third base matrix, the threshold value of the first base matrix is ​​less than or equal to the threshold value of the fourth base matrix, the fourth base matrix includes the c first local code base matrices and c second global code base matrices, the second global code base matrix is ​​obtained by selecting any r rows from the third base matrix, where m0 and n0 are integers greater than 1, and r is a positive integer; thus, the first base matrix with a lower threshold value can be determined based on the predefined second base matrix.

[0017] In one possible implementation, the third basis matrix is ​​determined based on the second basis matrix and the first local code basis matrix, including: the third basis matrix is ​​determined based on each row of the second basis matrix except for the m0 local rows, where the m0 local rows of the second basis matrix are the m0 rows selected from the second basis matrix; thus, a first basis matrix with a lower threshold value can be determined based on a predefined second basis matrix.

[0018] In one possible implementation, the c first global code base matrices are c identical matrices.

[0019] In one possible implementation, at least two of the c first global code base matrices are different, the c first global code base matrices correspond one-to-one with the c first local code base matrices, and the first global code base matrix is ​​any one of the c first global code base matrices.

[0020] In one possible implementation, decoding the first LLR sequence according to the parity check matrix includes: a second communication device performing parallel local decoding on the first LLR sequence according to the parity check matrix, wherein the first codeword includes k coupled blocks, and the first LLR sequence includes LLR sequences corresponding to the k coupled blocks respectively; in the case that the decoding of the first coupled block in the k coupled blocks is partially or completely incorrect, global decoding is performed, wherein, in the global decoding stage, the initial soft information passed from the first parity check node associated with the erroneous part of the first coupled block to the first variable node is the information passed from the first parity check node to the first variable node during the last local decoding of the first coupled block, and the input of the corresponding position of the global decoder includes the first soft information output for the last local decoding of the first coupled block; the initial soft information passed from the first parity check node associated with the correctly decoded part of the first coupled block to the first variable node is set to 0, and the input of the corresponding position of the global decoder includes the second soft information that the absolute value of the last local decoding output for the first coupled block is set to a maximum value, and the global decoder is a decoder that performs the global decoding; this can reduce the decoding complexity.

[0021] In one possible implementation, decoding the first LLR sequence according to the parity check matrix includes: performing a first-stage local decoding on the first LLR sequence according to the parity check matrix, wherein the first codeword includes k coupled blocks, and the first LLR sequence includes LLR sequences corresponding to the k coupled blocks respectively; and performing a second-stage global decoding if the decoding of the first coupled block in the k coupled blocks is partially or completely incorrect, wherein the initial soft information passed from the first parity check node associated with the first coupled block to the first variable node is set to 0, and the input of the incorrect part of the first coupled block at the corresponding position of the global decoder includes the information output by the local decoder associated with the first coupled block after the first-stage local decoding. The correct decoding part of the combined block, in the corresponding input of the global decoder, includes information that the absolute value of the output of the local decoder associated with the first coupled block after the first stage of local decoding is set to a maximum value. The global decoder is the decoder that performs the second stage of global decoding. If the decoding of the first coupled block is still incorrect after the second stage of global decoding, the first coupled block is subjected to a third stage of local decoding. The input information of the local decoder is included in the soft information output by the global decoder. The initial information passed from the first check node to the first variable node is the information passed from the first check node to the first variable node when the local decoder performs the last decoding in the first stage of local decoding.

[0022] Thirdly, embodiments of this application provide another LDPC decoding method, which is applied to a second communication device. This method can be implemented by the second communication device or components within the second communication device (e.g., circuits, processors, chips, or chip systems). The following description uses an implementation in a second communication device as an example. The second communication device can be a terminal device or a network device. The method includes: a second communication device receiving a first signal; determining a first LLR sequence corresponding to the first signal; performing parallel local decoding on the first LLR sequence according to a parity check matrix, wherein the first codeword includes k coupled blocks, and the first LLR sequence includes LLR sequences corresponding to the k coupled blocks respectively; and performing global decoding if the decoding of the first coupled block in the k coupled blocks is partially or completely incorrect, wherein, in the global decoding stage, the initial soft information passed from the first parity check node associated with the incorrectly decoded part of the first coupled block to the first variable node is the information passed from the first parity check node to the first variable node during the last local decoding of the first coupled block, and the input of the corresponding position of the global decoder includes the first soft information output for the last local decoding of the first coupled block; the initial soft information passed from the first parity check node associated with the correctly decoded part of the first coupled block to the first variable node is set to 0, and the input of the corresponding position of the global decoder includes the second soft information that the absolute value of the last local decoding output of the first coupled block is set to a maximum value, and the global decoder is a decoder that performs the global decoding; this can reduce decoding complexity.

[0023] Fourthly, embodiments of this application provide another LDPC decoding method, which is applied to a second communication device. This method can be implemented by the second communication device or components within the second communication device (e.g., circuits, processors, chips, or chip systems). The following description uses an implementation in a second communication device as an example. The second communication device can be a terminal device or a network device. The method includes: the second communication device receiving a first signal; determining a first LLR sequence corresponding to the first signal; performing a first-stage local decoding on the first LLR sequence according to a parity check matrix, wherein the first codeword includes k coupling blocks, and the first LLR sequence includes LLR sequences corresponding to the k coupling blocks respectively; and performing a second-stage global decoding if the decoding of the first coupling block in the k coupling blocks is partially or completely incorrect, wherein the initial soft information passed from the first parity check node associated with the first coupling block to the first variable node is set to 0, and the input of the incorrectly decoded portion of the first coupling block at the corresponding position of the global decoder includes information output by the local decoder associated with the first coupling block after the first-stage local decoding, and the decoding of the first coupling block... The correct part of the code, in the corresponding position of the global decoder, includes information that the absolute value of the output of the local decoder associated with the first coupling block after the first stage of local decoding is set to a maximum value. The global decoder is the decoder that performs the second stage of global decoding. If the decoding of the first coupling block is still incorrect after the second stage of global decoding, the first coupling block is subjected to a third stage of local decoding. The input information of the local decoder is included in the soft information output by the global decoder. The initial information passed from the first check node to the first variable node is the information passed from the first check node to the first variable node when the local decoder performs the last decoding in the first stage of local decoding. This can reduce the decoding complexity.

[0024] Fifthly, embodiments of this application provide a communication device that has the function of implementing the behavior described in the first aspect of the method embodiments. The communication device can be a communication equipment, a component of a communication equipment (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the communication equipment. The function of the communication device can be implemented by hardware or by hardware executing corresponding software, the hardware or software including one or more modules or units corresponding to the above functions. In one possible implementation, the communication device includes an interface module and a processing module, wherein: the processing module is used to perform LDPC encoding on an information bit sequence according to a parity check matrix to obtain a first codeword; the parity check matrix corresponds to a first base matrix, the first base matrix including c first local code base matrices and c first global code base matrices, the first local code base matrices being determined based on a second base matrix, the second base matrix being predefined; the first global code base matrix being determined based on a third base matrix, the third base matrix being determined based on the second base matrix and the first local code base matrix, where c is an integer greater than 1; the transceiver module is used to transmit the first codeword.

[0025] For possible implementations of the communication device in the fifth aspect, please refer to the various possible implementations in the first aspect.

[0026] For the technical effects of the various possible implementations of the fifth aspect, please refer to the introduction of the technical effects of the first aspect or the various possible implementations of the first aspect.

[0027] Sixthly, embodiments of this application provide a communication device that has the function of implementing the behavior described in the second aspect of the method embodiments. The communication device may be a communication equipment, a component of a communication equipment (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the communication equipment. The functions of the communication device can be implemented by hardware or by hardware executing corresponding software, the hardware or software including one or more modules or units corresponding to the above functions. In one possible implementation, the communication device includes an interface module and a processing module, wherein: the transceiver module is used to receive a first signal; the processing module is used to determine a first LLR sequence corresponding to the first signal and decode the first LLR sequence according to a parity check matrix; the parity check matrix corresponds to a first base matrix, the first base matrix including c first local code base matrices and c first global code base matrices, the first local code base matrices being determined based on a second base matrix, the second base matrix being predefined; the first global code base matrix being determined based on a third base matrix, the third base matrix being determined based on the second base matrix and the first local code base matrix, where c is an integer greater than 1.

[0028] In one possible implementation, the processing module is specifically configured to perform parallel local decoding on the first LLR sequence according to the parity check matrix, wherein the first codeword includes k coupled blocks, and the first LLR sequence includes LLR sequences corresponding to the k coupled blocks respectively; if the decoding of the first coupled block in the k coupled blocks is partially or completely incorrect, global decoding is performed, wherein, in the global decoding stage, the initial soft information passed from the first parity check node associated with the erroneous part of the first coupled block to the first variable node is the information passed from the first parity check node to the first variable node during the last local decoding of the first coupled block, and the input of the corresponding position of the global decoder includes the first soft information output for the last local decoding of the first coupled block; the initial soft information passed from the first parity check node associated with the correctly decoded part of the first coupled block to the first variable node is set to 0, and the input of the corresponding position of the global decoder includes the second soft information that the absolute value of the last local decoding output of the first coupled block is set to a maximum value, and the global decoder is a decoder that performs the global decoding.

[0029] In one possible implementation, the processing module is specifically configured to perform a first-stage local decoding on the first LLR sequence according to the parity check matrix, wherein the first codeword includes k coupled blocks, and the first LLR sequence includes LLR sequences corresponding to the k coupled blocks respectively; if the decoding of the first coupled block among the k coupled blocks is partially or completely incorrect, a second-stage global decoding is performed, wherein the initial soft information passed from the first parity check node associated with the first coupled block to the first variable node is set to 0, and the input of the erroneous part of the first coupled block at the corresponding position of the global decoder includes the information output by the local decoder associated with the first coupled block after the first-stage local decoding, and the decoding of the first coupled block... The correct part of the input at the corresponding position of the global decoder includes information that the absolute value of the output of the local decoder associated with the first coupling block after the first stage of local decoding is set to a maximum value. The global decoder is the decoder that performs the second stage of global decoding. If the decoding of the first coupling block is still incorrect after the second stage of global decoding, the first coupling block is subjected to a third stage of local decoding. The input information of the local decoder is included in the soft information output by the global decoder. The initial information passed by the first check node to the first variable node is the information passed by the first check node to the first variable node when the local decoder performs the last decoding in the first stage of local decoding.

[0030] For possible implementations of the communication device in the sixth aspect, please refer to the various possible implementations in the second aspect.

[0031] For the technical effects of the various possible implementations of the sixth aspect, please refer to the introduction of the technical effects of the second aspect or the various possible implementations of the second aspect.

[0032] In a seventh aspect, embodiments of this application provide a communication device that has the function of implementing the behavior described in the third aspect method embodiment. The communication device can be a communication equipment, a component of a communication equipment (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the communication equipment. The function of the communication device can be implemented by hardware or by hardware executing corresponding software, the hardware or software including one or more modules or units corresponding to the above functions. In one possible implementation, the communication device includes an interface module and a processing module, wherein: the transceiver module is used to receive a first signal; the processing module is used to determine a first LLR sequence corresponding to the first signal; perform parallel local decoding on the first LLR sequence according to a check matrix, the first codeword including k coupling blocks, the first LLR sequence including LLR sequences corresponding to the k coupling blocks respectively; in the case of partial or complete decoding errors in the first coupling block among the k coupling blocks, perform global decoding, wherein, during the global decoding stage, the first check node associated with the decoding error of the first coupling block is passed to the first check node... The initial soft information of a variable node is the information passed to the first variable node by the first check node during the last local decoding of the first coupled block. The input of the corresponding position of the global decoder includes the first soft information of the output of the last local decoding of the first coupled block. The initial soft information passed to the first variable node by the first check node associated with the correctly decoded part of the first coupled block is set to 0. The input of the corresponding position of the global decoder includes the second soft information of the absolute value of the output of the last local decoding of the first coupled block being set to the maximum value. The global decoder is the decoder that performs the global decoding. This can reduce the decoding complexity.

[0033] Eighthly, embodiments of this application provide a communication device that has the function of implementing the behavior described in the fourth aspect of the method embodiments. The communication device may be a communication equipment, a component of a communication equipment (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the communication equipment. The functions of the communication device can be implemented by hardware or by hardware executing corresponding software, and the hardware or software includes one or more modules or units corresponding to the aforementioned functions. In one possible implementation, the communication device includes an interface module and a processing module, wherein: the transceiver module is used to receive a first signal; the processing module is used to determine a first LLR sequence corresponding to the first signal; perform a first-stage local decoding on the first LLR sequence according to a parity check matrix, wherein the first codeword includes k coupling blocks, and the first LLR sequence includes LLR sequences corresponding to the k coupling blocks respectively; if the decoding of the first coupling block in the k coupling blocks is partially or completely incorrect, perform a second-stage global decoding, wherein the initial soft information passed from the first parity check node associated with the first coupling block to the first variable node is set to 0, and the input of the erroneous part of the decoding of the first coupling block at the corresponding position of the global decoder includes the local decoder associated with the first coupling block after the first stage... The information output by the local decoder includes the information that the absolute value of the output of the local decoder associated with the first coupling block after the first stage of local decoding is set to a maximum value. The global decoder is the decoder that performs the second stage of global decoding. If the first coupling block is still decoded incorrectly after the second stage of global decoding, a third stage of local decoding is performed on the first coupling block. The input information of the local decoder is included in the soft information output by the global decoder. The initial information passed from the first check node to the first variable node is the information passed from the first check node to the first variable node during the last decoding in the first stage of local decoding. This can reduce decoding complexity.

[0034] Ninthly, embodiments of this application provide another communication device, the communication device including one or more processors for processing data and / or signaling to enable the methods of any one of the first to fourth aspects described above to be implemented.

[0035] Optionally, the communication device further includes a memory storing programs or instructions that, when executed by the processor, cause the communication device to perform the methods described in any of the first to fourth aspects above. For example, the communication device may be a chip, the processor may be a processing circuit within the chip, and the memory may be a random access memory or cache within the chip.

[0036] In this embodiment of the application, during the execution of the above method, the process of sending information (or signals) can be understood as a process of outputting information based on processor instructions. When outputting information, the processor outputs the information to the transceiver for transmission. After being output by the processor, the information may undergo further processing before reaching the transceiver. Similarly, when the processor receives input information, the transceiver receives the information and inputs it into the processor. Furthermore, after receiving the information, the transceiver may undergo further processing before inputting it into the processor.

[0037] Unless otherwise specified, or unless their actual function or internal logic in the relevant description is contradicted, the sending and / or receiving operations involved by the processor can generally be understood as processor instruction output.

[0038] In implementation, the processor described above can be a processor specifically designed to execute these methods, or it can be a processor that executes computer instructions stored in memory to execute these methods, such as a general-purpose processor. For example, the processor can also be used to execute a program stored in memory, which, when executed, causes the communication device to perform the methods as shown in the first aspect or any possible implementation thereof.

[0039] In one possible implementation, the memory is located outside the aforementioned communication device. In another possible implementation, the memory is located inside the aforementioned communication device.

[0040] In one possible implementation, the processor and memory may be integrated into a single device; that is, the processor and memory may be integrated together.

[0041] In one possible implementation, the communication device further includes a transceiver for receiving or transmitting signals, etc.

[0042] In a tenth aspect, this application provides another communication device, which includes a processing circuit and an interface circuit, the interface circuit being used to acquire or output signals; the processing circuit being used to perform the methods as described in any one of the first to fourth aspects above.

[0043] Eleventhly, this application provides a computer-readable storage medium storing a computer program, the computer program including program instructions that, when executed, cause a computer to perform the method as described in any of the first to fourth aspects above.

[0044] In a twelfth aspect, this application provides a computer program product, the computer-readable storage medium for storing a computer program that, when executed, causes a computer to perform the method as described in any of the first to fourth aspects above.

[0045] In a thirteenth aspect, this application provides a chip including a communication interface and a processor; the communication interface is used for signal transmission and reception of the chip; the processor is used to execute computer program instructions to cause a communication device including the chip to perform the method as described in any one of the first to fourth aspects above.

[0046] In a fourteenth aspect, embodiments of this application provide a communication system including the communication apparatus described in the fifth aspect or any possible implementation thereof, and the communication apparatus described in the sixth aspect or any possible implementation thereof. Attached Figure Description

[0047] Figure 1 Here is an example of a Tanner diagram;

[0048] Figure 2 An example of a Tanner plot for GC-LDPC is shown;

[0049] Figure 3 A schematic diagram of the GC-LDPC encoding process is shown;

[0050] Figure 4 A schematic diagram illustrating the application scenarios provided in the embodiments of this application;

[0051] Figure 5 This is a schematic diagram of a possible application framework in a communication system.

[0052] Figure 6 A flowchart of a coding / decoding method provided in this application embodiment;

[0053] Figure 7 A schematic diagram of a GC-LDPC three-stage decoding process is provided for an embodiment of this application;

[0054] Figure 8 A flowchart illustrating a method for constructing a GC-LDPC as provided in an embodiment of this application;

[0055] Figure 9The first 24 rows of the BG1, PCM2 matrix defined by the 5G protocol are shown.

[0056] Figure 10 The first 13 rows of the BG1, PCM2 matrix defined by the 5G protocol are shown.

[0057] Figures 11 to 14 Simulation diagrams provided for embodiments of this application;

[0058] Figure 15 Here is an example of a predefined second basis matrix;

[0059] Figure 16 This is a schematic diagram of the structure of a communication device 1600 provided in an embodiment of this application;

[0060] Figure 17 This is a schematic diagram of another communication device provided in an embodiment of this application;

[0061] Figure 18 This is a schematic diagram of the structure of a chip system provided in an embodiment of this application;

[0062] Figure 19 This is a schematic diagram of a chip architecture for an LDPC encoder provided in an embodiment of this application;

[0063] Figure 20 This is a schematic diagram of the chip architecture of an LDPC decoder provided in an embodiment of this application. Detailed Implementation

[0064] The terms "first" and "second," etc., used in the specification, claims, and drawings of this application are only used to distinguish different objects and not to describe a specific order. It is understood that the various numerical designations used in the embodiments of this application are merely for descriptive convenience and are not intended to limit the scope of the embodiments of this application. The order of the process numbers does not imply the order of execution; the execution order of each process should be determined by its function and inherent logic. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or device that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or devices.

[0065] The term "embodiment" as used herein means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a mutually exclusive, independent, or alternative embodiment. Those skilled in the art will understand, explicitly and implicitly, that the embodiments described herein can be combined with other embodiments. In this application, message names are used only to distinguish different messages and should not be construed as limiting. That is, any message name in this application can be replaced with other names, and this application does not impose any limitations.

[0066] The terminology used in the following embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. As used in the specification and appended claims of this application, the singular expressions “a,” “an,” “the,” “the,” “the,” and “this” are intended to include the plural expressions as well, unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used in this application refers to and includes any or all possible combinations of one or more of the listed items. For example, “A and / or B” can mean: the presence of only A, the presence of only B, and the presence of both A and B, where A and B can be singular or plural. The term “multiple” as used in this application refers to two or more. In the textual description of this application, the character “ / ” generally indicates that the preceding and following objects are in an “or” relationship.

[0067] It is understood that in the various embodiments of this application, "B corresponding to A" means that there is a correspondence between A and B, and B can be determined based on A. However, it should also be understood that determining (or generating) B based on (or on) A does not mean that B is determined (or generated) solely based on (or on) A; B can also be determined (or generated) based on (or on) A and / or other information.

[0068] It should be understood that in this application, the indication includes direct indication (also known as explicit indication) and implicit indication. Direct indication information A refers to information A being included; implicit indication information A refers to information A being indicated through the correspondence between information A and information B, and through direct indication information B. The correspondence between information A and information B can be predefined, pre-stored, pre-burned, or pre-configured.

[0069] It should be understood that in this application, information C is used to determine information D, including both situations where information D is determined solely based on information C and situations where it is determined based on information C and other information. Furthermore, information C can also be used to determine information D indirectly, for example, where information D is determined based on information E, and information E is determined based on information C.

[0070] Furthermore, in the embodiments of this application, "network element A sends information A to network element B" can be understood as network element B being the destination of information A or an intermediate network element in the transmission path between the destination and network element B, which may include sending information directly or indirectly to network element B. "Network element B receives information A from network element A" can be understood as network element A being the source of information A or an intermediate network element in the transmission path between the source and network element A, which may include receiving information directly or indirectly from network element A. Information may undergo necessary processing between the source and destination, such as format changes, but the destination can understand the valid information from the source. Similar expressions in this application can be understood in a similar way and will not be elaborated further here.

[0071] To facilitate understanding of the scheme in this application, the relevant concepts of LDPC in this application will be introduced first.

[0072] LDPC is a block error-correcting code with a sparse parity-check matrix, applicable to almost all channels. LDPC is not only easy to implement in hardware, but its performance also approaches the Shannon limit. LDPC stands for Low-Density Parity-Check Code, which, literally, is a parity-check code with low density. Here, low density refers to the low density of the LDPC parity-check matrix. Therefore, to understand what LDPC is, one must first understand the concepts of parity-check code, parity-check matrix, and low density. In this application, LDPC can be replaced with LDPC code.

[0073] 1. Parity check code

[0074] Parity check codes are a type of encoding method that uses redundant bits to ensure that the number of "1"s in a codeword is always odd or even. They are a type of error detection code. Parity check codes are commonly used for encoding numbers in the 0-1 binary field. One or more check bits are added to the end of the codeword. The number of "1"s in the codeword is checked to determine if the codeword has been corrupted before or after transmission. For example, for the codeword 100, using parity check, the check bit can be set to 1. In this case, the sum (XOR) of all codewords is 0, i.e., 1001. If it becomes 1101 after transmission, indicating an error in one bit, then s is 1, indicating a transmission error. It should be understood that if an even number of bits are corrupted, the algorithm fails. Therefore, multiple check bits can be set. For example, the four-bit codeword 1101 can be grouped, with the first check bit used to check the first and second bits of the information bits (i.e., the first two bits, 11). For example, to make the sum of the first two information bits 0, the first parity bit should be 0. Similarly, the second parity bit can check the last two information bits of the codeword 1101, so the second parity bit should be 1. Therefore, the encoded codeword is 110101. This is actually the parity check concept of LDPC, i.e., the meaning of "PC". It can be seen that LDPC is a block code, and it essentially uses parity checking. Adding the low-density characteristic results in LDPC.

[0075] 2. Low-density properties of LDPC

[0076] The low-density property of LDPC refers to the fact that the number of 1s in the LDPC parity-check matrix is ​​very small. LDPC is a linear block code, and its parity-check matrix is ​​a sparse matrix. The number of zero elements in the LDPC parity-check matrix is ​​far greater than the number of non-zero elements. In other words, the row weight (i.e., the number of 1s in each row) and column weight (i.e., the number of 1s in each column) of the parity-check matrix are very small compared to the code length of LDPC.

[0077] 3. LDPC parity-check matrix and generator matrix

[0078] For an LDPC with an information bit length of K and a code length of N, where K and N are positive integers and N is greater than K, its parity-check matrix H has a dimension of (NK) × N, and the corresponding codeword c can be defined by the parity-check matrix H as follows:

[0079] c = {c|Hc} T =0, c∈{0,1} N} (1);

[0080] In the parity-check matrix H, each row corresponds to a parity-check equation of the LDPC, and (NK) parity-check equations correspond to (NK) parity-check nodes of the LDPC; each column corresponds to a symbol of the LDPC, and N symbols correspond to N variable nodes of the LDPC. The non-zero elements h in the parity-check matrix H... i,j This indicates that the i-th check node and the j-th variable node are connected. In the check matrix, the number of non-zero elements in each row represents the degree of the check node, and the number of non-zero elements in each column represents the degree of the variable node. If all check nodes have the same degree, all variable nodes also have the same degree; the LDPC corresponding to this check matrix is ​​a regular code. Otherwise, it is an irregular code. The check matrix H of a regular LDPC with a code length of 10 and a code rate of 1 / 2 is shown below:

[0081]

[0082] Where v0, v1, ..., v9 represent variable nodes, and c0, c1, ..., c4 represent check nodes.

[0083] The codeword c corresponding to the information bit b of length K can be obtained by encoding b using the generator matrix G. The transmitted codeword c obtained by encoding b using the generator matrix G satisfies the following formula:

[0084] c = b·G (2);

[0085] Where G represents the generating matrix. G and H T They are orthogonal to each other, i.e., G·H T =0. The generator matrix can be obtained by transforming the parity check matrix. That is, if the parity check matrix is ​​known, the generator matrix corresponding to the parity check matrix can be obtained. b can be called the information codeword, and c can be called the transmission codeword. Formula (2) shows that the transmission codeword is obtained by multiplying the information codeword and the generator matrix.

[0086] The parity-check matrix of a quasi-cyclic low-density parity-check code (QC-LDPC) exhibits quasi-cyclic properties, allowing for a simplified representation based on its quasi-cyclic structure. For an (N, K) QC-LDPC (i.e., a QC-LDPC with information bit length K and code length N), the number of parity bits is M = NK, and the parity-check matrix H can be expressed as:

[0087]

[0088] Where N = n b ×Z, M=m b ×Z, Z≥1, P i，jLet p represent a (Z×Z) cyclic shift matrix or a (Z×Z) all-zero matrix, which can be represented by the corresponding cyclic shift coefficient p. i，j To simplify the representation, the cyclic shift matrix here is defined as a cyclic right shift matrix of an identity matrix. The shift factor is determined by the number of bits shifted to the right of the first element, and its value ranges from p. i，j ∈[-1, Z max -1], where Z max It is the maximum value of Z, Z≤Z max P i，j =-1 represents a matrix of all zeros, p i，j =0 represents the identity matrix, 1≤p i，j ≤Z max -1 indicates that each element 1 in the identity matrix is ​​cyclically shifted to the right by p. i，j The matrix obtained by the bit transformation function g(p) i,j Z) usually has the following form:

[0089]

[0090] Where % represents the modulo operation, with Z=4, Z max For example, with a value of 8, the p of LDPC i，j The corresponding matrix is:

[0091]

[0092] 4. Tanner diagram

[0093] In 1981, Tanner represented the LDPC codewords graphically. This type of graph is now called a Tanner graph, and there is a one-to-one correspondence between the Tanner graph and the parity check matrix. A Tanner graph consists of two types of vertices: variable nodes, representing codeword bits, and parity check nodes, representing parity check constraints. Each parity check node represents a parity check constraint.

[0094] LDPC can be represented using graphical models, such as Tanner graphs, factor graphs, and tree graphs, with Tanner graphs offering the most concise and intuitive representation. The Tanner graph represents the checksum matrix of the LDPC. The Tanner graph representation of the checksum matrix H is as follows: Figure 1 As shown. Figure 1 Here is an example of a Tanner graph. For instance, for a parity check matrix H of size m rows and n columns, the Tanner graph contains two types of nodes: n variable nodes (also called information nodes or bit nodes) and m parity nodes, where m and n are both integers greater than 0. The n variable nodes correspond to the n columns of the parity check matrix H, and the m parity nodes correspond to the m rows of the parity check matrix H.

[0095] 5. LDPC Encoding and Decoding

[0096] Based on the above description, the transmitted codeword is obtained by multiplying the information codeword by the generator matrix, which can be derived from the parity check matrix through transformation. The LDPC decoding process iterates between the variable node and the parity check node according to the parity check pattern between the parity bits (or parity symbols) and the information bits (or information symbols) until a pattern satisfying Hc is found. T The codeword is given by =, and the output c is the decoded codeword. LDPC decoding algorithms fall into three main categories: hard-decision decoding, soft-decision decoding, and hybrid decoding.

[0097] To a large extent, LDPC's error correction capability can be controlled by a threshold value. Description, when channel parameters At this point, as the number of iterations increases, the error probability can become arbitrarily small; when At this point, decoding will fail regardless of the number of iterations. Common methods for calculating the threshold include extrinsic information transfer (EXIT) analysis and density evolution. However, due to the relatively long code length of GC-LDPC, traditional algorithms are highly complex. Therefore, protograph-based extrinsic information transfer (PEXIT) analysis can be used to assess its error correction capability.

[0098] The trap set τ(N, s) of LDPC is a set of erroneous variable nodes after multiple iterations of decoding, where N represents the number of variable nodes and s represents parity nodes with odd degrees. When the decoding process enters the trap set, parity nodes with even degrees cannot correct errors, while those with odd degrees can. The inability to successfully correct errors in variable nodes during decoding causes the bit error rate curve to flatten in the high signal-to-noise ratio region, a phenomenon known as error flattening. The LDPC trap set consists of short cycles and their connected edges, severely impacting decoding performance. Furthermore, when the LDPC code length is large, the computational complexity of the encoding and decoding processes becomes very high, with significant latency, and existing standards may struggle to support applications with extremely long code lengths.

[0099] 6. Globally Coupled (GC) LDPC

[0100] To address the problems of existing LDPCs, namely the existence of trap sets and the high computational complexity of encoding and decoding processes when the code length is large, Juane Li et al. proposed a cascaded LDPC structure, GC LDPC, in 2016. Its parity check matrix consists of local and global matrices. The Tanner diagram of GC-LDPC is shown below. Figure 2 As shown, r global verification nodes are used to connect c independent LDPCTanner graphs {ζ0, ζ1, ..., ζ}. c-1 Connect them together, where ζ i Let i = 1, ..., c-1 represent the Tanner graph corresponding to the local code, with r global check nodes and ζ. i The connection represents the Tanner graph corresponding to the global code. Figure 2 An example of a Tanner plot for GC-LDPC is shown. Unless otherwise specified, GC-LDPCs in this paper all have a quasi-cyclic (QC) structure. In other words, the basis matrix corresponding to the parity-check matrix of GC-LDPC is obtained by cyclically shifting a (z×z) identity matrix.

[0101] GC-LDPC's encoding method is flexible and has good structural characteristics. Because its multiple local codes can be decoded independently, it can reduce error propagation in environments with low signal-to-noise ratios. Furthermore, the multiple local codes together satisfy the constraints of the global check node, which can effectively resist sudden errors and improve system performance.

[0102] For the local code ζ in GC-LDPC i While algebraic construction can be used, this method struggles to achieve code rate compatibility. The 5G NR standard defines two basis matrices, BG1 and BG2, for LDPC that enable code rate compatibility in a quasi-cyclic structure. BG1 supports a specific code rate. Adjustable, maximum encodeable information length is k bmax =8448bit; BG2 supported bitrate Adjustable, maximum encodeable information length is k bmax =3840 bits. For scenarios with larger code lengths, the existing standard no longer supports them, but GC-LDPC can solve this problem by concatenating multiple code blocks.

[0103] The basis matrix B of GC-LDPC GC Represented as:

[0104]

[0105] Among them, the local code base matrix The global code base matrix is ​​of size m0×n0. The size is r × Cn0. The global code base matrix can be simply referred to as the global code. The global code base matrix consists of multiple sub-blocks. This represents the i-th sub-block in the global code base matrix. Alternatively, the global code base matrix consists of multiple sub-global code base matrices. This represents the i-th sub-global code base matrix in the global code base matrix. The first global code base matrix in the following text is a sub-global code base matrix. Alternatively, the first global code base matrix in the following text is a sub-block of the global code. Each element in the set satisfies b ij ∈{0,1}, meaning bij is either 0 or 1. The offset matrix of GC-LDPC is represented as... Verification matrix Z is the offset value, H GC With P GC One-to-one correspondence. If b ij =0, then p ij =-1, corresponding to H GC The corresponding position is a zero matrix of size (Z×Z); if b ij =1, then p ij ∈{0, 1, ..., Z-1}, corresponding to H GC A cyclic permutation matrix of size (Z×Z) at the corresponding position, where the first row of this cyclic permutation matrix is ​​at position (p). ij +1) represents non-zero elements.

[0106] To simplify encoding, each sub-block of the global code can be represented as follows when designing GC-LDPC. In form, With a size of r×(n0-m0), this construction method allows for global code encoding first, followed by local code encoding. Figure 3 A schematic diagram of the GC-LDPC encoding process is shown. (For example...) Figure 3 As shown, the GC-LDPC encoding process includes: first using the global matrix H gp Global encoding is performed on information bits of length [c(n0-m0)-r] to obtain an intermediate codeword; then, this intermediate codeword is divided into blocks, each block having a length of (n0-m0)Z; finally, c local matrices are used, i.e. Each block is locally encoded to obtain the codeword to be sent.

[0107] The application scenarios of the technical solution of this application are introduced below. These scenarios include, but are not limited to: communication (i.e., data and / or signaling transmission) between network devices (e.g., base stations or access points) and terminal devices; communication between network devices; communication between terminal devices; communication between network devices and relay devices; communication between relay devices; or communication between relay devices and terminal devices. This application uses communication between network devices and terminal devices as an example for description; communication between other devices can be found in the section on communication between network devices and terminal devices.

[0108] Figure 4 This is a schematic diagram illustrating an application scenario provided in an embodiment of this application. For example... Figure 4 As shown, the application scenarios of the technical solution of this application may include: direct communication between network devices and user equipment (UE) (i.e., point-to-point single connection between network devices and UE), multi-hop / multi-relay transmission between network devices and UE (i.e., multi-hop single connection), dual connectivity (DC) between multiple network devices and UE, or multi-hop multi-connection scenarios. Figure 4 This is merely an example and does not impose any limitation on the network architecture applicable to this application. Communication between any two devices is a network architecture that can be used in this application.

[0109] The technical solutions provided in this application can be applied to various communication systems, such as: 5th generation (5G) or new radio (NR) systems, long term evolution (LTE) systems, LTE frequency division duplex (FDD) systems, LTE time division duplex (TDD) systems, wireless local area network (WLAN) systems, satellite communication systems, future communication systems, or integrated systems of multiple systems. The technical solutions provided in this application can also be applied to device-to-device (D2D) communication, vehicle-to-everything (V2X) communication, machine-to-machine (M2M) communication, machine-type communication (MTC), and Internet of Things (IoT) communication systems or other communication systems.

[0110] The technical solutions provided in this application can be applied to channel coding / decoding between communication devices. Channel coding / decoding between communication devices can include: channel coding / decoding between network devices and terminals, channel coding / decoding between network devices, and channel coding / decoding between terminals. In this application, the term "channel coding / decoding" can also be simply referred to as "coding," and the term "coding" can also be described as "channel encoding / decoding," "network coding," "external code," or "source-channel joint encoding / decoding." The term "coding structure" can also be simply referred to as "coding," "code type," or "code design," and the term "coding structure" can also be described as "concatenated code," "layered code," "coupled code," "external code," "sliding window code," "product code," or "ladder code."

[0111] In this application, the technical solution is described using a cellular system related to the 3rd Generation Partnership Project (3GPP) as an example, but this should not be construed as limiting the application in any way. Based on the same concept, the technical methods of this application can also be applied to other communication networks such as Zigbee, long-range radio (Lora), Bluetooth (BT), and wireless fidelity (Wi-Fi). The technical solutions provided in the embodiments of this application are also applicable to other communication systems that support simultaneous wireless data and power transmission.

[0112] In a communication system, a first device can send signals to a second device or receive signals from a third device. These signals may include information, signaling, or data. The device can also be replaced by an entity, network entity, communication equipment, communication module, node, communication node, etc. This disclosure uses a network element as an example. The first device can be a network device or a terminal device, the second device can be a network device or a terminal device, and the third device can be a network device or a terminal device. For example, a communication system may include at least one terminal device and at least one network device. The network device can send downlink signals to the terminal device, and / or the terminal device can send uplink signals to the network device. It is understood that the terminal device in this disclosure can be replaced by the first device, and the network device can be replaced by the second device, both performing the corresponding communication methods described in this disclosure.

[0113] In the embodiments of this application, terminal equipment may also be referred to as user equipment (UE), access terminal, subscriber unit, user station, mobile station, mobile station (MS), remote station, remote terminal, mobile device, user terminal, terminal, wireless communication equipment, user agent, or user device.

[0114] A terminal device can be a device that provides wireless communication capabilities, such as a handheld device or an in-vehicle device with wireless connectivity. Currently, examples of terminal devices include: mobile phones, cellular phones, smartphones, tablets, laptops, PDAs, mobile internet devices (MIDs), wearable devices, virtual reality (VR) devices, augmented reality (AR) devices, wireless terminals in industrial control, wireless terminals in self-driving, wireless terminals in remote medical surgery, wireless terminals in smart grids, wireless terminals in transportation safety, wireless terminals in smart cities, wireless terminals in smart homes, cellular phones, cordless phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), handheld devices with wireless communication capabilities, computing devices or other processing devices connected to a wireless modem, wearable devices, terminal devices in 5G networks, or future evolution of public terrestrial mobile communication networks (PPPoE). Terminal devices in a land mobile network (PLMN), etc., are not limited to this in the embodiments of this application. Terminal devices can also be devices in a Zigbee network, devices in a LoRa network, Bluetooth slaves, Bluetooth Low Energy (BLE) slaves, Wi-Fi stations (STAs), etc.

[0115] As an example and not a limitation, in this embodiment, the terminal device can also be a terminal device in an IoT system, also referred to as an IoT node. IoT is an important component of future information technology development. Its main technical characteristic is connecting objects to networks through communication technologies, thereby realizing an intelligent network of human-machine interconnection and machine-to-machine interconnection. Connections can be made using broadband or narrowband technologies. IoT technology, for example, can achieve massive connectivity, deep coverage, and low terminal power consumption through narrowband (NB) technology. IoT technologies may include reflective communication technology, spread spectrum technology, ultrawideband (UWB), etc., which will not be elaborated further.

[0116] By way of example and not limitation, in this embodiment, the terminal device can also be a wearable device. Wearable devices, also known as wearable smart devices, are a general term for devices that utilize wearable technology to intelligently design and develop everyday wearables, such as glasses, gloves, watches, clothing, and shoes. Wearable devices are portable devices that are worn directly on the body or integrated into the user's clothing or accessories. Wearable devices are not merely hardware devices, but also achieve powerful functions through software support, data interaction, and cloud interaction. Broadly speaking, wearable smart devices include those that are feature-rich, large in size, and can achieve complete or partial functions without relying on a smartphone, such as smartwatches or smart glasses, as well as those that focus on a specific type of application function and require the use of other devices such as smartphones, such as various smart bracelets and smart jewelry for vital sign monitoring.

[0117] In this embodiment, the device for implementing the functions of the terminal device can be the terminal device itself, or it can be any device capable of supporting the terminal device in implementing those functions, such as a chip system. This device can be installed in or used in conjunction with the terminal device. In this embodiment, the chip system can be composed of chips or may include chips and other discrete components. This embodiment only uses the terminal device as an example to illustrate the device for implementing the functions of the terminal device, and does not constitute a limitation on the solution of this embodiment.

[0118] The network device in this application embodiment can be a device for communicating with a terminal device. This network device can also be called an access network device or a wireless access network device, such as a base station. In this application embodiment, the network device can refer to a radio access network (RAN) node (or device) that connects the terminal device to the wireless network. Base stations can broadly encompass various names listed below, or be interchangeable with them, such as: RAN node, Node B, evolved Node B (eNB), next-generation Node B (gNB), base station controller (BSC), base transceiver station (BTS), home base station (e.g., home evolved Node B, or home Node B, HNB), baseband unit (BBU), wireless relay node, wireless backhaul node, relay station, transmitting and receiving point (TRP), IAB node, transmitting point (TP), master station, auxiliary station, motor slide retainer (MSR) node, network controller, access node, wireless node, access point (AP), transmission node, transceiver node, remote radio unit (RRU), active antenna unit (AAU), remote radio head (RRH), central unit (…). The network devices in this application can also be Zigbee base stations, Bluetooth master, BLE master, LoRa base stations, or Wi-Fi access points. These include distributed units (DU), radio units (RU), positioning nodes, and one or more antenna panels (including multiple antenna panels) of a base station in a 5G system.

[0119] A base station can be a macro base station, micro base station, relay node, donor node, or a combination thereof. A base station can also refer to a communication module, modem, or chip installed within the aforementioned equipment or apparatus. A base station can also be a mobile switching center, or equipment performing base station functions in device-to-device (D2D), vehicle-to-everything (V2X), and machine-to-machine (M2M) communications, network-side equipment in 6G networks, or equipment performing base station functions in future communication systems. A base station can support networks using the same or different access technologies. Optionally, a RAN node can also be a server, wearable device, vehicle, or in-vehicle equipment. For example, the access network equipment in V2X technology can be a roadside unit (RSU). The embodiments of this application do not limit the specific technologies or equipment forms used in the network equipment.

[0120] Base stations can be fixed or mobile. For example, a helicopter or drone can be configured to act as a mobile base station, and one or more cells can move depending on the location of the mobile base station. In other examples, a helicopter or drone can be configured as a device to communicate with another base station.

[0121] In some deployments, the network devices mentioned in the embodiments of this application may be devices including CU, DU, or CU and DU, or devices with control plane CU nodes (central unit-control plane (CU-CP)) and user plane CU nodes (central unit-user plane (CU-UP)) and DU nodes. For example, the network devices may include gNB-CU-CP, gNB-CU-UP, and gNB-DU.

[0122] In some deployments, multiple RAN nodes collaborate to assist terminals in achieving wireless access, with different RAN nodes each implementing some of the base station's functions. For example, RAN nodes can be CUs, DUs, CU-CPs, CU-UPs, or RUs. CUs and DUs can be configured separately or included in the same network element, such as a BBU. RUs can be included in radio frequency equipment, such as in an RRU, AAU, or RRH.

[0123] RAN nodes can support one or more types of fronthaul interfaces, each corresponding to a DU and RU with different functions. If the fronthaul interface between the DU and RU is a common public radio interface (CPRI), the DU is configured to implement one or more baseband functions, and the RU is configured to implement one or more radio frequency functions. If the fronthaul interface between the DU and RU is another type of interface, relative to CPRI, some downlink and / or uplink baseband functions, such as, for downlink, precoding, digital beamforming (BF), or one or more of inverse fast Fourier transform (IFFT) / cyclic prefix addition (CP), are moved from the DU to the RU; and for uplink, digital beamforming (BF), or one or more of fast Fourier transform (FFT) / cyclic prefix removal (CP), are moved from the DU to the RU. In one possible implementation, the interface can be an enhanced common public radio interface (eCPRI). Under this eCPRI architecture, the segmentation between DU and RU differs, corresponding to different categories (Cat) of eCPRI, such as eCPRI Cat A, B, C, D, E, F.

[0124] Taking eCPRI Cat A as an example, for downlink transmission, the DU is configured to implement one or more functions preceding and following layer mapping (i.e., coding, rate matching, scrambling, modulation, and layer mapping), while other functions following layer mapping (e.g., resource element (RE) mapping, digital beamforming (BF), or one or more functions following inverse fast Fourier transform (IFFT) / cyclic prefix (CP) addition) are moved to the RU. For uplink transmission, the DU is configured to implement one or more functions preceding and following de-mapping (i.e., decoding, rate matching de-mapping, descrambling, demodulation, inverse discrete Fourier transform (IDFT), channel equalization, and de-RE mapping), while other functions following de-mapping (e.g., digital BF or fast Fourier transform (FFT) / CP removal) are moved to the RU. It is understandable that the functional descriptions of the DU and RU corresponding to various types of eCPRI can be found in the eCPRI protocol, and will not be elaborated here.

[0125] In one possible design, the processing unit in the BBU used to implement baseband functions is called the baseband high (BBH) unit, and the processing unit in the RRU / AAU / RRH used to implement baseband functions is called the baseband low (BBL) unit.

[0126] In different systems, CU (or CU-CP and CU-UP), DU, or RU may have different names, but those skilled in the art will understand their meaning. For example, in an open radio access network (ORAN / O-RAN) system, CU can also be called O-CU (open CU), DU can also be called O-DU, CU-CP can also be called O-CU-CP, CU-UP can also be called O-CU-UP, and RU can also be called O-RU. Any of the units among CU (or CU-CP, CU-UP), DU, and RU in this application can be implemented through software modules, hardware modules, or a combination of software modules and hardware modules.

[0127] In this embodiment, the apparatus for implementing the functions of a network device can be a network device itself; it can also be an apparatus capable of supporting the network device in implementing those functions, such as a chip system, hardware circuit, software module, or a hardware circuit plus a software module. This apparatus can be installed in the network device or used in conjunction with the network device. In this embodiment, the example of a network device being used to implement the functions of a network device is provided only and does not constitute a limitation on the solutions described in this embodiment.

[0128] Network devices and / or terminal devices can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted; they can also be deployed on water; and they can also be deployed in the air on airplanes, balloons, and satellites. This application does not limit the scenario in which the network devices and terminal devices are located. Furthermore, terminal devices and network devices can be hardware devices, or software functions running on dedicated hardware or general-purpose hardware, such as virtualization functions instantiated on a platform (e.g., a cloud platform), or entities that include dedicated or general-purpose hardware devices and software functions. This application does not limit the specific form of the terminal devices and network devices.

[0129] It should be noted that the network architecture described in the embodiments of this application is for the purpose of more clearly illustrating the technical solutions of the embodiments of this application, and does not constitute a limitation on the technical solutions provided in the embodiments of this application. Those skilled in the art will understand that with the evolution of network architecture and the emergence of new service scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems. In the following embodiments, the apparatus for implementing the functions of a network device is a network device, and a base station is used as an example to describe the technical solutions provided in the embodiments of this application.

[0130] Figure 5 This is a schematic diagram of a possible application framework in a communication system. For example... Figure 5 As shown, the communication system includes: core network equipment, access network nodes, operation administration and maintenance (OAM) network elements, and terminal equipment. The network elements in this communication system are connected via interfaces (e.g., NG, Xn) or air interfaces. Access network nodes can be standalone RAN nodes or can include multiple RAN nodes, such as CUs and DUs. Optionally, a CU can also be split into CU-CP and CU-UP.

[0131] It is understood that this application does not specifically limit the structure of the execution entity of the method provided in the embodiments of this application, as long as it is possible to perform wireless data and power transmission according to the method provided in the embodiments of this application by running a program that records the code of the method provided in the embodiments of this application. The method provided in the embodiments of this application can be applied to wireless data and power transmission between terminal devices and network devices. The following description takes the interaction between terminal devices and network devices (taking base stations as an example) as an example.

[0132] As mentioned in the background section, in environments with low signal-to-noise ratios (SNR), existing LDPC encoding and decoding methods (such as LDPC in 5G) are prone to burst errors. Therefore, it is necessary to research LDPCs that can effectively resist burst errors in low SNR environments. GC-LDPC encoding is flexible and possesses good structural characteristics. Since multiple local codes in GC-LDPC can be decoded independently, error propagation can be reduced in low SNR environments. Furthermore, these multiple local codes collectively satisfy the constraints of the global check node, effectively resisting burst errors and improving system performance. The construction of GC-LDPC can be divided into two steps: first, determining the basis matrix B... 盯 The smallest threshold value (which can be simply called the threshold) is B. gp Then optimize the offset value at the corresponding position to determine P. gp .

[0133] In existing technologies, the basis matrix B corresponding to GC-LDPC is determined. GC The method is as follows: Optimize line by line using PEXIT analysis. The positions of the non-zero elements in the array. Alternatively, using PEXIT analysis, optimize row-by-row through exhaustive (traversal) methods. The location of the non-zero element in the matrix. To significantly reduce the search range, select... Furthermore, to reduce computational complexity, for any number of coupled blocks, c=2 is considered the smallest design unit, that is, it is determined that when c=2, the basis matrix B is made to be such that... GC The minimum threshold B gp That's sufficient. Therefore, Represents all possible The quantity, of which express The number of non-zero elements in the j-th (j = 1, ..., r) row is called row weight. For example, the local code part can be constructed using the basis matrix BG1. That is, n0-m0=22, when r=2, As r increases, The computational complexity will increase exponentially, making it extremely high and difficult for devices to support.

[0134] In the prior art, a specific method for solving the threshold value of the basis matrix corresponding to GC-LDPC using PEXIT analysis is as follows:

[0135] 1): Initialization in, R represents prototype diagram B. GC bitrate, V represents the signal-to-noise ratio associated with the channel input of j variable nodes. j If a hole is drilled, then otherwise,

[0136] 2): Update from variable node to check node. i，j Representation matrix B GC The element in the i-th row and j-th column, if b i，j ≠0, then

[0137] Otherwise, I Ec (i, j) = 0, where 0 ≤ j < cn0, 0 ≤ i < cm0 + r.

[0138] 3): Verify node updates to variable nodes. Set I Ac (i, j) = I Ev (i, j), if b i，j ≠0, then Otherwise, I Ec (i, j) = 0.

[0139] 4): Set I Av (i, j) = I Ec (i, j), calculate the mutual information evaluation soft value:

[0140]

[0141] Iterate the above process until... Satisfy 1-I APP (j) < ε, where ε is a local minimum, resulting in a threshold value of (E). b / N0) * .

[0142] In this application, the method for determining the threshold value of the basis matrix corresponding to GC-LDPC is not limited; the above method is merely an example. Alternatively, the encoding-side node can determine the threshold value of the basis matrix corresponding to GC-LDPC in any way; this application does not impose any limitations.

[0143] When designing the offset values ​​for GC-LDPC, ring length is an important consideration. Some articles have proposed ring metric indicators, see the following formula:

[0144]

[0145] Among them, L max N(i,j) represents the maximum ring length of GC-LDPC at the current offset, N(i,j) represents the number of rings with a length of (2j+2), and w c The weight represents the length of a loop; the shorter the loop length, the larger the weight. To avoid the formation of short loops, It should be as small as possible, i.e., select an offset value.

[0146] Existing schemes for constructing the basis matrix of GC-LDPC have the following drawbacks:

[0147] (1) Search space of PEXIT analysis The number of rows r in the global code base matrix increases exponentially;

[0148] (2) Regardless of the actual value of the number of coupling blocks c, the basis matrix B is optimized using c=2. gp The method may have some deviation;

[0149] Assume the basis matrix B of the local code local Offset matrix P local Sum of check matrices H local Using the 5G NR standard's basis matrix BG1, the parameters of GC-LDPC are set to m0=24, n0=46, c=2, r=1. According to the 5G NR standard, the first two columns of each coupling block are perforated, and the code rate... Table 1 lists the optimal values ​​for different row weights. And the corresponding threshold values. Table 2 lists the fixed row weights. Below, the threshold of GC-LDPC with c=2 is directly minimized. Copy to the threshold value corresponding to the number of more coupled blocks.

[0150] Table 1

[0151]

[0152] Table 2

[0153] C Threshold value (dB) Difference from Shannon limit (dB) c Threshold value (dB) Difference from Shannon limit (dB) 3 0.4142 0.240 6 0.4533 0.263 4 0.4380 0.258 7 0.4554 0.263 5 0.4485 0.262 8 0.4566 0.263

[0154] As can be seen from Tables 1 and 2, as c increases, the bit rate of GC-LDPC increases, the threshold value increases, and the gap with the Shannon threshold also increases.

[0155] To overcome the shortcomings of existing schemes for constructing the basis matrix of GC-LDPC, this application provides a scheme for constructing the basis matrix of GC-LDPC based on the basis matrices BG1 and / or BG2 in the 5GNR standard. The approach to constructing the basis matrix of GC-LDPC provided in this application is as follows: considering existing methods that use PEXIT analysis to exhaustively determine B... gp The computational complexity is high, while the basis matrix constructed by the 5G NR standard naturally has good performance, if r ≤ (m max -m0)(If BG1 is selected, then m max =46; if BG2 is selected, then m max =42), first select m0 rows and n0 columns from the top left corner of the 5G NR standard's base matrix as B. local Then, using PEXIT analysis, select r rows and (n0-m0) columns from the remaining rows as... This minimizes the threshold value of the GC-LDPC base matrix, thus greatly reducing computational complexity. Furthermore, since both the base matrices BG1 and BG2 in the 5G NR standard have rate-compatible characteristics, their use in constructing the local code base matrix of GC-LDPC ensures that the constructed GC-LDPC can achieve partial retransmission due to its rate-compatible structure.

[0156] The technical solution of this application is described below with reference to the accompanying drawings.

[0157] Figure 6 This is a flowchart illustrating a coding / decoding method provided in an embodiment of this application. Figure 6 As shown, the method includes:

[0158] 601. The first communication device performs LDPC encoding on the information bit sequence according to the parity check matrix to obtain the first codeword.

[0159] The first communication device is a node on the encoding side. The first communication device can be a network device or a terminal device.

[0160] In one possible implementation, the first communication device performs LDPC encoding on the information bit sequence according to the generator matrix corresponding to the parity check matrix to obtain the first codeword. The parity check matrix corresponds to the first base matrix. An example of the parity check matrix corresponding to the first base matrix is ​​as follows: The first base matrix is ​​B in the above formula (5). GC The verification matrix is If b ij =0, then h ij =-1, corresponding to H GC The corresponding position is a zero matrix of size (Z×Z); if b ij =1, then h ij ∈{0, 1, ..., Z-1}, corresponding to HGC The corresponding position is a cyclic permutation matrix of size (Z×Z). The first base matrix includes c first local code base matrices and c first global code base matrices. There is a one-to-one correspondence between the c first local code base matrices and the c first global code base matrices. In other words, each local code base matrix in the first base matrix corresponds to one global code base matrix. The first local code base matrix is ​​determined based on the second base matrix. The second base matrix is ​​predefined. The second base matrix can be the base matrix of LDPC as specified in the 5GNR standard, or it can be other base matrices that can achieve code rate compatibility and have a quasi-cyclic structure; this application does not limit this. For example, the second base matrix can be either BG1 or BG2, two base matrices of LDPC that can achieve code rate compatibility and have a quasi-cyclic structure. The first global code base matrix is ​​determined based on the third base matrix. The third base matrix is ​​determined based on the second base matrix and the first local code base matrix, where c is an integer greater than 1.

[0161] The first local code base matrix, determined based on the second base matrix, comprises: an m0-row, n0-column matrix obtained by selecting m0 rows from the second base matrix. Both m0 and n0 are integers greater than 1. As an example, the first local code base matrix is ​​an m0-row, n0-column matrix selected from the top left corner of the second base matrix. Alternatively, the first local code base matrix is ​​a matrix consisting of the first row to the first column of the m0-th row, and the first column to the n0-th column of the second base matrix. Or, the first local code base matrix is ​​a submatrix of the second base matrix, consisting of the first row to the first column of the m0-th row, and the first column to the n0-th column of the m0-th row. As another example, the first local code base matrix is ​​an m0-row, n0-column matrix selected from the bottom left corner of the second base matrix. As yet another example, the first local code base matrix is ​​a matrix consisting of any n0 columns selected from any m0 rows of the second base matrix.

[0162] The third base matrix, determined based on the second base matrix and the first local code base matrix, includes the following: the third base matrix is ​​determined based on all rows of the second base matrix except for the m0 local rows, where the m0 local rows are the m0 rows selected from the second base matrix as described above. As an example, the first local code base matrix is ​​a matrix of m0 rows and n0 columns selected from the top left corner of the second base matrix, and the third base matrix is ​​a matrix composed of all rows of the second base matrix except for the m0 rows. As another example, the first local code base matrix is ​​a matrix of m0 rows and n0 columns selected from the bottom left corner of the second base matrix, and the third base matrix is ​​a matrix composed of all rows of the second base matrix except for the m0 rows.

[0163] The first global code base matrix is ​​determined based on the third base matrix and includes: the first global code base matrix is ​​obtained by selecting r rows from the third base matrix; the threshold value of the first base matrix is ​​less than or equal to the threshold value of the fourth base matrix; the fourth base matrix includes c first local code base matrices and c second global code base matrices; the second global code base matrix is ​​obtained by selecting any r rows from the third base matrix; m0 and n0 are integers greater than 1; and r is a positive integer. Alternatively, the first global code base matrix is ​​obtained by selecting r rows from the third base matrix; the threshold value of the base matrix composed of c first global code base matrices and c first local code base matrices is less than or equal to the threshold value of the base matrix composed of c second global code base matrices and c first local code base matrices; and the second global code base matrix is ​​obtained by selecting any r rows from the third base matrix. The first global code base matrix can be as described above. Determining the first global code base matrix based on the third base matrix can be understood as: using PEXIT analysis, selecting r rows and (n0-m0) columns from the third base matrix as... This minimizes the threshold value of the basis matrix of GC-LDPC.

[0164] 602. The first communication device sends the first codeword.

[0165] Accordingly, the second communication device receives the first signal, which is the signal corresponding to the first codeword transmitted through the channel by the first communication device. The second communication device is a node on the decoding side (or the decoding side). The second communication device can be a network device or a terminal device.

[0166] 603. The second communication device determines the first LLR sequence corresponding to the first signal and decodes the first LLR sequence according to the parity check matrix.

[0167] In one possible implementation, decoding the first LLR sequence according to the parity check matrix includes: a second communication device performing parallel local decoding of the first LLR sequence according to the parity check matrix, wherein the first codeword includes k coupled blocks, and the first LLR sequence includes LLR sequences corresponding to the k coupled blocks respectively; if the decoding of the first coupled block in the k coupled blocks is partially or completely incorrect, global decoding is performed, wherein, in the global decoding stage, the initial soft information passed from the first parity check node to the first variable node for the incorrectly decoded part of the first coupled block is the information passed from the first parity check node to the first variable node during the last local decoding of the first coupled block, and the input of the corresponding position of the global decoder includes the first soft information output from the last local decoding of the first coupled block; the initial soft information passed from the first parity check node to the first variable node for the correctly decoded part of the first coupled block is set to 0, and the input of the corresponding position of the global decoder includes the second soft information that the absolute value of the last local decoding output of the first coupled block is set to the maximum value, and the global decoder is a decoder that performs global decoding; this can reduce the decoding complexity. The second communication device performs parallel local decoding of the first LLR sequence based on the parity check matrix as follows: The second communication device performs parallel local decoding on k coupled blocks respectively based on the parity check matrix; for any coupled block among the k coupled blocks, if the decoding output r = [r0, ..., r c-1 If the local check relationship is satisfied, the decoding is considered correct; otherwise, the decoding is incorrect.

[0168] An example of the second communication device performing global decoding when the decoding of the first coupled block out of k coupled blocks is partially or completely incorrect is as follows: When the decoding of the first coupled block out of k coupled blocks is partially or completely incorrect, the input to the global decoder (H...)... GC′ The soft information of ) has been changed to L ch,GC′，i =LLR local，i The initial soft information passed from the verification node to the variable node is changed to LLR local，i and L mn，local These represent the soft information (i.e., the second soft information above) output after the last local decoding of the i-th coupled block (i.e., the first coupled block) and the information passed to the variable node by the first check node associated with the correctly decoded part of the first coupled block. This decoding scheme is a local decoding followed by global decoding (H) provided in the embodiments of this application. local →H GC′ The two-stage decoding scheme allows for sufficient information transfer between different stages, which can reduce computational complexity and improve performance.

[0169] In one possible implementation, decoding the first LLR sequence according to the parity check matrix includes: performing a first-stage local decoding on the first LLR sequence according to the parity check matrix, wherein the first codeword includes k coupled blocks, and the first LLR sequence includes the LLR sequences corresponding to the k coupled blocks respectively; if the decoding of the first coupled block in the k coupled blocks is partially or completely incorrect, performing a second-stage global decoding, wherein the initial soft information passed from the first parity check node associated with the first coupled block to the first variable node is set to 0, and the input of the erroneous part of the first coupled block at the corresponding position of the global decoder includes the information output by the local decoder associated with the first coupled block after the first-stage local decoding. The correctly decoded portion of the first coupled block, in the corresponding input of the global decoder, includes information that the absolute value of the output of the local decoder associated with the first coupled block after the first stage of local decoding is set to a maximum value. The global decoder is the decoder that performs the second stage of global decoding. If the first coupled block is still incorrectly decoded after the second stage of global decoding, the first coupled block undergoes a third stage of local decoding. The input information of the local decoder is included in the soft information output by the global decoder. The initial information passed from the first check node to the first variable node is the information passed from the first check node to the first variable node during the last decoding in the first stage of local decoding. The second communication device performs the first stage of local decoding on the first LLR sequence according to the check matrix. This can be achieved by the second communication device performing an iterative local decoding on each of the k coupled blocks according to the check matrix. If the decoding output within a frame conforms to the check relationship between the local code and the global code, a decision result is output; otherwise, the second stage of global decoding is initiated.

[0170] One possible implementation of the second-stage global decoding by the second communication device is as follows: The second communication device performs the second-stage global decoding. For any one of the k coupling blocks mentioned above, if the coupling block (e.g., the first coupling block) is decoded correctly in the local decoding stage (the decoding output corresponding to the coupling block is r = [r0, ..., r...)...), c-1If the local verification relationship is satisfied, the input of the coupled block at the corresponding position in the global decoder includes the information that the absolute value of the output of the local decoder associated with the coupled block after the first stage of local decoding is set to the maximum value, and the initial soft information passed by the verification node to the variable node is set to 0. If the coupled block fails to decode in the local decoding stage, the input information of the coupled block at the corresponding position in the global decoder is the information of the output of the local decoder associated with the first coupled block after the first stage of local decoding, and the initial soft information passed by the verification node to the variable node is set to 0. After two stages of iterative decoding, if the decoding output satisfies the verification relationship, the decision result is output; otherwise, the coupled block that still decodes incorrectly is local decoded again. The input information of the local decoder is the soft information of the output of the second stage of global decoding, and the initial information passed by the verification node to the variable node is the information passed by the verification node to the variable node during the last decoding of the local decoder in the first stage. Figure 7 This is a schematic diagram of a three-stage GC-LDPC decoding process provided for an embodiment of this application. Figure 7 As shown, the GC-LDPC three-stage decoding process includes: demodulating the received signal to obtain the first LLR sequence; performing parallel local decoding on the first LLR sequence according to the parity check matrix, i.e., the first-stage local decoding; hard decision; determining whether the output of the parallel local decoding conforms to the parity check relationship between the local code and the global code. If it conforms (corresponding to Y in the figure), the hard decision result is output; if it does not conform (corresponding to N in the figure), global decoding is performed; after global decoding, for the coupled blocks that still have decoding errors, the third-stage local decoding is performed. The input information of the local decoder is the soft information output by the second-stage global decoding, and the initial information passed from the check node to the variable node is the information passed from the check node to the variable node during the last decoding of the first-stage local decoder. This decoding scheme is a local decoding-global decoding-local decoding (H) scheme provided in this application embodiment. local →H global →H local The three-stage decoding scheme of ) allows for sufficient information transfer between different stages, which can reduce computational complexity and improve performance.

[0171] In this embodiment, since the first base matrix includes c first local code base matrices and c first global code base matrices, the parity check matrix corresponding to the first base matrix is ​​a GC LDPC with a cascaded structure composed of multiple local matrices and global matrices. Because its multiple local codes can be decoded independently, when the second communication device decodes the first LLR sequence according to the parity check matrix, error propagation can be reduced in environments with low signal-to-noise ratios. Furthermore, the multiple local codes jointly satisfy the constraints of the global parity check nodes, effectively resisting sudden errors and improving system performance. In addition, the first local code base matrix is ​​determined based on the second base matrix, and the first global code base matrix is ​​determined based on the third base matrix. It should be understood that the first base matrix is ​​obtained by searching within a predefined second base matrix, which significantly reduces the search space compared to searching in an arbitrary space.

[0172] The following is in conjunction with the appendix Figure 8 This application introduces the construction scheme of GC-LDPC provided in the embodiments. Figure 8 This is a flowchart illustrating a method for constructing a GC-LDPC according to an embodiment of this application. Figure 8 As shown, the method includes:

[0173] 801. The first communication device determines a first base matrix; wherein the first base matrix includes c first local code base matrices and c first global code base matrices, the first local code base matrices are determined based on the second base matrix, the second base matrix is ​​predefined, the first global code base matrix is ​​determined based on the third base matrix, and the third base matrix is ​​determined based on the second base matrix and the first local code base matrix.

[0174] The first communication device selects an m0-row, n0-column submatrix from the second basis matrix as B. local Then, using PEXIT analysis, we select r rows and (n0-m0) columns from the remaining rows of the second basis matrix (or the aforementioned third basis matrix) as... This minimizes the threshold value of the basis matrix of GC-LDPC. The matrix is ​​r rows and (n0-m0) columns. The first communication device uses PEXIT analysis to select r rows and (n0-m0) columns from the remaining rows of the second basis matrix (or the aforementioned third basis matrix) as... The following two solutions can be adopted:

[0175] Option 1: The c first global code base matrices are c identical matrices, or in other words, the global code base matrices corresponding to the positions of each local code base matrix (i.e., the first local code base matrix) in the first base matrix are the same. in It is obtained by selecting r rows from the third basis matrix. If r ≥ 1, there are a total of r rows selected from the third basis matrix. a choice, (m max -m0) is the row number of the third basis matrix, m max Let c be the number of rows in the second basis matrix. For each choice, use PEXIT analysis to determine the threshold value of the basis matrix formed by the global code basis matrix obtained from the selected c rows and the c first local code basis matrices (i.e., the threshold value corresponding to this choice). This allows us to obtain... The threshold values ​​corresponding to each selection; according to Among the various choices and their corresponding threshold values, the r rows selected by the choice with the smallest threshold value are used to obtain the first global code base matrix mentioned above. If r < 1, process it as if r = 1 first, then... Unfold, after unfolding There are z rows in total (z is the expansion factor of the LDPC matrix), and r·z rows are selected from the z rows. The selection method can be from top to bottom, from bottom to top, or random selection, and this application does not limit it.

[0176] Option 2: At least two of the c first global code base matrices are different, or in other words, the global code base matrices corresponding to the positions of the local code base matrices (i.e., the first local code base matrices) in the first base matrix are different. Individually designed, for each It is obtained by independently selecting r rows from the third basis matrix. If r≥1, there are a total of r rows selected from the third basis matrix. Choose, (m) max -m0) is the row number of the third basis matrix, m max Let c be the number of rows in the second basis matrix, and c be the number of the first global code basis matrices in the first basis matrix; for each choice, use PEXIT analysis to analyze the changes caused by that choice. The threshold value of the basis matrix formed by c first local code basis matrices (i.e., the threshold value corresponding to this choice) can be obtained from this. Choose the corresponding threshold values; Among the various choices, the one with the smallest corresponding threshold value is the one that meets the criteria. As the above c first global code base matrices. If r < 1, first process as if r = 1, then... Unfold, after unfolding There are z rows in total (z is the expansion factor of the LDPC matrix), and r·z rows are selected from the z rows.

[0177] 802. The first communication device determines the offset value corresponding to each non-zero element in the first base matrix.

[0178] Alternatively, the first communication device determines the parity check matrix corresponding to the first base matrix. Or, step 802 is the operation of solving for the global code offset value. Assume P... gpThis is the parity-check matrix corresponding to the first basis matrix. An example of how the first communication device determines the parity-check matrix corresponding to the first basis matrix is ​​as follows:

[0179] For the set of variable nodes {V j |Basis matrix B global Given that the j-th column contains a non-zero element, perform the following operation:

[0180] 1) Determine the set of variable nodes V j Is it possible to reach the set of check nodes C to be connected using the existing Tanner graph? i ;

[0181] 2) If the destination cannot be reached, a random offset value will be selected. Otherwise, prioritize the offset value with the largest minimum ring length. If different offset values ​​exist that result in the same maximum minimum ring length, then the offset value that maximizes the extrinsic message degree (EMD) value is selected. If both are the same, then the value with the smallest number of minimum cycles is selected as the optimal offset value. Among them, L min This represents the minimum ring length of GC-LDPC at the current offset. Indicates that the ring length is L min The quantity.

[0182] This algorithm considers not only the influence of the ring length, but also the influence of the external verification node degree (EMD) of the ring, resulting in a GC-LDPC with superior performance.

[0183] In this embodiment of the application, the first communication device selects row m0 and column n0 from the upper left corner of the base matrix of the second base matrix as B. local Then, using PEXIT analysis, r rows and (n0-m0) columns are selected from the remaining rows of the second basis matrix as... Compared to searching in arbitrary space, the search space can be greatly reduced. In addition, the algorithm for determining the offset value corresponding to each non-zero element in the first basis matrix provided in this application not only considers the influence of the ring length, but also the influence of the external check node degree (EMD) of the ring, resulting in GC-LDPC with better performance.

[0184] Below are examples of the first base matrices obtained using Scheme 1 above at two different code rates.

[0185] Example 1: The parameters of GC-LDPC are set as m0=24, n0=46, c=4, r=1, Z=384, S=1200, P=1584, where S represents the shortening length within a frame, P represents the puncturing length of the parity bits within a frame, the information sequence length is 32208 bits, the encoded sequence length is 64800 bits, and the code rate R=0.49. In this case, the BG1 and PCM2 matrices defined by the 5G protocol are used. The first 24 rows of this matrix are taken, corresponding to the c local code offset value matrices P. local like Figure 9 As shown. Figure 9 The first 24 rows of the BG1 and PCM2 matrices defined by the 5G protocol are shown. The LDPC BG1 matrix defined by 5G has a total of 46 rows; this code uses the first 24 rows, leaving 22 rows remaining. (The text then abruptly shifts to a different topic: "In determining...") When determining the optimal position of a non-zero element, we choose from these 22 rows. Since r = 1, we choose one row from the remaining 22 rows.

[0186] To facilitate subsequent design, according to line weight Distinguish. The same applies in the last 22 lines. There are 3 choices: 2, 3, and 4, which are different. Minimum threshold and B of the GC-LDPC prototype diagram gp The positions of non-zero elements in the code and their corresponding offsets are shown in Table 3. Table 3 shows that when the code length is 64800 bits and the code rate R = 0.49, when... The threshold of the prototype diagram is the smallest.

[0187] Table 3

[0188]

[0189] Therefore, choose The corresponding optimal row. The positions of non-zero elements are 2, 14, 48, 60, 94, 106, 140, 152, where 2 and 14 are in the first sub-block, 48 and 60 are in the second sub-block, and so on. The positions of non-zero elements are the same in each sub-block. (This is in the context of determining B.) gp After determining the position of the non-zero element, the offset value is then determined by step 802 above.

[0190] Example 2: The parameters of GC-LDPC are set as m0=13, n0=35, c=5, r=1, Z=384, S=0, P=0, the information sequence length is 41856 bits, the encoded sequence length is 63360 bits, and the code rate R=0.66. In this case, the BG1 and PCM2 matrices defined by the 5G protocol are used. The first 13 rows of this matrix are taken, corresponding to the c local code offset value matrices P. local like Figure 10As shown. Figure 10 The first 13 rows of the BG1 and PCM2 matrices defined in the 5G protocol are shown. (In determining...) When determining the optimal position of a non-zero element in a given context, there are 33 possible choices, corresponding to... There are 5 options, numbered 2-6, each different. Minimum threshold and B of the GC-LDPC prototype diagram gp The positions of the non-zero elements in the table and the corresponding offset values ​​are shown in Table 4.

[0191] Table 4

[0192]

[0193] As can be seen from Table 4, when the code length is 63360 bits and the code rate R = 0.66, when The threshold of the prototype diagram is the smallest. Therefore, it is chosen. The corresponding optimal row. The positions of non-zero elements are 2, 14, 37, 49, 72, 84, 107, 119, 142, 154, where 2 and 14 are in the first sub-block, 37 and 49 are in the second sub-block, and so on. The positions of non-zero elements are the same in each sub-block. (This is in the context of determining B.) gp After determining the position of the non-zero element, the offset value is then determined by step 802 above.

[0194] The feasibility of the algorithm for determining the position of non-zero elements in the global code base matrix proposed in the embodiments of this application is described below.

[0195] Assuming the construction parameters of GC-LDPC are set to m0 = 24, n0 = 46, c = 2, r = 1, with the first two columns of each coupled block perforated, and a code rate R = 0.49. The GC-LDPC constructed using the embodiments of this application... There are only 22 possible choices (see Example 1 above), and the optimal choice is calculated. The non-zero elements in the data correspond to positions 1, 11, and 14, with an optimal threshold value of 0.3258 dB. This is only 0.0248 dB different from the optimal threshold value of existing technologies. Furthermore, existing technologies only... The search space reaches 7315, which is relatively complex.

[0196] Compared with the existing GC-LDPC technology, under the same conditions (m0=24, n0=46, c=2, r=1, the first two columns of each coupled block are punctured, and the code rate R=0.49), the decoding performance is only 0.05dB different, but the coding construction search space is reduced to 0.3% of the original size.

[0197] The specific simulation results are given below regarding the performance of the GC-LDPC and corresponding decoding algorithm constructed in this application.

[0198] In the simulation, the performance curves of the GC-LDPC with code rate compatibility constructed in this application (labeled Proposed GC), the GC-LDPC constructed using PEXIT analysis for threshold optimization in the prior art (labeled Existing GC), and the three-stage iterative decoding algorithm (labeled Proposed 3PD) are presented under different code lengths and code rates. These performance curves are obtained using overall decoding (labeled 1PD), two-stage (the two-stage iterative decoding algorithms proposed in this application and the prior art are labeled Existing 2PD and Proposed 2PD, respectively), or three-stage iterative decoding algorithm (labeled Proposed 3PD). For example, Proposed GC and Proposed 3PD (15, 5, 15) represent the GC-LDPC constructed using the method provided in this application, with three-stage iterative decoding (the number of iterations in each stage is 15, 5, and 15, respectively). In addition, under the same or similar code length and code rate, the performance curves of BCH-LDPC under simulated parallel transmission of multiple short code length 5G-LDPC (i.e., c local codes, labeled 5G-LDPC(BG1)), 5G-LDPC (BG1 new extension) and next-generation digital video broadcasting (DVB-S2) are compared.

[0199] Simulation result 1 (0.49 bitrate):

[0200] Decoding simulation conditions: random 0-1 sequence, binary phase shift keying (BPSK) modulation, layered normalized min-sum (LNMS) decoding.

[0201] Information sequence length: 32208 bits, code length: 64800 bits, code rate: 0.49;

[0202] Proposed GC and Existing GC parameters: m0=24, n0=46, c=4, r=1, Z=384, S=1200, P=1584;

[0203] 5G-LDPC(BG1) parameters: The equivalent form is the same as the Proposed GC parameters. Decoding only performs local decoding and not global decoding.

[0204] 5G-LDPC (BG1 New Extension) parameters: m0=24, n0=46, Z=1536, S=1200, P=1584.

[0205] Figure 11This is a simulation diagram provided for an embodiment of this application. Figure 11 GC-LDPC is presented in Proposed GC and Existing GC The image shows the frame error rate (FER) curves for different decoding methods and 30 iterations of 5G-LDPC (BG1) and 5G-LDPC (BG1 New Extension) under different construction modes. Figure 11 It can be seen that when FER=10 -3 At that time, 5G-LDPC (BG1 new extension) had the best performance, but the latency was very high and could not meet the needs of actual communication.

[0206] If the GC-LDPC decoding adopts the Proposed 2PD method, compared with the encoding using the Existing GC construction method, the performance difference of the Proposed GC construction method is only about 0.01dB, indicating that the performance of the GC-LDPC constructed in this application has not decreased significantly. If the GC-LDPC encoding adopts the Proposed GC construction method, the performance differences between the decoding using 1PD, Proposed 2PD, and Proposed 3PD and 5G-LDPC are 0.08dB, 0.16dB, and 0.18dB, respectively. Compared with the 5G-LDPC (BG1) multi-block parallel transmission method, the decoding performance of Proposed 3PD is improved by about 0.2dB, the complexity is almost not increased, and the throughput can be approximately 4 times.

[0207] Existing two-stage decoding algorithms not only have poor performance but also high complexity. If the GC-LDPC encoding adopts the Proposed GC construction method, Table 5 lists the different... The next decoding uses the equivalent local code average decoding iteration number of the last stage of Existing 2PD, Proposed 2PD and Proposed 3PD (the equivalent local code average decoding iteration number of Existing 2PD and Proposed 2PD is obtained by multiplying the global decoder start probability, the number of coupled blocks with decoding errors in the first stage and the average decoding iteration number of the second stage).

[0208] exist At that time, the average number of decoding iterations of the equivalent local codes in the last stage of Proposed 2PD and Proposed 3PD is about 1 / 3 and 1 / 4 of that of Existing 2PD, respectively.

[0209] Table 5. Comparison of the average number of decoding iterations of the equivalent local code in the last stage under different decoding methods at a code rate of 0.49.

[0210]

[0211]

[0212] Figure 12 Another simulation diagram provided for an embodiment of this application. Figure 12 The FER curves are given for GC-LDPC using the Proposed GC construction method, and for the three row weights of the global code corresponding to Table 3, obtained by using the Proposed 3PD (15,5,15) decoding method and the 5G-LDPC (BG1 new extension) iterative decoding for 30 times. Figure 12 The simulation results are in good agreement with the threshold values ​​obtained by threshold analysis using PEXIT analysis. The GC-LDPC constructed at that time has the best performance, with a throughput approximately 4 times that of 5G-LDPC (a new extension of BG1).

[0213] Simulation result 2 (0.66 bitrate):

[0214] Decoding simulation conditions: random 01 sequence, BPSK modulation, LNMS decoding, E b / N0(dB)FER bitrate: 0.66;

[0215] Proposed GC and Existing GC parameters: m0=13, n0=35, c=5, r=1, Z=384, S=0, P=0, information sequence length: 41856 bits, code length: 63360 bits;

[0216] 5G-LDPC(BG1) parameters: (The equivalent form is the same as the Proposed GC parameters. Decoding is only performed locally, not globally.) Information sequence length: 41855 bits, code length: 63360 bits;

[0217] 5G-LDPC (BG1 new extension) parameters: m0=14, n0=36, Z=1903, S=10, P=1332, information sequence length: 41856 bits, code length: 63360 bits;

[0218] DVB-S2 BCH-LDPC parameters: BCH code check bit length: 160, error correction capability: t=10, information sequence length: 43040 bits, code length: 64800 bits.

[0219] Figure 13 This is yet another simulation diagram provided for an embodiment of this application. Figure 13 GC-LDPC is presented in Proposed GC and Existing GC The FER curves for different decoding methods and 30 iterations of BCH-LDPC iterative decoding under the DVB-S2 standard are shown in the construction mode. Figure 13 It can be seen that when FER=10 -3 At that time, 5G-LDPC had the best performance, but its parallelism was poor; if GC-LDPC adopted the Proposed GC construction method for encoding, the performance difference between GC-LDPC and 5G-LDPC using 1PD, Proposed 2PD and Proposed 3PD was 0.05dB, 0.14dB and 0.16dB respectively.

[0220] Compared to the parallel transmission of multiple short code blocks, the proposed 3PD decoding performance is improved by approximately 0.18dB, with almost no increase in complexity, and the throughput can reach approximately 5 times. If GC-LDPC adopts the proposed GC construction method, the proposed 3PD decoding performance is comparable to that of BCH-LDPC under the DVB-S2 standard, but the proposed 3PD decoding scheme has higher throughput, lower latency, and lower hardware implementation complexity.

[0221] in addition, Figure 13 This also indicates that the existing two-stage decoding algorithms have poor performance and high complexity. If the GC-LDPC encoding adopts the Proposed GC construction method, Table 6 lists the different... The average number of decoding iterations for the last stage of Existing2PD, Proposed 2PD, and Proposed 3PD is [number missing]. At that time, the average number of decoding iterations for the equivalent local codes in the last stage of Proposed 2PD and Proposed 3PD was approximately 2 / 5 and 3 / 10 of that for Existing 2PD, respectively.

[0222] Table 6. Comparison of the average number of decoding iterations of the equivalent local code in the last stage under different decoding methods at a code rate of 0.66.

[0223]

[0224] Figure 14 This is yet another simulation diagram provided for an embodiment of this application. Figure 14 The FER curves of GC-LDPC constructed using the Proposed GC method and obtained by iterative decoding 30 times using the Proposed 3PD (15,5,15) decoding method and 5G-LDPC (BG1 new extension) under the three row weights of the global code corresponding to Table 4 are given. Figure 14The simulation results are in good agreement with the threshold values ​​obtained by threshold analysis using PEXIT analysis. The GC-LDPC constructed at that time has the best performance, with a throughput approximately 5 times that of 5G-LDPC (a new extension of BG1).

[0225] The following is an example of the first basis matrix obtained using Scheme 2 above.

[0226] Assume that the c first global code basis matrices are based on Figure 15 The 7 rows shown are selected, and c = 4 above. Assume that the number of columns in each first global code base matrix is ​​n0 = 46. Figure 15 This is an example of a predefined second basis matrix. For example... Figure 15 As shown, the elements at the positions of the white rectangles are 0, and the elements at the positions of the non-white rectangles are 1. In determining... At that time, each first global code base matrix independently selects a position, that is, there are 7 positions in total. 4 A selection method is proposed. For all selection methods, PEXIT analysis is used to determine the threshold values. The threshold values ​​of each method are compared to find the optimal one. Assume that in the final result, the positions of the four first global code base matrices are sequentially arranged as follows: Figure 15 If rows 22, 23, 24, and 25 are selected, then in the GC-LDPC matrix, The positions of the non-zero elements in the array are: 0, 12, 13, 17, 47, 48, 56, 64, 92, 95, 96, 103, 113, 139, 144, 145, 152.

[0227] Compared to Option 1, Option 2 offers a larger search space and better performance.

[0228] The structure of a communication device that can implement the LDPC encoding method or LDPC decoding method provided in the embodiments of this application is described below with reference to the accompanying drawings.

[0229] Figure 16This is a schematic diagram of a communication device 1600 provided in an embodiment of this application. The communication device 1600 can correspondingly implement the functions or steps implemented by the transmitting end in the above-described method embodiments, and can also correspondingly implement the functions or steps implemented by the receiving end in the above-described method embodiments. The communication device may include a processing module 1610 and a transceiver module 1620. Optionally, it may also include a storage unit, which can be used to store instructions (code or program) and / or data. The processing module 1610 and the transceiver module 1620 can be coupled to the storage unit. For example, the processing module 1610 can read the instructions (code or program) and / or data in the storage unit to implement the corresponding method. The above-described units can be set independently, or partially or completely integrated. For example, the transceiver module 1620 may include a transmitting module and a receiving module. The transmitting module can be a transmitter, and the receiving module can be a receiver. The entity corresponding to the transceiver module 1620 can be a transceiver or a communication interface.

[0230] In some possible implementations, the communication device 1600 can correspondingly implement the behavior and functions of the first communication device in the above method embodiments. For example, the communication device 1600 can be the first communication device, or it can be a component (e.g., a chip or circuit) applied in the first communication device. The transceiver module 1620 can, for example, be used to perform... Figure 6 In the embodiments, all receiving or sending operations performed by the first communication device, for example... Figure 6 Step 602 in the illustrated embodiment, and / or other processes used to support the techniques described herein. Processing module 1610 is used to execute... Figure 6 or Figure 8 In the embodiments, all operations performed by the first communication device except for the transmit and receive operations, such as... Figure 6 Step 601 in the illustrated embodiment, Figure 8 Steps 801 and 802 in the illustrated embodiment.

[0231] In some possible implementations, the communication device 1600 can correspondingly implement the behavior and functions of the second communication device in the above method embodiments. For example, the communication device 1600 can be the second communication device, or it can be a component (e.g., a chip or circuit) applied in the second communication device. The transceiver module 1620 can, for example, be used to perform... Figure 6 In the embodiments, all receiving or sending operations performed by the second communication device, for example... Figure 6 Step 602 in the illustrated embodiment, and / or other processes used to support the techniques described herein. Processing module 1610 is used to execute... Figure 6 In the embodiments, all operations performed by the second communication device except for the transmit and receive operations, such as Figure 6Step 603 in the illustrated embodiment.

[0232] Figure 17 This is a schematic diagram of another communication device provided in an embodiment of this application. Figure 17 The communication device mentioned above can be either the first communication device or the second communication device mentioned above.

[0233] like Figure 17 As shown, the communication device includes at least one processor 1710 and a transceiver 1720.

[0234] In some embodiments of this application, the processor 1710 and transceiver 1720 can be used to perform functions or operations performed by the first communication device. For example, the transceiver 1720 performs... Figure 6 In this embodiment, all receive or transmit operations are performed by the first communication device. The processor 1710 is used, for example, to perform... Figure 6 , Figure 8 In the embodiments, all operations performed by the first communication device except for sending and receiving operations are performed.

[0235] In some embodiments of this application, the processor 1710 and transceiver 1720 can be used to perform functions or operations performed by the second communication device. For example, the transceiver 1720 performs... Figure 6 In this embodiment, all receive or transmit operations are performed by the second communication device. The processor 1710 is used, for example, to perform... Figure 6 In the embodiments, all operations performed by the second communication device except for the sending and receiving operations are performed.

[0236] Transceiver 1720 is used to communicate with other devices / appliances via a transmission medium. Processor 1710 uses transceiver 1720 to send and receive data and / or signaling, and to implement the methods in the above-described method embodiments. Processor 1710 can implement the functions of processing module 1610, and transceiver 1720 can implement the functions of transceiver module 1620.

[0237] Optionally, transceiver 1720 may include radio frequency (RF) circuitry and an antenna. The RF circuitry is primarily used for converting baseband signals to RF signals and processing RF signals. The antenna is primarily used for transmitting and receiving RF signals in the form of electromagnetic waves. Input / output devices, such as touchscreens, displays, and keyboards, are primarily used for receiving user input data and outputting data to the user.

[0238] Optionally, the communication device may further include at least one memory 1730 for storing program instructions and / or data. The memory 1730 is coupled to the processor 1710. The coupling in this embodiment is an indirect coupling or communication connection between devices, units, or modules, and may be electrical, mechanical, or other forms, for information exchange between devices, units, or modules. The processor 1710 may operate in conjunction with the memory 1730. The processor 1710 may execute program instructions stored in the memory 1730. At least one of the at least one memory may be included in the processor.

[0239] When the communication device is powered on, the processor 1710 can read the software program in the memory 1730, interpret and execute the instructions of the software program, and process the data of the software program. When data needs to be transmitted wirelessly, the processor 1710 performs baseband processing on the data to be transmitted and outputs the baseband signal to the radio frequency (RF) circuit. The RF circuit processes the baseband signal and transmits the RF signal outward in the form of electromagnetic waves through the antenna. When data is sent to the communication device, the RF circuit receives the RF signal through the antenna, converts the RF signal into a baseband signal, and outputs the baseband signal to the processor 1710. The processor 1710 converts the baseband signal into data and processes the data.

[0240] In another implementation, the aforementioned radio frequency circuits and antennas can be set up independently of the processor that performs baseband processing. For example, in a distributed scenario, the radio frequency circuits and antennas can be arranged in a remote manner, independent of the communication device.

[0241] This application embodiment does not limit the specific connection medium between the transceiver 1720, processor 1710, and memory 1730. This application embodiment... Figure 17 The memory 1730, processor 1710, and transceiver 1720 are connected via a bus 1740, and the bus is in... Figure 17 The connections between other components are shown in thick lines only and are not intended to be limiting. This bus can be divided into address bus, data bus, control bus, etc. For ease of illustration, Figure 17 The bus is represented by a single thick line, but this does not mean that there is only one bus or one type of bus.

[0242] In the embodiments of this application, the processor may be a general-purpose processor, a digital signal processor, an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components, capable of implementing or executing the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor may be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this application can be directly manifested as being executed by a hardware processor, or executed by a combination of hardware and software modules within the processor.

[0243] Figure 18 This is a schematic diagram of a chip system provided in an embodiment of this application. Figure 18 As shown, the chip system is divided into downlink processing and uplink processing. Downlink processing encodes, modulates, maps, precodes, frames, and performs inverse fast Fourier transformation (IFFT) on the layer 2 data, ultimately processing it into an over-the-air signal for transmission via the intermediate radio frequency (IRF) module. Uplink processing, on the other hand, processes the received signal through IRF to obtain baseband data, and then performs physical layer signal processing through fast Fourier transformation (FFT), deframing, equalization, de-mapping, demodulation, and decoding. This application can be applied to the encoding and decoding modules in a chip system architecture and is an important component of the baseband processing system.

[0244] In some embodiments of this application, the first communication device is deployed with Figure 18 The chip system shown can be used to control the first communication device to perform functions or operations performed by the first communication device.

[0245] In some embodiments of this application, the second communication device is deployed with Figure 18 The chip system shown can be used to control the second communication device to perform functions or operations.

[0246] Figure 19 This is a schematic diagram of a chip architecture for an LDPC encoder provided in an embodiment of this application. Figure 19As shown, the system consists of three main components: a computing unit, a control unit, and a storage unit. The encoding module completes its computation through cyclic redundancy check (CRC) calculation of the transport block (TB), LDPC base graph (BG) selection, code block (CB) segmentation, CB CRC calculation, LDPC encoding, and code block concatenation. For the encoder, the LDPC encoding portion within the computing unit employs the globally coupled code proposed in this application.

[0247] Figure 20 This is a schematic diagram of the chip architecture of an LDPC decoder provided in an embodiment of this application. Figure 20 As shown, the decoding process involves rate matching, hybrid automatic repeat request (HARQ) merging, LDPC decoding, and CB / TB CRC checksum verification. Because LDPC encoding and decoding require high throughput, they are typically implemented using a hardware accelerator (HAC) in chip systems. For the decoder, the LDPC decoding portion within the computation unit employs the two-stage or three-stage decoding method proposed in this application.

[0248] This application also provides a computer-readable storage medium storing a computer program or instructions that, when run on a computer, cause the computer to perform the methods of the above embodiments.

[0249] This application also provides a computer program product, which includes instructions or a computer program that, when run on a computer, causes the methods in the above embodiments to be executed.

[0250] This application also provides a communication system, including the first communication device and the second communication device described above.

[0251] This application also provides a chip, which includes: a communication interface and a processor; the communication interface is used for signal transmission and reception of the chip; the processor is used to execute computer program instructions, causing a communication device including the chip to perform the methods as described in the above embodiments.

[0252] The explanations and beneficial effects of the relevant contents in any of the devices provided above can be found in the corresponding method embodiments provided above, and will not be repeated here.

[0253] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection of apparatus or units may be electrical, mechanical, or other forms.

[0254] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. For example, the computer can be a personal computer, a server, or a network device, etc. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available media can be magnetic media (e.g., floppy disks, hard disks, magnetic tapes), optical media (e.g., DVDs), or semiconductor media (e.g., solid-state disks, SSDs). For example, the aforementioned available media include, but are not limited to, USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks, and other media capable of storing program code.

[0255] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. An LDPC encoding method, characterized in that, include: Based on the parity check matrix, the information bit sequence is encoded using low-density parity check (LDPC) to obtain the first codeword. The parity-check matrix corresponds to a first base matrix, which includes c first local code base matrices and c first global code base matrices. The first local code base matrix is ​​determined based on a second base matrix, which is predefined. The first global code base matrix is ​​determined based on the third base matrix, which is determined based on the second base matrix and the first local code base matrix, where c is an integer greater than 1; Send the first codeword.

2. The method according to claim 1, characterized in that, The second basis matrix is ​​the basis matrix of LDPC as specified in the new air interface standard.

3. The method according to claim 1 or 2, characterized in that, The first local code base matrix is ​​determined based on the second base matrix and includes: the first local code base matrix is ​​a matrix of m0 rows and n0 columns obtained by selecting m0 rows from the second base matrix; the first global code base matrix is ​​determined based on the third base matrix and includes: the first global code base matrix is ​​obtained by selecting r rows from the third base matrix, the threshold value of the first base matrix is ​​less than or equal to the threshold value of the fourth base matrix, the fourth base matrix includes the c first local code base matrices and c second global code base matrices, the second global code base matrix is ​​obtained by selecting any r rows from the third base matrix, m0 and n0 are integers greater than 1, and r is a positive integer.

4. The method according to claim 3, characterized in that, The third base matrix is ​​determined based on the second base matrix and the first local code base matrix, including: the third base matrix is ​​determined based on each row of the second base matrix except for the m0 local rows, where the m0 local rows of the second base matrix are the m0 rows selected from the second base matrix.

5. A decoding method for LDPC, characterized in that, include: Receive the first signal; Determine the first log-likelihood ratio (LLR) sequence corresponding to the first signal, and decode the first LLR sequence according to the parity check matrix; The parity-check matrix corresponds to a first base matrix, which includes c first local code base matrices and c first global code base matrices. The first local code base matrix is ​​determined based on a second base matrix, which is predefined. The first global code base matrix is ​​determined based on the third base matrix, which is determined based on the second base matrix and the first local code base matrix, where c is an integer greater than 1.

6. The method according to claim 5, characterized in that, The second basis matrix is ​​the basis matrix of LDPC as specified in the new air interface standard.

7. The method according to claim 5 or 6, characterized in that, The first local code base matrix is ​​determined based on the second base matrix and includes: the first local code base matrix is ​​a matrix of m0 rows and n0 columns obtained by selecting m0 rows from the second base matrix; the first global code base matrix is ​​determined based on the third base matrix and includes: the first global code base matrix is ​​obtained by selecting r rows from the third base matrix, the threshold value of the first base matrix is ​​less than or equal to the threshold value of the fourth base matrix, the fourth base matrix includes the c first local code base matrices and c second global code base matrices, the second global code base matrix is ​​obtained by selecting any r rows from the third base matrix, m0 and n0 are integers greater than 1, and r is a positive integer.

8. The method according to claim 7, characterized in that, The third base matrix is ​​determined based on the second base matrix and the first local code base matrix, including: the third base matrix is ​​determined based on each row of the second base matrix except for the m0 local rows, where the m0 local rows of the second base matrix are the m0 rows selected from the second base matrix.

9. A communication device, characterized in that, Includes a module for performing the method according to any one of claims 1-4.

10. A communication device, characterized in that, Includes modules for performing the method according to any one of claims 5-8.

11. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program or instructions that, when executed, cause a computer to perform the method as described in any one of claims 1 to 8.

12. A computer program product, characterized in that, When the computer program product is run on a computer, it causes the computer to perform the method as described in any one of claims 1 to 8.

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