MIM capacitor and manufacturing method thereof
By heat-treating and plasma-bombarding the surface of the lower electrode of the MIM capacitor to form a surface treatment layer, the problems of surface roughness and defects of the lower electrode are solved, leakage current is reduced, and capacitor performance is improved.
Patent Information
- Application Number
- CN202411156300.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-21
- Publication Date
- 2026-03-03
AI Technical Summary
Existing MIM capacitors have poor surface roughness and many defects on the lower electrode surface, resulting in excessive leakage current and affecting capacitor performance.
A surface treatment layer is formed by heat treatment of the lower electrode surface, and plasma bombardment is optionally performed before heat treatment to improve the surface roughness and defects of the lower electrode, and then a dielectric layer is formed.
The leakage current of the MIM capacitor was reduced, and the performance of the capacitor was improved, especially by improving the interface contact quality between the lower electrode and the dielectric layer.
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Figure CN121604446A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of semiconductor integrated circuit technology, and in particular to a MIM capacitor and its manufacturing method. Background Technology
[0002] In the field of semiconductor integrated circuit manufacturing technology, with the development of semiconductor technology, the requirements for the performance of semiconductor devices are becoming increasingly stringent. Capacitors are an important component of integrated circuits, widely used in chips for memory, microwave, radio frequency, smart cards, high voltage, and filtering. Specific applications include bandpass filters, phase-locked loops, and dynamic random access memory (DRAM). With the advancement of semiconductor technology, there is a growing demand for capacitors in integrated circuits to possess characteristics such as high capacitance density, low leakage current, and low voltage linearity. This has become a challenge in the fabrication of capacitors for integrated circuits.
[0003] MIM (Metal-Insulator-Metal) capacitors, as an important component of semiconductor devices, have advantages such as high Q value and linearity, low loss, high withstand voltage and low ESR. They can be used to filter noise and interference signals in circuits, and improve signal stability and reliability.
[0004] MIM capacitors are typically used in the fabrication of memory chips. They have relatively high requirements for dielectric constant and relatively low requirements for leakage current. Zirconia (ZrO2) is usually used as the dielectric layer to obtain a high dielectric constant. Titanium nitride (TiN) is grown using ALD (Atomic Layer Deposition) technology as the top and bottom electrodes. The resulting titanium nitride has good surface roughness and fewer defects.
[0005] For certain manufacturing processes with high leakage current requirements, such as logic chip manufacturing, MIM capacitors typically use a zirconium oxide / aluminum oxide / zirconium oxide (ZrO2 / Al2O3 / ZrO2) stack as the dielectric layer film. Zirconium oxide is used to increase the dielectric constant, and aluminum oxide is used to reduce leakage current. Simultaneously, titanium nitride is grown using PVD (Physical Vapor Deposition), where titanium nitride is columnar with poor surface roughness. Zirconium oxide is then deposited on the titanium nitride. Due to the poor surface roughness and numerous surface defects of titanium nitride, there are many defects at the interface between titanium nitride and zirconium oxide. Furthermore, titanium nitride is prone to piercing zirconium oxide, causing stress concentration at the titanium nitride peaks. This results in excessive leakage current in the MIM capacitor, leading to its failure. Summary of the Invention
[0006] The purpose of this invention is to provide a MIM capacitor and its manufacturing method, which repairs defects on the lower electrode surface, improves the surface roughness of the lower electrode, thereby reducing leakage current of the MIM capacitor and improving the performance of the MIM capacitor.
[0007] To solve the above-mentioned technical problems, according to a first aspect of the present invention, a method for manufacturing a MIM capacitor is provided, comprising the following steps:
[0008] A substrate is provided, on which a lower electrode is formed;
[0009] Heat treatment is performed to form a surface treatment layer on the surface of the lower electrode; and
[0010] A dielectric layer is formed on the surface treatment layer.
[0011] Optionally, ozone may be introduced during the heat treatment process.
[0012] Optionally, the heat treatment time is greater than or equal to 10 minutes and less than or equal to 20 minutes.
[0013] Optionally, the temperature of the heat treatment is greater than or equal to 200°C and less than or equal to 300°C.
[0014] Optionally, after forming the lower electrode and before performing heat treatment, the fabrication method further includes bombarding the surface of the lower electrode with plasma.
[0015] Optionally, the plasma bombardment may include nitrogen plasma or oxygen plasma.
[0016] Optionally, the material of the lower electrode includes titanium nitride, and the material of the surface treatment layer includes titanium oxynitride.
[0017] Optionally, the dielectric layer includes a zirconium oxide layer, an aluminum oxide layer, and a zirconium oxide layer sequentially formed on the surface treatment layer.
[0018] Optionally, after forming the dielectric layer, the fabrication method further includes forming an upper electrode on the dielectric layer.
[0019] To solve the above-mentioned technical problems, according to a second aspect of the present invention, a MIM capacitor is also provided, which is manufactured using the manufacturing method of the MIM capacitor described above.
[0020] The MIM capacitor and its fabrication method provided by this invention first involve providing a substrate, forming a lower electrode on the substrate, then performing heat treatment to form a surface treatment layer on the surface of the lower electrode, and finally forming a dielectric layer on the surface treatment layer. This invention improves the surface roughness of the lower electrode by heat-treating the surface to form a surface treatment layer, repairs surface defects, reduces interface defects between the lower electrode and the dielectric layer, thereby reducing leakage current and improving the performance of the MIM capacitor.
[0021] In addition, before heat treatment of the lower electrode surface, plasma bombardment is performed on the lower electrode surface to improve the surface roughness of the lower electrode, making the lower electrode surface relatively flat, thereby improving the surface roughness of the surface treatment layer formed on the lower electrode surface, thereby improving the quality of the dielectric layer subsequently formed, and further reducing the leakage current of the MIM capacitor. Attached Figure Description
[0022] Figure 1 This is a schematic flowchart of a method for manufacturing a MIM capacitor according to an embodiment of the present invention.
[0023] Figures 2 to 5 This is a schematic diagram of the steps in the manufacturing method of a MIM capacitor provided in an embodiment of the present invention.
[0024] Figure 6 This is a current-voltage curve of the test point of a capacitor for which the lower electrode has not undergone heat treatment.
[0025] Figure 7 This is a current-voltage curve of the test point of the capacitor after 5 minutes of heat treatment on the lower electrode.
[0026] Figure 8 This is a current-voltage curve of the test point of the capacitor after 10 minutes of heat treatment on the lower electrode.
[0027] Explanation of reference numerals in the attached figures:
[0028] 10-Substrate; 20-Lower electrode; 21-Surface treatment layer; 30-Dielectric layer; 31-Zirconium oxide layer; 32-Alumina layer; 40-Upper electrode. Detailed Implementation
[0029] To make the objectives, advantages, and features of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the drawings are all in a very simplified form and are not drawn to scale, and are only used to facilitate and clarify the explanation of the embodiments of this invention. Furthermore, the structures shown in the drawings are often part of the actual structures. In particular, different figures may emphasize different aspects and may sometimes use different scales.
[0030] As used herein, the singular forms “a,” “an,” and “the” include plural objects unless otherwise expressly indicated. As used herein, the term “or” is generally used to mean “and / or” unless otherwise expressly indicated. As used herein, the term “a number” is generally used to mean “at least one” unless otherwise expressly indicated. As used herein, the term “at least two” is generally used to mean “two or more” unless otherwise expressly indicated. Furthermore, the terms “first,” “second,” and “third” are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as “first,” “second,” or “third” may explicitly or implicitly include one or at least two of that feature, unless otherwise expressly indicated.
[0031] Figure 1 This is a schematic flowchart illustrating a method for manufacturing a MIM capacitor according to an embodiment of the present invention. Figure 1 As shown, the manufacturing method of a MIM capacitor includes the following steps:
[0032] S1: Provide a substrate on which a lower electrode is formed;
[0033] S2: Perform heat treatment to form a surface treatment layer on the surface of the lower electrode; and
[0034] S3: A dielectric layer is formed on the surface treatment layer.
[0035] Figures 2 to 5 This is a schematic diagram illustrating the structural steps of a method for manufacturing a MIM capacitor according to an embodiment of the present invention. Next, we will combine... Figure 1 and Figures 2 to 5 The method for manufacturing MIM capacitors provided in the embodiments of the present invention will be described in detail.
[0036] In step S1, please refer to Figure 2 As shown, a substrate 10 is provided, on which a lower electrode 20 is formed.
[0037] The substrate 10 can be made of silicon, germanium, silicon germanide, silicon carbide, gallium arsenide, or indium gallium arsenide, or it can be silicon-on-insulator or germanium-on-insulator; or it can be other materials, such as gallium arsenide or other III-V compounds. In this embodiment, the substrate 10 is a silicon substrate.
[0038] The substrate 10 used in the embodiments of the present invention may be a substrate that has been pre-processed by any process, including but not limited to: ion implantation process, device isolation process, impurity diffusion process, process for forming metal oxide semiconductor field-effect transistor (MOSFET), process for depositing thin films such as insulating or conductive layers, or similar methods or combinations thereof.
[0039] A lower electrode 20 is formed on the substrate 10. In one embodiment of the present invention, the material of the lower electrode 20 includes titanium nitride, but is not limited thereto. The lower electrode 20 can be formed using methods such as physical vapor deposition (PVD), chemical vapor deposition (CVD), and atomic layer deposition (ALD). Physical vapor deposition is a technique that transfers material from a source material to a substrate through a physical process. It is suitable for preparing titanium nitride electrodes and typically includes techniques such as evaporation and sputtering, and can be performed under vacuum conditions. Chemical vapor deposition is a technique that forms a solid material on the surface of a substrate through a chemical reaction. When preparing a titanium nitride thin film, the desired titanium nitride thin film can be obtained by controlling the reaction conditions, such as temperature, pressure, and reactant ratio. Atomic layer deposition is a layer-by-layer deposition technique that grows only one monolayer at a time. It is used to prepare high-purity titanium nitride thin films and allows for precise control of the film thickness and composition. A suitable method can be selected according to specific application requirements, such as factors like film thickness, uniformity, and purity. Of course, other methods known to those skilled in the art can also be used to form the lower electrode 20.
[0040] However, the surface roughness of the lower electrode 20 formed in this way is relatively poor and there are many surface defects. If a dielectric layer is formed directly on the lower electrode 20, it will result in many interface defects between the lower electrode 20 and the dielectric layer, and the lower electrode 20 is easy to pierce the dielectric layer in contact with it, resulting in excessive capacitor leakage current.
[0041] In step S2, please refer to Figure 3 As shown, a surface treatment layer 21 is formed on the surface of the lower electrode 20 by heat treatment.
[0042] In this invention, the surface of the lower electrode 20 is heat-treated to form a surface treatment layer 21. Compared with the surface of the lower electrode 20, the surface treatment layer 21 has fewer defects and lower roughness. That is, the defects on the surface of the lower electrode 20 are repaired by heat treatment, and the surface roughness of the lower electrode 20 is improved. This repairs the defects on the surface in contact with the subsequent dielectric layer, improves the surface roughness of the surface in contact with the subsequent dielectric layer, reduces the interface defects between the lower electrode 20 and the dielectric layer, reduces the leakage current of the MIM capacitor, and improves the performance of the MIM capacitor.
[0043] In one embodiment of the present invention, ozone is introduced during the heat treatment process, causing the ozone to react with the surface of the lower electrode 20 to form an oxide layer, thereby improving the surface roughness of the lower electrode 20 and repairing defects in the lower electrode 20. Alternatively, oxygen or a mixture of oxygen and an insulating gas can be introduced directly. When the material of the lower electrode 20 is titanium nitride, the material of the surface treatment layer 21 is titanium oxynitride (TiON). In other embodiments, other gases known to those skilled in the art can be introduced to treat the surface of the lower electrode 20 to improve surface defects and roughness; the present invention does not limit this.
[0044] In one embodiment of the present invention, the heat treatment time for the surface of the lower electrode 20 is greater than or equal to 10 minutes and less than or equal to 20 minutes, so as to sufficiently improve the surface roughness of the lower electrode 20 and fully repair the defects on the surface of the lower electrode 20, but at the same time, it will not form an excessively thick surface treatment layer 21 to avoid affecting the capacitor. Of course, the heat treatment time is not limited to this and can be determined according to actual needs.
[0045] Table 1
[0046]
[0047]
[0048] Table 1 compares the results of no heat treatment and heat treatment of the lower electrode for different durations. The failure ratio in Table 1 refers to the proportion of points that fail when multiple points on the capacitor are tested. For example, 9 / 9 means 9 points are tested and 9 fail; 3 / 9 means 9 points are tested and 3 fail; and 1 / 9 means 9 points are tested and 1 fails. Table 1 shows that without heat treatment, all points fail. However, with heat treatment, the number of failure points decreases with increasing heat treatment time, and the range of current density variation also decreases with increasing heat treatment time. When the heat treatment time is increased to 10 minutes, only 1 failure point is observed. Therefore, the heat treatment time for the lower electrode 20 should be greater than or equal to 10 minutes.
[0049] Figure 6 This is a current-voltage curve of the test points of a capacitor whose lower electrode has not undergone heat treatment. Figure 7 This is a current-voltage curve of the test point of the capacitor after a 5-minute heat treatment of the lower electrode. Figure 8 This is a current-voltage curve of the test point of the capacitor after 10 minutes of heat treatment on the lower electrode. Figures 6 to 8In the graph, the horizontal axis represents voltage, and the vertical axis represents current density, i.e., the current per unit area. From... Figure 6 As can be seen, there is a corresponding current density value when the voltage is 0.1V. When the voltage increases further, the current density becomes too large to be detected, hence only one point is observed. From Figure 7 As can be seen, during the voltage increase from 0V to 1.0V, values were detected at 6 points, meaning 3 out of 9 test points were failure points. The "current" indicator in the figure refers to points with current density values. Figure 8 As can be seen, during the voltage increase from 0V to 1.0V, values were detected at 8 points, meaning there was 1 failure point out of 9 test points. The "current" indicator in the figure refers to the point with a current density value. Figures 6 to 8 As can be seen, the number of failure points decreases continuously as the heat treatment time of the lower electrode increases.
[0050] In one embodiment of the present invention, the temperature of the heat treatment is greater than or equal to 200°C and less than or equal to 300°C, which can be determined based on the speed and quality of forming the surface treatment layer 21, and is not limited thereto.
[0051] In one embodiment of the present invention, before heat treatment of the lower electrode 20, plasma bombardment can be applied to the surface of the lower electrode 20. Plasma bombardment can form microstructures and nanoparticles on the surface of the lower electrode. These structures and particles can fill the pits and micropores on the surface of the lower electrode, thereby improving the surface smoothness and flatness. This embodiment of the present invention improves the surface roughness of the lower electrode 20 by plasma bombardment, making the surface of the lower electrode 20 smoother, thereby further improving the surface roughness of the surface treatment layer 21 formed on the surface of the lower electrode 20, thereby improving the quality of the subsequently formed dielectric layer and further reducing leakage current in the MIM capacitor.
[0052] In one embodiment of the present invention, nitrogen plasma or oxygen plasma can be used for plasma bombardment, but it is not limited thereto.
[0053] In step S3, please refer to Figure 4 As shown, a dielectric layer 30 is formed on the surface treatment layer 21.
[0054] Since the dielectric layer 30 is formed on the surface treatment layer 21, and the surface treatment layer 21 has improved roughness and defects compared to the surface of the lower electrode 20, the quality of the dielectric layer 30 formed on the surface treatment layer 21 can be guaranteed, reducing the interface defects between the original lower electrode 20 and the dielectric layer 30, thereby reducing the leakage current of the MIM capacitor and improving the performance of the MIM capacitor.
[0055] In one embodiment of the present invention, the dielectric layer 30 has a multilayer structure. For example, the dielectric layer 30 includes a zirconium oxide (ZrO2) layer 31, an aluminum oxide (Al2O3) layer 32, and a zirconium oxide layer 31 sequentially formed on the surface treatment layer 21. The dielectric layer 30 can be formed using atomic layer deposition (ALD) or other methods known to those skilled in the art. In another embodiment of the present invention, the dielectric layer 30 can also be a single layer, and the material of the dielectric layer 30 can be aluminum oxide, aluminum nitride, or other materials known to those skilled in the art.
[0056] Please refer to Figure 5 As shown, after forming the dielectric layer 30, an upper electrode 40 is formed on the dielectric layer 30. In one embodiment of the present invention, the upper electrode 40 is made of titanium nitride and can be formed by methods such as physical vapor deposition, chemical vapor deposition, metal-organic chemical vapor deposition, and atomic layer deposition. The lower electrode 20, the dielectric layer 30, and the upper electrode 40 together constitute the MIM capacitor.
[0057] The MIM capacitor and its fabrication method provided by this invention first involve providing a substrate 10, forming a lower electrode 20 on the substrate 10, then performing heat treatment to form a surface treatment layer 21 on the surface of the lower electrode 20, and finally forming a dielectric layer 30 on the surface treatment layer 21. This invention improves the surface roughness of the lower electrode 20 by heat-treating the surface of the lower electrode 20 to form the surface treatment layer 21, repairs surface defects of the lower electrode 20, and reduces interface defects between the lower electrode 20 and the dielectric layer 30, thereby reducing leakage current in the MIM capacitor and improving its performance.
[0058] In addition, before heat treatment of the surface of the lower electrode 20, plasma bombardment is performed on the surface of the lower electrode 20 to improve the surface roughness of the lower electrode 20, making the surface of the lower electrode 20 relatively flat, thereby improving the surface roughness of the surface treatment layer 21 formed on the surface of the lower electrode 20, thereby improving the quality of the dielectric layer 30 subsequently formed, and further reducing the leakage current of the MIM capacitor.
[0059] Accordingly, the present invention also provides a MIM capacitor, which is manufactured using the MIM capacitor manufacturing method described above.
[0060] Please refer to Figure 5 As shown, the MIM capacitor includes:
[0061] Substrate 10;
[0062] The lower electrode 20 is located on the substrate 10;
[0063] Surface treatment layer 21 is located on the surface of the lower electrode 20; and
[0064] The dielectric layer 30 is located on the surface treatment layer 21.
[0065] In one embodiment of the present invention, the lower electrode 20 is made of titanium nitride, and the surface treatment layer 21 is made of titanium oxynitride.
[0066] In one embodiment of the present invention, the dielectric layer 30 includes a zirconium oxide layer 31, an aluminum oxide layer 32 and a zirconium oxide layer 31 sequentially located on the surface treatment layer 21.
[0067] In one embodiment of the present invention, the upper electrode 40 is made of titanium nitride.
[0068] The present invention improves the surface roughness of the lower electrode 20 by forming a surface treatment layer 21 on the surface of the lower electrode 20, repairs the defects on the surface of the lower electrode 20, and reduces the interface defects between the lower electrode 20 and the dielectric layer 30, thereby reducing the leakage current of the MIM capacitor and improving the performance of the MIM capacitor.
[0069] In summary, the MIM capacitor and its fabrication method provided by this invention first involve providing a substrate, forming a lower electrode on the substrate, then performing heat treatment to form a surface treatment layer on the surface of the lower electrode, and finally forming a dielectric layer on the surface treatment layer. This invention improves the surface roughness of the lower electrode by heat-treating the surface to form a surface treatment layer, repairs surface defects, reduces interface defects between the lower electrode and the dielectric layer, thereby reducing leakage current in the MIM capacitor and improving its performance.
[0070] In addition, before heat treatment of the lower electrode surface, plasma bombardment is performed on the lower electrode surface to improve the surface roughness of the lower electrode, making the lower electrode surface relatively flat, thereby improving the surface roughness of the surface treatment layer formed on the lower electrode surface, thereby improving the quality of the dielectric layer subsequently formed, and further reducing the leakage current of the MIM capacitor.
[0071] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.
Claims
1. A method for manufacturing a MIM capacitor, characterized in that, Includes the following steps: A substrate is provided, on which a lower electrode is formed; A surface treatment layer is formed on the surface of the lower electrode by heat treatment. as well as A dielectric layer is formed on the surface treatment layer.
2. The method for manufacturing a MIM capacitor according to claim 1, characterized in that, Ozone is introduced during the heat treatment process.
3. The method for manufacturing a MIM capacitor according to claim 1, characterized in that, The heat treatment time is greater than or equal to 10 minutes and less than or equal to 20 minutes.
4. The method for manufacturing a MIM capacitor according to claim 1, characterized in that, The heat treatment temperature is greater than or equal to 200℃ and less than or equal to 300℃.
5. The method for manufacturing a MIM capacitor according to any one of claims 1 to 4, characterized in that, After the lower electrode is formed and before heat treatment, the fabrication method further includes bombarding the surface of the lower electrode with plasma.
6. The method for manufacturing a MIM capacitor according to claim 5, characterized in that, The plasma bombardment includes either nitrogen plasma or oxygen plasma.
7. The method for manufacturing a MIM capacitor according to any one of claims 1 to 4, characterized in that, The material of the lower electrode includes titanium nitride, and the material of the surface treatment layer includes titanium oxynitride.
8. The method for manufacturing a MIM capacitor according to claim 7, characterized in that, The dielectric layer includes a zirconium oxide layer, an aluminum oxide layer, and a zirconium oxide layer formed sequentially on the surface treatment layer.
9. The method for manufacturing a MIM capacitor according to any one of claims 1 to 4, characterized in that, After forming the dielectric layer, the fabrication method further includes forming an upper electrode on the dielectric layer.
10. A MIM capacitor, characterized in that, It is manufactured using the manufacturing method of any one of claims 1 to 9 for a MIM capacitor.