Electrostatic adsorption device and control method and controller thereof

Abstract

The invention relates to the technical field of semiconductors, and provides an electrostatic adsorption device and a control method and a controller thereof, and the control method comprises the steps: detecting whether a sampling signal of a power supply and a control signal of the power supply are abnormal or not when the discharge of the power supply is completed or the voltage polarity switching of the power supply is completed; when the sampling signal is abnormal, verifying the sampling configuration parameter, and updating the sampling configuration parameter according to a verification result; and / or, when the control signal is abnormal, performing validity detection on the control signal, and updating the control signal according to a validity detection result. By means of the control method, the problem of signal abnormity caused by transient interference generated by high-voltage discharge to the ground in the voltage polarity switching process of the electrostatic adsorption device can be solved, and interference immunity is achieved.

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, specifically to an electrostatic adsorption device and its control method and controller. Background Technology

[0002] In electrostatic adsorption devices, bipolar electrostatic chucks require a power supply with kilovolt-level high voltage and the ability to switch between positive and negative polarities to meet the process requirements for adsorbing and releasing wafers. During polarity switching, the power supply needs to rapidly discharge the high-voltage end to eliminate residual charge and complete the polarity reversal.

[0003] The high-voltage discharge process during polarity switching is usually achieved by discharging to ground. However, due to the characteristics of high-voltage discharge, such as large voltage change rate, concentrated energy, and strong transient current impact, the high-voltage ground PE generates a significant potential disturbance at the moment of discharge. This disturbance is coupled to the reference digital ground through parasitic capacitance, ground impedance, and other paths, causing a transient shift in the reference ground potential. This results in transient anomalies in the sampled signal, and the control signal experiences jitter or jumps in a very short time, leading to malfunctions. Summary of the Invention

[0004] In view of this, this application provides an electrostatic adsorption device and its control method and controller, which can solve the signal abnormality problem caused by transient interference generated by high voltage to ground discharge during voltage polarity switching of the electrostatic adsorption device, and achieve immunity to interference.

[0005] The first aspect of this application provides a control method for an electrostatic adsorption device. The electrostatic adsorption device includes a bipolar electrostatic chuck and a power supply. The power supply is electrically connected to the bipolar electrostatic chuck and is used to supply power to the bipolar electrostatic chuck. The control method includes: detecting whether there is an abnormality in the power supply's sampling signal and control signal when the power supply has finished discharging or when the power supply's voltage polarity has switched; verifying the sampling configuration parameters when the sampling signal is abnormal and updating the sampling configuration parameters according to the verification result when the sampling signal is abnormal; and / or, detecting the validity of the control signal when the control signal is abnormal and updating the control signal according to the validity detection result when the control signal is abnormal.

[0006] In one embodiment, detecting whether there is an abnormality in the power supply's sampling signal and control signal includes: determining that the sampling signal is abnormal when the sampling signal meets a preset sampling abnormality condition; wherein the preset sampling abnormality condition includes one or more of the following: the error of the sampling signal exceeds a preset allowable error range; the sampling signal of the current period is inconsistent with the sampling signal of the previous period; the sampling signals obtained by continuously sampling a set number of times are inconsistent.

[0007] In one embodiment, detecting whether the power supply's sampling signal and control signal are abnormal includes: determining that the control signal is abnormal when the control signal meets a preset control abnormality condition. The preset control abnormality condition includes one or more of the following: a level transition in the control signal; level jitter in the control signal; or inconsistency between the detected control signal and the control signal generated by the host computer's control command.

[0008] In one embodiment, verifying the sampling configuration parameters includes: reading the current sampling configuration parameters of the sampling circuit, wherein the sampling circuit is used to sample the output of the power supply and generate a sampling signal; comparing the current sampling configuration parameters of the sampling circuit with preset parameters; if the sampling configuration parameters are consistent with the preset parameters, the verification passes; otherwise, the verification fails.

[0009] In one embodiment, updating the sampling configuration parameters based on the verification result includes: maintaining the sampling configuration parameters when the verification passes; and resetting the sampling configuration parameters when the verification fails.

[0010] In one embodiment, the validity detection of the control signal includes: periodically sampling the control signal to obtain multiple control signal sample values; comparing the multiple control signal sample values; if the multiple control signal sample values ​​are completely consistent, the control signal is determined to be valid; otherwise, the control signal is determined to be invalid.

[0011] In one embodiment, updating the control signal based on the validity detection result includes: maintaining the control signal when the control signal is valid; and adjusting the control signal to be consistent with the previous valid control signal when the control signal is invalid.

[0012] In one embodiment, the control method further includes: sampling the output of the power supply according to updated sampling configuration parameters; and controlling the output of the power supply according to updated control signals.

[0013] In one embodiment, the control method further includes: acquiring a sampling signal, the sampling signal including a sampling voltage and a sampling current; determining that the power supply discharge is complete when the sampling voltage is less than a set voltage threshold for a preset duration and the sampling current is less than a set current threshold for a preset duration; and determining that the voltage polarity switching of the power supply is complete when the sampling voltage reaches the target voltage value under the target polarity for a preset duration.

[0014] A second aspect of this application provides a controller, including: a processor, a memory, and a program stored in the memory and executable on the processor. When the program is executed by the processor, it implements the control method described in the first aspect or any embodiment of the first aspect.

[0015] The third aspect of this application provides an electrostatic adsorption device, which includes a bipolar electrostatic chuck, a power supply, and a controller. The power supply is electrically connected to the bipolar electrostatic chuck and is used to supply power to the bipolar electrostatic chuck. The controller is electrically connected to the power supply and is used to execute the control method described in the first aspect or any embodiment of the first aspect.

[0016] Compared with the prior art, this application has at least the following advantages: The electrostatic adsorption device provided in this application, based on a control method for electrostatic adsorption devices, can actively identify the impact of interference on sampling and control signals under high-voltage discharge conditions, determine whether the sampling and control signals are abnormal, verify and correct abnormal sampling signals, and perform validity detection and debouncing or recovery processing on abnormal control signals. Therefore, without increasing the complexity of the hardware structure, it can effectively identify and eliminate signal interference caused by high-voltage discharge, achieving interference immunity and improving the operational reliability of the electrostatic adsorption device. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of an electrostatic adsorption device provided in an embodiment of this application.

[0018] Figure 2 This is a flowchart of a control method for an electrostatic adsorption device provided in an embodiment of this application.

[0019] Figure 3 This is another flowchart of the control method for the electrostatic adsorption device provided in the embodiments of this application.

[0020] Figure 4 This is yet another flowchart of the control method for the electrostatic adsorption device provided in the embodiments of this application.

[0021] Figure 5 This is a schematic diagram of a controller provided in one embodiment of this application.

[0022] Figure 6 This is a schematic diagram of a controller provided in another embodiment of this application.

[0023] Explanation of main component symbols Electrostatic adsorption device-100, bipolar electrostatic chuck-10, substrate-11, first electrode-12, second electrode-13, power supply-20. Controller-30, Sampling Circuit-40, Wafer-200, Processor-301, Memory-302, Detection Module-401 First update module -402, second update module -403. Detailed Implementation

[0024] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application. Unless otherwise specified, the different embodiments and features described below can be combined with each other.

[0025] This application provides an electrostatic adsorption device. This electrostatic adsorption device can be applied to semiconductor process equipment to fix semiconductor materials (this description uses a wafer as an example). Semiconductor process equipment includes, but is not limited to, equipment used to perform processes such as physical vapor deposition, chemical vapor deposition, atomic layer deposition, ion implantation, or etching.

[0026] Figure 1 A schematic diagram of an electrostatic adsorption device provided in an embodiment of this application is shown.

[0027] like Figure 1 As shown, the electrostatic adsorption device 100 includes an electrostatic chuck (ESC) and a power supply 20.

[0028] The electrostatic chuck is a bipolar electrostatic chuck 10. The bipolar electrostatic chuck 10 includes a substrate 11, and a first electrode 12 and a second electrode 13 embedded within the substrate 11 and spaced apart. The power supply 20 is a high-voltage DC power supply used to provide two voltages with periodically switching positive and negative polarities. These two voltages have opposite polarities and both have voltage values ​​in the kilovolt range, for example, 0 to ±6000V. The first electrode 12 and the second electrode 13 are respectively connected to different output terminals of the power supply 20 to receive voltages of different polarities.

[0029] The bipolar electrostatic chuck 10 is used to hold the wafer 200. When the wafer 200 is placed on the bipolar electrostatic chuck 10 and the first electrode 12 and the second electrode 13 are connected to a high voltage, a strong electric field can be formed between the first electrode 12 and the wafer 200, and between the second electrode 13 and the wafer 200, thereby generating an electrostatic force (i.e., Coulomb force) to attract the wafer 200 onto the bipolar electrostatic chuck 10. The periodic switching of voltage polarity can cause the electric field direction to change alternately. At the instant the electric field reverses, residual charge can be returned and released to the high-voltage ground PE by the power supply 20, thereby eliminating residual charge. Subsequently, the power supply 20 reverses the voltage to complete the voltage polarity reversal.

[0030] Please continue reading. Figure 1The electrostatic adsorption device 100 also includes a controller 30. The controller 30 is electrically connected to the power supply 20 and can be used to send control signals to the power supply 20 to control the magnitude and polarity of the output voltage of the power supply 20.

[0031] The controller 30 can be a microcontroller unit (MCU) or other general-purpose controller. The controller 30 can also communicate with a host computer (not shown in the figure) to receive control commands from the host computer and generate corresponding control signals based on these commands. The host computer includes, but is not limited to, industrial control computers, servers, and user terminals (such as computers, mobile phones, tablets, etc.).

[0032] The control signal can be, for example, a level signal. If the level of the control signal flips, the control signal will control the power supply 20 to flip the voltage polarity. As a further example, when the control signal is high (represented by "1"), it can indicate that the voltage polarity of the first electrode 12 is positive and the voltage polarity of the second electrode 13 is negative; when the control signal is low (represented by "0"), it can indicate that the voltage polarity of the first electrode 12 is negative and the voltage polarity of the second electrode 13 is positive. Alternatively, the reverse can also be true.

[0033] The controller 30 is also electrically connected to the power supply 20 via a sampling circuit 40, which can be configured independently (see, for example, [link to sample circuit]). Figure 1 The sampling circuit 40 can also be integrated into the controller 30. The sampling circuit 40 includes a sampling chip, a metering chip, or other general-purpose chips with sampling functions. The sampling circuit 40 can be used to sample the output voltage and output current of the power supply 20 and generate sampling signals. The controller 30 can be used to acquire the sampling signals through the sampling circuit 40 and perform closed-loop regulation of the output voltage and output current of the power supply 20 based on the sampling signals.

[0034] In this embodiment, considering that the high-voltage discharge process has characteristics such as large voltage change rate, concentrated energy, and strong transient current impact, it is easy for the high-voltage ground PE to generate significant potential disturbance at the moment of discharge. This disturbance is coupled to the reference digital ground through parasitic capacitance, ground impedance, and other paths, causing the reference ground potential to shift transiently, thereby causing transient anomalies in the sampled signal. The control signal will jitter or jump abnormally in a very short time, causing malfunctions. Therefore, the controller 30 can also be used to execute the control method of the electrostatic adsorption device provided in this embodiment to solve the signal abnormality problem caused by transient interference generated by high-voltage discharge to ground during the switching of voltage polarity of the electrostatic adsorption device 100, and achieve immunity to interference.

[0035] The control method of the electrostatic adsorption device provided in the embodiments of this application will be described in detail below.

[0036] like Figure 2As shown, the control method for the electrostatic adsorption device includes the following steps: Step S10: When the power supply discharge is complete or the voltage polarity switching of the power supply is complete, check whether there are any abnormalities in the power supply sampling signal and the power supply control signal.

[0037] Before step S10, the controller can detect whether the power supply has finished discharging and whether the voltage polarity of the power supply has finished switching by the following steps: The first step is to acquire the sampling signal.

[0038] The sampling signals may include, for example, sampling voltage and sampling current. The controller can periodically acquire the voltage and current output by the power supply to each electrode of the bipolar electrostatic chuck through the sampling circuit to obtain the sampling voltage and sampling current for each sampling period.

[0039] The second step is to determine that the power supply discharge is complete when the duration of the sampled voltage being less than the set voltage threshold reaches a preset duration and the duration of the sampled current being less than the set current threshold reaches a preset duration.

[0040] The voltage threshold, current threshold, and preset duration can all be set according to actual conditions, and no specific limitations are made here. The controller can use timers to time the duration for which the sampled voltage is less than the set voltage threshold and the duration for which the sampled current is less than the set current threshold.

[0041] Taking a voltage threshold of 36V, a current threshold of 1μA, and a preset duration of 30ms as an example, when the controller detects that the sampled voltage is less than 36V and remains so for 30ms, and the sampled current is less than 1μA and remains so for 30ms, it can be determined that the power supply discharge is complete.

[0042] The third step is to determine that the voltage polarity switching of the power supply is complete when the duration of the sampling voltage reaching the target voltage value under the target polarity reaches the preset duration.

[0043] Specifically, when the deviation between the sampled voltage and the target voltage value is within the allowable deviation range, the sampled voltage can be considered to have reached the target voltage value. The allowable deviation range can be, for example, 1% of the target voltage value, or 0~±5V, etc., and can be set according to the actual situation, without being limited here.

[0044] Taking the power supply output voltage switching between -6000V and +6000V as an example, when the target polarity is positive, the target voltage value is +6000V; when the target polarity is negative, the target voltage value is -6000V.

[0045] Taking a preset duration of 30ms as an example, when the sampled voltage reaches +6000V or -6000V continuously for 30ms, it can be determined that the voltage polarity switching of the power supply has been completed.

[0046] It should be understood that "step two" and "step three" are only used to distinguish different steps, and do not restrict the order in which the steps are executed.

[0047] In step S10, after the power supply discharges or switches polarity, under normal circumstances, the power supply will output a stable DC voltage after the polarity switch, and the power supply will be connected to a stable control signal. If the sampled voltage shows amplitude drift, excessive noise, or fluctuations at this time, it can be determined that the sampled signal is abnormal; if the control signal is unstable or has a logic error at this time, it can be determined that the control signal is abnormal.

[0048] In some embodiments, the process by which the controller detects whether there are any abnormalities in the power supply's sampling signal and control signal may include the following sub-steps: Step S11: When the sampling signal is detected to meet the preset sampling abnormality conditions, the sampling signal is determined to be abnormal.

[0049] The preset sampling anomaly conditions include, but are not limited to, one or more of the following: The sampling signal error exceeds the preset allowable error range; the sampling signal of the current period is inconsistent with the sampling signal of the previous period; the sampling signals obtained by a set number of consecutive samplings are inconsistent.

[0050] Specifically, the process of detecting whether the sampled signal meets the preset sampling anomaly conditions may include the following steps: Step A: Detect the difference between the sampled signal and the target signal, and when the difference between the sampled signal and the target signal exceeds the preset allowable error range, determine that the error of the sampled signal exceeds the preset allowable error range; Step B: Detect the difference between the sampling signal of the current period and the sampling signal of the previous period, and when the difference between the sampling signal of the current period and the sampling signal of the previous period exceeds the preset allowable difference range, determine that the sampling signal of the current sampling period is inconsistent with the sampling signal of the previous sampling period. Step C: Detect the difference between the sampled signals obtained by a set number of consecutive samplings, and determine that the sampled signals obtained by a set number of consecutive samplings are inconsistent when it is detected that the difference between at least two sampled signals obtained by a set number of consecutive samplings exceeds the allowable difference range.

[0051] It should be understood that "Step A", "Step B" and "Step C" are only used to distinguish different steps, and do not restrict the order in which the steps are executed.

[0052] Understandably, in step A, the target signal is the expected value of the sampled signal, and the difference between the sampled signal and the target signal is the error of the sampled signal. If this error exceeds the allowable error range, it indicates that the sampled signal has abnormalities such as amplitude drift, overshoot, or excessive noise. The target signal and the sampled signal can be, for example, voltage signals, and the allowable error range can be, for example, 50%, 30%, or other proportions of the target voltage value, which are not limited here.

[0053] In step B, if the difference between the sampled signal of the current cycle and the sampled signal of the previous cycle exceeds the allowable difference range, it indicates that the sampled signal has experienced transient fluctuations, causing inconsistencies between the sampled signals of two adjacent cycles. The allowable difference range can be, for example, 50%, 30%, 10% of the target voltage value, or other percentages, and is not limited here.

[0054] In step C, if, among the sampled signals obtained from at least two consecutive samplings exceeding the allowable difference range, it indicates that the sampled signal is experiencing dynamic fluctuations, resulting in inconsistencies in the sampled signals of at least two periods across multiple consecutive periods. The set number can be adjusted according to actual conditions, such as 3, 5, or other values, and is not limited here.

[0055] Step S12: When the control signal is detected to meet the preset control abnormality conditions, the control signal is determined to be abnormal.

[0056] The preset control abnormal conditions include, but are not limited to, one or more of the following: The control signal experiences a level jump; the control signal experiences level jitter; the detected control signal is inconsistent with the control signal generated by the host computer control command.

[0057] Specifically, the process of detecting whether the control signal meets the preset control anomaly conditions may include the following steps: Step D: Detect the level of the control signal, and when different first and second levels of the control signal are detected at the same time, determine that a level transition has occurred in the control signal; Step E: Detect the edges of the control signal, and determine that the control signal level jitter occurs when multiple edges of the control signal are detected in succession; Step F: Detect the level of the control signal and the level of the control signal generated by the host computer control command. If the level of the control signal does not match the level of the control signal generated by the host computer control command, determine that the control signal is inconsistent with the control signal generated by the host computer control command.

[0058] It should be understood that "Step D", "Step E" and "Step F" are only used to distinguish different steps, and do not restrict the order in which the steps are executed.

[0059] Understandably, in step D, one of the first and second levels is a high level "1", and the other is a low level "0". If the control signal is detected to have both a low level "0" and a high level "1", it indicates that a level transition has occurred in the control signal, resulting in both high and low levels in the control signal.

[0060] In step E, if multiple edges of the control signal are detected consecutively, it indicates that the control signal is oscillating repeatedly between high and low levels, that is, the control signal is experiencing level jitter.

[0061] In step F, if the level of the control signal is detected to be inconsistent with the level of the control signal generated by the host computer control instruction, it indicates that a logical error has occurred in the control signal, causing the control signal to be inconsistent with the instruction of the host computer control instruction.

[0062] It should be understood that "step S11" and "step S12" are only used to distinguish different steps to be performed in different situations, and do not limit the order of execution of the steps.

[0063] Step S20: When the sampling signal is abnormal, verify the sampling configuration parameters and update the sampling configuration parameters according to the verification result.

[0064] like Figure 3 As shown, the process of validating the sampling configuration parameters may include the following sub-steps: Step S21: Read the current sampling configuration parameters of the sampling circuit.

[0065] In some embodiments, the controller can read sampling configuration parameters stored in the internal registers of the sampling chip. Sampling configuration parameters include, but are not limited to: the operating mode of the sampling circuit (e.g., single sampling mode, continuous sampling mode, scan mode, intermittent mode and / or sleep mode, etc.), the range, and configuration parameters (e.g., sampling channel selection, clock selection, single sampling time, number of continuous samples, sampling frequency, amplification factor and / or filter bandwidth, etc.).

[0066] Step S22: Compare the current sampling configuration parameters of the sampling circuit with the preset parameters.

[0067] The preset parameters refer to the originally set sampling configuration parameters. Preset parameters may include one or more of the following: sampling channel, clock, single sampling time, number of consecutive samples, sampling frequency, amplification factor, and filter bandwidth. Preset parameters can be user-defined settings on the host computer or factory default settings. Preset parameters can be stored in the controller beforehand.

[0068] Step S23A: If the sampling configuration parameters are consistent with the preset parameters, the verification is successful.

[0069] It is understandable that if the sampling configuration parameters are consistent with the preset parameters, it means that the communication between the controller and the sampling circuit is not affected by interference, and the sampling signal is reliable at this time.

[0070] Step S23B: If the sampling configuration parameters are inconsistent with the preset parameters, the verification will fail.

[0071] It is understandable that if the sampling configuration parameters are inconsistent with the preset parameters, it indicates that the communication between the controller and the sampling circuit has been affected by interference, and the sampling signal at this time is unreliable.

[0072] Please continue reading. Figure 3 The process of updating the sampling configuration parameters based on the verification results may include the following sub-steps: Step S24A: If the verification passes, maintain the sampling configuration parameters.

[0073] It is understandable that a successful verification indicates that the current sampling configuration parameters of the sampling circuit are correct, and there is no need to correct the sampling configuration parameters. Therefore, the updated sampling configuration parameters remain unchanged.

[0074] Step S24B: If the verification fails, reset the sampling configuration parameters.

[0075] It is understandable that a failed verification indicates that the current sampling configuration parameters of the sampling circuit are incorrect and need to be corrected. Therefore, the updated sampling configuration parameters are changed.

[0076] There are no restrictions on how the sampling configuration parameters can be reset. For example, the user can reconfigure the sampling circuit's parameters on a host computer and send the reconfiguration information to the sampling circuit via the controller. Alternatively, the controller can control the sampling circuit to restart or reinitialize, and so on.

[0077] Step S30: When the control signal is abnormal, perform validity detection on the control signal and update the control signal based on the validity detection result.

[0078] like Figure 4 As shown, the process of validating a control signal may include the following sub-steps: Step S31: Periodically sample the control signal to obtain multiple control signal sample values.

[0079] For example, the controller can periodically self-test or read the level status of the control signals output by its output interface, thereby obtaining multiple (such as 4, 5 or other preset number) control signal sample values, which can be cached in the controller's internal registers or memory.

[0080] Step S32: Compare the sampled values ​​of multiple control signals.

[0081] Step S33A: If the sampled values ​​of multiple control signals are completely consistent, then the control signal is determined to be valid.

[0082] If the difference between any two control signal sample values ​​does not exceed the allowable difference range, then the multiple control signal sample values ​​can be considered to be completely consistent, that is, the control signal is stable and reliable, and therefore the control signal can be determined to be valid.

[0083] Step S33B: If the sampled values ​​of multiple control signals are inconsistent, then the control signal is determined to be invalid.

[0084] If, among multiple control signal sample values, the difference between at least two control signal sample values ​​exceeds the allowable difference range, then the multiple control signal sample values ​​can be considered inconsistent, meaning the control signal is interfered with, unstable, and unreliable. Therefore, the control signal can be determined to be invalid.

[0085] Please continue reading. Figure 4 The process of updating the control signal based on the effectiveness detection result may include the following sub-steps: Step S34A: When the control signal is valid, maintain the control signal.

[0086] It is understandable that a valid control signal indicates that the control signal is stable, and no processing is required. Therefore, the updated control signal remains unchanged.

[0087] Step S34B: When the control signal is invalid, adjust the control signal to be consistent with the previous valid control signal.

[0088] It is understandable that an invalid control signal indicates that the control signal is unstable and needs to be debouncing or restored. Therefore, the control signal is adjusted to be consistent with the previous valid control signal to maintain the previous valid control state and avoid erroneous control caused by transient interference.

[0089] Please refer again to the embodiments in this application. Figure 3 After updating the sampling configuration parameters, the control method may also include: Step S40: Sample the power supply output according to the updated sampling configuration parameters.

[0090] Understandably, if step S50 is executed after step S24A, the sampling circuit samples the power supply according to the original sampling configuration parameters, and the sampled signal is reliable and usable.

[0091] If step S50 is executed after step S24B, the sampling circuit samples the power supply according to the reset sampling configuration parameters.

[0092] It should be noted that a sampled signal is only reliable and usable if the sampled signal obtained according to the reset sampling configuration parameters meets the preset recovery conditions. These preset recovery conditions include: the sampling configuration parameters pass verification, and the sampled signals obtained from a set number of consecutive samplings are consistent. When the sampled signal meets the preset recovery conditions, it indicates that the sampled signal is normal and stable.

[0093] Please refer again to the embodiments in this application. Figure 4 After updating the control signal, the control method may further include: Step S50: Control the power supply output according to the updated control signal.

[0094] Understandably, if step S50 is executed after step S34A, the power supply outputs according to the updated control signal. If step S50 is executed after step S34B, the power supply outputs according to the previously valid control signal.

[0095] It should be noted that during the actual execution of step S10, if both the sampling signal and the control signal are abnormal, the controller will continue to execute steps S20 to S50 to completely eliminate the abnormal signal, ensuring the accuracy and reliability of both sampling and control. If the sampling signal is normal but the control signal is abnormal, the controller will continue to execute steps S30 and S50, without executing steps S20 and S40, to achieve targeted processing of the abnormal control signal and save the controller's computing resources. If the control signal is normal but the sampling signal is abnormal, the controller will continue to execute steps S20 and S40, without executing steps S30 and S50, to achieve targeted processing of the abnormal sampling signal and save the controller's computing resources.

[0096] In summary, the electrostatic adsorption device provided in this application, under the high-interference condition of high-voltage discharge, does not attempt to eliminate the interference source itself through hardware circuitry. Instead, it actively identifies the impact of interference on the sampling and control signals, determines whether the sampling and control signals are abnormal, verifies and corrects the sampling configuration for abnormal sampling signals, and performs validity detection and debouncing or recovery processing on abnormal control signals. Therefore, the electrostatic adsorption device and its control method provided in this application can effectively identify and eliminate signal interference caused by high-voltage discharge without increasing the complexity of the hardware structure, achieving interference immunity, improving the operational reliability of the electrostatic adsorption device, and helping to ensure the wafer fixation effect and process implementation.

[0097] It should be noted that, for the sake of simplicity, the aforementioned method embodiments are described as a series of actions. However, those skilled in the art should understand that this application is not limited to the described order of actions, because according to this application, some steps may be performed in other orders or simultaneously.

[0098] An embodiment of this application also provides a controller.

[0099] Specifically, such as Figure 5 As shown, the controller 30 may include a processor 301, a memory 302, and a program stored in the memory 302 and executable on the processor 301. When the program is executed by the processor 301, it implements some or all of the steps of the control method of the electrostatic adsorption device described above.

[0100] The processor 301 can be a microprocessor or any conventional processor. The memory 302 can be any storage medium capable of carrying or storing desired program code in the form of instructions or data structures, and accessible by a computer. The memory 302 can be independent and connected to the processor 301 via a bus. Alternatively, the memory 302 can be integrated with the processor 301.

[0101] Another embodiment of this application also provides a controller. The controller 30 can be applied to the electrostatic adsorption device 100 to implement the control method of the electrostatic adsorption device described above.

[0102] Specifically, such as Figure 6 As shown, the controller 30 includes a detection module 401, a first update module 402, and a second update module 403.

[0103] The detection module 401 is used to detect whether there are any abnormalities in the power supply's sampling signal and control signal when the power supply discharge is complete or the power supply voltage polarity switching is complete.

[0104] The first update module 402 is used to verify the sampling configuration parameters when the sampling signal is abnormal, and update the sampling configuration parameters according to the verification result.

[0105] The second update module 403 is used to perform validity detection on the control signal when the control signal is abnormal, and update the control signal according to the validity detection result.

[0106] It is understood that the division of the various modules in the controller 30 described above is only for illustrative purposes. In other embodiments, the controller 30 may be divided into different modules as needed to complete all or part of the functions of the controller 30 described above.

[0107] The specific implementation of each module in this embodiment can also refer to the corresponding description in the preceding control method embodiments, and therefore will not be detailed here. The controller 30 may also include more modules to implement other steps mentioned in the preceding control method.

[0108] In the various embodiments of this application, all functional modules can be integrated into one processing module / unit, or each module can be a separate module, or two or more modules can be integrated into one module; the integrated module can be implemented in hardware or in the form of hardware plus software functional modules.

[0109] If the integrated modules described above in this application are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, or the parts that contribute to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, ROM, RAM, magnetic disks, or optical disks.

[0110] This application also provides a computer-readable storage medium for storing computer programs or code, which, when loaded and executed by a processor, implement all or part of the steps in the above method embodiments. The computer-readable storage medium includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules or other data), which are not listed here.

[0111] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application and are not intended to limit it. Although this application has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of this application without departing from the spirit and scope of the technical solutions of this application.

Claims

1. A control method of an electrostatic chucking apparatus, characterized by, The electrostatic adsorption device comprises a bipolar electrostatic chuck and a power supply electrically connected to the bipolar electrostatic chuck and configured to supply power to the bipolar electrostatic chuck; and the control method comprises: detecting whether the sampling signal of the power supply and the control signal of the power supply are abnormal when the discharging of the power supply is completed or the voltage polarity switching of the power supply is completed; when the sampling signal is abnormal, verifying the sampling configuration parameters and updating the sampling configuration parameters according to the verification result; and / or, when the control signal is abnormal, detecting the validity of the control signal and updating the control signal according to the validity detection result.

2. The control method according to claim 1, characterized by, The detection of whether the sampling signal of the power supply and the control signal of the power supply are abnormal comprises: when it is detected that the sampling signal meets a preset sampling abnormality condition, determining that the sampling signal is abnormal; wherein the preset sampling abnormality condition comprises one or more of the following: the error of the sampling signal exceeds a preset allowable error range; the sampling signal of the current period is inconsistent with the sampling signal of the previous period; the sampling signals obtained by continuous sampling for a set number of times are inconsistent.

3. The control method according to claim 1, characterized by, The detection of whether the sampling signal of the power supply and the control signal of the power supply are abnormal comprises: when it is detected that the control signal meets a preset control abnormality condition, determining that the control signal is abnormal; wherein the preset control abnormality condition comprises one or more of the following: the control signal has a level jump; the control signal has a level jitter; the detected control signal is inconsistent with the control signal indicated by the host computer control instruction.

4. The control method according to claim 1, characterized by, The verification of the sampling configuration parameters comprises: reading the current sampling configuration parameters of the sampling circuit, wherein the sampling circuit is configured to sample the output of the power supply and generate the sampling signal; comparing the current sampling configuration parameters of the sampling circuit with preset parameters; if the sampling configuration parameters are consistent with the preset parameters, the verification is passed; otherwise, the verification fails.

5. The control method according to claim 1, characterized by, The validity detection of the control signal comprises: periodically sampling the control signal to obtain a plurality of control signal sampling values; comparing the plurality of control signal sampling values; if the plurality of control signal sampling values are completely consistent, it is determined that the control signal is valid; otherwise, it is determined that the control signal is invalid.

6. The control method according to claim 1, characterized by, The updating of the control signal according to the validity detection result comprises: when the control signal is valid, maintaining the control signal; when the control signal is invalid, adjusting the control signal to be consistent with the last valid control signal.

7. The control method according to claim 1, characterized by, The control method further comprises: sampling the output of the power supply according to the updated sampling configuration parameters; controlling the output of the power supply according to the updated control signal.

8. The control method according to claim 1, characterized by, The control method further comprises: obtaining the sampling signal, wherein the sampling signal comprises a sampling voltage and a sampling current; when the duration that the sampling voltage is less than a set voltage threshold reaches a preset time length and the duration that the sampling current is less than a set current threshold reaches a preset time length, it is determined that the discharging of the power supply is completed. When a duration of the sampling voltage reaching a target voltage value at a target polarity reaches a preset time length, it is determined that the voltage polarity switching of the power supply is completed.

9. A controller characterized by, The application relates to a control method and a control device. The processor, the memory and the program stored on the memory and executable on the processor, when the program is executed by the processor, realize the control method in any one of claims 1 to 8.

10. An electrostatic chucking device, characterized by, The electrostatic adsorption device comprises a bipolar electrostatic chuck, a power supply and a controller. The power supply is electrically connected to the bipolar electrostatic chuck and is used for supplying power to the bipolar electrostatic chuck. The controller is electrically connected to the power supply. The controller is used for executing the control method in any one of claims 1 to 8.

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