Compensation circuit for memory charge pump, charge pump, and electronic device

Abstract

The invention discloses a compensation circuit for a charge pump of a memory, the charge pump and electronic equipment, and the compensation circuit comprises a compensation capacitor of which the first end is connected with the output end of a charge pump circuit; the control unit is used for receiving the first trigger signal and generating a second trigger signal and a third trigger signal; the first pull-up unit is connected with the control unit and the second end of the compensation capacitor, and selectively drives the second end of the compensation capacitor to a preset voltage according to the third trigger signal; the pull-down unit is connected with the control unit and the second end of the compensation capacitor, the second end of the compensation capacitor is selectively driven to a grounding end according to the second trigger signal, and the second end of the compensation capacitor is driven to a preset voltage when the power consumption of the load is stepped. According to the invention, power required by word line switching is compensated through the compensation circuit, so that instantaneous large power consumption of a small-area charge pump is realized.

Description

Technical Field

[0001] This invention relates to the field of non-volatile memory technology, and in particular to a compensation circuit, charge pump, and electronic device for a memory charge pump. Background Technology

[0002] In the field of memory chips, NorFlash (non-volatile flash memory) is widely used in consumer electronics, automotive electronics, and many other scenarios due to its advantages such as fast random read speed and direct program execution. However, during the execution of read commands in NorFlash, the power consumption performance driven by the word line (WL) exhibits a significant polarization.

[0003] Specifically, during the stable read phase, the WL driver is continuously operating, and its average power consumption remains at a low level, resulting in a relatively moderate load demand on the power supply system. However, when facing a WL switching operation, the new word line needs to be driven from 0 to the target voltage when switching from one word line to another, which requires a large amount of power consumption and generates instantaneous and large peak power consumption. This power consumption is often much higher than the average power consumption level, forming a typical "low average, high peak" power consumption scenario.

[0004] This unique power consumption characteristic presents a significant challenge to the design of the charge pump. As a critical voltage supply module within NorFlash, the charge pump's capability directly determines power supply stability and chip performance. If the charge pump's capability is designed to be excessively high to handle peak power consumption, while it can easily handle the high load during switching and prevent voltage anomalies, the excessive design margin will lead to a significant increase in the internal circuit area of ​​the chip. This not only increases wafer manufacturing costs but also contradicts the design trend of miniaturization and high density in memory chips, resulting in serious area waste.

[0005] Conversely, if a weaker charge pump design is used to control area and cost, the charge pump will struggle to respond quickly to load changes during peak load power consumption during WL switching, inevitably causing a significant voltage drop in the supply voltage. This voltage drop can not only lead to data read errors and affect chip reliability, but also requires a long recovery time to return the voltage to a stable state. This will undoubtedly severely slow down read command execution efficiency and impact overall chip performance.

[0006] Therefore, how to accurately balance the charge pump's capabilities so that it can meet the daily needs of low average load power consumption driven by WL while also easily handling the challenges of high peak power consumption during switching has become a core technical problem that those skilled in the art urgently need to overcome. Summary of the Invention

[0007] In view of the above problems, the purpose of the present invention is to provide a compensation circuit, a charge pump, and an electronic device for a memory charge pump, which compensates for the power required during word line switching, thereby enabling a small-area charge pump to achieve instantaneous high power consumption.

[0008] According to one aspect of the present invention, a compensation circuit for a memory charge pump is provided for selectively compensating the output voltage of a charge pump circuit. The compensation circuit includes: a compensation capacitor, the first end of which is connected to the output terminal of the charge pump circuit; a control unit, which receives a first trigger signal and generates a second trigger signal and a third trigger signal; a first pull-up unit, which is connected to the control unit and the second end of the compensation capacitor, and selectively drives the second end of the compensation capacitor to a predetermined voltage according to the third trigger signal; and a pull-down unit, which is connected to the control unit and the second end of the compensation capacitor, and selectively drives the second end of the compensation capacitor to a ground terminal according to the second trigger signal, wherein the second end of the compensation capacitor is driven to the predetermined voltage when the load power consumption steps.

[0009] Optionally, it further includes: a second pull-up unit connected to the control unit and the second terminal of the compensation capacitor, wherein the control unit further generates a fourth trigger signal according to the first trigger signal, and the second pull-up unit selectively drives the second terminal of the compensation capacitor to a predetermined voltage according to the fourth trigger signal.

[0010] Optionally, when the load power consumption increases, the second terminal of the compensation capacitor is driven to a predetermined voltage via the first pull-up unit or the second pull-up unit.

[0011] Optionally, the predetermined voltage includes a first voltage and a second voltage; the second terminal of the compensation capacitor is driven to the first voltage via the first pull-up unit, or the second terminal of the compensation capacitor is driven to the second voltage via the second pull-up unit; the first voltage is equal to the difference between the power supply voltage and the transistor threshold voltage, and the second voltage is equal to the power supply voltage.

[0012] Optionally, the control unit includes: a first inverter, wherein a first terminal of the first inverter receives a first trigger signal and a second terminal outputs a second trigger signal, the first trigger signal and the second trigger signal being inverses of each other; a second inverter, wherein a first terminal of the second inverter receives a high-voltage signal; a first logic gate, wherein a first terminal of the first logic gate is connected to a first terminal of the first inverter, a second terminal receives the high-voltage signal, and a third terminal outputs the third trigger signal; and a second logic gate, wherein a first terminal of the second logic gate is connected to a first terminal of the first inverter, a second terminal is connected to a second terminal of the second inverter, and a third terminal outputs the fourth trigger signal.

[0013] Optionally, the first logic gate and the second logic gate are NAND gates.

[0014] Optionally, the first pull-up unit includes: a first switch transistor, the first end of which is connected to the power supply voltage and the control terminal is connected to the third terminal of the first logic gate; and a second switch transistor, the first end of which is connected to the second end of the first switch transistor and the second end of which is connected to the control terminal.

[0015] Optionally, the second pull-up unit includes: a third switch, the first end of which is connected to the power supply voltage, the second end of which is connected to the second end of the second switch, and the control end of which is connected to the third end of the second logic gate.

[0016] Optionally, the first and third switching transistors are P-type switching transistors, and the second switching transistor is either a P-type or an N-type switching transistor.

[0017] Optionally, the pull-down unit includes: a fourth switch, the first end of which is connected to the second end of the second switch and the second end is connected to the ground terminal, and a control terminal is connected to the second end of the first inverter; and a fifth switch, the first end of which is connected to the second end of the third switch and the second end is connected to the ground terminal, and a control terminal receives a control signal.

[0018] Optionally, the fourth and fifth switching transistors are another type of N-type switching transistor.

[0019] Optionally, the second terminal of the compensation capacitor is selectively driven to the ground terminal via the fourth switch and / or the fifth switch.

[0020] Optionally, the first trigger signal and the second trigger signal are opposite signals to each other.

[0021] According to another aspect of the present invention, a charge pump is provided, comprising: a charge pump circuit for generating an output voltage; and the aforementioned compensation circuit connected to the charge pump circuit for selectively compensating the output voltage of the charge pump circuit.

[0022] According to another aspect of the present invention, an electronic device is provided, comprising: a memory and the charge pump described above.

[0023] This invention provides a compensation circuit, a charge pump, and an electronic device for a memory charge pump. The compensation circuit is connected to the output terminal of the charge pump circuit via a compensation capacitor. When the load power consumption jumps, it pulls one plate of the compensation capacitor to a predetermined voltage. Utilizing the characteristic that the voltage across the capacitor cannot change abruptly, the output voltage of the charge pump circuit rises rapidly, thereby compensating for jumps in load power consumption. Specifically, when the system detects a high-power operation, the compensation circuit acts preemptively before the feedback loop in the charge pump circuit responds, instantly raising one plate of the compensation capacitor to the predetermined voltage. The voltage difference across the capacitor is forced to remain constant, compelling an equal amount of charge to be injected into the output terminal. This cancels out the charge drawn by the load within nanoseconds, significantly suppressing the drop in the output voltage of the charge pump circuit. Therefore, the charge pump circuit does not need to be designed for high power consumption; the compensation circuit can compensate for the high power required during word line switching, thus enabling a small-area charge pump to achieve instantaneous high power consumption.

[0024] Furthermore, since the entire compensation process does not rely on increasing the switching frequency of the charge pump circuit itself, nor does it require increasing the compensation capacitor capacity, it avoids the efficiency reduction and chip area expansion problems caused by traditional solutions.

[0025] Furthermore, in the compensation circuit, the second terminal of the compensation capacitor is connected to two pull-up units and one pull-down unit. The two pull-up units are determined by the high-voltage signal characterizing the power supply voltage and the first trigger signal, so that the amount of charge injected under different power supply voltages is automatically adjusted, avoiding the problems of overcompensation for high voltage and undercompensation for low voltage. In addition, the pull-down unit pulls the voltage of the second terminal of the compensation capacitor down to the ground potential when compensation is not required, ensuring that the lower plate of the compensation capacitor is not floating, reducing the risk of leakage current, and preparing for the next compensation. Attached Figure Description

[0026] The above and other objects, features and advantages of the present invention will become more apparent from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0027] Figure 1 A schematic diagram of the structure of a charge pump according to an embodiment of the present invention is shown;

[0028] Figure 2 A schematic diagram of the signal of the compensation circuit according to the first embodiment of the present invention under instantaneous high load power consumption is shown;

[0029] Figure 3 A schematic diagram of the signal of the compensation circuit according to the second embodiment of the present invention under instantaneous high load power consumption is shown;

[0030] Figure 4 A schematic diagram of the charging current of the compensation circuit according to an embodiment of the present invention under instantaneous high load power consumption is shown.

[0031] Figure 5 A schematic diagram of the discharge current of the compensation circuit according to an embodiment of the present invention after the end of a momentary large load power consumption is shown. Detailed Implementation

[0032] Various embodiments of the invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0033] The specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples.

[0034] Figure 1 A schematic diagram of the structure of a charge pump according to an embodiment of the present invention is shown; Figure 2 A schematic diagram of the signal of the compensation circuit according to the first embodiment of the present invention under instantaneous high load power consumption is shown; Figure 3 A schematic diagram of the signal of the compensation circuit according to the second embodiment of the present invention under instantaneous high load power consumption is shown; Figure 4 A schematic diagram of the charging current of the compensation circuit according to an embodiment of the present invention under instantaneous high load power consumption is shown. Figure 5 A schematic diagram of the discharge current of the compensation circuit according to an embodiment of the present invention after the end of a momentary large load power consumption is shown.

[0035] like Figure 1 As shown, the charge pump 100 of this application includes a charge pump circuit 10 and a compensation circuit 20. The output terminal of the compensation circuit 20 is connected to the output terminal of the charge pump circuit 10, and the two are connected in parallel at the same output voltage VP node, forming a common power supply port for the load. When the load current experiences a step change, the charge pump circuit 10 gradually adjusts its duty cycle to replenish the charge using its own feedback loop, while the compensation circuit 20, within the window period before the feedback loop of the charge pump circuit 10 has made an effective response, instantaneously injects additional charge through a pre-deployed compensation capacitor, thereby compressing the drop in output voltage VP to within the acceptable tolerance of the subsequent circuitry.

[0036] Specifically, the charge pump circuit 10 includes: an oscillation unit 110, a gating unit 120, a charge pump unit 130, a comparator 140, and a resistor R1.

[0037] The oscillation unit 110 is one of the core components of the charge pump circuit 10. Its main function is to generate a fixed-frequency clock signal CLK to provide timing control for the energy conversion process of the charge pump. Specifically, the oscillation unit 110 generates a square wave or pulse signal of a specific frequency to control the turn-on and turn-off timing of the internal switching transistors of the charge pump circuit 10, so that the capacitor can charge, transfer, and discharge in a regular manner, thereby increasing or decreasing the voltage. The oscillation unit 110 has an oscillation frequency, which directly affects the working efficiency and response speed of the charge pump circuit 10. A higher frequency can reduce the capacitance of the external capacitor, but may increase switching losses, while a lower frequency has the opposite effect. A high-quality oscillation unit 110 can provide a stable oscillation frequency, avoiding fluctuations in the output voltage VP or performance degradation of the charge pump circuit 10 due to frequency drift.

[0038] The gate control unit 120 is connected to the output terminal of the oscillation unit 110 and is used to selectively control the clock signal CLK generated by the oscillation unit 110, or dynamically enable or disable the transmission of the clock signal CLK through a feedback signal Vfb according to circuit requirements, so as to control the working state of the charge pump circuit 10 and reduce power consumption.

[0039] The charge pump unit 130, connected to the output of the gate unit 120, is the core execution part of the charge pump circuit 10. Its main function is to convert the input voltage into a higher or lower output voltage through the charging and discharging of the capacitor and charge transfer. In a boost embodiment, the charge pump unit 130 may employ a multi-stage voltage multiplier topology, with each stage containing a pair of transmission transistors and a capacitor. These transistors are alternately turned on during the positive and negative half-cycles of the clock signal, allowing the charge to stack step by step along a unidirectional path, ultimately establishing a stable high voltage at the output that is higher than the power supply voltage VCC.

[0040] The first end of resistor R1 is connected to the output terminal of charge pump unit 130, and the second end is connected to ground. The output terminal of charge pump unit 130 is the output voltage VP, and resistor R1 is used to generate a sampling voltage Vsp for the output voltage VP. In this embodiment, resistor R1 is a sampling resistor.

[0041] Comparator 140 is connected to gating unit 120 and resistor R1 to detect the output voltage VP and / or sampled voltage Vsp and compare them with reference voltage Vref, thereby forming a feedback regulation mechanism. In this embodiment, comparator 140 includes two input terminals and one output terminal. The first input terminal receives the reference signal Vref, the second input terminal is connected to resistor R1 to receive the sampled voltage Vsp generated by resistor R1, and the output terminal outputs a feedback signal Vfb. The feedback signal Vfb is transmitted to gating unit 120 to control the transmission of the clock signal generated by oscillation unit 110.

[0042] In one embodiment, when the sampled voltage Vsp is greater than the reference signal Vref, the gating unit 120 turns off the path of the clock signal CLK according to the feedback signal Vfb, causing the output voltage VP at the output terminal of the charge pump circuit 10 to decrease; when the sampled voltage Vsp is less than the reference signal Vref, the gating unit 120 turns on the path of the clock signal CLK according to the feedback signal Vfb, causing the output voltage VP at the output terminal of the charge pump circuit 10 to increase. Driven by the clock signal CLK, the charge pump circuit 10 increases the output voltage VP. The comparator 140 generates a feedback signal Vfb based on the comparison result between the sampled voltage Vsp and the reference signal Vref. The gating unit 120 turns the clock signal CLK on and off according to the feedback signal Vfb to adjust the magnitude of the output voltage VP. Through this feedback loop, the output voltage VP can be adjusted to a target value.

[0043] The compensation circuit 20 includes a control unit 210, a first pull-up unit 220, a second pull-up unit 230, a pull-down unit 240, and a compensation capacitor C1. In this embodiment, the compensation circuit 20 is connected to the output terminal of the charge pump circuit 10 through the compensation capacitor C1 to selectively compensate the output voltage VP of the charge pump circuit 10. Specifically, when the load power consumption jumps, one plate of the compensation capacitor C1 is pulled up to a predetermined voltage. Utilizing the characteristic that the voltage across the compensation capacitor C1 cannot change abruptly, the output voltage of the charge pump circuit 10 is rapidly increased, thereby achieving compensation for load power consumption jumps.

[0044] The first pull-up unit 220 and the second pull-up unit 230 do not operate simultaneously; that is, during compensation, only one of the first pull-up unit 220 and the second pull-up unit 230 operates. The predetermined voltage includes a first voltage and a second voltage, where the first voltage is less than the second voltage. The first voltage is equal to the difference between the power supply voltage VCC and the transistor threshold voltage VTH, and the second voltage is equal to the power supply voltage VCC.

[0045] The control unit 210 includes a first inverter INV1, a second inverter INV2, a first logic gate NAND1, and a second logic gate NAND2. Specifically, the first terminal of the first inverter INV1 receives a first trigger signal KICK, and the second terminal outputs a second trigger signal KICKB. The first trigger signal KICK and the second trigger signal KICKB are inverted signals. The first terminal of the second inverter INV2 receives a high-voltage signal HV. The first terminal of the first logic gate NAND1 is connected to the first terminal of the first inverter INV1, the second terminal receives the high-voltage signal HV, and the third terminal outputs a third trigger signal KICKB1. The first terminal of the second logic gate NAND2 is connected to the first terminal of the first inverter INV1, the second terminal is connected to the second terminal of the second inverter INV2, and the third terminal outputs a fourth trigger signal KICKB2. In this embodiment, the first logic gate NAND1 and the second logic gate NAND2 are, for example, NAND gates. The high voltage signal HV is a signal that characterizes the high or low power supply voltage VCC. That is, when the high voltage signal HV is high, it means that the power supply voltage VCC is high, and the driving capability of the charge pump circuit 10 is strong. When the high voltage signal HV is low, the power supply voltage VCC is low, and the driving capability of the charge pump circuit 10 is weak. The high or low level of the high voltage signal HV is related to the predetermined voltage at which the plates of the compensation capacitor C1 are driven during compensation.

[0046] The first pull-up unit 220 includes a first switch P1 and a second switch P2. The first terminal of the first switch P1 is connected to the power supply voltage VCC, and its control terminal is connected to the third terminal of the first logic gate NAND1 in the control unit 210. Thus, the third trigger signal KICKB1 controls the on / off state of the first switch P1. The first terminal of the second switch P2 is connected to the second terminal of the first switch P1, and its second terminal is connected to the control terminal. In this embodiment, the first switch P1 is a P-type switch, and the second switch P2 is either a P-type switch or an N-type switch. In this embodiment, the second switch P2 is, for example, a P-type switch. The first pull-up unit 220 selectively drives the second terminal of the compensation capacitor C1 to a predetermined voltage according to the third trigger signal KICKB1. Specifically, when the high-voltage signal HV is high, the first pull-up unit 220 operates to pull one plate of the compensation capacitor C1 up to the first voltage. At this time, the charge pump circuit 10 has strong driving capability and requires less compensation; therefore, the first pull-up unit 220 is used.

[0047] The second pull-up unit 230 includes a third switch P3. The first terminal of the third switch P3 is connected to the power supply voltage VCC, the second terminal is connected to the second terminal of the second switch P2 in the first pull-up unit 220, and the control terminal is connected to the third terminal of the second logic gate NAND2 in the control unit 210. Thus, the fourth trigger signal KICKB2 controls the on / off state of the third switch P3. In this embodiment, the third switch P3 is a P-type switch. The second pull-up unit 230 selectively drives the second terminal of the compensation capacitor C1 to a predetermined voltage according to the fourth trigger signal KICKB2. Specifically, when the high-voltage signal HV is low, the second pull-up unit 230 operates to pull one plate of the compensation capacitor C1 up to the second voltage. At this time, the driving capability of the charge pump circuit 10 is relatively small, and the required compensation is large; therefore, the second pull-up unit 230 is used.

[0048] The pull-down unit 240 includes a fourth switch N1 and a fifth switch N2. The first terminal of the fourth switch N1 is connected to the second terminal of the second switch P2 in the first pull-up unit 220, and the second terminal is connected to ground GND. Its control terminal is connected to the second terminal of the first inverter INV1 in the control unit 210, thereby the second trigger signal KICKB controls the on / off state of the fourth switch N1. The first terminal of the fifth switch N2 is connected to the second terminal of the third switch P3 in the second pull-up unit 230, and the second terminal is connected to ground GND. Its control terminal receives the control signal STBY, thereby the control signal STBY controls the on / off state of the fifth switch N2. In this embodiment, the fourth switch N1 and the fifth switch N2 are N-type switches. The pull-down unit 240 selectively drives the second terminal of the compensation capacitor C1 to ground GND according to the second trigger signal KICKB.

[0049] The fourth switch N1 and the fifth switch N2 have different driving capabilities; in this application, for example, the driving capability of the fifth switch N2 is greater than that of the fourth switch N1. When the electronic device is not working, the control signal STBY controls the fifth switch N2 to turn on, driving the second terminal of the compensation capacitor C1 to the ground terminal. When the electronic device is working, the control signal STBY controls the fifth switch N2 to turn off. At this time, after the first pull-up unit 220 or the second pull-up unit 230 completes the compensation for the output terminal of the charge pump circuit 10, the second trigger signal KICKB controls the fourth switch N1 to turn on, driving the second terminal of the compensation capacitor C1 to the ground terminal GND. This is because the driving capability of the fourth switch N1 is weaker, and the speed at which the voltage of the second terminal of the compensation capacitor C1 is driven to the ground voltage GND via the fourth switch N1 after compensation is slower, so it will not affect the output voltage VP of the charge pump circuit 10.

[0050] The first terminal of the compensation capacitor C1 is connected to the output terminal of the charge pump circuit 10, and the second terminal is connected to the first terminal of the fifth switch N2 in the pull-down unit 240. In this embodiment, the compensation capacitor C1 is a voltage regulator capacitor.

[0051] The following will describe in detail the working timing of one compensation method of the compensation circuit 20 in the charge pump 100 of this application. For example, the compensation method is to charge the compensation capacitor C1 through the first pull-up unit 220 or the second pull-up unit 230, and to discharge the compensation capacitor C1 through the fourth switch N1 in the pull-down unit 240, thereby explaining the operation of the compensation circuit 20 of this application.

[0052] In one embodiment, such as Figure 2 , Figure 4 and Figure 5 As shown, when the high-voltage signal HV (power supply voltage VCC) is high, before time t0, the control signal STBY is high, and the fifth switch N2 is turned on; the first trigger signal KICK is low, the second trigger signal KICKB is high, the fourth switch N1 is turned on, and the third trigger signal KICKB1 and the fourth trigger signal KICKB2 are high, thus turning off the first switch P1, the second switch P2, and the third switch P3; the second terminal of the compensation capacitor C1 is grounded through the fourth switch N1 and the fifth switch N2, so the plate voltage KICKD of the second terminal of the compensation capacitor C1 is 0. At this time, the compensation capacitor C1 is a regulated voltage for the output voltage VP.

[0053] Between time t0 and time t1, the control signal STBY changes from high voltage to low voltage at time t0, so the fifth switch N2 is turned off. Other signals remain unchanged, so the first switch P1 to the third switch P3 are still in the off state, and the fourth switch N1 is in the on state.

[0054] At time t1, the first trigger signal KICK changes from low level to high level, and the second trigger signal KICKB and the third trigger signal KICKB1 change from high level to low level. At this time, the fourth switch N1 and the fifth switch N2 are turned off, the first switch P1 and the second switch P2 are turned on, and the third switch P3 is turned off.

[0055] Between time t1 and t2, the second terminal of compensation capacitor C1 is connected to the power supply voltage VCC via the first pull-up unit 220. This causes the plate voltage KICKD at the second terminal of compensation capacitor C1 to change from ground GND to a predetermined voltage (at this time, the first voltage, equal to the difference between the power supply voltage VCC and the transistor threshold voltage VTH). Since the voltage across compensation capacitor C1 cannot change abruptly, the plate voltage at the first terminal of compensation capacitor C1 also changes to the predetermined voltage, and the output voltage VP connected to the first terminal of compensation capacitor C1 is compensated. In this embodiment, time t1 is the word line switching time, such as... Figure 4 As shown.

[0056] At time t2, the first trigger signal KICK changes from high level to low level, and the second trigger signal KICKB and the third trigger signal KICKB1 change from low level to high level. At this time, the fourth switch N1 is turned on, and the first switch P1 to the third switch P3 are turned off.

[0057] Therefore, after time t2, the second terminal of the compensation capacitor C1 is connected to the ground terminal GND via the fourth switch N1, and the plate voltage KICKD of the second terminal of the compensation capacitor C1 discharges from the predetermined voltage to 0, as... Figure 5 As shown.

[0058] exist Figure 2 In the embodiment shown, the capability of the fourth switch N1 is, for example, less than that of the fifth switch N2. Therefore, when the compensation capacitor C1 is discharged through the fourth switch N1, the discharge process is slow and has little impact on the output voltage VP.

[0059] In another embodiment, such as Figure 3 , Figure 4 and Figure 5 As shown, when the high-voltage signal HV (power supply voltage VCC) is low, before time t0, the control signal STBY is high, and the fifth switch N2 is turned on; the first trigger signal KICK is low, the second trigger signal KICKB is high, the fourth switch N1 is turned on, and the third trigger signal KICKB1 and the fourth trigger signal KICKB2 are high, thus turning off the first switch P1, the second switch P2, and the third switch P3; the second terminal of the compensation capacitor C1 is grounded through the fourth switch N1 and the fifth switch N2, so the plate voltage KICKD of the second terminal of the compensation capacitor C1 is 0. At this time, the compensation capacitor C1 is a regulated voltage for the output voltage VP.

[0060] Between time t0 and time t1, the control signal STBY changes from high voltage to low voltage at time t0, so the fifth switch N2 is turned off. Other signals remain unchanged, so the first switch P1 to the third switch P3 are still in the off state, and the fourth switch N1 is in the on state.

[0061] At time t1, the first trigger signal KICK changes from low level to high level, and the second trigger signal KICKB and the fourth trigger signal KICKB2 change from high level to low level. At this time, the fourth switch N1 and the fifth switch N2 are turned off, the first switch P1 and the second switch P2 are turned off, and the third switch P3 is turned on.

[0062] Between time t1 and t2, the second terminal of compensation capacitor C1 is connected to the power supply voltage VCC via the second pull-up unit 230. This causes the plate voltage KICKD at the second terminal of compensation capacitor C1 to change from ground GND to a predetermined voltage (the second voltage, equal to the power supply voltage VCC). Since the voltage across compensation capacitor C1 cannot change abruptly, the plate voltage at the first terminal of compensation capacitor C1 also changes to the predetermined voltage, thus compensating for the output voltage VP connected to the first terminal of compensation capacitor C1. In this embodiment, time t1 is the word line switching time, such as... Figure 4 As shown.

[0063] At time t2, the first trigger signal KICK changes from high level to low level, and the second trigger signal KICKB and the fourth trigger signal KICKB2 change from low level to high level. At this time, the fourth switch N1 is turned on, the first switch P1 to the third switch P3 are turned off, and the fifth switch N2 is turned off.

[0064] Therefore, after time t2, the second terminal of the compensation capacitor C1 is connected to the ground terminal GND via the fourth switch N1, and the plate voltage KICKD of the second terminal of the compensation capacitor C1 discharges from the predetermined voltage to 0, as... Figure 5 As shown.

[0065] exist Figure 3 In the embodiment shown, the capability of the fourth switch N1 is, for example, less than that of the fifth switch N2. Therefore, when the compensation capacitor C1 is discharged through the fourth switch N1, the discharge process is slow and has little impact on the output voltage VP.

[0066] This invention provides a compensation circuit, a charge pump, and an electronic device for a memory charge pump. The compensation circuit is connected to the output terminal of the charge pump circuit via a compensation capacitor. When the load power consumption jumps, it pulls one plate of the compensation capacitor to a predetermined voltage. Utilizing the characteristic that the voltage across the capacitor cannot change abruptly, the output voltage of the charge pump circuit rises rapidly, thereby compensating for jumps in load power consumption. Specifically, when the system detects an impending high-power operation, the compensation circuit preemptively acts before the feedback loop in the charge pump circuit responds, instantly raising one plate of the compensation capacitor to the predetermined voltage. The voltage difference across the capacitor is forced to remain constant, compelling an equal amount of charge to be injected into the output terminal. This cancels out the charge drawn by the load within nanoseconds, significantly suppressing the drop in the output voltage of the charge pump circuit. Therefore, the charge pump circuit does not need to be designed for high power consumption; the compensation circuit can compensate for the high power required during word line switching, thus enabling a small-area charge pump to achieve instantaneous high power consumption.

[0067] Furthermore, since the entire compensation process does not rely on increasing the switching frequency of the charge pump circuit itself, nor does it require increasing the compensation capacitor capacity, it avoids the efficiency reduction and chip area expansion problems caused by traditional solutions.

[0068] Furthermore, in the compensation circuit, the second terminal of the compensation capacitor is connected to two pull-up units and one pull-down unit. The two pull-up units are determined by the high-voltage signal characterizing the power supply voltage and the first trigger signal, so that the amount of charge injected under different power supply voltages is automatically adjusted, avoiding the problems of overcompensation for high voltage and undercompensation for low voltage. In addition, the pull-down unit pulls the voltage of the second terminal of the compensation capacitor down to the ground potential when compensation is not required, ensuring that the lower plate of the compensation capacitor is not floating, reducing the risk of leakage current, and preparing for the next compensation.

[0069] As described above, these embodiments of the present invention do not exhaustively cover all details, nor do they limit the invention to the specific embodiments described. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to effectively utilize the invention and its modifications. The invention is limited only by the claims and their full scope and equivalents.

Claims

1. A compensation circuit for a charge pump, for selectively compensating an output voltage of a charge pump circuit, the compensation circuit comprising: a compensation capacitor, a first end of which is connected to an output terminal of the charge pump circuit; a control unit, which receives a first trigger signal and generates a second trigger signal and a third trigger signal; a first pull-up unit, which is connected to the control unit and a second end of the compensation capacitor, and selectively drives the second end of the compensation capacitor to a predetermined voltage according to the third trigger signal; a pull-down unit, which is connected to the control unit and the second end of the compensation capacitor, and selectively drives the second end of the compensation capacitor to a ground voltage according to the second trigger signal, wherein the second end of the compensation capacitor is driven to the predetermined voltage when a load power consumption step occurs.

2. The compensation circuit of claim 1, wherein, Further comprising: a second pull-up unit, which is connected to the control unit and the second end of the compensation capacitor, and the control unit further generates a fourth trigger signal according to the first trigger signal, and the second pull-up unit selectively drives the second end of the compensation capacitor to the predetermined voltage according to the fourth trigger signal.

3. The compensation circuit of claim 2, wherein, The second end of the compensation capacitor is driven to the predetermined voltage via the first pull-up unit or the second pull-up unit when the load power consumption step occurs.

4. The compensation circuit of claim 3, wherein, The predetermined voltage comprises a first voltage and a second voltage; The second end of the compensation capacitor is driven to the first voltage via the first pull-up unit, or the second end of the compensation capacitor is driven to the second voltage via the second pull-up unit; The first voltage is equal to a difference between a power supply voltage and a transistor threshold voltage, and the second voltage is equal to the power supply voltage.

5. The compensation circuit of claim 3, wherein, The control unit comprises: a first inverter, a first end of which receives the first trigger signal, and a second end of which outputs the second trigger signal, the first trigger signal and the second trigger signal being inverse signals of each other; a second inverter, a first end of which receives a high voltage signal; a first logic gate, a first end of which is connected to the first end of the first inverter, a second end of which receives the high voltage signal, and a third end of which outputs the third trigger signal; a second logic gate, a first end of which is connected to the first end of the first inverter, a second end of which is connected to a second end of the second inverter, and a third end of which outputs the fourth trigger signal.

6. The compensation circuit of claim 5, wherein, The first logic gate and the second logic gate are NAND gates.

7. The compensation circuit of claim 5, wherein, The first pull-up unit comprises: a first switch tube, a first end of which is connected to a power supply voltage, and a control end of which is connected to the third end of the first logic gate; a second switch tube, a first end of which is connected to a second end of the first switch tube, and a second end of which is connected to the control end.

8. The compensation circuit of claim 7, wherein, The second pull-up unit comprises: a third switch tube, a first end of which is connected to the power supply voltage, a second end of which is connected to the second end of the second switch tube, and a control end of which is connected to the third end of the second logic gate.

9. The compensation circuit of claim 8, wherein, The first switch tube and the third switch tube are P-type switch tubes, and the second switch tube is one of a P-type switch tube and an N-type switch tube.

10. The compensation circuit of claim 9, wherein, The pull-down unit comprises: a fourth switch tube, a first end of the fourth switch tube is connected with a second end of the second switch tube, a second end is connected with a ground end, and a control end is connected with a second end of the first inverter; a fifth switch tube, a first end of the fifth switch tube is connected with a second end of the third switch tube, a second end is connected with a ground end, and a control end receives a control signal.

11. The compensation circuit of claim 10, wherein, The fourth switch tube and the fifth switch tube are N-type switch tubes.

12. The compensation circuit of claim 10, wherein, The second end of the compensation capacitor is selectively driven to the ground end via the fourth switch tube and / or the fifth switch tube.

13. The compensation circuit of claim 1, wherein, The first trigger signal and the second trigger signal are reverse signals of each other.

14. A charge pump, wherein, The compensation circuit comprises: a charge pump circuit for generating an output voltage; The compensation circuit according to any one of claims 1-13, connected with the charge pump circuit, for selectively compensating the output voltage of the charge pump circuit.

15. An electronic device, comprising: The compensation circuit comprises: a memory and the charge pump according to claim 14.

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