Semiconductor device

Abstract

According to one embodiment, a semiconductor device includes: a first terminal and a second terminal; a first conductive member electrically connected to the first terminal; a semiconductor chip disposed on the first conductive member; a second conductive member disposed on the semiconductor chip and electrically connected to the second terminal; a first insulator disposed on the second conductive member and covering the semiconductor chip; a conductive plate disposed on at least a portion of the first insulator; and a post electrically connected to the conductive plate and extending along a side surface of the first insulator.

Description

[0001] Cross-references to related applications

[0002] This application is based on and claims priority to Japanese Patent Application No. 2024-141760, filed on August 23, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The embodiments described herein generally relate to a semiconductor device. Background Technology

[0004] In some semiconductor packages, metal plates are placed on the top and bottom surfaces to improve heat dissipation. Additionally, magnetic shielding plates can be placed between multiple chips to reduce mutual inductance between the multiple current paths flowing into the semiconductor package. Summary of the Invention

[0005] The embodiment provides a semiconductor device with improved switching performance.

[0006] One embodiment provides a semiconductor device including: a first terminal and a second terminal; a first conductive member electrically connected to the first terminal; a semiconductor chip disposed on the first conductive member; a second conductive member disposed on the semiconductor chip and electrically connected to the second terminal; a first insulator disposed on the second conductive member and covering the semiconductor chip; a conductive plate disposed on at least a portion of the first insulator; and a post electrically connected to the conductive plate and extending along a side surface of the first insulator.

[0007] Furthermore, one embodiment provides a semiconductor device comprising: a first conductive member; a semiconductor chip disposed on the first conductive member; a second conductive member disposed on the semiconductor chip; a first insulator disposed on the second conductive member and covering the semiconductor chip; a conductive plate disposed on the first insulator and having at least a portion facing the second conductive member in a first direction; a conductive base that can be used as a terminal for external connection; and a conductive layer electrically connecting the conductive plate and the conductive base.

[0008] Furthermore, one embodiment provides a semiconductor device including: a first terminal and a second terminal; a first conductive member electrically connected to the first terminal; a semiconductor chip disposed on the first conductive member; a second conductive member disposed on the semiconductor chip and electrically connected to the second terminal; a first insulator disposed on the second conductive member and covering the semiconductor chip; and a conductive plate disposed on at least a portion of the first insulator, wherein the first insulator is directly connected to the interface between the second conductive member and the conductive plate. Attached Figure Description

[0009] Figure 1 This is a perspective view of a semiconductor device according to the first embodiment.

[0010] Figure 2 This is a top view of the semiconductor device according to the first embodiment.

[0011] Figure 3 This is a top view of the semiconductor device according to the first embodiment.

[0012] Figure 4 The semiconductor device according to the first embodiment is along Figure 1-3 The cross-sectional view taken by line A1-A2 is shown in the figure.

[0013] Figure 5A The semiconductor device according to the first embodiment is along Figure 1-3 The cross-sectional view taken by line B1-B2 is shown in the figure.

[0014] Figure 5B This is another example of the semiconductor device according to the first embodiment. Figure 1-3 The cross-sectional view taken by line B1-B2 is shown.

[0015] Figure 6A The semiconductor device according to the first embodiment is along Figure 1-3 The cross-sectional view taken by line C1-C2 is shown in the figure.

[0016] Figure 6B This is another example of the semiconductor device according to the first embodiment. Figure 1-3 The cross-sectional view shown is taken along line C1-C2, which... Figure 1 The line C1-C2 shown is cut off.

[0017] Figure 7 This is a cross-sectional view of a semiconductor device according to a first variant of the first embodiment.

[0018] Figure 8 This is a perspective view of a semiconductor device according to a second variation of the first embodiment.

[0019] Figure 9 This is a perspective view of a semiconductor device according to a third variation of the first embodiment.

[0020] Figure 10 This is a perspective view of a semiconductor device according to the second embodiment.

[0021] Figure 11 The semiconductor device according to the second embodiment is along Figure 10 The cross-sectional view taken by line D1-D2 is shown.

[0022] Figure 12 This is a cross-sectional view of the semiconductor device according to the second embodiment.

[0023] Figure 13 This is a perspective view of a semiconductor device according to a third embodiment.

[0024] Figure 14 This is a circuit diagram of the semiconductor device according to the third embodiment.

[0025] Figure 15 This is a top view of the semiconductor device according to the third embodiment. Detailed Implementation

[0026] The embodiment provides a semiconductor device with improved switching performance.

[0027] In general, according to one embodiment, a semiconductor device includes: a first terminal and a second terminal; a first conductive member electrically connected to the first terminal; a semiconductor chip disposed on the first conductive member; a second conductive member disposed on the semiconductor chip and electrically connected to the second terminal; a first insulator disposed on the second conductive member and covering the semiconductor chip; a conductive plate disposed on at least a portion of the first insulator; and a post electrically connected to the conductive plate and extending along a side surface of the first insulator.

[0028] According to another embodiment, a semiconductor device includes: a first conductive member; a semiconductor chip disposed on the first conductive member; a second conductive member disposed on the semiconductor chip; a first insulator disposed on the second conductive member and covering the semiconductor chip; a conductive plate disposed on the first insulator and having at least a portion facing the second region in a first direction; a conductive base that can be used as a terminal for external connection; and a conductive layer electrically connecting the conductive plate and the conductive base.

[0029] According to another embodiment, a semiconductor device includes: a first terminal and a second terminal; a first conductive member electrically connected to the first terminal; a semiconductor chip disposed on the first conductive member; a second conductive member disposed on the semiconductor chip and electrically connected to the second terminal; a first insulator disposed on the second conductive member and covering the semiconductor chip; and a conductive plate disposed on at least a portion of the first insulator, wherein the first insulator is directly connected to the interface between the second conductive member and the conductive plate.

[0030] Embodiments of this disclosure will now be described with reference to the accompanying drawings.

[0031] It should be noted that the accompanying drawings are schematic or conceptual, and the relationships between the thicknesses and widths of the parts, as well as the dimensional proportions between the parts, may not necessarily be the same as in reality. Furthermore, even for the same part, its dimensions or proportions may differ depending on the accompanying drawings.

[0032] It should be noted that in the specification and drawings of this application, the same elements as those described in the above drawings are given the same reference numerals and symbols. Therefore, detailed descriptions will be omitted as appropriate.

[0033] The direction from the first conductive member 20 to the semiconductor chip 40 is defined as the Z direction (hereinafter referred to as the first direction). In addition, the direction orthogonal to the Z direction is defined as the X direction (hereinafter referred to as the second direction), and the direction intersecting the X and Z directions is defined as the Y direction (hereinafter referred to as the third direction). Figure 2 The semiconductor device 100 shown is illustrated as a cross-sectional view in the XZ plane. In this embodiment, the X, Y, and Z directions are shown as orthogonal, but these directions are not limited to orthogonality and may intersect each other in a non-orthogonal manner. Furthermore, for ease of explanation, the positive direction of the Z direction is referred to as "up," and the negative direction of the Z direction is referred to as "down." However, the "up" and "down" directions are not limited to the direction of gravity or the orientation in which the semiconductor device is mounted.

[0034] First Embodiment

[0035] Figure 1 A perspective view of a semiconductor device 100 according to a first embodiment is shown. The semiconductor device 100 has a first insulator 10, a first terminal p1 protruding from the first insulator 10, a conductive plate 50 disposed on the first insulator 10, and a post 52 connected to the conductive plate 50. The semiconductor device 100 is, for example, a surface mount device (SMD) package.

[0036] The first insulator 10 will Figure 1 The semiconductor chip 40, not shown, is encapsulated. The first insulator 10 is made of, for example, resin. The first insulator 10 has a side surface 10w, which is a surface intersecting the X or Y direction. Figure 1 An example is shown in which the first insulator 10 has a total of four side surfaces 10w in the positive and negative directions of the X direction and the positive and negative directions of the Y direction.

[0037] The first terminal p1 protrudes from the first insulator 10 on the side surface 10w, thereby realizing the electrical connection between the external circuit and the semiconductor device 100. The first terminal p1 protrudes from the first insulator 10 on the side surface 10w in the negative direction of the Y direction. The first terminal p1 is one of the external terminals of the semiconductor device 100. It should be noted that the semiconductor device 100 may also have Figure 1 External terminals not shown.

[0038] A conductive plate 50 is disposed on the first insulator 10. The conductive plate 50 may be disposed on at least a portion of the first insulator 10. The conductive plate 50 preferably comprises a material having high electrical and thermal conductivity. Reference will be made below. Figure 3 This describes an expected example of the placement of the conductive plate 50.

[0039] The post 52 and the conductive plate 50 are continuous. For example, the post 52 and the conductive plate 50 are integrally formed. The conductive plate 50 may be at least electrically or thermally connected to the post 52. The post 52 has a portion extending in the Z direction. The post 52 extends in the Z direction along the side surface 10w of the first insulator 10. The post 52 may be separate from the first insulator 10 in the X direction, or may be in contact with at least a portion of the first insulator 10. Preferably, the post 52 traverses the side surface 10w of the first insulator 10 in the Z direction. Here, A traversing B in the Z direction means that A extends from the end of B in the positive direction of the Z direction to the end of B in the negative direction of the Z direction.

[0040] On the side of post 52 opposite to conductive plate 50, a base 54 continuous with post 52 may be further provided. Base 54 extends, for example, along a plane intersecting the Z direction (here, the XY plane). Base 54 can be used as a terminal to connect, for example, conductive plate 50 and post 52 to an external circuit.

[0041] First terminal p1 (and Figure 2 The first terminal p1 and the second terminal p2 or the third terminal p3 (shown later) are disposed on the side surface 10w located on the positive or negative side in the Y direction. Meanwhile, the post 52 and the base 54 are disposed on the side surface 10w located on the positive or negative side in the X direction. To prevent the first terminal p1 and the base 54 from interfering with each other (e.g., contacting each other) and to prevent short circuits, it is preferable to dispose of the post 52 on a side surface 10w different from the side surface 10w where the first terminal p1 or the second terminal p2 and the third terminal p3 are disposed, as referred to below. Figure 2 Furthermore, for example, the post 52 and the base 54 are spaced apart from the side surface 10w where the first terminal p1 is disposed in the positive Y direction. In other words, the post 52 is connected to the conductive plate 50 at a position offset from the corner portion of the conductive plate 50 in the XY plane along the Y direction. The first terminal p1 is spaced apart from the post 52 and the base 54 in the Y direction. Therefore, the first terminal p1 can be more reliably electrically insulated from the post 52 and the base 54.

[0042] Figure 1 An example is shown with four pillars 52 and four bases 54, but the number of pillars 52 and bases 54 is not limited thereto. Regarding the placement of the pillars 52, Figure 1An example is shown where the post 52 is located near a corner of the semiconductor device 100, but the location is not limited thereto. To further ensure insulation from the first terminal p1, etc., the post 52 may be further spaced from the first terminal p1. Furthermore, at least some of the plurality of posts 52 and the plurality of bases 54 may be replaced, for example, with wires.

[0043] Figure 2 This is a top view of the semiconductor device 100 according to this embodiment.

[0044] Figure 1 The first terminal p1, also shown, is located on the negative side in the Y direction. Meanwhile, the second terminal p2 is located on the positive side in the Y direction. Furthermore, the third terminal p3 is located on the same side as the second terminal p2. The semiconductor device 100 includes, for example, a metal-oxide-semiconductor field-effect transistor (MOSFET) within its package. The first terminal p1 is, for example, a drain terminal, the second terminal p2 is, for example, a source terminal, and the third terminal p3 is, for example, a gate terminal.

[0045] exist Figure 2 In this configuration, the first insulator 10 is not shown because it is located below the conductive plate 50. The conductive plate 50 and the first insulator 10 may at least partially overlap each other in the Z direction. For example, the side surface 50w of the conductive plate 50 and the side surface 10w of the first insulator 10 may partially overlap each other in the Z direction. The side surface 50w is exposed outside the first insulator 10. Figure 2 In this configuration, the side surface 10w of the first insulator 10 is disposed between the post 52 and the conductive plate 50, for example, at the position shown by the dashed line. That is, the post 52 protrudes from the side surface 10w of the first insulator 10 toward either the positive or negative side in the X direction.

[0046] Figure 3 This is a top view of the semiconductor device 100 of this embodiment. Here, the first insulator 10, conductive plate 50, pillar 52, and base 54 are shown in a transparent manner (the conductive plate 50, pillar 52, and base 54 are shown as areas surrounded by dashed lines). That is, Figure 3 It shows in Figure 1 and Figure 2 The semiconductor chip 40 and conductive components are covered by the first insulator 10.

[0047] The first conductive member 20 is continuous with the first terminal p1. The first conductive member 20 is, for example, a metal member such as a chip pad. A semiconductor chip 40 is disposed on the first conductive member 20, and a second conductive member 22 is also disposed on the semiconductor chip 40.

[0048] The second conductive member 22 is connected to the second terminal p2 and has a first region 22a and a second region 22b. The first region 22a is the region that overlaps with the semiconductor chip 40 in the Z direction. The second region 22b is disposed between the first region 22a and the second terminal p2. It should be noted that the second region 22b and the second terminal p2 may be provided with the following description. Figure 5A and Figure 5B The structure shown, and the area between the second region 22b and the second terminal p2 may not always be integrally formed.

[0049] The semiconductor chip 40 includes a transistor, such as a MOSFET, and the gate pad of the semiconductor chip 40 is connected to, for example, a third terminal p3. A third conductive member 24 is disposed on the semiconductor chip 40. The third conductive member 24 has a first region 24a and a second region 24b. The first region 24a overlaps with the semiconductor chip 40 in the Z direction. The second region 24b is disposed between the first region 24a and the third terminal p3.

[0050] The first terminal p1 and the first conductive member 20 have, for example, the same potential as the drain potential. The second terminal p2 and the second conductive member 22 have, for example, the same potential as the source potential. The third terminal p3 and the third conductive member 24 have, for example, the same potential as the gate potential.

[0051] In addition, Figure 3 The so-called drain-bottom structure is described in the following description. In this structure, the second terminal p2 and the third terminal p3 (e.g., the source terminal and the gate terminal) are connected to electrodes on the upper surface of the semiconductor chip 40. However, this disclosure can also be applied to a source-bottom structure.

[0052] Figure 4 For along the passage Figures 1 to 3 The cross-sectional view of the XZ plane of line A1-A2 shown.

[0053] A semiconductor chip 40 is disposed on a first conductive member 20, and a bonding member 32 is disposed between the two. A first region 22a of a second conductive member 22 is disposed on the semiconductor chip 40, and a bonding member 34 is disposed between the two.

[0054] Semiconductor chip 40 has electrodes on its upper and lower surfaces, respectively. Semiconductor chip 40 includes, for example, a MOSFET. Semiconductor chip 40 has a source electrode and a gate pad separate from the source electrode on its upper surface, and a drain electrode on its lower surface. For example, a first conductive member 20 is electrically connected to the drain electrode of semiconductor chip 40. For example, a second conductive member 22 is electrically connected to the source electrode of semiconductor chip 40.

[0055] The first insulator 10 covers the semiconductor chip 40. In other words, the first insulator 10 encapsulates the semiconductor chip 40. The first insulator 10 is disposed on the second conductive member 22, and the conductive plate 50 is disposed on the first insulator 10.

[0056] The conductive plate 50 may be longer than the second conductive member 22 in the X direction, for example. Furthermore, the conductive plate 50 may be longer than the first conductive member 20 in the X direction.

[0057] Figure 4 An example is shown in which the side surface 10w of the first insulator 10 and the side surface 50w of the conductive plate 50 at least partially overlap each other in the Z direction. However, the conductive plate 50 may be smaller than the first insulator 10 in the XY plane and may partially protrude from the first insulator 10.

[0058] Figure 5A and 5B For along the passage Figure 1 and 2 The cross-sectional view of the line B1-B2 taken by the XZ plane is shown.

[0059] First of all Figure 5A Describe it. Figure 5A yes Figure 4 The example shown is a cross-sectional view taken along the XZ plane passing through line B1-B2.

[0060] A semiconductor chip 40 is disposed on a first conductive member 20. A bonding member 32 is located between the first conductive member 20 and the semiconductor chip 40. A first region 22a of a second conductive member 22 faces the semiconductor chip 40 in the Z direction. A bonding member 34 is located between the semiconductor chip 40 and the first region 22a. A second region 22b of the second conductive member 22 is located between the first region 22a and the second terminal p2. The second conductive member 22 connects the second terminal p2 to the semiconductor chip 40. Furthermore, an end region p2A is provided between the second region 22b and the second terminal p2, which is continuous with the second terminal p2 and contacts the first insulator 10. The second terminal p2 and the end region p2A are, for example, leads (e.g., plate-shaped metal parts) and may comprise the same material as the first terminal p1 and the first conductive member 20.

[0061] A first insulator 10 covers the semiconductor chip 40 and is disposed at least on the second conductive member 22. The first insulator 10 is disposed on a first region 22a and a second region 22b of the second conductive member 22.

[0062] For example, the first region 22a and the second region 22b are formed as a single unit. Figure 5AAs shown, a connecting member 36 is inserted between the second region 22b and the end region p2A. However, the second region 22b and the end region p2A can be formed integrally.

[0063] The conductive plate 50 is longer than the second conductive member 22 in the Y direction, for example. The conductive plate 50 overlaps with the first region 22a and the second region 22b of the second conductive member 22 in the Z direction. Furthermore, the conductive plate 50 is longer than the second conductive member 22 in the X direction.

[0064] Next, regarding Figure 4 and Figure 5A The examples shown have different configurations. Figure 5B Describe it. Figure 5B The cross-sectional direction shown is the same as Figure 5A They are in the same direction. Figure 5B The configuration of the second conductive member 22 and Figure 4 and Figure 5A The configuration differs. The second conductive member 22 has a first region 22a connected to the semiconductor chip 40 and a second region 22b located between the first region 22a and the second terminal p2. The second region 22b is, for example, a wire formed by bonding. The wire includes circular wires and flat wires (also called strips). The first region 22a is, for example, electrically connected to a source electrode on the upper surface of the semiconductor chip 40. The wire is made of, for example, a conductive material, and its cross-section orthogonal to the extension direction has a circular shape. The strip is, for example, made of a conductive material, and its cross-section orthogonal to the extension direction has an elliptical or oval shape.

[0065] The end region p2A is continuous with the second terminal p2. For example, the second region 22b is a wire, one end of which is bonded to the semiconductor chip 40 and the other end of which is bonded to the end region p2A.

[0066] like Figure 5A and 5B As shown, the structure for connecting the second terminal p2 to the semiconductor chip 40 can employ a pre-formed plate-like metal component, and may also include bonding wires or strips. Here, "plate-like" refers to a shape whose length dimension in the Z direction (also referred to herein as thickness) is smaller than its length dimensions in the X and Y directions. The plate-like metal component may be pre-bent or otherwise subjected to other treatments, and is disposed on the semiconductor chip 40 via bonding member 34. From a heat dissipation perspective, it is preferable to use a plate-like metal component that allows current to flow over a wider area. On the other hand, similar to wires or strips, the shape of the second conductive member 22 can be determined by the bonding between the semiconductor chip 40 and the second terminal p2.

[0067] Next, refer to Figure 5A and 5BThe positional relationship between the conductive plate 50 and the second conductive member 22 will be described. Figure 5A An example of a conductive plate 50 disposed on the front surface of a first insulator 10 is shown. However, the conductive plate 50 may be disposed on at least a portion of the first insulator 10.

[0068] The conductive plate 50 is disposed where at least a portion overlaps with the second region 22b in the Z direction. In other words, at least a portion of the conductive plate 50 faces the second region 22b in the Z direction, with the first insulator 10 positioned between them. Furthermore, it is preferable that at least a portion of the conductive plate 50 faces the first region 22a in the Z direction, with the first insulator 10 positioned between them. Preferably, the area where the conductive plate 50 and the second conductive member 22 are opposite each other and the first insulator 10 is inserted in the middle is relatively large.

[0069] Figure 5A and 5B In both cases, the desired positional relationship between the conductive plate 50 and the second conductive member 22 is the same. Figure 5A and 5B In both cases, the electrical signal transmitted between the semiconductor chip 40 and the second terminal p2 passes through the second region 22b of the second conductive member 22. To improve switching performance, the conductive plate 50 preferably overlaps with the current path passing through the second region 22b in the Z direction, as described later.

[0070] Figure 6A and 6B It is along the passage Figures 1 to 3 The cross-sectional view of the XZ plane of line C1-C2 shown. Figure 6A and 6B The structure between the first insulator 10 and the conductive plate 50 and the post 52 is shown.

[0071] Figure 6A An example is shown where an adhesive portion 60 is provided between the first insulator 10 and the conductive plate 50. The adhesive portion 60 contacts the first insulator 10 and the conductive plate 50, and fixes the position of the conductive plate 50 and the post 52 relative to the first insulator 10. That is, misalignment of the conductive plate 50 and the post 52 with the first insulator 10 is avoided. The adhesive portion 60 is preferably provided in at least a portion of the space between the first insulator 10 and the conductive plate 50.

[0072] like Figure 6A As shown, the first insulator 10 can be in direct contact with the post 52. Although Figure 6A Not shown, but a gap may be provided between the first insulator 10 and the post 52. Figure 6B Alternatively, a gap can be provided between the first insulator 10 and the post 52.

[0073] Figure 6B An example of another structure that prevents misalignment between the conductive plate 50 and the post 52 and the first insulator 10 is shown. The post 52 has a protrusion 50p that protrudes from the surface of the post 52 near the first insulator 10 in the negative X direction. A recess 10c is provided on the side surface 10w of the first insulator 10 at a position corresponding to the protrusion 50p. That is, the protrusion 10p of the post 52 is adapted to the recess 10c of the first insulator 10.

[0074] Figure 6B An example is shown where the first insulator 10 has a recess 10c and the post 52 has a protrusion 10p. However, the first insulator 10 may also have a protrusion and the post 52 may have a recess. Furthermore, the configuration in which the recess is provided in the post 52 may also include a structure having a hole extending through the post 52 in the X direction.

[0075] Figure 6A and 6B Both structures shown prevent misalignment between the conductive plate 50 and the post 52 and the first insulator 10.

[0076] Exemplary materials for the components will be described below.

[0077] The first insulator 10 is, for example, a sealing resin containing epoxy resin.

[0078] The first conductive member 20 is made of metal, such as a Cu-containing alloy. The second conductive member 22 is made of metal, such as a Cu-containing alloy.

[0079] The conductive plate 50 is made of metal, such as a Cu-containing alloy.

[0080] The semiconductor chip includes a semiconductor substrate containing at least one element selected from, for example, Si, SiC, C, GaAs, and Ge.

[0081] The joining components 32, 34 and 36 include, for example, solder.

[0082] The adhesive portion 60 may contain, for example, a silicone-based adhesive. The silicone-based adhesive is a silicone-containing adhesive.

[0083] Refer again Figure 5A The operation of semiconductor device 100 will be described.

[0084] An example of an electrical signal being transmitted from the first terminal p1 to the second terminal p2 will be described. However, the direction of signal transmission is not limited to this. Furthermore, an example of a semiconductor chip 40 including a MOSFET will be described. However, the type of semiconductor chip 40 is not limited to a MOSFET.

[0085] An electrical signal is input to an electrode disposed on the lower surface of the semiconductor chip 40 through the first terminal p1 and the first conductive member 20. For example, the drain electrode of the MOSFET is disposed on the lower surface of the semiconductor chip 40. Simultaneously, a control signal is applied to... Figure 3 The potential on the third terminal p3 shown is used to control the potential of the gate electrode of the MOSFET in the semiconductor chip 40.

[0086] If the potential of the gate electrode of the MOSFET in semiconductor chip 40 is greater than a threshold voltage, then semiconductor chip 40 outputs an electrical signal from the source electrode disposed on the upper surface. (Refer to...) Figure 5A The output electrical signal is transmitted to the first region 22a of the second conductive member 22, and then transmitted from the second terminal p2 to the external circuit through the second region 22b.

[0087] Reference Figure 5A An example of the flow of an electrical signal when it is an electric current will be described. First, the current flows in the positive Y direction from the first terminal p1 to the first conductive member 20. Further, the current flows in the positive Z direction through the semiconductor chip 40 from the first conductive member 20 to the first region 22a of the second conductive member. The current flows in the positive Y direction from the first region 22a to the second region 22b (the second conductive member 22 is curved, and therefore may include a portion of the current flowing in the Z direction). The current flows from the second region 22b to the second terminal p2.

[0088] For example, as described above, a current path is formed from the first terminal p1 to the second terminal p2. Figure 5A The cross-section shown continues in the X direction with the same cross-sectional structure. Therefore, it can be considered that, except for Figure 5A Outside the YZ plane shown, a current path flowing from the first terminal p1 to the second terminal p2 also exists in the X direction. Here, the current path is not necessarily the actual path through which the current flows, but also includes virtual current paths through which the current may flow. Furthermore, multiple current paths exist within the semiconductor device 100, such as the wiring inside the semiconductor chip 40 and... Figure 3 The current path through the third terminal p3 is shown.

[0089] As is well known, multiple current paths can induce mutual electromotive force (EMF) through the magnetic field generated by the current. When a switching device or similar device generates an induced EMF, causing the current to change over time, the current may begin to flow in a virtual current path.

[0090] In the current path from the first terminal p1 to the second terminal p2, a mutual induced electromotive force (EMF) is generated between multiple current paths arranged in the YZ plane and the X direction. For convenience, two of the multiple current paths located between the first terminal p1 and the second terminal p2 are referred to as the first path I1 and the second path I2 (not shown in the figure). A mutual induced EMF is then generated between the first path I1 and the second path I2. That is, for example, when the semiconductor device 100 is turned off, the current flowing through the first path I1 may decrease. In this case, the magnetic field generated by the current flowing through the first path I1 decreases. Then, the second path I2 induces an EMF in the direction of increasing current to reduce the change of the magnetic field over time. The faster the current flowing through the first path I1 decreases, the greater the induced EMF generated in the second path I2. The same relationship holds even when the first path I1 and the second path I2 are interchanged. Furthermore, a mutual induced EMF may also be generated when the semiconductor device 100 is turned on.

[0091] In other words, when a semiconductor device is turned off (or on), an induced electromotive force (EMF) is generated in the direction of decreasing or increasing current in response to the corresponding on or off operation, and the voltage waveform during switching may oscillate. Generally speaking, the larger the induced EMF (mutual inductance) generated between multiple current paths, the greater the likelihood of an induced EMF being generated when the semiconductor device switches. Therefore, there is a concern about the degradation of switching performance caused by voltage waveform oscillations.

[0092] In the semiconductor device 100 according to this embodiment, the induced electromotive force during switching avoids voltage waveform oscillations. Therefore, a semiconductor device with improved switching performance can be provided. The semiconductor device 100 has a conductive plate 50, and current flows in the conductive plate 50 in the direction that the magnetic field decreases over time during switching. With this configuration, oscillations during switching can be reduced by decreasing the induced electromotive force generated between the multiple current paths between the first terminal p1 and the second terminal p2 (reducing mutual inductance). By reducing voltage waveform oscillations, stable switching operation can be performed. Therefore, even with an increase in the switching frequency, the desired switching characteristics can be maintained.

[0093] Reference Figure 5A The use of conductive plate 50 to reduce the effects of magnetic field changes during switching will be described. A portion of the current path between the first terminal p1 and the second terminal p2 will be described, wherein current flows through the first region 22a and the second region 22b. For example, the case where current flows from the first region 22a to the second region 22b is considered.

[0094] The current flowing from the first region 22a to the second region 22b generates a vortex-shaped magnetic field around the current. Since the current changes with time during switching, the magnetic field generated around the current also changes with time, and an induced electromotive force (EMF) is generated in the surrounding current path. In this embodiment, it is assumed that a virtual closed circuit exists in the conductive plate 50. Due to the change in the magnetic field penetrating the closed circuit along the Z direction with time, an induced EMF is also generated in the closed circuit. That is, eddy currents are generated in the closed circuit of the conductive plate 50 along the direction in which the magnetic field decreases with time. Furthermore, the current flowing into the conductive plate 50 also generates a magnetic field. The magnetic field generated by the current flowing into the conductive plate 50 is generated in the direction in which the magnetic field decreases with time. Therefore, since the magnetic field decreases with time, the induced EMF between the current paths from the first region 22a to the second region 22b can be reduced. By providing the conductive plate 50, oscillations during switching can be reduced.

[0095] For example, the induced electromotive force between current paths flowing along the XY plane is mainly generated by the change of the magnetic field in the Z direction over time. This is because the magnetic field penetrating a closed circuit in the XY plane has a directional component along the Z direction. When eddy currents are generated in the conductive plate 50, these eddy currents generate a magnetic field in the Z direction. Depending on the direction of rotation of the eddy currents, the magnetic field is located in either the positive or negative Z direction. That is, by generating eddy currents in the XY plane of the conductive plate 50, a magnetic field can be generated in a direction where the change of the magnetic field along the Z direction decreases over time. It is effective to provide the conductive plate 50 along the XY plane to reduce the induced electromotive force between current paths flowing along the XY plane, as is the case with the semiconductor device 100 according to this embodiment.

[0096] It should be noted that the current generated in the conductive plate 50 is not limited to the eddy currents described above. For example, the conductive plate 50 can generate eddy currents through... Figure 1 The pillar 52 and base 54 shown are connected to an external circuit. Therefore, current can flow between the conductive plate 50 and the external circuit.

[0097] The conductive plate 50 overlaps at least partially with the first region 22a or the second region 22b in the Z direction. Therefore, the time-varying magnetic field generated by the current flowing through the first region 22a or the second region 22b can be reduced.

[0098] For example, when the semiconductor device 100 is mounted on a substrate, the first conductive member 20 is at least partially in contact with the substrate. The change in the magnetic field generated by the current flowing through the first conductive member 20 over time can be reduced by wiring provided within the substrate.

[0099] On the other hand, the current flowing through the second conductive member 22 flows along a current path separated from the substrate in the positive direction of the Z direction. Therefore, the effect of the substrate in reducing the change of the magnetic field over time may be less than the effect of the first conductive member 20. In the semiconductor device 100 according to this embodiment, the change of the magnetic field of the current flowing through the second conductive member 22 over time can be reduced by using a conductive plate 50 disposed on the first insulator 10 and electrically insulated from the second conductive member 22.

[0100] In the semiconductor device 100 according to this embodiment, the conductive plate 50, the pillar 52, and the base 54 serve as pathways for heat flow. Therefore, localized overheating can be suppressed and the reliability of the semiconductor device can be improved. For example, the case where the semiconductor device 100 is mounted on a substrate or the like and the base 54 is in contact with the substrate or the like will be described.

[0101] The current density of the current flowing along the Z direction from the first conductive member 20 to the second conductive member 22 in the semiconductor chip 40 may differ between the central portion of the semiconductor chip 40 and the terminal base in the XY plane. For example, the current density at the central portion of the semiconductor chip 40 may be greater than the current density at the terminal base of the semiconductor chip 40. Therefore, the heat generated at the central portion may be greater than the heat generated at the terminal base.

[0102] The portion where the semiconductor chip 40 is located generates heat differently than other portions in the XY plane. The portion where the semiconductor chip 40 is located generates more heat than the portion where the semiconductor chip 40 is not located. That is, depending on the arrangement of the semiconductor chips 40 and the current density deviation inside the semiconductor chips 40, heat-generating regions with varying amounts of heat may be generated in the semiconductor device 100.

[0103] In the semiconductor device 100 according to this embodiment, the conductive plate 50, for example, contains a material with a higher thermal conductivity than the first insulator 10, thus heat tends to diffuse within the conductive plate 50. Therefore, even if the heat distribution within the semiconductor device 100 is uneven in the XY plane, the heat conducted to the conductive plate 50 will rapidly diffuse within it. This makes the heat generated in the XY plane more uniform. Furthermore, heat diffuses extensively within the conductive plate 50. Therefore, for example, the area of ​​the high-temperature portion in contact with the environment, including the surrounding atmosphere, is increased. This facilitates heat dissipation. Localized overheating of the semiconductor device 100 can be prevented, and its reliability is improved.

[0104] The conductive plate 50 can be thermally connected to an external circuit via the post 52 and the base 54. Since the external circuit acts as a heat sink, the heat diffused in the conductive plate 50 is further conducted to the outside of the semiconductor device 100. By preventing heat from accumulating in the conductive plate 50, the conductive plate 50 can further absorb heat from the first insulator 10.

[0105] In the semiconductor device 100 according to this embodiment, the conductive plate 50 can be electrically connected to an external circuit via the pillar 52 and the base 54. For example, in Figure 1 In this configuration, external circuitry can be connected to traverse the semiconductor device 100 from the negative side to the positive side in the X direction, or traverse the semiconductor device 100 in the opposite direction. That is, it can be connected to the semiconductor device 100 in the following order: circuitry on the positive side in the X direction, circuitry on the negative side in the X direction, base 54, pillar 52, conductive plate 50, pillar 52, and base 54. This allows for a shorter wiring layout around the semiconductor device 100.

[0106] For ease of comparison, assume that the semiconductor device does not have pillars 52 and base 54. In this case, for example, it would be necessary to provide wiring to bypass the semiconductor device 100, rather than passing through the semiconductor device 100 from the negative side to the positive side in the X direction or in the opposite direction. Therefore, it is necessary to provide a region for wiring to bypass the substrate on which the semiconductor device is mounted.

[0107] In the semiconductor device 100 according to this embodiment, the semiconductor device can be further integrated by shortening the wiring layout.

[0108] First variant of the first embodiment

[0109] Figure 7 A cross-sectional view of a semiconductor device 101 according to a first variant of the first embodiment is shown. It should be noted that... Figure 7 The cross-sectional view shown is along Figures 1 to 3 The cross-sectional views of lines B1-B2 shown are in the same position. Parts common to the semiconductor device 100 of the first embodiment will not be described again.

[0110] In the semiconductor device 101 according to this variant, the conductive plate 50 disposed on the first insulator 10 has a recess 50c. Furthermore, the first insulator 10 has a protrusion 10p at a position in the Z direction that overlaps with the recess 50c. The protrusion 10p is adapted to the recess 50c. It should be noted that the recess 50c can be a hole penetrating the conductive plate 50 in the Z direction. The protrusion 10p can have a rectangular or circular shape in the XY plane. For example, the protrusion 10p can be arranged in a dotted pattern in the XY plane. Alternatively, the protrusion 10p can extend in the Y direction and be arranged in a striped pattern in the XY plane.

[0111] In the semiconductor device 101 according to this variant, the conductive plate 50 can be easily and reliably aligned with the first insulator 10. When the conductive plate 50 is disposed on the first insulator 10 such that the protrusion 10p fits into the recess 50c, the misalignment between them can be reduced to a size smaller than the difference in size between the protrusion 10p and the recess 50c. For example, when the protrusion 10p and the recess 50c are designed to fit perfectly, misalignment between the conductive plate 50 and the first insulator 10 can be prevented, at least theoretically.

[0112] In the semiconductor device 101 according to this variant, it is not necessarily required to... Figure 6A and 6B The configuration shown reduces the misalignment between the conductive plate 50 and the first insulator 10. Therefore, for example, the arrangement in the first insulator 10 can be omitted. Figure 6A The adhesive portion 60 and the setting Figure 6B The process of the concave part 10c in the middle.

[0113] The shape of the 10p protrusion is not limited to Figure 7 The shape shown is ideal, but the protrusion 10p extends along the Z direction. For example, the first insulator 10 is formed by pouring the material forming the first insulator 10 into a mold and removing the first insulator 10 from the mold. With the protrusion 10p extending along the Z direction, the mold can be removed without jamming when removed along the Z direction. In other words, changing the shape of the mold in which the material forming the first insulator 10 is injected does not increase the number of steps required to form the protrusion 10p.

[0114] Second variant of the first embodiment

[0115] Figure 8 A perspective view of a second variant of the semiconductor device 102 according to the first embodiment is shown. Parts common to the semiconductor device 100 of the first embodiment will not be described again. Dashed lines indicate portions shielded by the first insulator 10 or the conductive plate 50.

[0116] In the semiconductor device 102 according to this variant, a groove 10g is provided on the side surface 10w of the first insulator 10, traversing the side surface 10w. Here, the groove 10g is defined, for example, with respect to the positive side of the side surface 10w located in the X direction, as described below. The groove 10g is the space located between the first insulator 10 and the YZ plane including the side surface 10w. The groove 10g preferably extends along the Z direction.

[0117] The recess 10g is indicated by the dashed line shown on the side surface 10w of the first insulator 10. A post 52 is disposed along the recess 10g. The post 52 is adapted to the recess 10g. That is, at least a portion of the post 52 is located further inside the semiconductor device 102 than the side surface 10w of the first insulator 10. The term "further inside the semiconductor device 102" refers, for example, to the semiconductor chip 40 closer to the semiconductor device 102.

[0118] In the semiconductor device 102 according to this variant, misalignment between the conductive plate 50 and the first insulator 10 is reduced by adapting the post 52 to the recess 10g. For example, in Figure 8 This avoids misalignment of the conductive plate 50 in the Y direction.

[0119] When the groove 10g is set along the Z direction, the first insulator 10 with the groove 10g can be formed by changing the shape of the mold used to form the first insulator 10. Therefore, it is not necessary to form the groove 10g by subsequently cutting the first insulator 10, and the manufacturing process can be shortened.

[0120] Third variant of the first embodiment

[0121] Figure 9 A perspective view of a semiconductor device 103 according to a third variation of the first embodiment is shown. Parts common to the semiconductor device 100 of the first embodiment will not be described again.

[0122] According to this variant, the pillar 52 of the semiconductor device 103 is formed such that the length of the pillar 52 in the Y direction is greater than its length in the Z direction. Figure 1 or Figure 8 In the column 52 shown, the length in the Z direction is greater than the length in the Y direction, but the shape of the column 52 is not limited to this.

[0123] like Figure 9 As shown, the base 54 has the same length as the column 52 in the Y direction. It should be noted that the length of the base 54 in the Y direction may also be different from that of the column 52.

[0124] In the semiconductor device 103 according to this variant, the switching performance of the semiconductor device can be further improved by further reducing the change of the magnetic field over time. Posts 52 are widely disposed on the side surface 10w of the first insulator 10. Therefore, the change of the magnetic field over time can be further reduced by the current flowing through the posts 52.

[0125] For example, with Figure 1 Compared to the column 52 shown, this variant has a longer column 52 in the Y direction. Therefore, the magnetic field penetrating the column 52 in the X direction is larger. In addition to the current induced in the conductive plate 50 due to the change in magnetic field, a larger current can also be induced in the column 52.

[0126] The post 52 intersects the conductive plate 50. For example, the post 52 is orthogonal to the conductive plate 50. Therefore, the direction of the magnetic field generated by the current flowing into the conductive plate 50 is different from the direction of the magnetic field generated by the current flowing into the post 52.

[0127] For example, eddy currents generated in the conductive plate 50 intersecting the Z direction can effectively reduce the induced electromotive force between current paths in the XY plane. On the other hand, eddy currents generated in, for example, the column 52 intersecting the X direction can effectively reduce the induced electromotive force between current paths in the YZ plane.

[0128] The current path flowing from the first terminal p1 to the second terminal p2 can have various shapes, and the direction of the resulting magnetic field can also be different. By simultaneously providing a conductive plate 50 intersecting the Z direction and a pillar 52 intersecting the X direction, the effect of reducing the change of the magnetic field of each internal structure of the semiconductor device over time can be enhanced.

[0129] In the semiconductor device 103 according to this variant, eddy currents and other currents may be induced in the pillar 52. Therefore, even assuming that the current path is in multiple directions, the switching performance of the semiconductor device can be improved.

[0130] Second Embodiment

[0131] Figure 10 A perspective view of a semiconductor device 200 according to a second embodiment is shown. Parts common to the semiconductor device 100 of the first embodiment will not be described again.

[0132] The semiconductor device 200 according to this embodiment also includes a second insulator 12 to cover the conductive plate 50 and the pillar 52. The second insulator 12 is made of, for example, resin. A base 54 protrudes from the second insulator 12 from its side surface 12w. Figure 10 As shown, the conductive plate 50 and the post 52, indicated by dashed lines, are covered by the second insulator 12.

[0133] Figure 11 It shows the passage Figure 10 The cross-sectional view of the XZ plane of line D1-D2 shown.

[0134] A conductive plate 50 is disposed on a first insulator 10, and a second insulator 12 is disposed on the conductive plate 50. The second insulator 12 is in contact with a side surface 50w of the conductive plate 50. The first insulator 10 and the second insulator 12 are formed continuously. However, in the insulators 10 and 12, the portion located in the negative direction of the Z-axis relative to the conductive plate 50 is considered the first insulating portion (insulator 10). The first insulator 10 and the second insulator 12, for example, comprise the same type of material.

[0135] Figure 12 It shows the passage Figure 10 The cross-sectional view of the YZ plane of line E1-E2 shown.

[0136] The conductive plate 50 preferably has the following characteristics: Figure 12 The hole 50h is shown. The hole 50h is filled with a second insulator 12 and contacts a first insulator 10 disposed below the conductive plate 50. That is, the second insulator 12 is continuous with the first insulator 10 through the hole 50h. The hole 50h can have a rectangular or circular shape in the XY plane. For example, the holes 50h are arranged in a dotted pattern in the XY plane. Alternatively, the holes 50h can extend along the Y direction and be arranged in a striped pattern in the XY plane.

[0137] In the semiconductor device 200 according to this embodiment, a second insulator 12 is provided to cover the conductive plate 50 and the pillar 52. This configuration more reliably prevents the conductive plate 50 and the pillar 52 from being connected to an unintended potential. The conductive plate 50 is preferably electrically insulated from the first terminal p1 and the second terminal p2. The upper surface and side surfaces of the conductive plate 50 are covered by the second insulator 12. Therefore, the conductive plate 50 can be more reliably electrically insulated from the first terminal p1 and the second terminal p2. Furthermore, compared to the case where the conductive plate 50 and the pillar 52 are exposed, when the semiconductor device 200 is mounted on a substrate or the like, it is more reliably prevents the wiring of external circuitry from coming into contact with the conductive plate 50 and the pillar 52.

[0138] Because the conductive plate 50 has a hole 50h, when the first insulator 10 and the second insulator 12 are integrally formed, the conductive plate 50 can make closer contact with the first insulator 10 and the second insulator 12. The first insulator 10 and the second insulator 12, for example, comprise the same sealing resin, and during the sealing process, the resin flows through the hole 50h. Thus, the second insulator 12 can make closer contact with the conductive plate 50 more reliably.

[0139] Third Embodiment

[0140] Figure 13 A perspective view of a semiconductor device 300 according to a third embodiment is shown.

[0141] The semiconductor device 300 has a first terminal p1 and a second terminal p2 protruding from the first insulator 10. For example... Figure 13 As shown, the first terminal p1 and the second terminal p2 protrude from one side surface of the first insulator 10 (the side surface located on the negative side in the Y direction). That is, the positional relationship between the first terminal p1 and the second terminal p2 is not limited to... Figure 2 The example shown.

[0142] The shape of column 52, etc., can be changed to various shapes as described in the first embodiment and its variations. Figure 13 Only one example of the shape of column 52 is shown.

[0143] Figure 13 The semiconductor device 300 shown is mounted, for example, on a substrate or cooling plate on the negative side of the Z-direction. The cooling plate is, for example, a water-cooled cooling plate.

[0144] Figure 14 An example of the circuit configuration of the semiconductor device 300 according to the third embodiment.

[0145] Semiconductor device 300 can be used as part of, for example, a power conversion circuit (e.g., an inverter circuit or a bridge circuit). The semiconductor chip 40 of semiconductor device 300 includes multiple semiconductor elements (a first semiconductor element 401 and a second semiconductor element 402). The multiple semiconductor elements are electrically connected via wiring portions 42. The first semiconductor element 401 and the second semiconductor element 402 each have a transistor and a diode. The first semiconductor element 401 and the second semiconductor element 402 are, for example, MOSFETs.

[0146] The first terminal p1 is connected to the drain electrode of the first semiconductor element 401. The second terminal p2 is connected to the source electrode of the second semiconductor element 402. For example, a positive potential is applied to the first terminal p1 relative to the second terminal p2. The third terminals p3A and p3B are the gate terminals of the first semiconductor element 401 and the second semiconductor element 402, respectively. The source of the first semiconductor element 401 and the drain of the second semiconductor element 402 are connected through wiring portion 42. The potential of the connection point is the same as the potential of the fourth terminal p4. An inductive load (not shown) is connected to the fourth terminal p4 as an external load.

[0147] Reference Figure 14 The operation of the semiconductor device 300 according to this embodiment will be described.

[0148] Semiconductor device 300 is, for example, an inverter. First semiconductor element 401 has a transistor Tr1 and a diode D1. Diode D1 is, for example, a body diode formed by a pn junction disposed in a MOSFET of the first semiconductor element 401. Second semiconductor element 402 has a transistor Tr2 and a diode D2. Diode D2 is, for example, a body diode formed by a pn junction disposed in a MOSFET of the second semiconductor element 402. An external load, not shown in the figure, is connected to a fourth terminal p4.

[0149] The following is an example of how transistors Tr1 and Tr2 switch their on / off states.

[0150] First, a voltage higher than the threshold voltage is applied to the third terminal p3A. Simultaneously, a voltage lower than the threshold voltage is applied to the third terminal p3B. Transistor Tr1 of the first semiconductor element 401 is turned on. Transistor Tr2 of the second semiconductor element 402 is turned off. Thus, for example, the on-state current of transistor Tr1 flows from the first terminal p1 to the fourth terminal p4 through the drain electrode of transistor Tr1, the source electrode of transistor Tr1, the wiring portion 42, and the connection region 26.

[0151] Subsequently, the voltage applied to the third terminal p3A is controlled to be lower than the threshold voltage. Simultaneously, a voltage higher than the threshold voltage is applied to the third terminal p3B. Transistor Tr1 of the first semiconductor element 401 is turned off. Transistor Tr2 of the second semiconductor element 402 is turned on. Thus, for example, the on-state current of transistor Tr2 flows from the fourth terminal p4 to the second terminal p2 through the connection region 26, the wiring portion 42, the drain electrode of transistor Tr2, and the source electrode of transistor Tr2.

[0152] Subsequently, when transistor Tr2 further switches from the on state to the off state, the current from the fourth terminal p4 to the second terminal p2 is cut off. Furthermore, when transistor Tr1 is continuously switched from the off state to the on state, the on-current of transistor Tr1 flows again from the first terminal p1 to the fourth terminal p4. Thus, by switching transistors Tr1 and Tr2 on and off, the time-varying voltage applied to an external load (not shown in the figure) connected to the fourth terminal p4 can be controlled.

[0153] As described above, by switching the voltages applied to the third terminals p3A and p3B, the DC voltage applied between the first terminal p1 and the second terminal p2 can be converted into an AC voltage output from the fourth terminal p4.

[0154] Figure 15 This is a top view of the semiconductor device 300 according to the third embodiment. It should be noted that... Figure 15 The conductive plate 50 and the insulator 10 are shown in a transparent manner.

[0155] The semiconductor chip 40 of the semiconductor device 300 has multiple semiconductor elements (first semiconductor element 401 and second semiconductor element 402). The semiconductor device 300 has wiring portions 42 for connecting the semiconductor elements. Furthermore, multiple ( Figure 15 The middle part contains six) the first semiconductor element 401 and multiple ( Figure 15(There are six) Second semiconductor elements 402. The first semiconductor element 401 and the second semiconductor element 402 each have a semiconductor substrate containing, for example, SiC. That is, a plurality of semiconductor elements (first semiconductor element 401 and second semiconductor element 402) connected by wiring portion 42 are disposed between the first terminal p1 and the second terminal p2.

[0156] The following is an example in which the first semiconductor element 401 and the second semiconductor element 402 each have... Figure 15 The negative side of the Z-direction (the side of the first conductive member 20 and the second conductive member 22) has a drain electrode, and the positive side of the Z-direction has a source electrode and a gate electrode.

[0157] The first terminal p1 is connected to the drain electrode of the first semiconductor element 401 in the semiconductor chip 40 via the first conductive member 20. The first conductive member 20 has a first region 20a facing the drain electrode of the first semiconductor element 401 and a second region 20b located between the first region 20a and the first terminal p1.

[0158] A gate pad is provided on the upper surface of the first semiconductor element 401, and the potential of the gate pad is controlled by a third terminal p3A. A fourth conductive region 24A is provided between the third terminal p3A and the first semiconductor element 401, and the fourth conductive region 24A is connected to the gate pad of the first semiconductor element 401, for example, through a wire W.

[0159] The source electrode on the upper surface of the first semiconductor element 401 is connected to the drain electrode on the lower surface of the second semiconductor element 402 via a wiring portion 42. The wiring portion 42 has a wire 42w, one end of which is connected to the source electrode of the first semiconductor element 401, and a pad 42p connected to the other end of the wire 42w. The second semiconductor element 402 is disposed on the pad 42p. The wiring portion 42 is continuous with the fourth terminal p4. The connection region 26 located between the wiring portion 42 and the fourth terminal p4 is separated from the fourth conductive region 24A and the fifth conductive region 24B1 (described later) in the Z direction.

[0160] The upper surface of the second semiconductor element 402 is provided with a gate pad, the potential of which is controlled by a third terminal p3B. A fifth conductive region 24B1 is connected in series with the third terminal p3B. The fifth conductive region 24B1 and a sixth conductive region 24B2 are connected, for example, by a wire W. The sixth conductive region 24B2 is connected, for example, to the gate pad of the second semiconductor element 402 by a wire W.

[0161] The source electrode of the second semiconductor element 402 in the semiconductor chip 40 is connected to the second terminal p2 via the second conductive member 22. The end region p2A is continuous with the second terminal p2. The second conductive member 22 has a first region 22a connected to the source electrode of the second semiconductor element 402, and a second region 22b connected at one end to the first region 22a and at the other end to the end region p2A.

[0162] As described above, the number of semiconductor elements disposed in the semiconductor chip 40 between the first terminal p1 and the second terminal p2 is not limited to one.

[0163] Figure 15 An example is shown in which the conductor 42w of the wiring portion 42 and the second region 22b of the second conductive member 22 are formed as wires. However, the conductor 42w and the second region 22b can also be made of metal components other than wires. For example, a plate-shaped metal component can be used. Figure 15 The configuration in which the first semiconductor element 401 is divided into six parts is merely an example, and it is preferable to provide at least one first semiconductor element 401. For example, when a first semiconductor element 401 with a large area on the XY plane is provided, a plate-shaped metal component can be used instead of wires.

[0164] exist Figure 15 In the example shown, the main paths through which the current flows during the operation of the semiconductor device 300 include the following two paths. One path is the current path from the first terminal p1 through the first conductive member 20, the first semiconductor element 401, the wiring portion 42, and the connection region 26 to the fourth terminal p4, or a current path flowing in the opposite direction. The other path is the current path from the fourth terminal p4 through the connection region 26, the wiring portion 42, the second semiconductor element 402, and the second conductive member 22 to the second terminal p2, or a current path flowing in the opposite direction.

[0165] The conductive plate 50 is preferably positioned such that it faces at least a portion of the wiring portion 42 or the second conductive member 22 in the Z direction, and a first insulator 10 is disposed between them. One end of the conductor 42w of the wiring portion 42 and one end of the second region 22b of the second conductive member 22 are disposed on the upper surface of the first semiconductor element 401 or the second semiconductor element 402. That is, for example, the second conductive member 22 of the wiring portion 42 has a portion in the positive Z-axis direction relative to the first conductive member 20. A portion of the second conductive member 22 of the wiring portion 42 is spaced apart from the mounting substrate in the Z direction.

[0166] More ideally, the conductive plate 50 faces at least a portion of the wire 42w of the wiring portion 42 or the second region 22b of the second conductive member 22 in the Z direction, with a first insulator 10 disposed between them. Furthermore, it is preferable that at least a portion of the conductive plate 50 faces the connection region 26 in the Z direction, with the first insulator 10 positioned between them.

[0167] When the semiconductor device 300 according to this embodiment is a semiconductor device having multiple semiconductor elements, the conductive plate 50 prevents the generation of induced electromotive force between multiple current paths. This improves the switching performance of the semiconductor device.

[0168] A conductive plate 50 is disposed at a position facing at least a portion of the wiring portion 42 or the second conductive member 22 in the Z direction, with a first insulator 10 disposed between them. The conductor 42w of the wiring portion 42 or the second region 22b of the second conductive member 22 is a current path further away from the mounting substrate, etc., in the positive Z direction than the first conductive member 20, wherein the semiconductor device 300 is mounted on the mounting substrate such that its lower surface contacts the mounting substrate. The conductive plate 50 disposed on the upper surface of the semiconductor device 300 can reduce the time-varying magnetic field caused by the current path located far from the mounting substrate, etc.

[0169] First, the case where the conductive plate 50 overlaps with the second conductive member 22 will be described. By inducing a current in the conductive plate 50, which is located on the positive side in the Z direction relative to the second conductive member 22, the time-varying magnetic field caused by the current flowing through the second conductive member 22 can be reduced.

[0170] See Figure 14 For example, when the third terminal p3A is off, the current flowing from the second terminal p2 to the fourth terminal p4 through the diode D2 of the second semiconductor element 402 may change over time. Alternatively, when the third terminal p3B is on, the current flowing from the fourth terminal p4 to the second terminal p2 through the transistor Tr2 of the second semiconductor element 402 may change over time. Thus, when the third terminal p3A or p3B is switched, the current flowing through the second conductive member 22 connected to the second semiconductor element 402 may change over time. By positioning the conductive plate 50 relative to the second conductive member 22 on the positive side in the Z direction, the change of the magnetic field over time during switching can be reduced. This reduces voltage oscillations.

[0171] On the other hand, the conductive plate 50 can overlap with the wiring portion 42 in the Z direction. In this case, the time-varying magnetic field generated by the current flowing through the wiring portion 42 can be reduced by the current induced in the conductive plate 50, which is located on the positive side of the wiring portion 42 in the Z direction. Therefore, voltage oscillations at the third terminals p3A and p3B of the switching semiconductor device 300 can be reduced.

[0172] The conductive plate 50 also serves as a heat flow path. Therefore, in the semiconductor device 300, for example due to the arrangement of multiple semiconductor chips 40, heat generation may be uneven in the XY plane. In this case, heat is conducted to the conductive plate 50 through the intermediate first insulator 10 and diffuses within the conductive plate 50. Thus, the heat generated in the XY plane can be more uniform. By preventing localized heating, the reliability of the semiconductor device 300 can be improved.

[0173] The conductive plate 50 is electrically and thermally connected to an external circuit via a base 54 and a post 52 connected thereto. Wiring for connecting to the external circuit can be arranged through the conductive plate 50. Furthermore, by dissipating heat to the external circuit, heat accumulation in the conductive plate 50 can be prevented.

[0174] In the semiconductor device according to at least one embodiment of the first to third embodiments described above, when the semiconductor chip 40 has at least one semiconductor element, the conductive plate 50 reduces the influence of the magnetic field caused by the current flowing through the semiconductor device. This improves the switching performance of the semiconductor device. Ideally, the switching performance can be further improved when the conductive plate 50 overlaps at least partially in the Z direction with the second conductive member 22 that connects the second terminal p2 to the semiconductor chip 40. Furthermore, the conductive plate 50 also serves as a path for heat flow. Therefore, reliability can be improved by preventing localized overheating of the semiconductor device.

[0175] The embodiments have been described above with reference to specific examples. However, the embodiments are not limited to these specific examples. In other words, even if those skilled in the art make appropriate design changes to these specific examples, as long as they have the features of the embodiments, these examples are included within the scope of the embodiments. The elements, their arrangement, materials, conditions, shapes, dimensions, etc., of the various embodiments described above are not limited to those illustrated and can be appropriately changed.

[0176] The elements of each of the above embodiments can be combined as long as it is technically feasible, and the combination of these elements is also within the scope of the embodiments as long as these elements include the features of the embodiments. Furthermore, those skilled in the art can conceive of various other changes and modifications within the conceptual scope of the embodiments, and these changes and modifications should be understood to fall within the scope of the embodiments.

[0177] While certain embodiments have been described, these embodiments are presented by way of example only and are not intended to limit the scope of this disclosure. In fact, the novel embodiments described herein can be embodied in various other forms; furthermore, various omissions, substitutions, and changes may be made to the embodiments described herein without departing from the spirit of this disclosure. The appended claims and their equivalents are intended to cover such forms or modifications that fall within the scope and spirit of this disclosure.

Claims

1. A semiconductor device comprising: a first terminal and a second terminal; a first conductive member electrically connected to the first terminal; a semiconductor chip provided on the first conductive member; a second conductive member provided on the semiconductor chip and electrically connected to the second terminal; a first insulator provided on the second conductive member and covering the semiconductor chip; a conductive plate provided on at least a portion of the first insulator; and a column electrically connected to the conductive plate and extending along a side surface of the first insulator.

2. The semiconductor device according to claim 1, wherein the second conductive member includes: a first region facing the semiconductor chip in a first direction in which the first conductive member extends toward the semiconductor chip; and a second region between the first region and the second terminal.

3. The semiconductor device according to claim 2, further comprising: a pedestal continuous with the column and extending in a first plane intersecting the first direction.

4. The semiconductor device according to claim 2, wherein the conductive plate is longer than the second conductive member in a second direction in which the first terminal extends toward the first conductive member and intersects the first direction.

5. The semiconductor device according to claim 2, wherein the conductive plate is longer than the second conductive member in a third direction intersecting the first direction and a second direction in which the first terminal extends toward the first conductive member and intersects the first direction.

6. The semiconductor device according to claim 1, wherein an adhesive portion is provided on at least a portion of a space between the first insulator and the conductive plate, and the first insulator includes an epoxy resin, and the adhesive portion includes a silicon-based adhesive.

7. The semiconductor device according to claim 2, wherein a protrusion protruding in the first direction is provided on an upper surface of the first insulator, and a recess is provided on a lower surface of the conductive plate at a position corresponding to the protrusion.

8. The semiconductor device according to claim 2, wherein a groove extending in the first direction is provided on the side surface of the first insulator, and at least a portion of the column is provided in the groove.

9. The semiconductor device according to claim 1, further comprising: a second insulator provided on the conductive plate.

10. The semiconductor device according to claim 1, further comprising: a joining member provided between the semiconductor chip and the second conductive member, wherein the second conductive member is a plate-shaped metal member.

11. The semiconductor device according to claim 1, wherein the semiconductor chip includes: a first semiconductor element provided on the first conductive member, and a second semiconductor element electrically connected to the first semiconductor element through a wiring portion and electrically connected to the second conductive member, and the second conductive member faces the second semiconductor element in a first direction in which the first conductive member extends toward the first semiconductor element.

12. The semiconductor device according to claim 11, wherein ​ ​ The first semiconductor element and the second semiconductor element each include a MOSFET, and the semiconductor device further includes: a plurality of third terminals electrically connected to gate electrodes of the MOSFETs of the first semiconductor element and gate electrodes of the MOSFETs of the second semiconductor element, respectively, and a fourth terminal electrically connected to the wiring portion.

13. The semiconductor device according to claim 12, wherein the semiconductor chip further includes: one or more other first semiconductor elements in addition to the first semiconductor element and one or more other second semiconductor elements in addition to the second semiconductor element.

14. A semiconductor device comprising: a first conductive member; a semiconductor chip provided on the first conductive member; a second conductive member provided on the semiconductor chip; a first insulator provided on the second conductive member and covering the semiconductor chip; a conductive plate provided on the first insulator and having at least a portion facing the second conductive member in a first direction; and a conductive pedestal usable as a terminal for external connection; and a conductive layer electrically connecting the conductive plate and the conductive pedestal.

15. The semiconductor device according to claim 14, wherein the conductive layer is a column extending in the first direction along a side surface of the first insulator.

16. The semiconductor device according to claim 14, wherein the conductive pedestal is provided on a first side surface of the first insulator and on a second side surface of the first insulator, the second side surface being located on an opposite side of the first insulator with respect to the first side surface.

17. A semiconductor device comprising: a first terminal and a second terminal; a first conductive member electrically connected to the first terminal; a semiconductor chip provided on the first conductive member; a second conductive member provided on the semiconductor chip and electrically connected to the second terminal; a first insulator provided on the second conductive member and covering the semiconductor chip; and a conductive plate provided on at least a portion of the first insulator, wherein the first insulator is directly interfaced with the second conductive member and the conductive plate.

18. The semiconductor device according to claim 17, wherein the first insulator continuously extends from the first terminal to the second terminal and is located between the second conductive member and the conductive plate. ​ ​ ​

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