Method and apparatus for estimating junction temperature of power semiconductor device, and computer program product

By establishing power loss and thermodynamic models, calibrating parameters, and implementing negative feedback adjustment, the problem of inaccurate junction temperature measurement caused by the distance of NTC thermistors was solved, enabling accurate estimation of junction temperature and reliable over-temperature protection for power semiconductor devices.

CN121632384APending Publication Date: 2026-03-10ROBERT BOSCH GMBH
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-08-29
Publication Date
2026-03-10

AI Technical Summary

Technical Problem

In existing technologies, the NTC thermistor is at a distance from the chip, which makes it impossible to accurately reflect the junction temperature of the power semiconductor device. This results in low reliability of the over-temperature protection mechanism, especially in high-voltage and high-current environments where coolant overheating and junction overheating are likely to occur.

Method used

By establishing power loss and thermodynamic models, calibrating steady-state and dynamic parameters, using negative feedback regulation to determine the estimated coolant temperature, and combining finite element analysis to optimize model parameters, the junction temperature estimation process is decoupled, simplifying calculations and reducing errors.

Benefits of technology

It enables accurate estimation of junction temperature in power semiconductor devices, improves the reliability of over-temperature protection, and is applicable to power semiconductor devices with different topologies.

✦ Generated by Eureka AI based on patent content.

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Abstract

The embodiment of the invention provides a method for estimating the junction temperature of a power semiconductor device. The method comprises the following steps: determining steady-state data and dynamic data of loss power through a power loss model of the power semiconductor device; calibrating a steady-state parameter and a dynamic parameter of the first thermodynamic model respectively at least based on the steady-state data and the dynamic data, wherein the steady-state parameter and the dynamic parameter are used for determining an estimated temperature difference between the NTC thermistor temperature and the coolant temperature; based on the measured actual temperature of the NTC thermistor and the estimated temperature difference, the estimated temperature of the cooling liquid is determined in a negative feedback adjustment mode; calibrating a steady-state parameter and a dynamic parameter of a second thermodynamic model respectively at least based on the steady-state data and the dynamic data of the loss power, wherein the steady-state parameter and the dynamic parameter are used for determining an estimated temperature difference of the junction temperature of the power semiconductor device relative to the temperature of the cooling liquid; and respectively estimating the junction temperature of each power semiconductor device through a second thermodynamic model at least based on the cooling liquid estimation temperature and the loss power of each power semiconductor device.
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Description

Technical Field

[0001] This application relates to the semiconductor field, and more particularly to a method for estimating the junction temperature of a power semiconductor device, an apparatus for estimating the junction temperature of a power semiconductor device, and a computer program product for at least assisting in implementing the steps of the method according to this application. Background Technology

[0002] In applications such as traction converters for rail transit vehicles, wind power converters, and electric vehicle motor controllers, the harsh operating environment of power semiconductor devices—such as high voltage, high current, and compact space—causes excessively high junction temperatures that directly affect the performance, lifespan, and safety of these devices. Therefore, monitoring the junction temperature of power semiconductor devices has become a key factor affecting the design and stable operation of converters.

[0003] In existing technologies, power semiconductor devices that use coolant for heat dissipation typically employ NTC (Negative Temperature Coefficient) thermistors near the chip. When the chip generates heat, the NTC thermistor is heated, thus providing over-temperature protection for the power semiconductor device. However, because the NTC thermistor is some distance from the chip, and modules with multiple chips generating heat simultaneously may only have one NTC thermistor, the temperature measured by the NTC thermistor cannot accurately reflect the junction temperature of the power semiconductor device. This results in low reliability of the protection mechanism, particularly prone to coolant overheating and junction overheating.

[0004] Therefore, how to accurately and efficiently estimate the junction temperature of power semiconductor devices has become a technical challenge that needs to be solved. Summary of the Invention

[0005] The purpose of this application is to provide a method for estimating the junction temperature of a power semiconductor device, an apparatus for estimating the junction temperature of a power semiconductor device, and a computer program product to solve the problems in the prior art.

[0006] According to a first aspect of this application, a method for estimating the junction temperature of a power semiconductor device is provided, the method comprising the following steps:

[0007] - By using the power loss model of power semiconductor devices, the steady-state and dynamic data of power loss of each power semiconductor device are determined based on the operating parameters of the power semiconductor devices under a given coolant temperature condition.

[0008] - The steady-state and dynamic parameters of the first thermodynamic model are calibrated based at least on the steady-state and dynamic data of the power loss of the power semiconductor device, respectively, wherein the first thermodynamic model is used to determine the estimated temperature difference ΔT between the NTC thermistor temperature and the coolant temperature. NTCe ;

[0009] -Based on the actual temperature T of the NTC thermistor measured under a pre-defined coolant temperature condition. NTCm and the estimated temperature difference ΔT determined by the first thermodynamic model NTCe The estimated temperature T of the coolant assigned to each power semiconductor device is determined by negative feedback regulation. Ce ;

[0010] - Based at least on steady-state and dynamic data of the power loss of the power semiconductor device, calibrate the steady-state and dynamic parameters of the second thermodynamic model, respectively, wherein the second thermodynamic model is used to determine the estimated temperature difference between the junction temperature of the power semiconductor device and the coolant temperature; and

[0011] - Estimate the temperature T based at least on the coolant assigned to each power semiconductor device. Ce The junction temperature of each power semiconductor device is estimated using the second thermodynamic model, along with the power loss of each device.

[0012] The core concept of this application is to decouple the parameter calibration process of each model involved in junction temperature estimation from each other, and to gradually update and optimize the steady-state and dynamic parameters of each model through finite element analysis. In particular, compared with traditional algorithms based on model order reduction and state variable observers, the method of this application can not only simplify the calculation process and save a lot of computing power, but also reduce the steady-state error of the estimated junction temperature, and can be flexibly applied to different topologies of power semiconductor devices.

[0013] According to a second aspect of this application, an apparatus for estimating the junction temperature of a power semiconductor device is provided, the apparatus being used to perform the method according to this application, wherein the apparatus may include the following components:

[0014] - A power loss model for power semiconductor devices, which determines the steady-state and dynamic data of power loss of each power semiconductor device under a pre-given coolant temperature condition based on the operating parameters of the power semiconductor device.

[0015] - A first thermodynamic model, configured to estimate the estimated temperature difference ΔT between the NTC thermistor temperature and the coolant temperature. NTCeThe steady-state and dynamic parameters of the first thermodynamic model are calibrated based on at least the steady-state and dynamic data of the power loss of the power semiconductor device, respectively.

[0016] - A negative feedback control unit, configured to adjust based on the actual temperature T of the NTC thermistor measured under a pre-given coolant temperature condition. NTCm and the estimated temperature difference ΔT determined by the first thermodynamic model NTCe The estimated temperature T of the coolant assigned to each power semiconductor device is determined by negative feedback regulation. Ce ;and

[0017] - A second thermodynamic model is configured to determine an estimated temperature difference between the junction temperature of a power semiconductor device and the coolant temperature, wherein the steady-state and dynamic parameters of the second thermodynamic model used to estimate the junction temperature of the power semiconductor device are calibrated, at least based on steady-state and dynamic data of the power loss of the power semiconductor device, respectively, wherein the estimated temperature T of the coolant associated with each power semiconductor device is at least based on the estimated temperature T. Ce The junction temperature of each power semiconductor device is estimated using the second thermodynamic model, along with the power loss of each device.

[0018] According to a third aspect of this application, a computer program product, such as a computer-readable program carrier, is provided, comprising computer program instructions that, when executed by a processor, at least partially implement the steps of the method described in this application. Attached Figure Description

[0019] The principles, features, and advantages of this application will be better understood below with reference to the accompanying drawings. The drawings include:

[0020] Figure 1 A flowchart of a method for estimating the junction temperature of a power semiconductor device according to an exemplary embodiment of this application is shown;

[0021] Figure 2 A schematic diagram of the circuit topology of a three-phase inverter for an electric air compressor according to an exemplary embodiment of this application is shown;

[0022] Figure 3 An equivalent physical model of a first thermodynamic model according to an exemplary embodiment of this application is shown;

[0023] Figure 4 An equivalent mathematical model of a first thermodynamic model according to an exemplary embodiment of this application is shown;

[0024] Figure 5A circuit topology diagram of a BUCK-BOOST type DC / DC converter according to another exemplary embodiment of this application is shown; and

[0025] Figure 6 A schematic block diagram of an apparatus for estimating the junction temperature of a power semiconductor device according to an exemplary embodiment of this application is shown. Detailed Implementation

[0026] To make the technical problems to be solved, the technical solutions, and the beneficial technical effects of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and several exemplary embodiments. It should be understood that the specific embodiments described herein are only for explaining this application and are not intended to limit the scope of protection of this application.

[0027] Figure 1 A flowchart illustrating a method for estimating the junction temperature of a power semiconductor device according to an exemplary embodiment of this application is shown. The following exemplary embodiments describe the method according to this application in more detail.

[0028] like Figure 1 As shown, the method may include steps S1 to S5. In step S1, steady-state and dynamic data of the power loss of each power semiconductor device under a pre-given coolant temperature condition can be determined based on the power loss model 11 of the power semiconductor device and its operating parameters. In the context of this application, "power semiconductor device" refers to an electronic device that can be directly used in a main circuit for processing electrical energy and realizing power conversion or control. The main circuit directly undertakes the task of power conversion or control in electrical equipment or power systems, such as traction converters for rail transit vehicles, wind power converters, electric vehicle motor controllers, and electric air compressors. In these application scenarios, the operating voltage and / or operating current of the power semiconductor device are relatively large, therefore the power of the power semiconductor device is also relatively large, accompanied by significant power loss.

[0029] The power semiconductor devices include, for example, thyristors, power field-effect transistors (MOSFETs), insulated-gate bipolar transistors (IGBTs), and power diodes. Different power loss models can be set for different types of power semiconductor devices, and these models can store the mathematical relationship between the operating parameters of the power semiconductor device and the power loss. The operating parameters of the power semiconductor device include, for example, the current flowing through the power semiconductor device, the voltage applied to the power semiconductor device, the modulation mode parameters of the power semiconductor device (e.g., modulation ratio, dead time, and / or modulation frequency), the switching frequency, and / or the junction temperature. The junction temperature can be obtained during the experimental phase, for example, by measuring the junction temperature using an NTC thermistor located at the junction of the chip, or it can be estimated in subsequent step S5 using a calibrated second thermodynamic model 14. In the initial state, it can be specified as a preset default value.

[0030] Here, the power loss of the power semiconductor device can be determined at least based on operating parameters such as the current flowing through the power semiconductor device, the voltage applied to the power semiconductor device, the modulation mode parameters of the power semiconductor device, the switching frequency, and / or the junction temperature of the power semiconductor device estimated by the second thermodynamic model 14. The power loss specifically includes switching losses and conduction losses. For example, the mathematical relationships between the current flowing through the power semiconductor device and switching losses, the mathematical relationships between the voltage applied to the power semiconductor device and switching losses, and the mathematical relationships between the estimated junction temperature and switching losses can be fitted into two-dimensional lookup tables. After measuring the operating parameters of the power semiconductor device, the switching losses of the power semiconductor device can be determined by linear interpolation in the two-dimensional lookup tables. The mathematical functions relating the various operating parameters of the power semiconductor device to conduction losses can, for example, be stored in the form of calibrated functional expressions, wherein the functional expressions also additionally consider the mathematical relationships between the characteristic parameters of the power semiconductor device (e.g., on-resistance) and conduction losses. These characteristic parameters can be initialized for each power semiconductor device during the calibration phase of the power loss model 11. By using the measured operating parameters of the power semiconductor device as input variables, the conduction loss of the power semiconductor device can be calculated through this function expression.

[0031] In the current embodiment of this application, the power semiconductor devices are placed in a dedicated test bench where the coolant temperature conditions for performing the test can be set, including a stable coolant temperature and a varying coolant temperature. Under a predetermined constant coolant temperature—that is, the coolant temperature remains constant from the point of reaching the predetermined temperature—steady-state data of the power loss of each power semiconductor device can be obtained through the power loss model 11. Examples include first steady-state data of each power semiconductor device at a first coolant temperature, second steady-state data at a second coolant temperature, and so on. Under a coolant temperature that changes over time at a predetermined rate—for example, the coolant temperature increases at a rate of 1°C per second—dynamic data of the power loss of each power semiconductor device at various times can be obtained through the power loss model 11.

[0032] In step S2, the steady-state and dynamic parameters of the first thermodynamic model 12 can be calibrated based at least on the steady-state and dynamic data of the power loss of the power semiconductor device, respectively. The first thermodynamic model 12 is used to determine the estimated temperature difference ΔT between the NTC thermistor temperature and the coolant temperature. NTCe .

[0033] The following combination Figure 2 The circuit topology diagram of a three-phase inverter for an electric air compressor according to an exemplary embodiment of this application illustrates in detail the calibration process of the first thermodynamic model 12. For example... Figure 2 As shown, considering that the heat generated by the power semiconductor devices in all phases during the operation of the three-phase inverter will heat the power semiconductor devices in the intermediate phase, resulting in a higher temperature for the intermediate phase power semiconductor devices, an NTC thermistor 21 is placed near the power semiconductor device 2 (here, a transistor) in the lower bridge arm of the intermediate phase to monitor the temperature of the intermediate phase power semiconductor device 2. It is understandable that since the NTC thermistor 21 is not located at the chip junction of the power semiconductor device 2, but rather near the power semiconductor device 2, the actual temperature T measured by the NTC thermistor 21 is... NTCm It is not the junction temperature of power semiconductor device 2 itself, but rather a mathematical relationship that exists between the junction temperature of power semiconductor device 2 and the junction temperature of power semiconductor device 2.

[0034] During the operation of the three-phase inverter, the NTC thermistor 21 is heated by the heat generated by the three power semiconductor devices in the lower arm and the three power semiconductor devices in the upper arm. Figure 3 The equivalent physical model of the first thermodynamic model 12, as shown in an exemplary embodiment of this application, indicates that the heat generated by the power semiconductor device in the lower bridge arm is P. LS (s), the heat PLS (s) The thermal resistance R between the power semiconductor device in the lower bridge arm and the NTC thermistor 21 L-N (s) is transferred to the NTC thermistor 21, and through the thermal impedance R between the power semiconductor device and the coolant in the lower bridge arm. L-C (s) is transferred to the coolant for heat dissipation; the heat generated by the power semiconductor devices in the upper bridge arm is P. HS (s), the heat P HS (s) The thermal resistance R between the power semiconductor device in the upper bridge arm and the NTC thermistor 21 H-N (s) is transferred to the NTC thermistor 21, and through the thermal impedance R between the power semiconductor device and the coolant in the upper bridge arm. H-C (s) is transferred to the coolant for heat dissipation. Here, T LS (s) represents the temperature of the power semiconductor device in the lower bridge arm, T HS (s) represents the temperature of the power semiconductor device in the upper bridge arm, T NTC (s) represents the temperature of the NTC thermistor 21, T C (s) represents the temperature of the coolant. Furthermore, the heat from the NTC thermistor 21 is transferred through the thermal resistance R between the NTC thermistor 21 and the coolant. N-C (s) is transferred to the coolant.

[0035] To simplify the mathematical expression, we can use heat P LS During the conduction process of (s), the thermal resistance R L-C (s) are respectively converted to thermal impedance R L-N (s) and R N-C In (s), and in the heat P HS During the conduction process of (s), the thermal resistance R H-C (s) respectively converted to thermal impedance R H-N (s) and R N-C In (s), this is converted to obtain as follows Figure 4 The thermal impedance Z of the equivalent mathematical model of the first thermodynamic model 12 shown H-N (s), Z H-N (s) and Z N-C (s). Temperature T of NTC thermistor 21 NTC (s) relative to the temperature T of the coolant C Temperature difference ΔT (s) NTC The transfer function of (s) can be expressed as follows:

[0036]

[0037] Among them, Z′ HS(s) represents the equivalent thermal resistance of the NTC thermistor as the heat generated by the power semiconductor device in the upper bridge arm heats it through various heat conduction paths, Z′ LS (s) represents the equivalent thermal resistance of the NTC thermistor as the heat generated by the power semiconductor device in the lower bridge arm heats it through various heat conduction paths.

[0038] ΔT NTC The above expression for the transfer function of (s) can be transformed into zero-pole form to obtain ΔT. NTC The zero-pole expression of the transfer function of (s):

[0039]

[0040] Among them, K HN K represents the steady-state parameter used to characterize the heating process of the NTC thermistor 21 by the power semiconductor device in the upper bridge arm. LN This represents the steady-state parameters used to characterize the heating process of the NTC thermistor 21 by the power semiconductor device in the lower bridge arm.

[0041] To simplify the parameter calibration process, ΔT can be used. NTC The zero-pole expression of the transfer function of (s) simplifies to the following third-order characteristic equation:

[0042]

[0043] It is understood that the third-order characteristic equation is merely exemplary, and ΔT can also be used. NTC The zero-pole expression of the transfer function of (s) can be simplified into other forms of characteristic equations as needed, but the steady-state parameter that needs to be calibrated for any form of characteristic equation is K. HN and K LN .

[0044] Considering that the cooling efficiency differs at different coolant temperatures (assuming the same coolant flow rate), K can be... HN and K LN The fit is a linear expression as follows:

[0045] K HN =A H_NC *T c +B H_NC

[0046] K LN =A L_NC *T c +B L_NC

[0047] Next, based on steady-state data of the power loss of the power semiconductor device at a pre-given constant coolant temperature and the measured actual temperature T of the NTC thermistor, NTCm Calibrate the steady-state parameter K of the first thermodynamic model 12 HN K LN T can be set in the test bench. C1 T C2 T C3 T C4 ...T Cn A constant coolant temperature was maintained, and the operating parameters of the power semiconductor devices in the upper and lower bridge arms were obtained at various set coolant temperatures. Based on this, the heat P generated by the power semiconductor devices in the upper and lower bridge arms was obtained using power loss models. HS1 P HS2 P HS3 P HS4 ...P HSn And the heat P generated by the power semiconductor devices in the lower bridge arm LS1 P LS2 P LS3 P LS4 ...P LSn It can also measure the actual temperature T of the NTC thermistor at various set coolant temperatures. NTC1 T NTC2 T NTC3 T NTC4 ...T NTCn Substitute these obtained parameters into ΔT NTC The third-order characteristic equation of the transfer function of (s) can be obtained as the following matrix expression:

[0048]

[0049] Here, the steady-state data of the power loss of the power semiconductor device and the measured actual temperature T of the NTC thermistor can be used as a basis. NTCm For example, determining a matrix using the least squares method. Therefore, K is determined. HN and K LN The linear expression is obtained, thus completing the steady-state parameter K of the first thermodynamic model 12. HN K LN The calibration.

[0050] Next, the calibration process for the dynamic parameters of the first thermodynamic model 12 is performed. Before data fitting, ΔT needs to be calibrated. NTC The third-order characteristic equation of the transfer function of (s) is subjected to a Z-transform with respect to the continuous transfer function, thereby obtaining ΔT. NTCThe third-order characteristic equation of the transfer function of (z) is:

[0051] ΔT NTC (z)=ΔT NTC (z)*(A′ N z -3 +B′ N z -2 +C′ N z -1 )+K HN *P HS (z)*(A′ H z -1 +B′ H )+K LN *P LS (z)*(A′ L z -1 +B′ L )

[0052] Here, dynamic data on the power loss of the power semiconductor device under conditions where the coolant temperature changes over time at a predetermined rate, and the measured actual temperature T of the NTC thermistor can be used as a basis. NTCm Calibrate the dynamic parameter A′ of the first thermodynamic model 12 N B′ N C′ N A′ H B′ H A′ L and B′ L The coolant temperature can be set to vary with time at a predetermined rate in the test bench. For example, the coolant temperature at each moment from the 1st second to the nth second is set to T. C (1) T C (2) T C (3) T C (4) T C (5) T C (6) T C (7)……T C (n), and obtain the operating parameters of the power semiconductor devices of the upper and lower bridge arms at each time from the 1st second to the nth second, thereby obtaining the heat P generated by the power semiconductor devices of the upper and lower bridge arms at each time from the 1st second to the nth second through the power loss models of the power semiconductor devices of the upper and lower bridge arms respectively. HS (1) P HS (2) P HS (3) P HS (4) P HS (5) P HS (6) P HS (7)……PHS (n) and the heat P generated by the power semiconductor devices through the lower bridge arm at each moment from the 1st second to the nth second. LS (1) P LS (2) P LS (3) P LS (4) P LS (5) P LS (6) P LS (7)……P LS (n), and can also measure the actual temperature T of the NTC thermistor at various times from the 1st second to the nth second. NTC (1) T NTC (2) T NTC (3) T NTC (4) T NTC (5) T NTC (6) T NTC (7)……T NTC (n), substitute these obtained parameters into ΔT NTC The third-order characteristic equation of the transfer function of (z) can be used to obtain the following difference matrix expression:

[0053]

[0054] Here, for example, a data fitting method can be used to solve the matrix. This completes the calibration of the dynamic parameter A′ of the first thermodynamic model 12. N B′ N C′ N A′ H B′ H A′ L and B′ L .

[0055] The estimated temperature difference ΔT between the NTC thermistor temperature and the coolant temperature at time k can be estimated using the calibrated first thermodynamic model 12. NTC (k), which can be expressed by the calibrated steady-state and dynamic parameters as follows:

[0056] ΔT NTC (k)=C′ N *ΔT NTC (k-1)+B′ N *ΔT NTC (k-2)+A′ N *ΔT NTC (k-3)+B′ H *K HN *P HS (k-1)+A′ H *K HN*P HS (k)+B′ L *K LN *P LS (k-1)+A′ HL *K LN *P LS (k)

[0057] In step S3, the actual temperature T of the NTC thermistor, measured under a pre-given coolant temperature condition, can be used as a basis. NTCm and the estimated temperature difference ΔT determined by the first thermodynamic model 12 NTCe The estimated temperature T of the coolant assigned to each power semiconductor device is determined by negative feedback regulation. Ce In particular, PID control can be used, based on the measured actual temperature T of the NTC thermistor. NTCm and the estimated temperature difference ΔT NTCe Determine the estimated temperature T of the coolant Ce This makes the actual temperature T of the NTC thermistor NTCm Estimating temperature T with NTC thermistor NTCe The deviation converges, wherein the NTC thermistor estimates the temperature T. NTCe Equal to the estimated temperature T of the coolant Ce The estimated temperature difference ΔT NTCe The sum. The iterative process of PID control causes the deviation to continuously converge, especially eventually to zero, thereby determining the estimated coolant temperature T. Ce This means it can track the actual temperature of the coolant relatively accurately.

[0058] Considering Figure 2 The three-phase inverter of the electric air compressor shown has only one NTC thermistor, and the estimated coolant temperature T is determined. Ce This coolant is applicable to all power semiconductor devices, meaning that the temperature T of all power semiconductor devices can be estimated using this coolant. Ce Perform junction temperature estimation.

[0059] In the case where multiple NTC thermistors are included in the circuit topology, for example in Figure 5 In the circuit topology diagram of the BUCK-BOOST type DC / DC converter shown, an NTC thermistor 31, 41, 51, and 61 are respectively placed near the power semiconductor devices (MOSFETs in this case) 3, 4, 5, and 6 in the lower arm of each phase. This allows for the determination of the estimated coolant temperature T of the power semiconductor device 3 in the lower arm and the power semiconductor device in the upper arm of the same phase. Ce3The estimated coolant temperature T of the power semiconductor device 4 belonging to the lower bridge arm and the power semiconductor device of the upper bridge arm of the same phase. Ce4 The estimated coolant temperature T of the power semiconductor device 5 belonging to the lower bridge arm and the power semiconductor device of the upper bridge arm of the same phase. Ce5 The estimated coolant temperature T of the power semiconductor device 6 belonging to the lower bridge arm and the power semiconductor device of the upper bridge arm in the same phase. Ce6 Optionally, the coolant flow rate information associated with each power semiconductor device (i.e., the flow rate of the coolant flowing through each phase of the power semiconductor device) can also be obtained, and the temperature T can be estimated based on the coolant flow rate associated with each power semiconductor device. Ce The average temperature of the coolant is estimated by calculating the coolant flow rate information associated with each power semiconductor device. As a result of the feedback control output, the average temperature of all power semiconductor devices can be estimated using this coolant. Perform junction temperature estimation.

[0060] In step S4, the steady-state and dynamic parameters of the second thermodynamic model 14 used to estimate the junction temperature of the power semiconductor device can be calibrated, based at least on the steady-state and dynamic data of the power loss of the power semiconductor device.

[0061] ΔT with the first thermodynamic model 12 NTC The derivation of the transfer function expression for (s) is similar, as is the estimated temperature difference ΔT between the junction temperature of the power semiconductor device in the upper bridge arm and the coolant temperature. HS The transfer function of (s) and the estimated temperature difference ΔT between the junction temperature of the power semiconductor device in the lower arm and the coolant temperature. LS The transfer function of (s) can be expressed as follows:

[0062] ΔT HS (s)=P HS (s)*Z HH_C +P LS (s)*Z LH_C

[0063] ΔT LS (s)=P HS (s)*Z HL_C +P LS (s)*Z LL_C

[0064] Among them, Z HH_C Z represents the equivalent thermal resistance of the power semiconductor device in the upper bridge arm to the junction of the power semiconductor device in the upper bridge arm, which is heated and dissipated by the coolant. LH_CZ represents the equivalent thermal resistance of the junction between the power semiconductor device in the lower bridge arm and the power semiconductor device in the upper bridge arm, through which heat is dissipated by the coolant. HL_C Z represents the equivalent thermal resistance of the junction between the power semiconductor device in the upper bridge arm and the power semiconductor device in the lower bridge arm, through which heat is dissipated by the coolant. LL_C This represents the equivalent thermal impedance of the power semiconductor device in the lower bridge arm to heat the junction of the power semiconductor device in the lower bridge arm and dissipate heat through the coolant.

[0065] Next, with ΔT HS The calibration process of the steady-state parameters of the second thermodynamic model 14 is described using the transfer function of (s) as an example. ΔT HS The above expression for the transfer function of (s) can be transformed into zero-pole form to obtain ΔT. HS The zero-pole expression of the transfer function of (s). To simplify the parameter calibration process, ΔT can also be used. HS The zero-pole expression of the transfer function of (s) simplifies to the following characteristic equation:

[0066]

[0067] Among them, K HH_C K represents the steady-state parameter used to characterize the heating process of the junction of the power semiconductor device in the upper bridge arm and the heat dissipation process through the coolant. LH_C These represent steady-state parameters used to characterize the heating process of the junction of the power semiconductor device in the lower bridge arm to the power semiconductor device in the upper bridge arm, as well as the heat dissipation process through the coolant.

[0068] It is understood that the characteristic equation described is merely exemplary, and ΔT can also be used. HS The zero-pole expression of the transfer function of (s) can be simplified into other forms of characteristic equations as needed, but the steady-state parameter that needs to be calibrated for any form of characteristic equation is K. HH_C and K LH_C .

[0069] Then, the second thermodynamic model 14 can be calibrated with respect to ΔT based on the steady-state data of the power loss of the power semiconductor device and the obtained junction temperature. HS The steady-state parameter K of (s) HH_C K LH_C T can be set in the test bench. C1 T C2 T C3 T C4 ...T CnA constant coolant temperature was maintained, and the operating parameters of the power semiconductor devices in the upper and lower bridge arms were obtained at various set coolant temperatures. Based on this, the heat P generated by the power semiconductor devices in the upper and lower bridge arms was obtained using power loss models. HS1 P HS2 P HS3 P HS4 ...P HSn And the heat P generated by the power semiconductor devices in the lower bridge arm LS1 P LS2 P LS3 P LS4 ...P LSn Simultaneously, the junction temperature T of the power semiconductor device in the upper bridge arm can be obtained at various set coolant temperatures. HS1 T HS2 T HS3 T HS4 ...T HSn And the junction temperature T of the power semiconductor device in the lower bridge arm. LS1 T LS2 T LS3 T LS4 ...T LSn The junction temperature of the power semiconductor device can be measured, for example, by using an NTC thermistor located at the junction of the power semiconductor device, or it can be determined using a publicly available simulation method. These acquired parameters are then substituted into ΔT. HS The characteristic equation of the transfer function of (s) can be obtained as the following matrix expression:

[0070]

[0071] Similarly, the matrix can be determined, for example, using the matrix least squares method. This completes the second thermodynamic model 14 regarding ΔT. HS The steady-state parameter K of (s) HH_C K LH_C The calibration.

[0072] For ΔT LS The transfer function of (s) can perform the same processing and be obtained in a similar manner from the following matrix equation. This completes the second thermodynamic model 14 regarding ΔT. LS The steady-state parameter K of (s) HL_C K LL_C The calibration,

[0073]

[0074] Among them, KHL_C K represents the steady-state parameter used to characterize the heating process of the junction of the power semiconductor device in the upper arm and the heat dissipation process through the coolant on the power semiconductor device in the lower arm. LL_C These represent steady-state parameters used to characterize the heating process of the junction of the power semiconductor device in the lower bridge arm and the heat dissipation process through the coolant.

[0075] Next, with ΔT HS The calibration process of the dynamic parameters of the second thermodynamic model 14 is described using the transfer function of (s) as an example. Before performing data fitting, it is necessary to calibrate ΔT. HS The characteristic equation of the transfer function of (s) is subjected to a Z-transform with respect to the continuous transfer function, thereby obtaining ΔT. HS The characteristic equation of the transfer function of (z) is:

[0076] ΔT HS (z)=ΔT HS (z)*(A′ N z -2 +B′ N z -1 )+(K HH_C *P HS (z)+K LH_C *P LS (z))*(a′ H z -1 +b′ H )

[0077] Here, the dynamic parameter A′ of the second thermodynamic model 14 can be calibrated based on dynamic data of the power loss of the power semiconductor device under a coolant temperature that varies with time at a predetermined rate and the obtained junction temperature. H B′ H 、a′ H and b′ H The coolant temperature can be set to vary with time at a predetermined rate in the test bench. For example, the coolant temperature at each moment from the 1st second to the nth second is set to T. C (1) T C (2) T C (3) T C (4) T C (5) T C (6)……T C (n), and obtain the operating parameters of the power semiconductor devices of the upper and lower bridge arms at each time from the 1st second to the nth second, thereby obtaining the heat P generated by the power semiconductor devices of the upper and lower bridge arms at each time from the 1st second to the nth second through the power loss models of the power semiconductor devices of the upper and lower bridge arms respectively. HS(1) P HS (2) P HS (3) P HS (4) P HS (5) P HS (6)……P HS (n) and the heat P generated by the power semiconductor devices in the lower bridge arm. LS (1) P LS (2) P LS (3) P LS (4) P LS (5) P LS (6)……P LS (n), and can also obtain the junction temperature T of the power semiconductor device of the upper bridge arm at various times from the 1st second to the nth second. HS (1) T HS (2) T HS (3) T HS (4) T HS (5) T HS (6)……T HS (n), and the junction temperature T of the power semiconductor device in the lower bridge arm. LS (1) T LS (2) T LS (3) T LS (4) T LS (5) T LS (6)……T LS (n), where the junction temperature of the power semiconductor device can be measured, for example, by using an NTC thermistor located at the junction of the power semiconductor device, or it can be determined by a publicly available simulation method. These acquired parameters are then substituted into ΔT. HS The characteristic equation of the transfer function of (z) can be obtained as the following difference matrix expression:

[0078]

[0079] Here, for example, a data fitting method can be used to solve the matrix. This completes the calibration of the second thermodynamic model 14 regarding ΔT. HS The dynamic parameter A′ of (s) H B′ H 、a′ H and b′ H .

[0080] For ΔT LS The transfer function of (s) can undergo the same process and be calibrated in a similar manner for the second thermodynamic model 14 with respect to ΔT. LSThe dynamic parameters of (s) will not be described again here.

[0081] In step S5, the temperature T can be estimated at least based on the coolant assigned to each power semiconductor device. Ce The junction temperature of each power semiconductor device is estimated using the second thermodynamic model 14, along with the power loss of each device. For example, to determine the junction temperature of each power semiconductor device at time k, the power loss P generated by the power semiconductor devices in the upper and lower arms at time k can be determined using the power loss models of the upper and lower arms. HS (k), P LS (k). Based on the aforementioned power loss P HS (k) and the estimated temperature T of the power semiconductor device coolant associated with the upper bridge arm. Ce Through the second thermodynamic model 14 regarding ΔT HS The dynamic parameter A′ of (s) H B′ H 、a′ H and b′ H The estimated temperature difference ΔT between the junction temperature of a power semiconductor device and the coolant temperature at time k can be determined. HS (k):

[0082] ΔT HS (k)=ΔT HS (k)*(A′ N k -2 +B′ N k -1 )+(K HH_C *P HS (k)+K LH_C *P LS (k))*(a′ H k -1 +b′ H )

[0083] The estimated temperature difference ΔT HS (k) and estimated coolant temperature T Ce The sum equals the estimated junction temperature of the power semiconductor device in the upper bridge arm. The estimation process for the junction temperature of the power semiconductor device in the lower bridge arm is similar and will not be repeated here.

[0084] It should be noted that when multiple NTC thermistors are included in the circuit topology, the average temperature can be estimated using the coolant. To replace the coolant assigned to the power semiconductor device for estimating temperature T Ce Therefore, the average temperature can be estimated at least based on the coolant. The junction temperature of each power semiconductor device is estimated using the second thermodynamic model 14, along with the power loss of each device.

[0085] Furthermore, the power loss of the power semiconductor device can be re-determined based on the junction temperature estimated by the second thermodynamic model 14 using the power loss model of the power semiconductor device, and steps S1 to S5 can be executed iteratively, thereby continuously performing the iterative process regarding junction temperature and power loss.

[0086] According to this application, the parameter calibration process of each model involved in junction temperature estimation is decoupled from each other. The steady-state and dynamic parameters of each model are gradually updated and optimized through finite element analysis. In particular, compared with traditional algorithms based on model order reduction and state variable observers, the method according to this application can not only simplify the calculation process and save a lot of computing power, but also reduce the steady-state error of the estimated junction temperature. Moreover, it can be flexibly applied to different topologies of power semiconductor devices.

[0087] In addition, it should be noted that the step numbers described herein do not necessarily represent the order of steps, but are merely a reference numeral. The order may be changed depending on the specific circumstances, as long as the technical objective of this application can be achieved.

[0088] Figure 6 A schematic block diagram of an apparatus for estimating the junction temperature of a power semiconductor device according to an exemplary embodiment of this application is shown.

[0089] like Figure 6 As shown, the device 10 may include the following components:

[0090] - A power loss model 11 for power semiconductor devices, which determines the steady-state and dynamic data of power loss of each power semiconductor device under a pre-given coolant temperature condition based on the operating parameters of the power semiconductor device.

[0091] - First thermodynamic model 12, which is configured to estimate the estimated temperature difference ΔT between the NTC thermistor temperature and the coolant temperature. NTCe The steady-state and dynamic parameters of the first thermodynamic model are calibrated based on at least the steady-state and dynamic data of the power loss of the power semiconductor device, respectively.

[0092] - Negative feedback regulation unit 13, which is configured to base its regulation on the actual temperature T of the NTC thermistor measured under a pre-given coolant temperature condition. NTCm and the estimated temperature difference ΔT determined by the first thermodynamic model 12 NTCe The estimated temperature T of the coolant assigned to each power semiconductor device is determined by negative feedback regulation. Ce ;and

[0093] - A second thermodynamic model 14 is configured to determine an estimated temperature difference between the junction temperature of a power semiconductor device and the coolant temperature, wherein the steady-state and dynamic parameters of the second thermodynamic model 14 for estimating the junction temperature of the power semiconductor device are calibrated, at least based on steady-state and dynamic data of the power loss of the power semiconductor device, wherein the estimated temperature T of the coolant associated with each power semiconductor device is at least based on the estimated temperature T. Ce The junction temperature of each power semiconductor device is estimated using the second thermodynamic model 14, along with the power loss of each device.

[0094] It should be understood that the terms “first,” “second,” “third,” etc., used in this document are for descriptive purposes only and should not be construed as indicating or implying relative importance, nor should they be construed as implicitly specifying the number of technical features indicated.

[0095] If an embodiment includes an "and / or" association between a first feature and a second feature, it should be interpreted as follows: according to one implementation, the embodiment has not only the first feature but also the second feature; according to another implementation, the embodiment has either only the first feature or only the second feature.

[0096] Although specific embodiments have been described above, these embodiments are not intended to limit the scope of this application, even when only a single embodiment is described with respect to a particular feature. The feature examples provided in this application are intended for illustrative purposes and not for limitation, unless otherwise stated. In practice, multiple features may be combined with each other as needed and where technically feasible. Various substitutions, modifications, and alterations are also conceived without departing from the spirit and scope of this application.

Claims

1. A method for estimating a junction temperature of a power semiconductor device, the method comprising the steps of: determining, by means of a power loss model (11) of the power semiconductor device, steady-state data and dynamic data of a loss power of the respective power semiconductor device at a predefined coolant temperature condition based on operating parameters of the power semiconductor device; at least based on steady state data and dynamic data of a loss power of the power semiconductor device, calibrate steady state parameters and dynamic parameters of a first thermodynamic model (12), respectively, wherein the first thermodynamic model (12) is used to determine an estimated temperature difference ΔΤ of the NTC thermistor temperature with respect to the coolant temperature NTCe ; based on the actual temperature T of the NTC thermistor measured at a predetermined coolant temperature NTCm and the estimated temperature difference ΔT determined by the first thermodynamic model (12) NTCe determining the coolant estimated temperature T assigned to each power semiconductor device in a negative feedback-regulated manner Ce ; calibrating, based on at least the steady-state data and the dynamic data of the loss power of the power semiconductor device, a steady-state parameter and a dynamic parameter, respectively, of a second thermodynamic model (14) for determining an estimated temperature difference of the junction temperature of the power semiconductor device with respect to the coolant temperature; and at least on the basis of the estimated temperature T of the cooling liquid assigned to the respective power semiconductor device Ce and the loss power of the respective power semiconductor device, the junction temperature of the respective power semiconductor device is estimated by means of the second thermodynamic model (14).

2. The method of claim 1, wherein, based on steady state data and dynamic data of the loss power of the power semiconductor device and the measured NTC thermistor actual temperature T NTCm calibrate steady state parameters and dynamic parameters of the first thermodynamic model (12), respectively.

3. The method of claim 1, wherein, calibrating, based on the steady-state data and the dynamic data of the loss power of the power semiconductor device and an acquired junction temperature, the steady-state parameter and the dynamic parameter, respectively, of the second thermodynamic model, wherein the junction temperature of the power semiconductor device is acquired by means of measurement and / or simulation.

4. The method of any one of claims 1 to 3, wherein, measured NTC thermistor actual temperature T NTCm and an estimated temperature difference ΔT determined by the first thermodynamic model (12) NTCe determining a coolant estimated temperature T in a negative feedback-regulated manner, in particular in a PID-regulated manner Ce such that the NTC thermistor actual temperature T NTCm deviates from an NTC thermistor estimated temperature T NTCe wherein the NTC thermistor estimated temperature T NTCe is equal to the sum of the coolant estimated temperature T Ce and the estimated temperature difference ΔT NTCe .

5. The method of any one of claims 1 to 3, wherein, at least on the basis of the coolant estimated temperature T Ce deriving a coolant estimated average temperature and at least on the basis of the coolant estimated average temperature and the loss power of the respective power semiconductor device, a junction temperature of the respective power semiconductor device is estimated by means of the second thermodynamic model (14), wherein, in particular, the coolant estimated temperature T Ce and the coolant flow rate information assigned to the respective power semiconductor device, a coolant estimated average temperature is derived 6. The method of claim 2, wherein, The steady state parameters of the first thermodynamic model (12) are fitted as a linear expression, wherein the steady state data of the power semiconductor device's loss power and the measured NTC thermistor actual temperature T NTCm In particular, the linear expression is determined in a matrix least squares method.

7. The method of any one of claims 1 to 3, wherein, determining the loss power of the power semiconductor device based on at least a current flowing through the power semiconductor device, a voltage applied to the power semiconductor device, a modulation pattern parameter of the power semiconductor device, a switching frequency and / or the junction temperature of the power semiconductor device estimated by means of the second thermodynamic model (14), wherein the loss power comprises, inter alia, a switching loss and a conduction loss, wherein the modulation pattern parameter comprises, for example, a modulation ratio, a dead-time and / or a modulation frequency.

8. The method of any one of claims 1 to 3, wherein, In the case of a predefined constant coolant temperature, steady-state data of the loss power of the individual power semiconductor devices are acquired, and the actual temperature T of the NTC thermistor (13) is measured NTCm ; In the case of a coolant temperature which varies over time at a predefined rate of change, dynamic data of the dissipated power of the individual power semiconductor devices are acquired and the actual temperature T of the NTC thermistor (13) is measured NTCm .

9. The method of any one of claims 1 to 3, wherein, re-determining, by means of the power loss model (11) of the power semiconductor device, the loss power of the power semiconductor device based on the junction temperature of the power semiconductor device estimated by means of the second thermodynamic model (14) and cyclically performing the steps of the method.

10. An apparatus (10) for estimating a junction temperature of a power semiconductor device, the apparatus (10) being configured to perform the method according to any one of claims 1 to 9, wherein, The apparatus (10) comprises the following means: a power loss model (11) of the power semiconductor device, by means of which steady-state data and dynamic data of a loss power of the respective power semiconductor device at a predefined coolant temperature condition are determined based on operating parameters of the power semiconductor device; a first thermodynamic model (12) configured for estimating an estimated temperature difference ΔΤ of the NTC thermistor temperature with respect to the coolant temperature NTCe wherein the steady state parameters and the dynamic parameters of the first thermodynamic model are respectively calibrated based on at least steady state data and dynamic data of a loss power of the power semiconductor device; a negative feedback regulation unit (13) configured to determine, in a negative feedback regulation manner, a coolant estimated temperature T NTCm and an estimated temperature difference ΔT determined by said first thermodynamic model (12) NTCe assigned to each power semiconductor device Ce ; and a second thermodynamic model (14) configured for determining an estimated temperature difference of a junction temperature of the power semiconductor device with respect to a coolant temperature, wherein steady state parameters and dynamic parameters of the second thermodynamic model (14) for estimating the junction temperature of the power semiconductor device are calibrated based on at least steady state data and dynamic data of a loss power of the power semiconductor device, respectively, wherein the coolant temperature T Ce and the loss power of the respective power semiconductor device are estimated by means of the second thermodynamic model (14) for estimating the junction temperature of the respective power semiconductor device.

11. A computer program product, for example a computer readable program carrier, containing computer program instructions which, when executed by a processor, at least assist in implementing the steps of the method according to any one of the preceding claims 1 to 9.