Noise reduction filtering and soft start multiplexing circuit

Abstract

The invention relates to the field of integrated circuits, in particular to a noise reduction filtering and soft start multiplexing circuit, which comprises a noise reduction capacitor controller and a soft start multiplexing module, and is characterized in that the soft start multiplexing module charges an external capacitor by using a current source according to two reference voltages provided by a reference voltage module under the condition of normal enabling; when charging reaches an overturning threshold value of a comparator in the soft start multiplexing module, charging is stopped through a noise reduction capacitor controller, and a low-noise reference voltage is obtained by performing RC filtering on the reference voltage. According to the invention, the filter which can be used as a soft start power-on controller and can also be used as a reference noise reduction filter is introduced, the port and chip area can be saved, and the research and development cost of the chip can be better controlled.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of integrated circuits, in particular to a noise reduction filter and soft start multiplexing circuit. BACKGROUND

[0002] Low Drop-out Regulator (LDO) is widely used in the whole machine as the secondary power supply due to its good current capability and ripple suppression capability. In actual application, the traditional LDO will produce an overshoot at the output end because the loop response is slower than the reference power-on, and the lower system may be damaged under the condition of long-time overshoot power supply, which is unacceptable for the system to be powered. Therefore, a soft start circuit is added to the design of LDO to solve the overshoot problem. In the traditional soft start circuit, a unity gain buffer is usually added at the reference voltage end, and the reference voltage after the buffer is used as the reference voltage of the LDO. The reference input of the buffer is connected to a power-on offset transistor as a soft start power-on control unit, and a capacitor is connected to the offset transistor, which is used to control the power-on time of the soft start circuit. However, this structure has a disadvantage. Because the gain of the buffer is limited, it cannot well reflect the reference voltage, and the large capacitor introduced only serves as a time controller for soft start power-on and cannot participate in the filtering and noise reduction of the reference voltage. SUMMARY

[0003] In view of the problems existing in the prior art, in order to reduce the port and chip area, the present application provides a noise reduction filter and soft start multiplexing circuit. The circuit includes a noise reduction capacitor controller and a soft start multiplexing module. When the soft start multiplexing module is normally enabled, two reference voltages provided by a reference voltage module are charged to an external capacitor by using a current source. When the charging reaches the flip threshold of the internal comparator of the soft start multiplexing module, the charging is stopped by the noise reduction capacitor controller, and an RC filter is used to obtain a low-noise reference voltage.

[0004] The noise reduction filter and soft start multiplexing circuit provided by the present application can serve as a soft start power-on controller and a reference noise reduction filter, and can also save the port and chip area, thereby better controlling the research and development cost of the chip. BRIEF DESCRIPTION OF DRAWINGS

[0005] Figure 1 It is a schematic diagram of the principle of the traditional linear voltage regulator with soft start;

[0006] Figure 2 It is a schematic diagram of the circuit structure of the traditional linear voltage regulator with soft start;

[0007] Figure 3The application relates to a principle schematic diagram of a noise reduction filter and soft start multiplexing circuit applied to a linear voltage stabilizer.

[0008] Figure 4 The application relates to a circuit structure schematic diagram of a noise reduction filter and soft start multiplexing circuit.

[0009] Figure 5 The application relates to a noise simulation result schematic diagram of a traditional structure.

[0010] Figure 6 The application relates to a power-on soft start simulation schematic diagram. DETAILED DESCRIPTION

[0011] The technical solutions in the embodiments of the application will be clearly and completely described in the specification of the application with reference to the drawings in the embodiments of the application. Obviously, the described embodiments are only part of the embodiments of the application, rather than all the embodiments of the application. Based on the embodiments of the application, all other embodiments obtained by those skilled in the art without creative work fall within the protection scope of the application.

[0012] The application provides a noise reduction filter and soft start multiplexing circuit, which comprises a noise reduction capacitor controller and a soft start multiplexing module, wherein the soft start multiplexing module charges an external capacitor by using a current source according to two reference voltages provided by a reference voltage module under the condition that the soft start multiplexing module is enabled normally; when the charging reaches a flip threshold of a comparator in the soft start multiplexing module, the charging is stopped through the noise reduction capacitor controller, and a low-noise reference voltage is obtained by RC filtering the reference voltage. In the application of the LDO, during the power-on process, the LDO can be designed to be soft-started through the noise reduction filter and soft start multiplexing circuit, and the soft start power-on setting capacitor functions as a noise reduction filter, so that the compatibility of a single circuit in application is improved.

[0013] ATTACHMENT Figure 1 The traditional LDO with a soft start function comprises a reference module, a soft start module, an EA unit and a feedback resistor unit, mainly comprises an error amplifier EA, a circuit MP composed of MOS tubes, a first feedback resistor R1 and a second feedback resistor R2, the reference is used as a reference of the LDO operational amplifier, and an overshoot appears at the output end of the LDO during power-on because the loop is established slower than the reference. In order to solve the problem, the soft start module is added to the path where the reference is connected to the LDO operational amplifier, the power-on time of the reference is slowed down, and the LDO power-on overshoot problem is solved. However, the traditional soft start circuit has a single function, and the soft start circuit does not have a noise reduction filter function.

[0014] ATTACHMENT Figure 2 The traditional LDO soft start module, Figure 2In this circuit, the first P-type MOSFET MP1 and the second P-type MOSFET MP2 serve as internal biases for the soft-start module. The first P-type MOSFET MP1 provides the charging current for the external capacitor C_ss. The second P-type MOSFET MP2 serves as the bias current for the operational amplifier (op-amp). The fifth P-type MOSFET MP5 acts as the control transistor for the soft-start. The sixth P-type MOSFET MP6 and the seventh P-type MOSFET MP7 serve as the first reference voltage Vref0 and the feedback input for the op-amp. The third N-type MOSFET MN3, the third P-type MOSFET MP3, and the fourth P-type MOSFET MP4 provide a negative feedback loop. Specifically, when the circuit is powered on, the main op-amp's loop has not yet been established, but the reference voltage has already been established. The additional fifth P-type MOSFET MP5 is used to bypass the loop establishment time. Figure 2 The structure is a basic soft-start circuit, but its function is limited. After startup, the operational amplifier gain is limited, resulting in low reference accuracy and no filtering function for the reference. In order to optimize this structure, a soft-start circuit with noise reduction filtering is introduced.

[0015] Figure 3 The invention provides an application scenario where the circuit is used between a reference voltage module and other external circuits to reduce noise and achieve soft-start of the reference voltage output by the reference voltage module. For example, in... Figure 3 This is used to provide a reference voltage for the inverting input of the error amplifier. Figure 3 The diagram provided only illustrates that the circuit of this invention consists of resistors, MOSFETs, current mirrors, and logic devices. Figure 3 The connection relationship in the middle is not the actual connection relationship of the present invention. The soft-start multiplexing module includes a constant current source, a power switch, and a comparator. The noise reduction capacitor controller outputs a control signal to control the power switch to turn on. When the power switch is turned on, the constant current source charges the external capacitor until the comparator's flip-flop threshold is reached. Then, the noise reduction capacitor controller outputs a low level to turn off the power switch, so that the external capacitor stops charging.

[0016] As an alternative implementation method, such as Figure 4 This invention utilizes a noise reduction, filtering, and soft-start multiplexing circuit to reduce noise and achieve soft-start for the two reference voltages output by the BANDGAP reference voltage module, namely the first reference voltage Vref0 and the second reference voltage Vref1. The power switch includes a first N-type MOSFET MN1, the comparator includes a first P-type MOSFET MP1 and a second P-type MOSFET MP2, and the soft-start multiplexing module further includes a tail current source composed of a third P-type MOSFET MP3, a fifth P-type MOSFET MP5, and a sixth P-type MOSFET MP6, and a current mirror load composed of a second N-type MOSFET MN2 and a third N-type MOSFET MN3.

[0017] The gate of the first N-type MOSFET is connected to the control signal output by the noise reduction capacitor controller, and the drain of the first N-type MOSFET is connected to the constant current source I. change The negative terminal of the constant current source is connected to the power supply terminal, the source of the first N-type MOS transistor is connected to the gate of the second P-type MOS transistor, the first reference voltage provided by the reference voltage module, and one end of the external voltage are connected together.

[0018] The gate of the second N-type MOS transistor is connected to its drain, the drain of the fifth P-type MOS transistor, and the gate of the third N-type MOS transistor. The source of the second N-type MOS transistor is connected to one end of the first resistor and the drain of the first P-type MOS transistor.

[0019] The drain of the third N-type MOSFET is connected to the drain of the sixth P-type MOSFET and serves as the output of the soft-start multiplexing module, which in turn serves as the input of the noise reduction capacitor controller; the source of the third N-type MOSFET is connected to one end of the second resistor and the drain of the second P-type MOSFET.

[0020] The gate of the first P-type MOS transistor is connected to the second reference voltage provided by the reference voltage module, and the source of the first P-type MOS transistor is connected to the drain of the third P-type MOS transistor and the source of the second P-type MOS transistor.

[0021] The gate of the third P-type MOSFET is connected to the gates of the fifth and sixth P-type MOSFETs, and is connected to the externally supplied bias current I. BIAS Connections: The drains of the third, fifth, and sixth P-type MOSFETs are connected to the power supply terminals.

[0022] The other end of the first resistor, the other end of the second resistor, and the other end of the external voltage are all connected to the ground terminal GND.

[0023] The noise reduction capacitor controller includes a seventh P-type MOSFET MP7, an eighth P-type MOSFET MP8, an OR unit, a first buffer Buffer0, a second buffer Buffer1, a first NAND_1, a second NAND_2, and a first inverter INV0, wherein:

[0024] The gate of the seventh P-type MOSFET is connected to the output of the first inverter. The source of the seventh P-type MOSFET and the source of the eighth P-type MOSFET are connected to the power supply terminal VIN. The drain of the seventh P-type MOSFET is connected to the output terminal of the soft-start multiplexing module and the input terminal of the first buffer.

[0025] The gate of the eighth P-type MOS transistor is connected to the output terminal of the first buffer and the input terminal of the first NAND arithmetic unit, and the drain of the eighth P-type MOS transistor is connected to the inverted signal output of the first buffer.

[0026] The output of the first NAND unit is connected to the input of the second buffer and the input of the second NAND unit.

[0027] The second enable signal ENN serves as the input to the second NAND operator, and the output of the second NAND operator is connected to the input of the first NAND operator.

[0028] The output of the second buffer serves as the input of the first inverter, and the output of the first inverter, i.e., endpoint C in the attached diagram, serves as the input of the OR operator.

[0029] The arithmetic logic unit (ALU) may receive the first enable signal ENN0 and the signal output from the first inverter, or the output of the ALU may be used as a control signal to turn on the power switch.

[0030] Once the reference is established, the reference voltage module outputs a first reference voltage Vref0 and a second reference voltage Vref1. At this time, the first reference voltage Vref0 > the second reference voltage Vref1. Since the first reference voltage Vref0 has a capacitance C... NR_SS This results in slow power-up. At this time, the first O-type MOSFET MP1 turns on, and the second P-type MOSFET MP2 turns off. The output terminal C of the first inverter in the noise reduction capacitor controller is at a high level. When the enable signal is normally enabled, the second enable signal ENN and the first enable signal ENN0 are at a low level. At this time, the switching transistor, i.e., the first N-type MOSFET MN1, turns on, and the current source supplies the external capacitor C. NR_SS During charging, when the charge reaches the comparator's toggling threshold, the output of the first inverter in the logic control module at point C becomes low, turning it off. This low level controls the first N-type MOSFET MN1 to turn off. At this time, C... NR_SS The capacitor stops charging, and the reference voltage is then RC filtered, resulting in a low-noise reference voltage. (Appendix) Figure 5 The comparison of the equivalent output noise voltage of the proposed structure and the traditional soft-start structure in simulation shows that the noise voltage of the proposed mechanism is reduced by 50% compared with that of the traditional structure; Appendix Figure 6 To simulate the power-on soft-start of a noise reduction filtering and soft-start multiplexing circuit according to the present invention, the simulation diagram shows that the time required for 90% power-on completion is 3ms.

[0031] In summary, the noise reduction filtering and soft-start multiplexing circuit of the present invention, through C NR_SSAn external capacitor, through an internal noise reduction and soft-start multiplexing module circuit, enables soft-start power-on delay and noise reduction filtering functions. In this invention, when the reference voltage is used as the operational amplifier's reference voltage, a soft-start circuit is introduced to prevent overshoot at the LDO output. Simultaneously, to reduce the output noise of the reference voltage, thereby reducing the overall noise of the LDO, this structure achieves both soft-start and noise reduction filtering functions within the same circuit. Compared to traditional LDOs, this enhances the versatility of a single circuit module, saves chip area in circuit design, and enables low-noise characteristics in applications, realizing two functions within a single module circuit.

[0032] The above-described embodiments further illustrate the purpose, technical solution, and advantages of the present invention. It should be understood that the above-described embodiments are merely preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made to the present invention within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A noise reduction filter and soft start multiplexing circuit, characterized by, The circuit is arranged between a reference voltage module and an external circuit using the reference voltage, and is used for noise reduction of the reference voltage and soft start of the circuit. The circuit comprises a noise reduction capacitor controller, a soft start multiplexing module and an external capacitor. When enabled normally, the soft start multiplexing module charges the external capacitor by using a current source according to two reference voltages provided by the reference voltage module. When the charging reaches a flip threshold of a comparator in the soft start multiplexing module, the charging is stopped by the noise reduction capacitor controller, and an RC filter is used to filter the reference voltage to obtain a low-noise reference voltage.

2. The noise reduction filter and soft start multiplexing circuit according to claim 1, wherein, The soft start multiplexing module comprises a constant current source, a power switch and a comparator. The noise reduction capacitor controller outputs a control signal to control the opening of the power switch. When the power switch is opened, the external capacitor is charged by using the constant current source until the flip threshold of the comparator is reached. Then, the noise reduction capacitor controller outputs a low level to close the power switch, so that the charging of the external capacitor is stopped.

3. The noise reduction filter and soft start multiplexing circuit according to claim 2, wherein, In the soft start multiplexing module, the power switch comprises a first N-type MOS transistor, the comparator comprises a first P-type MOS transistor and a second P-type MOS transistor, the soft start multiplexing module further comprises a tail current source composed of a third P-type MOS transistor, a fifth P-type MOS transistor and a sixth P-type MOS transistor, and a current mirror load composed of a second N-type MOS transistor and a third N-type MOS transistor. In the soft start multiplexing module, the gate of the first N-type MOS transistor is connected with the control signal output by the noise reduction capacitor controller, the drain of the first N-type MOS transistor is connected with the negative electrode of the constant current source, the positive electrode of the constant current source is connected with a power supply end, and the source of the first N-type MOS transistor is connected with the gate of the second P-type MOS transistor, a first reference voltage provided by the reference voltage module and one end of an external voltage. The gate of the second N-type MOS transistor is connected with the drain of the second N-type MOS transistor, the drain of the fifth P-type MOS transistor and the gate of the third N-type MOS transistor, the source of the second N-type MOS transistor is connected with one end of a first resistor and the drain of the first P-type MOS transistor. The drain of the third N-type MOS transistor is connected with the drain of the sixth P-type MOS transistor and serves as an output of the soft start multiplexing module, and the output serves as an input of the noise reduction capacitor controller. The source of the third N-type MOS transistor is connected with one end of a second resistor and the drain of the second P-type MOS transistor. The gate of the first P-type MOS transistor is connected with a second reference voltage provided by the reference voltage module, and the source of the first P-type MOS transistor is connected with the drain of the third P-type MOS transistor and the source of the second P-type MOS transistor. The gate of the third P-type MOS transistor is connected with the gate of the fifth P-type MOS transistor and the gate of the sixth P-type MOS transistor, and is connected with an external bias current. The drain of the third P-type MOS transistor, the drain of the fifth P-type MOS transistor and the drain of the sixth P-type MOS transistor are connected with the power supply end. The other end of the first resistor, the other end of the second resistor and the other end of the external voltage are all connected with a ground end. The first reference voltage provided by the reference voltage module is smaller than the second reference voltage provided by the reference voltage module.

4. The noise reduction filter and soft start multiplexing circuit according to claim 3, wherein, ​ 5. The noise reduction filter and soft start multiplexing circuit according to claim 3, wherein, The noise reduction capacitor controller comprises a seventh P-type MOS transistor, an eighth P-type MOS transistor, an OR operator, a first buffer, a second buffer, a first NAND operator, a second NAND operator, and a first inverter, wherein: The gate of the seventh P-type MOS transistor is connected with the output of the first inverter, the source of the seventh P-type MOS transistor and the source of the eighth P-type MOS transistor are connected with a power supply terminal, and the drain of the seventh P-type MOS transistor is connected with the output terminal of the soft start multiplexing module and the input terminal of the first buffer; The gate of the eighth P-type MOS transistor is connected with the output terminal of the first buffer and the input terminal of the first NAND operator, and the drain of the eighth P-type MOS transistor is connected with the inverting signal of the output of the first buffer; The output terminal of the first NAND operator is connected with the input terminal of the second buffer and the input terminal of the second NAND operator; The second enable signal is input to the second NAND operator, and the output terminal of the second NAND operator is connected with the input terminal of the first NAND operator; The output of the second buffer is input to the first inverter, and the output of the first inverter is input to the OR operator; The OR operator receives the first enable signal and the signal output by the first inverter, and the output of the OR operator is the opening control signal for controlling the power switch.

6. The noise reduction filter and soft start multiplexing circuit according to claim 5, wherein, When the reference voltage module starts to provide the first reference voltage and the second reference voltage, and the first enable signal and the second enable signal are low, the first P-type MOS transistor is opened, the second P-type MOS transistor is closed, and the output of the first inverter of the noise reduction capacitor controller is high.

7. The noise reduction filter and soft start multiplexing circuit according to claim 5 or 6, characterized in that, When the external capacitor charging reaches the flip threshold of the comparator, the output of the first inverter of the noise reduction capacitor controller is low to control the first N-type MOS transistor to be closed, and the charging of the external capacitor is stopped.

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