Converter

Abstract

The invention relates to a converter. A voltage converter formed on a GaN coated substrate includes: a first chip including a first e-mode transistor and a first control circuit for the first transistor; and a second chip including a second e-mode transistor and a second control circuit of the second transistor, and adapted for forwarding the first voltage received from the third control circuit to the second chip; wherein the second chip comprises a voltage converter adapted for converting the first voltage into a second voltage, the voltage converter comprising a first current source for use when an output voltage of the converter is below a threshold voltage, and a second current source for use when the output voltage is above the threshold voltage.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to French patent application number FR2409216 entitled “Convertisseur”, filed August 29, 2024, and U.S. patent application number 19 / 304,012 entitled “Converter”, filed August 19, 2025, which are incorporated herein by reference to the fullest extent permitted by law. Technical Field

[0003] This description generally relates to electronic systems and devices, and more specifically to voltage conversion within electronic systems or devices. More specifically, this description relates to a converter formed in and on a structure comprising gallium nitride (GaN). Background Technology

[0004] Conventionally, electronic systems and devices are formed from silicon substrates, but other semiconductor materials can also be used. In particular, structures including gallium nitride (GaN) can be used.

[0005] It is hoped that some aspects of electronic systems and devices formed on gallium nitride-incorporated structures and gallium nitride-incorporated structures can be improved, at least in part. Summary of the Invention

[0006] Electronic systems and devices that need to be formed in and on structures including gallium nitride.

[0007] A voltage converter is required in and formed on a structure including gallium nitride.

[0008] One embodiment overcomes some or all of the disadvantages of known voltage converters formed in and on gallium nitride structures.

[0009] One embodiment provides a more efficient voltage converter formed in and on a structure including gallium nitride.

[0010] One embodiment provides a voltage converter with a more efficient half-bridge structure.

[0011] One embodiment provides a voltage converter including two chips, a first chip adapted to handle low voltage and a second chip adapted to handle high voltage.

[0012] One embodiment provides a voltage converter in which control voltages are supplied only to a first chip, and these control voltages are forwarded to a second chip via the first chip.

[0013] According to a first aspect, one embodiment provides a voltage converter including a more efficient voltage shifter circuit that enables control voltage to be forwarded from a first chip to a second chip.

[0014] One embodiment provides a voltage converter that uses several current sources depending on the value of the converter's output voltage.

[0015] According to a second aspect, one embodiment provides a circuit that allows a high-voltage signal to be converted into a low-voltage signal.

[0016] According to a third aspect, one embodiment provides a voltage converter formed by two identical configurable chips, each chip being either a first chip or a second chip.

[0017] One embodiment provides a voltage converter formed in and on a monolithic semiconductor substrate having a surface coated with a gallium nitride layer, comprising:

[0018] The first chip includes a first e-mode type HEMT power transistor and a first control circuit for the first transistor; and

[0019] The second chip includes a second control circuit for a second e-mode type HEMT power transistor and a second transistor, and is adapted to forward at least one first voltage received from a third control circuit to the second chip.

[0020] The second chip includes a first voltage shifter circuit, which is adapted to convert at least one first voltage into a second voltage.

[0021] The first voltage shifter circuit includes a first current source suitable for use when the third output voltage of the converter is less than the fourth threshold voltage, and a second current source suitable for use when the third output voltage is higher than the fourth threshold voltage.

[0022] According to one embodiment, first and second current sources are used to provide control voltage to the first transistor.

[0023] According to one embodiment, the fourth threshold voltage is between -5 and 0V.

[0024] According to one embodiment, the fourth threshold voltage is equal to -2V.

[0025] According to one embodiment, a first chip is adapted to receive a high voltage, and a second chip is adapted to receive a low voltage.

[0026] According to one embodiment, the first chip further includes a fourth voltage adapter circuit adapted to convert at least one fifth voltage of the first chip into a sixth diagnostic voltage for forwarding to the second chip.

[0027] The fourth voltage adapter circuit includes an oscillator configured to oscillate a sixth voltage when the fifth voltage is in the first state.

[0028] According to one embodiment, the oscillator is configured not to oscillate the sixth voltage when the fifth voltage is in a second state that is different from the first state.

[0029] According to one embodiment, the first chip and the second chip are identical chips.

[0030] According to one embodiment, the first and second chips each include configuration terminals that allow them to define their functions in the converter.

[0031] According to one embodiment, the converter is a switch-mode power supply.

[0032] According to one embodiment, the converter is a switch-mode power supply of the boost converter type.

[0033] Another embodiment provides a method for converting a seventh input voltage into a third output voltage using a voltage converter formed in and on a monolithic semiconductor substrate having a surface coated with a gallium nitride layer, the voltage converter comprising:

[0034] The first chip includes a first e-mode type HEMT power transistor and a first control circuit for the first transistor; and

[0035] The second chip includes a second control circuit for a second e-mode type HEMT power transistor and a second transistor, and is adapted to forward at least one first voltage received from a third control circuit to the second chip.

[0036] The second chip includes a first voltage adapter circuit adapted to convert at least one first voltage into a second voltage.

[0037] The first voltage converter circuit includes a first current source suitable for use when the third output voltage of the converter is less than a fourth threshold voltage, and a second current source suitable for use when the third output voltage is higher than the fourth threshold voltage.

[0038] Another embodiment provides a method for manufacturing a voltage converter, the voltage converter comprising:

[0039] The first chip includes a first e-mode type HEMT power transistor and a first control circuit for the first transistor; and

[0040] The second chip includes a second e-mode type HEMT power transistor and a second control circuit for the second transistor.

[0041] It includes two identical steps for manufacturing the first and second chips.

[0042] According to one embodiment, the method further includes the step of configuring the first and second chips after the two manufacturing steps.

[0043] According to one embodiment, during the configuration step, the configuration terminals of the first and second chips are used.

[0044] According to one embodiment, a method includes driving a first HEMT power transistor of a first chip using a first control circuit of a first chip of a voltage converter, and driving a second HEMT power transistor of a second chip using a second control circuit of a second chip of a voltage converter. The first and second HEMT power transistors are coupled together in a half-bridge configuration. The first chip is a high-side chip and the second chip is a low-side chip. The method includes receiving a first control signal for the first chip from a third control circuit located outside the first and second chips using the second chip, receiving a second control signal for the second chip from the third control circuit using the second chip, providing the first control signal from the second chip to the first chip, receiving an input voltage of a voltage regulator at the second chip, and generating an output voltage of the voltage regulator at the output of the half-bridge circuit.

[0045] According to an embodiment, the method includes providing a diagnostic signal from a first chip to a second chip.

[0046] According to an embodiment, the method includes providing a diagnostic signal from a second chip to a third control circuit.

[0047] According to an embodiment, the method includes receiving a high voltage at a first chip and a low voltage at a second chip.

[0048] According to an embodiment, the method includes generating a first current using a first current source of a first chip.

[0049] According to an embodiment, the method includes generating a second current using a second current source of the first chip.

[0050] According to an embodiment, a method includes forming a first chip of a voltage converter, including forming a first HEMT power transistor in the first chip and a first driver circuit for the first HEMT transistor in the first chip. The method also includes forming a second chip of a voltage converter, including forming a second HEMT power transistor in the second chip and a second driver circuit for the second HEMT transistor in the second chip. The method further includes coupling the first and second HEMT transistors together in a half-bridge configuration and coupling a third control circuit to the second chip. The third control circuit is configured to provide the second chip with a first control signal for the first chip, provide the second chip with a second control signal for controlling the second chip, and provide the second chip with an input voltage of a voltage regulator. The voltage regulator is configured to provide an output voltage from a combined terminal of the first and second HEMT transistors.

[0051] According to an embodiment, the method includes forming first and second chips in two identical manufacturing steps.

[0052] According to an embodiment, the method includes configuring the first and second chips after two manufacturing steps. Attached Figure Description

[0053] The foregoing features and advantages, as well as other features and advantages, will be described in detail below with reference to the accompanying drawings, in which specific embodiments are given by way of illustration rather than limitation, wherein:

[0054] Figure 1 The structure including gallium nitride is illustrated very schematically;

[0055] Figure 2 Includes two views (A) and (B), illustrating a first type of transistor formed in and on a structure including gallium nitride;

[0056] Figure 3 Two views (A) and (B) are shown, illustrating a second type of transistor formed in a structure including gallium nitride;

[0057] Figure 4 An embodiment of the voltage converter is illustrated schematically and in block diagram form;

[0058] Figure 5 The diagram shows... Figure 4 A practical example of the embodiments shown;

[0059] Figure 6 The diagram shows... Figure 4 An embodiment of a portion of the converter shown;

[0060] Figure 7 The diagram shows... Figure 6An embodiment of the voltage shifter circuit shown in the illustration;

[0061] Figure 8 A more detailed illustration is provided. Figure 6 An embodiment of the voltage shifter circuit shown in the illustration;

[0062] Figure 9 The diagram shows... Figure 6 Another voltage converter circuit of the embodiment shown; and

[0063] Figure 10 It is illustrated in a very schematic way. Figure 4 The actual implementation of the embodiments shown is illustrated. Detailed Implementation

[0064] In the various figures, similar features are indicated by similar reference numerals. In particular, common structural and / or functional features in various embodiments may have the same reference numerals and may have exactly the same structure, dimensions, and material properties.

[0065] For clarity, only detailed illustrations and descriptions are provided for operations and elements useful for understanding the embodiments described herein.

[0066] Unless otherwise indicated, when referring to two elements connected together, it means a direct connection without any intermediate elements other than the conductor; when referring to two elements coupled together, it means that the two elements can be connected or they can be coupled via one or more other elements.

[0067] In the following disclosure, unless otherwise indicated, when referring to absolute position qualifiers (such as the terms "front", "back", "top", "bottom", "left", "right", etc.) or relative position qualifiers (such as the terms "above", "below", "higher", "lower", etc.) or orientation qualifiers (such as "horizontal", "vertical", etc.), the orientation shown in the figure is used.

[0068] Unless otherwise specified, the expressions “approximately,” “about,” “substantially,” and “around” indicate within 10%, and preferably within 5%.

[0069] The embodiments described below relate to electronic systems and devices formed in and on a structure including gallium nitride, examples of which are combined with Figure 1 Description. Using this type of structure does not allow the use of conventional electronic components, especially those employing PN junctions, such as diodes and MOSFET transistors. However, high electron mobility transistors can be used. (Combined) Figure 2 and Figure 3 Describe these two types of transistors.

[0070] The embodiments described below relate more particularly to a voltage converter in and formed on such a structure. More specifically, this is a voltage converter using a half-bridge structure, combined with... Figure 4 and Figure 5 Description. A first aspect of these embodiments relates to a voltage shifter circuit or voltage offset circuit that allows voltage to be forwarded from a low-voltage chip to a high-voltage chip. A second aspect of these embodiments relates to a conversion circuit that allows signals to be forwarded from a high-voltage chip to a low-voltage chip. A third aspect of these embodiments relates to practical example embodiments of a voltage converter and a method of manufacturing the same.

[0071] Furthermore, the above embodiments are particularly suitable for use in any type of industrial market requiring voltage conversion. More specifically, this voltage converter circuit can be designed for:

[0072] The automotive industry, for example, in the field of vehicle electrification or advanced driver assistance systems (ADAS);

[0073] In industrial sectors such as green energy, infrastructure electrification, the Internet of Things (IoT), and smart homes, electricity and energy consumption, as well as data exchange, are key elements.

[0074] The personal electronics industry, such as in the mobile phone and Internet of Things (IoT) sectors, as well as the broadband interface sector;

[0075] The communications equipment, computer and peripherals industry, such as in the infrastructure and data center sectors, and in the low Earth orbit (LEO) satellite sector.

[0076] In particular, these embodiments can be used for energy conversion in the automotive industry. More specifically, these voltage converters can be used in car battery chargers and electric vehicle chargers.

[0077] Figure 1 This is a very schematic cross-sectional view of a semiconductor structure 100 including gallium nitride.

[0078] Structure 100 is generally formed from a substrate 101 (Si) made of a semiconductor material (e.g., a silicon substrate), one side of which is covered with a layer 102 (GaN) made of gallium nitride (GaN). The thickness of layer 102 is between 0.5 and 5 μm.

[0079] When structure 100 is used as the base of an electronic system or device, electronic components are formed in and on layer 102. A metallization layer may also be formed on layer 102.

[0080] Figure 2The diagram includes two views (A) and (B), illustrating a first type of transistor 200 formed in a structure including gallium nitride. View (A) shows a circuit diagram of transistor 200, and view (B) shows a cross-sectional view of the structure 250 forming transistor 200.

[0081] Transistor 200 is a high electron mobility transistor (HEMT), also known as a modulation-doped field-effect transistor (MODFET). In the following text, the high electron mobility transistor will be referred to as an HEMT transistor.

[0082] HEMT transistors (such as transistor 200) include a gate terminal (in Figure 2 (represented as G) source extrema (in) Figure 2 (represented as S) and the leaky extreme (in) Figure 2 (represented as D in Chinese).

[0083] Furthermore, transistor 200 is a depletion-mode HEMT, referred to below as a d-mode type HEMT transistor, or d-mode transistor. According to another designation, transistor 200 is a normally-on type HEMT transistor, or normally-on HEMT transistor, or normally-on transistor. The circuit diagram of transistor 200 shown in view (A) is the circuit diagram that will be used to illustrate d-mode or normally-on transistors in all subsequent figures.

[0084] In practice, transistor 200 can be obtained through structure 250, which is composed of... Figure 1 The structure 250 is of the type described in structure 100. Therefore, structure 250 includes a substrate 251 (Si) made of a conductive material (such as silicon), one side of which is covered by a layer 252 (GaN) made of gallium nitride. The gallium nitride layer 252 is partially covered by a layer 253 (AlGaN) made of aluminum gallium nitride. A connection terminal 254 forms the source recovery contact S of transistor 200. The connection terminal 254 is formed on the portion of layer 252 not covered by layer 253. A connection terminal 255 forms the drain recovery contact D of transistor 200. The connection terminal 255 is formed on the portion of layer 252 not covered by layer 253. A connection terminal 256 constitutes the gate recovery contact G of transistor 200. The connection terminal 256 is formed on a portion of layer 253 and is arranged between connection pads 254 and 255.

[0085] Transistor 200 operates as follows. When the gate G of transistor 200 is in a floating state, or when a positive voltage is applied between its gate G and source S, transistor 200 is in a conducting state, hence the name "normally conducting". To "turn off" transistor 200, that is, to put it in a non-conducting state, a negative voltage is applied between its gate G and source S.

[0086] Figure 3Includes two views (A) and (B), illustrating a second type of transistor 300 formed in a structure including gallium nitride. View (A) shows a circuit diagram of transistor 300, and view (B) shows a cross-sectional view of the structure 350 forming transistor 300.

[0087] Like a combination Figure 2 The described transistors 200 and 300 are high-mobility electronic transistors, or HEMT transistors. Transistor 300 includes a gate terminal ( Figure 3 (represented as G) source extrema ( Figure 3 The terminus is represented as S) and the drain extremum ( Figure 3 (represented as D in Chinese).

[0088] Furthermore, and with Figure 2 In contrast to transistor 200, transistor 300 is an enhancement-mode HEMT transistor, hereinafter referred to as an e-mode type HEMT transistor or e-mode transistor. According to another designation, transistor 300 is a normally-off HEMT transistor, or normally-off HEMT transistor, or normally-off transistor. The circuit diagram of transistor 300 shown in view (A) is the circuit diagram that will be used to illustrate e-mode or normally-off transistors in all subsequent figures.

[0089] In practice, transistor 300 can be obtained through structure 350, which is composed of... Figure 1 The structure 350 is of the type described in structure 100. Therefore, structure 350 includes a substrate 351 (Si) made of a conductive material (such as silicon), one side of which is covered by a layer 352 (GaN) made of gallium nitride. The gallium nitride layer 352 is partially covered by a layer 353 (AlGaN) made of aluminum gallium nitride. A connection terminal 354 forms the source recovery contact S of transistor 300. The connection terminal 354 is formed on the portion of layer 352 not covered by layer 353. A connection terminal 355 forms the drain recovery contact D of transistor 300. The connection terminal 355 is formed on the portion of layer 352 not covered by layer 353. A connection terminal 356 forms the gate recovery contact G of transistor 300. The connection terminal 356 is formed between layers 352 and 353 and is disposed between connection pads 354 and 355. Furthermore, as... Figure 3 As shown in view (B), a portion of the connection pad 354 overlaps with a portion of the layer 353 covering the connection pad 356.

[0090] Transistor 300 operates as follows. When the gate G of transistor 300 is in a floating state, or when a negative voltage is applied between its gate G and source S, transistor 300 is in a non-conducting state or a turned-off state, hence the name normally-off HEMT transistor. To "turn on" transistor 300, that is, to make it conduct, a positive voltage is applied between its gate G and source S.

[0091] Figure 4 An embodiment of the voltage converter 400 and its external control circuit 410 (μC) is illustrated.

[0092] The voltage converter 400 or voltage converter circuit is suitable for converting a first received voltage into a second voltage supplied between terminal OUT_400 and reference terminal SOURCE_400. According to one example, the converter 400 is a switch-mode power supply, such as a boost converter type. More specifically, the voltage converter 400 has a half-bridge structure, i.e., a structure using two power transistors arranged in series and their driver circuitry.

[0093] According to one embodiment, the converter 400 includes at least two chips: a chip 401 (HS) for receiving high voltage and a chip 402 (LS) for receiving low voltage. Chip 401 is also referred to as the high-voltage chip, and chip 402 is also referred to as the low-voltage chip. Hereinafter, voltages between 0 and 20V, preferably between 5 and 15V, are considered low voltages. Hereinafter, voltages above 350V, preferably between 400 and 650V, are considered high voltages.

[0094] Chip 401 includes an e-mode type HEMT power transistor T401. The drain terminal of transistor T401 is coupled (preferably connected) to terminal DRAIN_400 of converter 400. The source terminal of transistor T401 is coupled (preferably connected) to terminal OUT_400 of converter 400.

[0095] Chip 401 also includes a driver circuit D401 for transistor T401. The output terminal of driver circuit D401 is coupled (preferably connected) to the gate terminal of transistor T401.

[0096] Chip 402 includes an e-mode type HEMT power transistor T402. The drain terminal of transistor T402 is coupled (preferably connected) to terminal OUT_400 of converter 400. The source terminal of transistor T402 is coupled (preferably connected) to terminal SOURCE_400 of converter 400.

[0097] Chip 402 also includes a driver circuit D402 for transistor T402. The output terminal of driver circuit D402 is coupled (preferably connected) to the gate terminal of transistor T402.

[0098] Converter 400 is adapted to be controlled by control circuitry 410. According to one embodiment, control circuitry 410 is adapted to supply control voltages to chips 401 and 402 of converter 400, but is only coupled to chip 402. More specifically, chip 402 includes a terminal IN_LS_400 intended for receiving a control voltage CMDLS_400 for itself, and a terminal IN_HS_400 intended for receiving a control voltage CMDLS_400 for chip 401. According to one embodiment, chip 401 includes a circuit system that allows adaptation to the voltage level of the control voltage CMDHS_400 of control circuitry 410 so that these control voltages CMDHS_400 can be used by chip 402. Examples of such circuitry are combined. Figures 6 to 8 Describe it.

[0099] Control circuitry 410 is also adapted to receive voltages from chip 402, such as the diagnostic voltage RSPHS_400. For this purpose, and according to one embodiment, chip 402 includes a circuit system that allows the diagnostic voltage RSPHS_400 to be converted so that chip 401 can receive these voltages and forward them to control circuitry 410. Examples of such circuitry are combined... Figure 6 and Figure 9 Describe it.

[0100] The voltage conversion method using converter 400 is as follows: The voltage to be converted is supplied between terminals IN_400 and SOURCE_400, and the converted voltage is output between terminals OUT_400 and SOURCE_400. A DC potential is supplied to terminal DRAIN_400. This causes transistors T401 and T402 to alternately turn on and off via their driver circuits according to commands supplied by the control circuit.

[0101] Figure 5 The diagram illustrates the combination. Figure 4 A practical example embodiment of the described voltage converter 400 and its control circuitry 410 (μC). More specifically, Figure 5 The diagram illustrates the converter 500 and its control circuit 550 (μC).

[0102] Converter 500 in combination Figure 1 The structure described is formed in and on a structure of the type described. More specifically, most of the components of the converter 500 are formed on this structure, and a few components are formed on a semiconductor structure that does not include gallium nitride (GaN).

[0103] Converter 500 includes:

[0104] Terminal DRAIN_500(DRAIN);

[0105] Terminal OUT_500(OUT);

[0106] Terminal SOURCE_500(SOURCE);

[0107] Terminal SGND_500(SGND);

[0108] Terminal VCC_HS_500(VCC_HS);

[0109] Terminal DZ_HS_500(DZ_HS);

[0110] Terminal VDD_HS_500(VDD_HS);

[0111] The output terminal OUT_500(OUT) is suitable for supplying the converted voltage;

[0112] Output terminal OUT_K_500(OUT_K);

[0113] Terminal VCC_LS_500(VCC_LS);

[0114] Terminal DZ_LS_500(DC_LS);

[0115] Terminal VDD_LS_500(VDD_LS);

[0116] Terminal IN_LS_500(VCC_LS);

[0117] Terminal IN_HS_500(IN_HS);

[0118] Terminal RST_500(RST);

[0119] Terminal DIAG_LS_500 (DIAG_LS); and

[0120] Terminal DIAG_HS_500 (DIAG_HS).

[0121] The converter 500 also includes a combination of Figure 4 The chip 510 of the type of chip 401 described herein, and the combination thereof Figure 4 Chip 520 is of the type described as chip 402. These chips 510 and 520 include components coupled to the respective converter terminals described above, for example, via electrostatic discharge protection circuit 503 (ESD).

[0122] Chips 510 and 520 include similar components. More specifically, chips 510 and 520 may also include configuration terminals ( Figure 5The chip is exactly the same as the one shown in the diagram. The advantage of this is that it avoids compatibility issues caused by differences in manufacturing methods. This aspect of the disclosure combines... Figure 10 To describe in more detail.

[0123] Chip 510 is a low-to-high voltage chip, including a combination of Figure 4 The described transistor T401 is a type of transistor T510. In other words, transistor T510 is an e-mode type HEMT transistor. The drain terminal of transistor T510 is coupled (preferably connected) to terminal DRAIN_500 of converter 500. The first source terminal of transistor T510 is coupled (preferably connected) to terminal OUT_500 of converter 500. The second source terminal of transistor T510 is coupled to terminal OUT_500 of converter 500 via resistor R511.

[0124] Chip 510 also includes a combination of Figure 4 The described driver circuit is a driver circuit for transistor T510 of type D401. The driver circuit for transistor T510 includes various components, among which:

[0125] Gate driver circuit 511 (DRIVER) for transistor T510;

[0126] The 512 (LOGIC) is a collection of logic circuits.

[0127] Voltage regulation circuit 513 (REG);

[0128] Over-temperature detection circuit 514(OT);

[0129] The voltage matching circuit 515 (HS HV->LV Shifter) converts high voltage to low voltage;

[0130] The voltage conversion circuit 516 (HS LV->HV Shifter) converts low voltage to high voltage; and

[0131] Overvoltage protection circuit 517 (VDS Prot.).

[0132] The output of the gate driver circuit 511 is coupled (preferably connected) to the gate terminal of the transistor T510. Circuit 511 receives a control voltage from the logic circuitry set 512. Circuit 511 is supplied with a potential provided by terminal VDD_HS_500 and references the potential of output terminal OUT_500.

[0133] The logic circuit assembly 512 receives voltages from circuits 514 to 517 and combines these voltages to provide a control voltage for the gate driver circuit 511 of transistor T510. Assembly 512 is supplied with a potential provided by voltage regulator circuit 513.

[0134] The voltage regulation circuit 513 includes two input terminals, for example, coupled to terminals VCC_HS_500 and DZ_HS_500 via the electrostatic discharge protection circuit 503. The circuit 513 includes two output terminals, one coupled to terminal VDD_HS_500 (e.g., via circuit 503), and the other providing a power supply potential to the gate driver circuit 511.

[0135] The over-temperature detection circuit 514 is a circuit that allows the detection of abnormal temperature rises inside the converter 500 (specifically inside the chip 510). Circuit 514 is powered by the regulating circuit 513 and provides the over-temperature detection voltage to the set of logic circuits 512.

[0136] As mentioned earlier, voltage matching circuit 515 is suitable for converting high voltage to low voltage. More specifically, voltage matching circuit 515 or voltage adapter circuit 515 is suitable for converting the voltage used by chip 510 into a voltage usable by chip 520. Therefore, circuit 515 is suitable for receiving the voltage to be forwarded to chip 520 from the set of logic circuits 512 and for forwarding the converted voltage to chip 520. Figure 9 A specific embodiment of circuit 515 is described.

[0137] As mentioned above, voltage conversion circuit 516 is suitable for converting low voltage to high voltage. More specifically, voltage conversion circuit 516, or voltage converter circuit 516, or voltage shifter circuit 516 is suitable for converting the voltage used by chip 520 into a voltage usable by chip 510. Therefore, circuit 516 is suitable for receiving voltage from chip 510 and for forwarding the converted voltage to the set of logic circuits 512.

[0138] Protection circuit 517 is adapted to detect any overvoltage or overcurrent that may occur at transistor T510. For this purpose, circuit 517 is supplied with a supply potential provided by voltage regulation circuit 513. Circuit 517 is coupled (preferably connected) to the second source terminal of transistor T510. Circuit 517 provides a detection voltage to the assembly of logic circuits 512.

[0139] Chip 520 is a low-voltage chip, including... Figure 4The described transistor T402 is a type of transistor T520. In other words, transistor T520 is an e-mode type HEMT transistor. The drain terminal of transistor T520 is coupled (preferably connected) to the output terminal OUT_500 of converter 500. The first source terminal of transistor T520 is coupled (preferably connected) to the terminals SOURCE_500 and SGND_500 of converter 500. The second source terminal of transistor T520 is coupled to the terminal OUT_500 of converter 500 via resistor R521.

[0140] Chip 520 also includes a combination of Figure 4 The described driver circuit is a driver circuit for transistor T520 of type D402. The driver circuit for transistor T520 includes various components, among which:

[0141] Gate driver circuit 521 for transistor T520;

[0142] The 522 (LOGIC) is a collection of logic circuits.

[0143] Voltage regulation circuit 523 (REG);

[0144] Over-temperature detection circuit 524(OT);

[0145] The voltage conversion circuit 525 (LS HV->LV Shifter) converts high voltage to low voltage;

[0146] The voltage conversion circuit 526 (LS LV->HV Shifter) converts low voltage to high voltage; and

[0147] Protection circuit 527 (VDS Prot.).

[0148] The output of the gate driver circuit 521 is coupled (preferably connected) to the gate terminal of the transistor T520. Circuit 521 receives a control voltage from the logic circuitry set 522. Circuit 521 is supplied with a potential provided by terminal VDD_LS_500 and referenced to the potential of the output terminal SOURCE_500.

[0149] The logic circuit assembly 522 receives voltages from circuits 524 to 527 and from terminals IN_LS_00, IN_HS_500, RST_500, DIAG_LS_500, and DIAG_HS_500 (e.g., via circuit 503). The logic circuit assembly 522 combines these voltages to supply a control voltage to the gate driver circuit 21 of transistor T520. Assembly 522 is supplied with a potential provided by the voltage regulator circuit system 523.

[0150] The voltage regulation circuit 523 includes two input terminals, for example, coupled to terminals VCC_LS_500 and DZ_LS_500 via the electrostatic discharge protection circuit 503. The circuit 523 includes two output terminals, one coupled to terminal VDD_LS_500 (e.g., via circuit 503), and the other providing a power supply potential to the gate driver circuit 521.

[0151] The over-temperature detection circuit 524 is a circuit that allows the detection of abnormal temperature rises inside the converter 500 (specifically inside the chip 520). Circuit 524 is supplied by the regulating circuit 523 and provides the over-temperature detection voltage to the logic circuit assembly 522 and the terminal DIAG_LS_500.

[0152] As mentioned above, voltage conversion circuit 525 is suitable for converting high voltage to low voltage. More specifically, voltage conversion circuit 525 or voltage converter circuit 525 is suitable for converting the voltage provided by chip 510 into a voltage usable by chip 520. Therefore, circuit 525 is suitable for receiving voltage from chip 520 to be forwarded to chip 510 and for forwarding the converted voltage to the set of logic circuits 520.

[0153] As mentioned above, voltage conversion circuit 526 is suitable for converting low voltage to high voltage. More specifically, voltage conversion circuit 526, or voltage converter circuit 526, or voltage shifter circuit 526, is suitable for converting the voltage used by chip 520 into a voltage usable by chip 510. Therefore, circuit 526 is suitable for receiving voltage from the set of logic circuits 522 and for forwarding the converted voltage to chip 510. Embodiments of circuit 526 are combined... Figures 6 to 8 Describe it.

[0154] Protection circuit 527 is adapted to detect potential overvoltage or overcurrent at transistor T520. For this purpose, circuit 527 is supplied with a supply potential provided by voltage regulation circuit 523. Circuit 527 is coupled (preferably connected) to the second source terminal of transistor T520. Circuit 527 provides a detection voltage to the assembly of logic circuits 522.

[0155] As mentioned above, converter 500 also includes features not included in the combination. Figure 1 The components formed on the structure of type 100 described are diodes and capacitors that cannot be formed on this structure.

[0156] The converter 500 includes a diode D501 with coupling terminals VCC_HS_500 and VCC_LS_500. More specifically, the cathode terminal of diode D501 is coupled (preferably connected) to terminal VCC_HS_500, while the anode terminal of diode D501 is coupled (preferably connected) to terminal VCC_LS_500.

[0157] The converter 500 also includes a capacitor C501 that couples terminals VCC_HS_500 and OUT_K_500. More specifically, the first terminal of capacitor C501 is coupled (preferably connected) to terminal VCC_HS_500, while the second terminal of capacitor C501 is coupled (preferably connected) to terminal OUT_K_500.

[0158] The converter 500 also includes a Zener diode DZ501 with coupling terminals DZ_HS_500 and OUT_K_500. More specifically, the cathode terminal of diode DZ501 is coupled (preferably connected) to terminal DZ_HS_500, while the anode terminal of diode DZ501 is coupled (preferably connected) to terminal OUT_K_500.

[0159] The converter 500 also includes a capacitor C502 that couples terminals VDD_HS_500 and OUT_K_500. More specifically, the first terminal of capacitor C502 is coupled (preferably connected) to terminal VDD_HS_500, while the second terminal of capacitor C502 is coupled (preferably connected) to terminal OUT_K_500.

[0160] The converter 500 also includes a Zener diode DZ502 that couples terminals DZ_LS_500 and SGND_500. More specifically, the cathode terminal of diode DZ502 is coupled (preferably connected) to terminal DZ_LS_500, while the anode terminal of diode DZ502 is coupled (preferably connected) to terminal SGND_500.

[0161] The converter 500 also includes a capacitor C503 that couples terminals VDD_LS_500 and SGND_500. More specifically, the first terminal of capacitor C503 is coupled (preferably connected) to terminal VDD_LS_500, while the second terminal of capacitor C503 is coupled (preferably connected) to terminal SGND_500.

[0162] Furthermore, and as mentioned above, Figure 5The diagram illustrates control circuitry 550 of converter 500. According to one example, control circuitry 550 is a processor, microprocessor, controller, or microcontroller. According to one embodiment, control circuitry 550 is adapted to communicate only with chip 520 and to handle only low voltages, such as those of chip 520. Therefore, control circuitry 550 is adapted to supply a control voltage intended for chip 520 at terminal IN_LS_500 and a control voltage intended for chip 510 at terminal IN_HS_500. Control circuitry 550 is also adapted to supply a reset voltage to terminal RST_500. Control circuitry 550 is also adapted to receive a sensed voltage from chip 520 via terminal DIAG_LS_500 and a sensed voltage from chip 510 via terminal DIAG_HS_500. Control circuitry also references terminal SGND_500. According to an alternative embodiment, converter 500 references a reference potential provided by control circuitry 550.

[0163] Figure 6 The diagram illustrates circuit 600, which shows the combination of... Figure 4 The described converter 400 or combination Figure 5 The described converter 500 is part of a voltage converter circuit.

[0164] Circuit 600 includes:

[0165] Combination Figure 4 The type or combination of the described terminal DRAIN_400 Figure 5 The terminal DRAIN_500 described is of type DRAIN_600 (DRAIN);

[0166] Combination Figure 4 The type or combination of the described terminal OUT_400 Figure 5 The terminal OUT_500 described is of type OUT_600(OUT);

[0167] Combination Figure 4 The type or combination of the described terminal SOURCE_400 Figure 5 The terminal SOURCE_500 described is of type SOURCE_600(SOURCE);

[0168] Combination Figure 4 The type or combination of the described terminal SOURCEK_400 Figure 5 The terminal SGND_500 described is of type SGND_600 (SGND);

[0169] Combination Figure 5The terminal IN_LS_500 described is of type IN_LS_600 (VCC_LS);

[0170] Combination Figure 5 The terminal IN_HS_500 described is a terminal IN_HS_600 (IN_HS) of type IN_HS_500; and

[0171] Combination Figure 5 The terminal DIAG_HS_500 described is of type DIAG_HS_600 (DIAG_HS).

[0172] Like converters 400 and 500, circuit 600 includes two e-mode type HEMT power transistors T601 and T602. More specifically, transistor T601 is of the type of transistor T401 or transistor T510, and transistor T602 is of the type of transistor T402 or transistor T520. Therefore, the drain terminal of transistor T601 is coupled (preferably connected) to terminal DRAIN_600, and the source terminal of transistor T601 is coupled (preferably connected) to terminal OUT_600. The drain terminal of transistor T602 is coupled (preferably connected) to terminal DRAIN_600, and the source terminal of transistor T602 is coupled (preferably connected) to terminal OUT_600.

[0173] Like converters 400 and 500, circuit 600 includes circuitry for driving transistors T601 and T602. Only a portion of this driving circuitry is shown.

[0174] Specifically, the circuit for driving transistor T601 includes:

[0175] Combination Figure 4 The type or combination of the gate driver circuit D401 described Figure 5 The gate driver circuit described is of the type D601, which is gate driver circuit 511.

[0176] Trigger L601;

[0177] Combination Figure 5 The voltage shifter circuit described is of the type 516, and the voltage shifter circuit LS601 (LS_HV); and

[0178] Combination Figure 5 The voltage adapter circuit described is of the type ADAPT601, which is a voltage adapter circuit of the 515 described.

[0179] The gate driver circuit D601 includes an output terminal coupled (preferably connected) to the gate terminal of transistor T601. The input terminal of this circuit D601 is coupled (preferably connected) to the output terminal of flip-flop L601. The input terminal of flip-flop L601 is coupled (preferably connected) to the output terminal of voltage shifter circuit LS601.

[0180] The voltage adapter circuit ADAPT601 is suitable for receiving the fault detection signal FAULT_601 as input and converting it into a fault detection signal that can be interpreted by the circuitry used to drive transistor T602. For this purpose, the ADAPT601 circuit includes an oscillator OSC601 (OSC), a buffer circuit B601 (buf), and a capacitor C601. Figure 9 An example of the ADAPT601 circuit is described in more detail.

[0181] The oscillator OSC601 receives the fault detection signal FAULT_601 as input and outputs an oscillation signal. More specifically, when the signal FAULT_601 is in a first state (e.g., a high state), the oscillator OSC601 outputs an oscillation signal or oscillation voltage, while when the signal FAULT_601 is in a second state different from the first state (e.g., a low state), the oscillator OSC601 outputs a constant signal, i.e., a signal that does not exhibit oscillation. Alternatively, when the signal FAULT_601 is in the second state, the oscillator OSC601 can output an oscillation signal with a frequency different from the signal provided when the signal FAULT_601 is in the first state.

[0182] The buffer circuit B601 receives the signal supplied by the oscillator OSC601 as input and includes an inverting output coupled (preferably connected) to the first terminal of capacitor C601. The second terminal of capacitor C602 is coupled (preferably connected) to node N601.

[0183] Similarly, the circuit for driving transistor T602 includes:

[0184] Combination Figure 4 The type or combination of the gate driver circuit D402 described Figure 5 The gate driver circuit described is of the type D602, which is gate driver circuit 521.

[0185] Combination Figure 5 The logic circuit set described is of type Logic602, which is a set of logic circuits of type 522.

[0186] Combination Figure 5 The voltage shifter circuit described is of the type 526, and the voltage shifter circuit LS602 (LS_LV) is also described.

[0187] Buffer circuit B602; and

[0188] Resistor R602.

[0189] The gate driver circuit D602 includes an output coupled (preferably connected) to the gate terminal of transistor T602. The input of this circuit D602 is coupled (preferably connected) to the output of logic circuit assembly Logic602. A first input of logic circuit assembly Logic602 is coupled (preferably connected) to terminal IN_HS_600. A second input of logic circuit assembly Logic602 is coupled (preferably connected) to terminal IN_LS_600. The voltage shifter circuit LS601 includes a first input coupled (preferably connected) to terminal IN_HS_600 and a second input receiving potential VGS_LS_602. Figure 7 and Figure 8 An example of the LS602 circuit is described in more detail.

[0190] The buffer circuit B602 includes an input terminal coupled (preferably connected) to node N601 and an output terminal coupled (preferably connected) to terminal DIAG_HS_600. Resistor R602 includes a first terminal coupled (preferably connected) to node N601 and a second terminal coupled (preferably connected) to terminal SGND_600.

[0191] Figure 7 The diagram illustrates the combination. Figures 4 to 6 The described converter type is a simplified embodiment of a voltage shifter circuit 700.

[0192] Figure 7 An embodiment of a voltage shifter circuit 700, a power transistor T701, and a gate driver D701 (DRIVER) for the power transistor T701 is illustrated.

[0193] As previously described, the drain terminal of power transistor T701 is coupled (preferably connected) to terminal DRAIN_700, and the source terminal of power transistor T701 is coupled (preferably connected) to terminal SOURCE_700. The gate terminal of transistor T701 receives a control voltage from gate driver circuit D701.

[0194] The voltage shifter circuit 700 includes an external voltage source Supp 701 coupled between terminals VCC_HS_701 and OUT_K_700. The positive terminal of source Supp 701 is coupled (preferably connected) to terminal VCC_HS_700, and the negative terminal of source Supp 701 is coupled (preferably connected) to terminal OUT_K_700.

[0195] The voltage shifter circuit 700 also includes a resistor R701 and an inverter circuit INV701. The first terminal of resistor R701 is coupled (preferably connected) to terminal VCC_HS_700, and the second terminal of resistor R701 is coupled (preferably connected) to node N701. The input terminal of inverter circuit INV701 is coupled (preferably connected) to node N701, and the output terminal of inverter circuit INV701 is coupled (preferably connected) to the input terminal of gate driver circuit D701.

[0196] The voltage shifter circuit 700 also includes two current sources, CS701 and CS702. Current source CS701 references terminal SGND_700 and includes an output coupled (preferably connected) to node N701. Current source CS702 references terminal OUT_700 and also includes an output coupled (preferably connected) to node N701. Current sources CS701 and CS702 are controlled by a potential supplied by terminal IN_HS_700.

[0197] The operating principle of circuit 700 is as follows. Current sources CS701 and CS702 are used to send commands to the gate driver circuit D701, and ultimately to the transistor T701. However, the converter can operate at very high voltages, and the converter output voltage (i.e., the voltage supplied between terminals OUT_700 and SGND_700) can be between -50 and 650V, preferably between -15 and 500V. Current sources CS701 and CS702 do not supply the same amount of current. When the output voltage is above a threshold voltage, only current source CS701 is used, while when the output voltage is below this threshold voltage, another current source, namely current source CS702, is used. According to one example, the threshold voltage is between -5V and 0V. According to one example, when the output voltage is above -2V, current source CS701 is used to transmit commands to circuit D701, while when the output voltage is below -2V, current source CS702 is used to transmit commands to circuit D701.

[0198] Figure 8 The diagram illustrates the combination. Figures 4 to 6 A more detailed embodiment of the voltage shifter circuit 800 in the converter described is described.

[0199] Voltage shifter circuit 800 is a combination Figure 5 The voltage shifter circuit 526 described is formed by bridging two chips of the types 510 and 520. More specifically, the circuit portions (A) and (B) defined by dashed lines are formed in a chip suitable for receiving low voltage (hereinafter referred to as the low-voltage chip), which is combined with Figure 4 The type or combination of the described chip 402 Figure 5 The described chip type 520, the rest of the components are formed in a chip suitable for receiving high voltage (hereinafter referred to as a high voltage chip), which is combined with Figure 4 The type or combination of the described chip 401 Figure 5 The type of chip 510 described. Figure 8 The diagram also shows the interconnection terminals 810 between the high-voltage and low-voltage chips.

[0200] according to Figure 8 In the first example shown, the low-voltage chip and the high-voltage chip can be coupled through three sets of interconnect terminals 810.

[0201] according to Figure 8 In the second example, not shown, the low-voltage chip and the high-voltage chip can be coupled only through two sets of interconnect terminals 810. The advantage of this example is that it allows for a reduction in the size of the substrate on which the high-voltage chip and the low-voltage chip are formed. In this case, transistors T805 to T807, described below, form part of the low-voltage chip.

[0202] Circuit 800 includes:

[0203] Combination Figure 5 The type or combination of the described terminal VCC_HS_500 Figure 7 The terminal VCC_HS_700 described is of type VCC_HS_800, and the terminal VCC_HS_800 forms a power supply terminal for high-voltage chips;

[0204] Combination Figure 5 The described terminal OUT_K_500 is a terminal of type SGND_HS_800, which forms a reference terminal for a high-voltage chip;

[0205] Combination Figure 5 The type or combination of the described terminal SGND_500 Figure 7 The terminal SGND_LS_800 described is of type SGND_700, which forms the reference terminal of the low-voltage chip;

[0206] Combination Figure 5The terminal described is of type DZ_HS_500, and the terminal is of type DZ_HS_800;

[0207] Combination Figure 5 The terminal described is of type DZ_LS_500, and the terminal is of type DZ_LS_800; and

[0208] Terminal PWM_800(SOURCE).

[0209] Circuit 800 also includes three resistors T801, R802, and R803 located between terminals VCC_HS_800 and SGND_LS_800, and two e-mode type HEMT transistors T801 and T802. The first terminal of resistor R801 is coupled (preferably connected) to terminal VCC_HS_800, and the second terminal of resistor R801 is coupled (preferably connected) to the first terminal of resistor R802. The second terminal of resistor R802 is coupled (preferably connected) to the drain terminal of transistor T801. The source terminal of transistor T801 is coupled (preferably connected) to the drain terminal of transistor T802. The source terminal of transistor T802 is coupled (preferably connected) to the first terminal of resistor R803. The second terminal of resistor R803 is coupled (preferably connected) to terminal SGND_LS_800. The gate terminal of transistor T801 is coupled (preferably connected) to terminal DZ_LS_800.

[0210] Circuit 800 also includes a pulse width modulation circuit PWM801. The input of this circuit PWM801 is adapted to receive an inverted control signal supplied by terminal PWM_800. The output of this circuit PWM801 is coupled (preferably connected) to the gate terminal of transistor T802.

[0211] Circuit 800 also includes four e-mode type HEMT transistors T803, T804, T805, and T806, two resistors R804 and R805, and a voltage source Supp801. The source terminal of transistor T803 is coupled (preferably connected) to terminal DZ_LS_800, and the drain terminal of transistor T803 is coupled (preferably connected) to the first terminal of resistor R804. The second terminal of resistor R804 is coupled (preferably connected) to the drain terminal and the gate terminal of transistor T805. The source terminal of transistor T804 is coupled (preferably connected) to terminal DZ_LS_800, and the drain terminal of transistor T804 is coupled (preferably connected) to the first terminal of resistor R805. The second terminal of resistor R805 is coupled (preferably connected) to the drain terminal and the gate terminal of transistor T806. The source terminals of transistors T805 and T806 are coupled to each other and to terminal SGND_HS_800. One gate terminal of the transistor receives a voltage from voltage source Supp801. Voltage source Supp801 references terminal SGND_LS_800. The gate terminal of transistor T804 is coupled (preferably connected) to terminal PWM_800.

[0212] Circuit 800 also includes an e-mode type HEMT transistor. The source terminal of transistor T807 is coupled (preferably connected) to terminal SGND_HS_800. The gate terminal of transistor T807 is coupled to the drain terminal of transistor T806. Transistor T807 is adapted to supply current and is considered as the output terminal of a current source. According to one embodiment, transistor T807 forms a junction... Figure 7 The output terminal of the current source CS702 described in the document.

[0213] Circuit 800 also includes three resistors R806, R807, and R808 located between terminals VCC_HS_800 and SGND_LS_800, and two e-mode type HEMT transistors T808 and T809. The first terminal of resistor R806 is coupled (preferably connected) to terminal VCC_HS_800, and the second terminal of resistor R806 is coupled (preferably connected) to the first terminal of resistor R807. The second terminal of resistor R807 is coupled (preferably connected) to the drain terminal of transistor T808. The source terminal of transistor T808 is coupled (preferably connected) to the drain terminal of transistor T809. The source terminal of transistor T809 is coupled (preferably connected) to the first terminal of resistor R808. The second terminal of resistor R808 is coupled (preferably connected) to terminal SGND_LS_800. The gate terminal of transistor T808 is coupled (preferably connected) to terminal T808. Transistors T808 and T809 are suitable for supplying current and are considered as the output terminals of a current source. According to one embodiment, transistors T808 and T809 form a junction. Figure 7 The output terminal of the current source CS701 is described.

[0214] Circuit 800 also includes a pulse width modulation circuit PWM802. The input of this circuit PWM802 is adapted to receive control signals supplied by the terminal PWM_800. The output of this circuit PWM802 is coupled (preferably connected) to the gate terminal of transistor T809.

[0215] Circuit 800 also includes a combination Figure 6The description includes a flip-flop L601 of type L801 (LATCH), two resistors R809 and R810, and two e-mode type HEMT transistors T810 and T811. The first terminal of resistor R809 is coupled (preferably connected) to terminal DZ_HS_800, and the second terminal of resistor R809 is coupled (preferably connected) to the input terminal of flip-flop L801 and the drain terminal of transistor T810. The source terminal of transistor T810 is coupled (preferably connected) to terminal SGND_HS_800. The gate terminal of transistor T810 is coupled (preferably connected) to the second terminal of resistor R806, i.e., coupled to the drain terminal of transistor T807. The first terminal of resistor R810 is coupled (preferably connected) to terminal DZ_HS_800, and the second terminal of resistor R810 is coupled (preferably connected) to the first output terminal of flip-flop L801 and the drain terminal of transistor T811. The source terminal of transistor T811 is coupled (preferably connected) to terminal SGND_HS_800. The gate terminal of transistor T811 is coupled (preferably connected) to the second terminal of resistor R801. The second output terminal of flip-flop L801 is adapted for use with... Figure 7 The described circuit, type D701, is a gate driver circuit that supplies control voltage.

[0216] Figure 9 The diagram illustrates the combination. Figures 4 to 6 A more detailed embodiment of the voltage adapter circuit 900 of the converter type described herein.

[0217] Voltage adapter circuit 900 is a combination Figure 5 The adapter circuit 515 described is of a certain type, and more particularly, is combined with Figure 6 The adapter circuit described is a converter circuit of type ADAPT601.

[0218] Voltage adapter circuit 900 is a combination Figure 5 The voltage adapter circuit 515 described is formed by bridging two chips of types 510 and 520. More specifically, circuit portion 920 is formed in a chip suitable for receiving low voltage (hereinafter referred to as the low-voltage chip), which is combined with... Figure 4 The described chip type 402 or combination Figure 5 The described chip type 520, the remaining parts of the component (marked 910) are formed in a chip suitable for receiving high voltage (hereinafter referred to as a high voltage chip), which is combined with Figure 4 The type or combination of the described chip 401 Figure 5 The type of chip 510 described.

[0219] Circuit 900 includes:

[0220] Combination Figure 5 The terminal described is of type DZ_HS_500, and the terminal is of type DZ_HS_900;

[0221] Combination Figure 5 The terminal described is of type DZ_LS_500, and the terminal is of type DZ_LS_900;

[0222] Combination Figure 5 The terminal OUT_K_500 described is of type OUT_K_900;

[0223] Combination Figure 5 The terminal SGND_500 is described as type SGND_LS_900;

[0224] Combination Figure 5 The terminal IN_HS_900 described is of type IN_HS_500; and

[0225] Combination Figure 5 The terminal DIAG_HS_500 described is of type DIAG_HS_900.

[0226] Circuit 900 includes an oscillator OSC901 (OSC) or oscillation circuit OSC901, a logic gate OR901, and an inverter circuit INV901. The oscillator OSC901 is supplied with a potential provided by terminal DZ_HS_900 and referenced to a potential provided by terminal OUT_K_900. The control terminal of the oscillator OSC901 is coupled (preferably connected) to the output of the logic gate OR901. The first input terminal of the logic gate OR901 is adapted to receive an overvoltage detection voltage VDS_HS_900. The second input terminal of the logic gate OR901 is adapted to receive an overtemperature detection voltage OT_HS_900. The output of the oscillator OSC901 is coupled (preferably connected) to the input of the inverter circuit INV901. The inverter circuit INV901 is supplied with a potential provided by terminal DZ_HS_900 and referenced to a potential provided by terminal OUT_K_900.

[0227] Circuit 900 also includes capacitor C901, e-mode type HEMT transistor T901, and resistor R901. The first terminal of capacitor C901 is coupled (preferably connected) to the output of inverter circuit INV901, and the second terminal of capacitor C901 is coupled (preferably connected) to the drain terminal of transistor T901. The source terminal of transistor T901 is coupled (preferably connected) to the first terminal of resistor R901. The second terminal of resistor R901 is coupled (preferably connected) to terminal SGND_LS_900. The gate terminal of transistor T901 is coupled (preferably connected) to terminal DZ_LS_900.

[0228] Circuit 900 also includes two e-mode type HEMT transistors T902 and T904, and resistor R902. The drain terminal of transistor T902 is coupled (preferably connected) to terminal VCC_LS_900, and the source terminal of transistor T902 is coupled (preferably connected) to the first terminal of resistor R902. The second terminal of resistor R902 is coupled (preferably connected) to the drain terminal of transistor T904. The source terminal of transistor T904 is coupled (preferably connected) to terminal SGND_LS_900.

[0229] Circuit 900 also includes an inverter circuit INV902. The input terminal of circuit INV902 is coupled (preferably connected) to the drain terminal of transistor T904. The output terminal of circuit INV902 is coupled (preferably connected) to terminal DIAG_HS_900.

[0230] Circuit 900 also includes transistor T903, capacitor C902, and resistor R903. The drain terminal of transistor T903 is coupled (preferably connected) to the source terminal of transistor T901, and the drain terminal of transistor T903 is coupled (preferably connected) to terminal SGND_LS_900. The gate terminal of transistor T903 is coupled (preferably connected) to the first terminal of capacitor C902. The second terminal of capacitor C902 is coupled (preferably connected) to terminal SGND_LS_900. The first terminal of resistor R903 is coupled (preferably connected) to the gate of transistor T903, and the second terminal of resistor R903 is coupled (preferably connected) to terminal IN_HS_900.

[0231] Circuit 900 operates as follows. Oscillator OSC901 receives fault detection signals obtained from voltages VDS_HS_900 and OT_HS_901 as inputs and outputs an oscillation signal. More specifically, when the fault detection signal is in a first state (e.g., a high state), oscillator OSC901 outputs an oscillation signal or oscillation voltage, while when the fault detection signal is in a second state different from the first state (e.g., a low state), oscillator OSC901 outputs a constant signal, that is, a signal that does not exhibit oscillation.

[0232] More specifically, the key component of circuit 900 is capacitor C901, and it is this capacitor C901 that forwards information from the high-voltage chip to the low-voltage chip via capacitive coupling. Information forwarding is achieved through a low-voltage differential voltage (e.g., around 6V) on a common-mode voltage of 400V. Furthermore, according to one embodiment, capacitor C901 is formed within and on the low-voltage chip, between metallization layers (e.g., between the second and third metallization layers).

[0233] Figure 10 The combination is illustrated very schematically and in the form of a block diagram. Figures 4 to 6 An embodiment of converter 1000, which describes the type of converter.

[0234] Such as combination Figure 4 As described, the converter 1000 includes the use of structures including gallium nitride (GaN) (such as those combining...). Figure 1 The structure described is of type 100 and consists of two chips, 1010 (Die HS) and 1020 (Die LS).

[0235] According to one embodiment, chips 1010 and 1020 are identical; that is, they are manufactured using the same manufacturing method and based on the same structure. In other words, chips 1010 and 1020 include the same electronic circuits and components. Only the placement of components may differ between the chips. Furthermore, according to one embodiment, chips 1010 and 1020 are both suitable as either high-voltage or low-voltage chips.

[0236] Each chip 1010, 1020 includes a main terminal (labeled D for chip 1010 and S for chip 1020) and a communication terminal OUT. According to one embodiment, each chip 1010 and 1020 includes a configuration terminal CONFIG for defining the function of each chip. Specifically, the CONFIG terminal can be used to configure chips 1010, 1020 as high-voltage chips or low-voltage chips.

[0237] according to Figure 10 In the examples shown, each chip 1010, 1020 also includes the following terminals:

[0238] Terminal ON_HS_LS;

[0239] Terminal OFF_HS_LS;

[0240] Terminal RST_HS_LS;

[0241] Terminal DIAG_HS_LS;

[0242] Terminal RST_HS_LS;

[0243] Terminal OFF_HS_HS;

[0244] Terminal ON_HS_HS;

[0245] Terminal VCC;

[0246] Terminal VDD;

[0247] terminal DZ;

[0248] terminal EN;

[0249] Terminal PWM;

[0250] Terminal RST;

[0251] Terminal DIAG; and

[0252] Terminal SGND.

[0253] To form converter 1000, chips 1010 and 1020 are mounted on the same wafer. Other electronic components can be added to the substrate, such as by bonding... Figure 5 As described.

[0254] Chips 1010 and 1020 are coupled to each other, for example, by coupling their communication terminals OUT. According to one example, terminals ON_HS_LS of chips 1010 and 1020 are also coupled to each other. According to one example, terminals OFF_HS_LS of chips 1010 and 1020 are also coupled to each other. According to one example, terminals RST_HS_LS of chips 1010 and 1020 are also coupled to each other. According to one example, terminals DIAG_HS_LS of chips 1010 and 1020 are also coupled to each other.

[0255] The connector terminals of converter 1000 are also coupled to the terminals of chips 1010 and 1020. As an example:

[0256] The VCC_HS terminal of converter 1000 is coupled (preferably connected) to the VCC terminal of chip 1010;

[0257] The terminal VDD_HS of converter 1000 is coupled (preferably connected) to the terminal VDD of chip 1010;

[0258] The terminal DZ_HS of converter 1000 is coupled (preferably connected) to the terminal DZ of chip 1010;

[0259] The SGND_HS terminal of converter 1000 is coupled (preferably connected) to the SGND terminal of chip 1010;

[0260] The VCC_LS terminal of converter 1000 is coupled (preferably connected) to the VCC terminal of chip 1020;

[0261] The terminal VDD_LS of converter 1000 is coupled (preferably connected) to the terminal VDD of chip 1020;

[0262] The terminal DZ_LS of converter 1000 is coupled (preferably connected) to the terminal DZ of chip 1020;

[0263] The EN terminal of converter 1000 is coupled (preferably connected) to the EN terminal of chip 1020;

[0264] The PWM terminal of converter 1000 is coupled (preferably connected) to the PWM terminal of chip 1020;

[0265] The RST terminal of converter 1000 is coupled (preferably connected) to the RST terminal of chip 1020;

[0266] The DIAG terminal of converter 1000 is coupled (preferably connected) to the DIAG terminal of chip 1020; and

[0267] The SGND_LS terminal of converter 1000 is coupled (preferably connected) to the SGND terminal of chip 1020.

[0268] Therefore, the method for manufacturing converter 1000 includes two identical manufacturing steps for the first and second chips. According to one example, the method also includes a configuration step using the CONFIG terminals of chips 1010 and 1020.

[0269] Various embodiments and variations have been described above. Those skilled in the art will understand that certain features of these embodiments can be combined, and other variations will be readily apparent to them.

[0270] Finally, based on the functional descriptions provided above, the actual implementation of the embodiments and variations described herein is within the capabilities of those skilled in the art.

[0271] A voltage converter (400; 500; 600; 1000) formed in and on a monolithic semiconductor substrate (101) having a surface coated with a gallium nitride layer (102) includes a first chip (401; 510; 1010) comprising a first e-mode type HEMT power transistor (T401; T510; T601) and a first control circuit (D401) for the first transistor (T401; T510; T601); and a second chip (402; 520; 1020) comprising a second control circuit (D402) for a second e-mode type HEMT power transistor (T402; T520; T602) and a second control circuit (D402) for the second transistor (T402; T520; T602). The device is adapted to forward at least one first voltage received from a third control circuit (410; 550) to a second chip (402; 520; 1020); wherein the second chip (402; 520; 1020) includes a first voltage shifter circuit (526; ADAPT601; 700) adapted to convert at least one first voltage into a second voltage, the first voltage shifter circuit (526; LS601; 700) including a first current source (CS701) adapted to be used when the third output voltage of the converter (400; 500; 600; 1000) is less than a fourth threshold voltage and a second current source (CS702) adapted to be used when the third output voltage is higher than the fourth threshold voltage.

[0272] The first and second current sources (CS701, CS702) are used to provide control voltage to the first transistors (T401; T510; T601).

[0273] The fourth threshold voltage is between -5V and 0V.

[0274] The fourth threshold voltage is equal to -2V.

[0275] The first chip (401; 510; 1010) is suitable for receiving high voltage, and the second chip (402; 520; 1020) is suitable for receiving low voltage.

[0276] The first chip (401; 510; 1010) also includes a fourth voltage adapter circuit (515; CONV601; 900) adapted to convert at least one fifth voltage of the first chip (401; 510; 1010) into a sixth diagnostic voltage for forwarding to the second chip (402; 520; 1020). The fourth voltage adapter circuit (515; ADAPT601; 900) includes an oscillator (OSC601; OSC901) configured to oscillate the sixth voltage when the fifth voltage is in a first state.

[0277] The oscillator (OSC601; OSC901) is configured not to oscillate the sixth voltage when the fifth voltage is in a second state that is different from the first state.

[0278] The first and second chips (401, 402; 510, 520; 1010, 1020) are identical chips.

[0279] The first and second chips (401, 402; 510, 520; 1010, 1020) each include configuration terminals (CONFIG) that allow them to define their functions in the converter.

[0280] The converter is a switch-mode power supply.

[0281] The converter is a boost converter type of switch-mode power supply.

[0282] A method for converting a seventh input voltage into a third output voltage using a voltage converter (400; 500; 600; 1000) formed in and on a monolithic semiconductor substrate (101) having a surface coated with a gallium nitride layer (102), the voltage converter comprising a first chip (401; 510; 1010) including a first e-mode type HEMT power transistor (T401; T510; T601) and a first control circuit (D401) of the first transistor (T401; T510; T601); and a second chip (402; 520; 1020) including a second e-mode type HEMT power transistor (T402; T520; T602) and a second transistor (T402; T520; T601). The second control circuit (D402) of the 02) is adapted to forward at least one first voltage received from the third control circuit (410; 550) to the second chip (402; 520; 1020); wherein the second chip (402; 520; 1020) includes a first voltage converter circuit (526; ADAPT601; 700) adapted to convert at least one first voltage into a second voltage, the first voltage converter circuit (526; LS601; 700) including a first current source (CS701) adapted to be used when the third output voltage of the converter (400; 500; 600; 1000) is less than a fourth threshold voltage and a second current source (CS702) adapted to be used when the third output voltage is higher than the fourth threshold voltage.

[0283] A method for manufacturing a voltage converter (400; 500; 600; 1000) comprising: a first chip (401; 510; 1010) including a first e-mode type HEMT power transistor (T401; T510; T601) and a first control circuit (D401) for the first transistor (T401; T510; T601); and a second chip (402; 520; 1020) including a second e-mode type HEMT power transistor (T402; T520; T602) and a second control circuit (D402; 521; D602) for the second transistor (T402; T520; T602), the method comprising two identical steps of manufacturing the first and second chips (401, 402; 510, 520; 1010, 1020).

[0284] The method also includes the step of configuring the first and second chips (401, 402; 510, 520; 1010, 1020) after two manufacturing steps.

[0285] During the configuration step, the configuration terminals (CONFIG) of the first and second chips (401, 402; 510, 520; 1010, 1020) are used.

[0286] Based on the detailed description above, these and other changes can be made to the embodiments. Generally, the terminology used in the following claims should not be construed as limiting the claims to the specific embodiments disclosed in the specification and claims, but should be understood to include all possible embodiments and the full scope of equivalents conferred by such claims. Accordingly, the claims are not limited to this disclosure.

Claims

1. A voltage converter formed in and on a monolithic semiconductor substrate having a face coated by a gallium nitride layer, the voltage converter comprising: a first die comprising a first e-mode type HEMT power transistor and a first control circuit of a first transistor; and a second die comprising a second e-mode type HEMT power transistor and a second control circuit of a second transistor, and configured to forward at least one first voltage received from a third control circuit to the second die; wherein the second die comprises a first voltage shifter circuit adapted to convert the at least one first voltage into a second voltage, the first voltage shifter circuit comprising a first current source configured to operate when a third output voltage of the converter is less than a fourth threshold voltage, and a second current source configured to operate when the third output voltage is higher than the fourth threshold voltage.

2. The converter of claim 1, wherein the first current source and the second current source are used to provide a control voltage to the first transistor.

3. The converter of claim 1, wherein the fourth threshold voltage is between -5V and 0V.

4. The converter of claim 3, wherein the fourth threshold voltage is equal to -2V.

5. The converter of claim 1, wherein the first die is configured to receive a high voltage, and the second die is configured to receive a low voltage.

6. The converter of claim 1, wherein the first die further comprises a fourth voltage adapter circuit configured to convert at least one fifth voltage of the first die into a sixth diagnostic voltage to forward it to the second die, the fourth voltage adapter circuit comprising an oscillator configured to oscillate the sixth voltage when the fifth voltage is in a first state.

7. The converter of claim 6, wherein the oscillator is configured to not oscillate the sixth voltage when the fifth voltage is in a second state different from the first state.

8. The converter of claim 1, wherein the first die and the second die are identical dies.

9. The converter of claim 8, wherein the first die and the second die each comprise configuration terminals that allow them to define their function in the converter.

10. The converter of claim 1, the converter being a switch mode power supply.

11. The converter of claim 1, the converter being a switch mode power supply of the boost converter type.

12. A method comprising: driving a first HEMT power transistor of a first die of a voltage converter with a first control circuit of the first die; driving a second HEMT power transistor of a second die of the voltage converter with a second control circuit of the second die, the first and second HEMT power transistors being coupled together in a half-bridge configuration, wherein the first die is a high-side die and the second die is a low-side die; receiving, with the second die, a first control signal for the first die from a third control circuit located outside the first and second dies; receiving, with the second die, a second control signal for the second die from the third control circuit; providing a first control signal from the second die to the first die; receiving an input voltage for a voltage regulator at the second die; and generating an output voltage for the voltage regulator at an output of the half-bridge circuit.

13. The method of claim 12, comprising providing a diagnostic signal from the first die to the second die.

14. The method of claim 13, further comprising providing the diagnostic signal from the second die to a third control circuit.

15. The method of claim 12, further comprising receiving a high voltage at the first die and a low voltage at the second die.

16. The method of claim 12, further comprising generating a first current with a first current source of the first die.

17. The method of claim 16, further comprising generating a second current with a second current source of the first die.

18. A method, comprising: forming a first die of a voltage converter, comprising: forming a first HEMT power transistor in the first die; and forming a first driver circuit for the first HEMT transistor in the first die; forming a second die of the voltage converter, comprising: forming a second HEMT power transistor in the second die; and forming a second driver circuit for the second HEMT transistor in the second die; coupling the first HEMT transistor and the second HEMT transistor together in a half-bridge configuration; and coupling a third control circuit to the second die and configured to provide a first control signal for the first die to the second die, to provide a second control signal to the second die for controlling the second die, and to provide an input voltage for a voltage regulator to the second die, the voltage regulator configured to provide an output voltage for the voltage regulator from a joint terminal of the first HEMT transistor and the second HEMT transistor.

19. The method of claim 18, further comprising forming the first die and the second die in two identical manufacturing steps.

20. The method of claim 19, further comprising configuring the first die and the second die after the two manufacturing steps.

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