Ultrahigh-voltage fast recovery diode and preparation method thereof

By designing an interleaved structure of an N-type buffer layer and a P+ region in an ultra-high voltage fast recovery diode, the problem of poor reverse recovery softness was solved, and the reverse recovery softness was improved while the forward conduction voltage drop was maintained.

CN121645909APending Publication Date: 2026-03-10JIANGSU SOLID POWER SEMICON CO LTD
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Patent Information

Application Number
CN202511853671.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-12-10
Publication Date
2026-03-10

AI Technical Summary

Technical Problem

Ultra-high voltage fast recovery diodes suffer from poor reverse recovery softness, leading to current oscillations and voltage overshoot, which can cause device failure due to overvoltage in severe cases.

Method used

An N-type buffer layer is designed between the N-drift layer and the N+ cathode layer, and multiple P+ regions are injected at intervals within the N-type buffer layer to form an interleaved P+N structure. The PNP transistor composed of the P+ region, the N-type buffer layer, and the P-type anode layer is turned on to maintain the carriers at the end of the reverse recovery period, improve the reverse recovery softness, and improve the forward conduction efficiency through the NPN structure.

Benefits of technology

It effectively improves the reverse recovery softness of the diode, suppresses oscillations and voltage spikes, while maintaining a low forward voltage drop.

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Abstract

The invention relates to an ultrahigh-voltage fast recovery diode and a preparation method thereof, and the method comprises the steps: selecting an N-drift layer, and growing an oxide layer on the front surface of the N-drift layer; preparing a P-type anode layer on the front surface of the N-drift layer; preparing an N-type buffer layer on the back surface of the N-drift layer; preparing a plurality of P + regions which are arranged at intervals along the transverse direction on the back surface of the N-type buffer layer; and preparing an N + cathode layer on the back surface of the N-type buffer layer. According to the preparation method of the ultrahigh-voltage fast recovery diode, the N-type buffer layer is designed between the N-type drift layer and the N + cathode layer, and the plurality of P + regions are injected into the region of the N-type buffer layer at intervals to form a staggered P + N structure, so that the forward conduction voltage drop of the diode is not sacrificed while the reverse recovery softness of the diode is improved.
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