Power module unit and power module packaging structure

Abstract

The invention provides a power module unit and a power module packaging structure, the power module unit comprises a first substrate, the first substrate comprises a first lower conductor layer, a first insulating layer and a first upper conductor layer which are stacked in sequence, the first upper conductor layer comprises a direct current electrode part and an alternating current electrode part, the direct current electrode part is electrically connected to a positive terminal, and the alternating current electrode part is electrically connected to a negative terminal; the alternating current electrode part is electrically connected to the output terminal; the second substrate comprises a second lower conductor layer, a second insulating layer and a second upper conductor layer which are sequentially stacked on the first upper conductor layer, and the second upper conductor layer is electrically connected to the negative terminal; the upper bridge chip is electrically connected with the direct-current electrode part and the alternating-current electrode part; the lower bridge chip is electrically connected with the alternating current electrode part and the second upper conductor layer; and the absorption capacitor is electrically connected with the direct-current electrode part and the second upper conductor layer. The power module unit is low in parasitic inductance, and the problems of overcharge, oscillation, non-uniform current and the like can be solved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of power semiconductor devices, and in particular to a power module unit and a power module packaging structure. BACKGROUND

[0002] Power semiconductor devices are the core devices for realizing electric energy conversion in power electronic conversion devices. In order to meet the application occasions of large current, power modules packaged by parallel connection of multiple chips are widely used.

[0003] In recent years, with the development of wide bandgap semiconductors, silicon carbide (SiC) and gallium nitride (GaN) based metal-oxide semiconductor field effect transistors (MOSFET) and other devices have shown advantages such as high switching speed, high switching frequency and low switching loss, but their switching behavior is very sensitive to the packaging RLC distribution parameters. The existing power modules have problems such as large total inductance of commutation loop, serious inductive coupling between commutation loop and driving loop, and uneven current of multiple chip parallel connection, and the application performance is that the switching voltage and current peak is too large, oscillation, dynamic uneven current and the like. These problems limit the performance of power devices, and even threaten the reliability of the system.

[0004] Therefore, the power module packaging structure in the related art is difficult to meet the performance requirements of power devices, and the parasitic inductance of the power module must be further reduced. SUMMARY

[0005] The present application provides a power module unit and a power module packaging structure, the parasitic inductance of the power module unit is low, and problems such as overcharge, oscillation and uneven current can be improved.

[0006] An aspect of the present application provides a power module unit, comprising: a first substrate, the first substrate comprising a first lower conductor layer, a first insulating layer and a first upper conductor layer stacked in sequence, the first upper conductor layer comprising a direct current electrode part and an alternating current electrode part, the direct current electrode part being electrically connected to a positive terminal, and the alternating current electrode part being electrically connected to an output terminal; a second substrate, the second substrate comprising a second lower conductor layer, a second insulating layer and a second upper conductor layer stacked in sequence on the first upper conductor layer, the second upper conductor layer being electrically connected to a negative terminal; an upper bridge chip, the upper bridge chip being electrically connected to the direct current electrode part and the alternating current electrode part; a lower bridge chip, the lower bridge chip being electrically connected to the alternating current electrode part and the second upper conductor layer; and an absorption capacitor, the absorption capacitor being electrically connected to the direct current electrode part and the second upper conductor layer.

[0007] In a possible implementation, the DC electrode part and the AC electrode part are both at least partially exposed outside the second substrate, the upper bridge chip is disposed on the DC electrode part, the lower bridge chip is disposed on the AC electrode part, and the upper bridge chip and the lower bridge chip are exposed outside the second substrate.

[0008] In a possible implementation, the DC electrode part surrounds the outer periphery of the AC electrode part, and the second substrate has a projection on the first upper conductor layer, which is located in the DC electrode part.

[0009] In a possible implementation, the absorption capacitor is disposed on the second upper conductor layer or the DC electrode part.

[0010] In a possible implementation, one of the first substrate and the second substrate further includes a first connecting part and a second connecting part, the first connecting part and the second connecting part are both disposed on the first upper conductor layer, or the first connecting part and the second connecting part are both disposed in the same layer as the second upper conductor layer; wherein the absorption capacitor is connected to the first connecting part, and a series resistor is connected between the first connecting part and the second connecting part.

[0011] In a possible implementation, the first connecting part has a plurality of first protruding parts arranged at intervals, the second connecting part has a plurality of second protruding parts arranged at intervals, the first protruding parts and the second protruding parts are arranged side by side and alternately arranged in sequence; the absorption capacitor is connected to the first protruding parts, and the series resistor is connected to the second protruding parts.

[0012] In a possible implementation, the first upper conductor layer further includes an upper bridge gate resistor part and a lower bridge gate resistor part, the upper bridge gate resistor part is provided with an upper bridge gate resistor, and the lower bridge gate resistor part is provided with a lower bridge gate resistor.

[0013] In a possible implementation, the DC electrode part surrounds the outer periphery of the AC electrode part, and the AC electrode part surrounds a central region; the upper bridge gate resistor part is disposed between the DC electrode part and the AC electrode part, and the lower bridge gate resistor part is disposed in the central region.

[0014] In a possible implementation, the first upper conductor layer further includes an upper bridge gate driving part, an upper bridge source driving part, a lower bridge gate driving part, and a lower bridge source driving part.

[0015] Another aspect of the present application provides a power module packaging structure, comprising: an outer shell; three aforementioned power module units, the power module units being disposed in the outer shell.

[0016] The power module unit and the power module packaging structure provided by the application, the power module unit is provided with the first substrate and the second substrate which are stacked, the first substrate comprises the first lower conductor layer, the first insulating layer and the first upper conductor layer which are stacked in sequence, the second substrate comprises the second lower conductor layer, the second insulating layer and the second upper conductor layer which are stacked on the first upper conductor layer in sequence, and a multilayer conductive structure is formed. The direct current electrode part and the alternating current electrode part are arranged on the first upper conductor layer, the upper bridge chip is electrically connected between the direct current electrode part and the alternating current electrode part, and the lower bridge chip is electrically connected between the alternating current electrode part and the second upper conductor layer, the direct current electrode part serves as the direct current negative electrode, the second upper conductor layer serves as the direct current positive electrode, the coupling effect of the commutation loop is good, and the commutation loop can realize extremely low parasitic inductance. In addition, the absorption capacitor is electrically connected between the direct current electrode part and the second upper conductor layer, and the absorption capacitor can decouple the loop inductance excluding the terminal. Therefore, the parasitic inductance of the power module unit is significantly reduced, the problems of overcharge, oscillation, uneven current and the like are improved, and the performance of the power module packaging structure is improved. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the application or the prior art, the following will briefly introduce the drawings needed to be used in the embodiments or the prior art description. Obviously, the drawings in the following description are some embodiments of the application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0018] Figure 1 A structural schematic diagram of a power module unit provided by the embodiment of the application is provided.

[0019] Figure 2 A three-dimensional structural schematic diagram of the first substrate provided by the embodiment of the application is provided.

[0020] Figure 3 A three-dimensional structural schematic diagram of the second substrate provided by the embodiment of the application is provided.

[0021] Figure 4 A whole structural diagram of the substrate provided by the embodiment of the application is provided.

[0022] Figure 5 A laminated structural schematic diagram of the substrate in the embodiment of the application is provided. Figure 4

[0023] A top view of the first substrate provided by the embodiment of the application is provided. Figure 6A

[0024] A bottom view of the first substrate provided by the embodiment of the application is provided. Figure 6B

[0025] A bottom view of the first substrate provided by the embodiment of the application is provided. Figure 7 Figure 1 ​a structure diagram of a substrate and a power device in a power module unit of the power module package structure;

[0026] Figure 8 a structure diagram of a substrate and a power device in a power module unit of the power module package structure; Figure 7

[0027] Figure 9 a structure diagram of a substrate and a power device in a power module unit of the power module package structure;

[0028] Figure 10 a structure diagram of a substrate and a power device in a power module unit of the power module package structure;

[0029] Figure 11 a structure diagram of a substrate and a power device in a power module unit of the power module package structure; Figure 10

[0030] Figure 12 a structure diagram of a substrate and a power device in a power module unit of the power module package structure;

[0031] Figure 13 a structure diagram of a substrate and a power device in a power module unit of the power module package structure; Figure 12

[0032] Figure 14 a structure diagram of a substrate and a power device in a power module unit of the power module package structure.

[0033] BRIEF DESCRIPTION OF THE DRAWINGS

[0034] 100 - power module unit;

[0035] 110 - first substrate; 111 - first lower conductor layer; 112 - first insulating layer; 113 - first upper conductor layer; 1131 - DC electrode part; 1132 - AC electrode part; 1133 - upper bridge gate resistor part; 1134 - lower bridge gate resistor part; 1135 - upper bridge gate drive part; 1136 - upper bridge source drive part; 1137 - lower bridge gate drive part; 1138 - lower bridge source drive part;

[0036] 120 - second substrate; 121 - second lower conductor layer; 122 - second insulating layer; 123 - second upper conductor layer;

[0037] 130 - positive terminal; 131 - positive binding wire;

[0038] 140 - output terminal; 141 - output binding wire;

[0039] 150 - negative terminal; 151 - negative binding wire;

[0040] ​​​161 - upper bridge chip; 1611 - upper bridge chip bonding wire; 1612 - upper bridge gate terminal; 1613 - upper bridge source terminal; 162 - lower bridge chip; 1621 - lower bridge chip bonding wire; 1622 - lower bridge gate terminal; 1623 - lower bridge source terminal;

[0041] 171 - absorption capacitor; 1711 - absorption capacitor bonding wire; 172 - series resistor;

[0042] 181 - upper bridge gate resistor; 182 - lower bridge gate resistor;

[0043] 191 - first connecting part; 1911 - first protruding part; 192 - second connecting part; 1921 - second protruding part;

[0044] 200 - shell; 210 - upper cover; 220 - bottom plate. DETAILED DESCRIPTION

[0045] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some but not all of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by a person of ordinary skill in the art without creative work fall within the protection scope of the present application.

[0046] In the related art, a power module usually adopts a single-layer ceramic plate, and the commutation loop is in the same plane and difficult to reduce the distance. Therefore, the power module has a large parasitic inductance, and the commutation inductance inside the module is usually 5-10 nH, which is difficult to further reduce. This will cause the power module to have problems such as too large switching voltage and current peak, oscillation, and dynamic uneven current, limit the performance of the power device, and even threaten the reliability of the system.

[0047] In view of this, embodiments of this application provide a power module unit and a power module packaging structure. The power module unit comprises a first substrate and a second substrate stacked together. The first substrate includes a first lower conductor layer, a first insulating layer, and a first upper conductor layer stacked sequentially. The second substrate includes a second lower conductor layer, a second insulating layer, and a second upper conductor layer stacked sequentially on the first upper conductor layer, forming a multilayer conductive structure. By providing a DC electrode portion and an AC electrode portion on the first upper conductor layer, the upper bridge chip is electrically connected between the DC electrode portion and the AC electrode portion, and the lower bridge chip is electrically connected between the AC electrode portion and the second upper conductor layer. The DC electrode portion serves as the DC negative electrode, and the second upper conductor layer serves as the DC positive electrode, resulting in a commutation circuit with good coupling effect and extremely low parasitic inductance. Furthermore, by electrically connecting an absorption capacitor between the DC electrode portion and the second upper conductor layer, the absorption capacitor can decouple the loop inductance, including that of the terminals. Thus, the parasitic inductance of the power module unit is significantly reduced, problems such as overcharging, oscillation, and uneven current are improved, and the performance of the power module packaging structure is enhanced.

[0048] The power module unit and power module packaging structure provided in the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0049] Figure 1 This is a schematic diagram of a power module unit provided in an embodiment of this application. (Refer to...) Figure 1 As shown, this application embodiment provides a power module unit 100, which includes a substrate and power devices connected to the substrate. The substrate constitutes the basic support structure of the power module unit 100, serving both as the mounting base for the power devices and forming the current path for the power devices.

[0050] In this embodiment, the substrate of the power module unit 100 includes a first substrate 110 and a second substrate 120, with the second substrate 120 stacked on the first substrate 110. By stacking the first substrate 110 and the second substrate 120, a laminated structure is formed. This helps to shorten the path length of the current loop in the power module unit 100, reduce the parasitic inductance of the current loop, and thus improve the performance of the power module unit 100.

[0051] The first substrate 110 has a DC electrode section 1131 and an AC electrode section 1132, which are electrically isolated from each other. The DC electrode section 1131 is electrically connected to the positive terminal 130, for example, via a positive electrode bonding wire 131. The AC electrode section 1132 is electrically connected to the output terminal 140, for example, via an output electrode bonding wire 141. The second substrate 120 is electrically connected to the negative terminal 150, for example, via a negative electrode bonding wire 151.

[0052] The power devices disposed in the power module unit 100 include an upper bridge chip 161 and a lower bridge chip 162, which are mounted on a substrate. The upper bridge chip 161 is electrically connected to the DC electrode portion 1131 in the first substrate 110 and is also electrically connected to the AC electrode portion 1132 in the first substrate 110. The lower bridge chip 162 is electrically connected to the AC electrode portion 1132 in the first substrate 110 and is also electrically connected to the second substrate 120.

[0053] In this configuration, the DC electrode portion 1131 in the first substrate 110 forms the DC positive electrode of the power module unit 100, the AC electrode portion 1132 in the first substrate 110 forms the AC electrode of the power module unit 100, and the second substrate 120 forms the DC negative electrode of the power module unit 100. The DC positive electrode is connected to the AC electrode through the upper bridge chip 161, forming a forward current loop. The AC electrode is connected to the DC negative electrode through the lower bridge chip 162, forming a reverse current loop. Thus, a complete half-bridge structure is formed by connecting the upper bridge chip 161, the lower bridge chip 162, and the substrate, forming a commutation loop in the power module unit 100.

[0054] By stacking the first substrate 110 and the second substrate 120, the path of the commutation circuit is optimized, forming a 3D commutation circuit. This reduces the distance between the DC positive and DC negative terminals, resulting in good coupling between them. It also enhances the mutual inductance cancellation effect of the commutation circuit, giving the substrates extremely low parasitic inductance within the circuit. This reduces the loop inductance of the power module unit 100 during switching, thereby reducing switching overshoot, increasing damping attenuation, and minimizing the difference in commutation inductance between power devices at different locations.

[0055] Continue to refer to Figure 1As shown in the embodiment of this application, the power module unit 100 is further provided with an absorption capacitor 171. The absorption capacitor 171 is electrically connected to the DC electrode portion 1131 and to the second substrate 120. That is, the absorption capacitor 171 is connected between the DC positive terminal and the DC negative terminal to form an absorption current loop.

[0056] Before the integration of the absorption capacitor 171, the current of the power module unit 100 during the switching process was entirely provided by the current loop of the DC bus. This current loop includes structures such as busbars and terminals, resulting in a large stray inductance and causing significant switching overshoot. However, in this embodiment, after integrating the absorption capacitor 171 into the power module unit 100, the current of the power module unit 100 during the switching process is jointly provided by the current loop of the DC bus and the absorption current loop containing the absorption capacitor 171.

[0057] By connecting the absorption capacitor 171 between the DC positive and DC negative terminals, the path of the absorption current loop containing the absorption capacitor 171 is short, resulting in low parasitic inductance. Therefore, during the switching process of the power module unit 100, the current of the power device is mainly provided by the absorption current loop. The close proximity of the absorption capacitor 171 to the power device greatly reduces the length of the current loop during the switching process. Furthermore, the absorption capacitor 171 forms a shield against other circuits, including the terminals, decoupling the inductance of other current loops. In addition, the resistor 172 connected in series with the absorption capacitor 171 significantly increases the overdamping attenuation of the current loop during the switching process, reducing switching overshoot and oscillation.

[0058] Within a certain range, as the absorption capacitor 171 increases, the proportion of current supplied by the absorption current loop increases, resulting in better overshoot suppression for the power module unit 100 during switching. Connecting a resistor in series with the absorption capacitor 171 increases the damping coefficient in the current loop from the absorption current loop to the power device, causing overdamped attenuation of switching oscillations. This suppresses switching oscillations in the power module unit 100; the resistance value is determined by the specifications of the power module unit 100.

[0059] In this embodiment, a stacked substrate structure is formed by layering a second substrate 120 on a first substrate 110. A DC positive electrode is formed in the lower first substrate 110, and a DC negative electrode is formed in the upper second substrate 120, reducing the distance between the DC positive and DC negative electrodes. This allows for good coupling of the commutation circuit between the DC positive and DC negative electrodes, resulting in extremely low parasitic inductance. Simultaneously, by connecting an absorption capacitor 171 between the DC positive and DC negative electrodes, the inductance of other current circuits, including terminals, can be decoupled, and the resistor connected in series with the absorption capacitor 171 can significantly increase the overdamping attenuation of the current circuit during switching.

[0060] In summary, by using the stacked structure design of the first substrate 110 and the second substrate 120, and integrating the absorption capacitor 171 on the stacked substrate, the loop inductance of the power module unit 100 during the switching process can be significantly reduced. Compared to the parasitic inductance of power modules in related technologies, which is mostly designed at the level of 5-10nH, the inductance of the power module unit 100 in this embodiment can be reduced to an extremely low value of less than 2.3nH. This improves the problems of switching overshoot, oscillation, and uneven current distribution of power devices at different locations, and significantly enhances the performance of the power module unit 100.

[0061] Figure 2 This is a three-dimensional structural schematic diagram of the first substrate provided in an embodiment of this application. (Refer to...) Figure 2 As shown, in the substrate of the power module unit 100, the first substrate 110 includes a first lower conductor layer 111, a first insulating layer 112, and a first upper conductor layer 113 stacked sequentially. The first lower conductor layer 111 and the first upper conductor layer 113 are respectively connected to the two side surfaces of the first insulating layer 112, so as to insulate and isolate the first lower conductor layer 111 and the first upper conductor layer 113 through the first insulating layer 112. Both the DC electrode portion 1131 and the AC electrode portion 1132 can be disposed in the first upper conductor layer 113.

[0062] Both the first lower conductor layer 111 and the first upper conductor layer 113 are metallic layers, and both are capable of carrying current. For example, the first lower conductor layer 111 and the first upper conductor layer 113 can be copper, graphite, silver, aluminum alloy, or carbon nanotubes, etc. The first insulating layer 112 is, for example, a ceramic layer, and the first lower conductor layer 111 and the second upper conductor layer 113 can be welded to the two side surfaces of the first insulating layer 112.

[0063] In some embodiments, the planar shape of the first substrate 110 can be designed as a rectangle. The planar shape of the first insulating layer 112 is a rectangle with a slightly larger area. The first upper conductor layer 113 and the first lower conductor layer 111 are located on the two side surfaces of the first insulating layer 112, and the overall area of ​​the first upper conductor layer 113 and the overall area of ​​the first lower conductor layer 111 are both slightly smaller than the first insulating layer 112.

[0064] Figure 3 This is a three-dimensional structural schematic diagram of a second substrate provided in an embodiment of this application. (Refer to...) Figure 3As shown, the second substrate 120 disposed on the first substrate 110 includes a second lower conductor layer 121, a second insulating layer 122, and a second upper conductor layer 123 stacked sequentially. The second lower conductor layer 121 and the second upper conductor layer 123 are respectively connected to the two side surfaces of the second insulating layer 122, so as to insulate and isolate the second lower conductor layer 121 and the second upper conductor layer 123 through the second insulating layer 122. The second upper conductor layer 123 can be electrically connected to the negative terminal 150.

[0065] Both the second lower conductor layer 121 and the second upper conductor layer 123 are metal layers, and both are capable of carrying current. For example, the second lower conductor layer 121 and the second upper conductor layer 123 can be copper, graphite, silver, aluminum alloy, or carbon nanotubes, etc. The second insulating layer 122 is, for example, a ceramic layer, and the second lower conductor layer 121 and the second upper conductor layer 123 can be welded to both sides of the second insulating layer 122.

[0066] In some embodiments, the planar shape of the second substrate 120 may be irregular, and the surface area of ​​the second substrate 120 may be smaller than the surface area of ​​the first substrate 110. For example... Figure 3 As shown, as an example, the outline shape of the first substrate 110 can be "U" shaped. In other examples, the outline shape of the first substrate 110 can also be "O", "I", "T", etc. The dimensions and shapes of the second upper conductor layer 123 and the second lower conductor layer 121 can be the same.

[0067] Figure 4 This is an overall structural diagram of a substrate provided in an embodiment of this application. Figure 5 for Figure 4 A schematic diagram of the stacked structure of the substrate. (Refer to...) Figure 4 or Figure 5 As shown, the second substrate 120 is stacked on the first substrate 110. The substrate includes a first lower conductor layer 111, a first insulating layer 112, a first upper conductor layer 113, a second lower conductor layer 121, a second insulating layer 122, and a second upper conductor layer 123, which are stacked sequentially.

[0068] Specifically, the first substrate 110 and the second substrate 120 can be welded together, that is, the first upper conductor layer 113 of the first substrate 110 and the second lower conductor layer 121 of the second substrate 120 are welded together to assemble an integral substrate.

[0069] Combination Figure 2 , Figure 3 and Figure 4As shown, by designing the first substrate 110 as rectangular and the second substrate 120 as an irregular shape, and with the surface area of ​​the second substrate 120 being smaller than that of the first substrate 110, a portion of the first upper conductor layer 113 of the first substrate 110 is exposed outside the second substrate 120 after the second substrate 120 is stacked on the first substrate 110. Furthermore, both the upper bridge chip 161 and the lower bridge chip 162 can be disposed on the upper conductor layer of the first substrate 110 (see...). Figure 1 The upper bridge chip 161 and the lower bridge chip 162 can also be exposed outside the second substrate 120, which facilitates the electrical connection between the upper bridge chip 161 and the lower bridge chip 162 and the second substrate 120.

[0070] like Figure 4 As shown, taking the U-shaped outline of the second substrate 120 as an example, a portion of the first upper conductor layer 113 of the first substrate 110 is exposed within the circumferential region of the second substrate 120. Thus, both the upper bridge chip 161 and the lower bridge chip 162 can be packaged on the first upper conductor layer 113, and both are located within the circumferential region of the second substrate 120 (see [reference]). Figure 1 ).

[0071] Figure 6A A top view of the first substrate provided in an embodiment of this application. (Refer to...) Figure 6A As shown, in one embodiment, the outline of the DC electrode portion 1131 in the first upper conductor layer 113 of the first substrate 110 can be designed as semi-annular or annular, and the DC electrode portion 1131 can surround the outer periphery of the AC electrode portion 1132. Furthermore, there is a gap between the AC electrode portion 1132 and the DC electrode portion 1131 to insulate and isolate the AC electrode portion 1132 and the DC electrode portion 1131.

[0072] Based on this, the outline of the AC electrode section 1132 can also be designed as a ring or semi-ring shape, with the AC electrode section 1132 enclosing a central area. In this way, the central area enclosed by the AC electrode section 1132 reserves space to facilitate the installation of other conductive structures within the central area.

[0073] As an example, the outline of the DC electrode portion 1131 can be U-shaped, and the outline of the AC electrode portion 1132 can be O-shaped. In other examples, the outline of the DC electrode portion 1131 can be O-shaped, the outline of the AC electrode portion 1132 can be U-shaped, or both the outlines of the DC electrode portion 1131 and the AC electrode portion 1132 can be U-shaped, or both the outlines of the DC electrode portion 1131 and the AC electrode portion 1132 can be O-shaped. This application does not impose specific limitations on these aspects.

[0074] Combination Figure 4 andFigure 6A As shown, when the DC electrode portion 1131 surrounds the outer periphery of the AC electrode portion 1132, and the DC electrode portion 1131 is located in the edge region of the first upper conductor layer 113, the outer contour of the second substrate 120 can be designed to match the outer contour of the first substrate 110. Furthermore, the orthographic projection of the second substrate 120 onto the first upper conductor layer 113 can be completely located within the DC electrode portion 1131. For example, the outer contour of the second substrate 120 can be U-shaped or O-shaped.

[0075] Continue to refer to Figure 6A As shown, the first upper conductor layer 113 also includes an upper bridge gate resistor section 1133, which is used to house the upper bridge gate resistor 181 (see...). Figure 7 (As shown). When the DC electrode portion 1131 surrounds the outer periphery of the AC electrode portion 1132, the upper bridge gate resistor portion 1133 can be disposed between the DC electrode portion 1131 and the AC electrode portion 1132. Furthermore, there are gaps between the upper bridge gate resistor portion 1133 and the DC electrode portion 1131, and between the upper bridge gate resistor portion 1133 and the AC electrode portion 1132, so as to insulate and isolate the upper bridge gate resistor portion 1133 from the DC electrode portion 1131 and the AC electrode portion 1132.

[0076] The first upper conductor layer 113 also includes a lower bridge gate resistor section 1134, which is used to house the lower bridge gate resistor 182 (see...). Figure 7 (As shown). When the outline of the AC electrode section 1132 is annular or semi-annular, and the AC electrode section 1132 surrounds a central area, the lower bridge gate resistor section 1134 can be disposed within the central area surrounded by the AC electrode section 1132. Furthermore, there is a gap between the lower bridge gate resistor section 1134 and the AC electrode section 1132 to insulate and isolate the lower bridge gate resistor section 1134 from the AC electrode section 1132.

[0077] Continue to refer to Figure 6A The first upper conductor layer 113 also includes an upper bridge gate drive section 1135, an upper bridge source drive section 1136, a lower bridge gate drive section 1137, and a lower bridge source drive section 1138. For example, the upper bridge gate drive section 1135, the upper bridge source drive section 1136, the lower bridge gate drive section 1137, and the lower bridge source drive section 1138 are all disposed within the central area enclosed by the AC electrode section 1132, and there are gaps between the upper bridge gate drive section 1135, the upper bridge source drive section 1136, the lower bridge gate drive section 1137, and the lower bridge source drive section 1138 to achieve mutual insulation and isolation.

[0078] Figure 6B A bottom view of the first substrate provided in an embodiment of this application. (Refer to...) Figure 6BAs shown, the first lower conductor layer 111 of the first substrate 110 can be a complete sheet structure.

[0079] Figure 7 for Figure 1 A schematic diagram of the substrate and power devices in a power module unit. (Refer to...) Figure 7 As shown, both the upper bridge chip 161 and the lower bridge chip 162 are disposed on the first upper conductor layer 113 of the first substrate 110. The upper bridge chip 161 is disposed in the DC electrode portion 1131 in the area exposed outside the second substrate 120. The lower bridge chip 162 is disposed in the AC electrode portion 1132.

[0080] By surrounding the AC electrode portion 1131 with the AC electrode portion 1132, the DC electrode portion 1131 occupies the edge region of the first upper conductor layer 113, thus maximizing the boundary of the outer contour of the DC electrode portion 1131. When the second substrate 120 is stacked in the region where the DC electrode portion 1131 is located, the area of ​​the DC electrode portion 1131 exposed outside the second substrate 120 is relatively large, allowing sufficient space to be reserved for the upper bridge chip 161. In this way, a large number of upper bridge chips 161 can be connected in the DC electrode portion 1131, and the upper bridge chips 161 are arranged sequentially at intervals along, for example, the contour line of the DC electrode portion 1131.

[0081] Meanwhile, the AC electrode section 1132, located within the enclosure area of ​​the DC electrode section 1131, is completely exposed outside the second substrate 120. This allows for full utilization of the area of ​​the AC electrode section 1132 to accommodate the lower-bridge chip 162. A larger number of lower-bridge chips 162 can also be connected to the AC electrode section 1132, for example, by sequentially spacing the lower-bridge chips 162 along the outline of the AC electrode section 1132.

[0082] Combination Figure 1 and Figure 7 As shown, in some embodiments, the absorption capacitor 171 can be a capacitor with an integrated resistor, for example, the absorption capacitor 171 is an RC capacitor. In this way, there is no need to add an additional resistor in series with the absorption capacitor 171, and the packaging of the absorption capacitor 171 is simpler.

[0083] At this time, the absorption capacitor 171 can be disposed on the second upper conductor layer 123 of the second substrate 120. On the one hand, the second upper conductor layer 123 is located on the surface of the substrate, which facilitates the placement of the absorption capacitor 171. On the other hand, the absorption capacitor 171 does not occupy the area of ​​the DC electrode portion 1131 in the first upper conductor layer 113 of the first substrate 110, so more area can be left in the DC electrode portion 1131 to place the upper bridge chip 161.

[0084] Of course, if the area of ​​the DC electrode portion 1131 of the first substrate 110 exposed outside the second substrate 120 is large enough to provide sufficient area for the absorption capacitor 171, the absorption capacitor 171 can also be disposed in the DC electrode portion 1131 of the first substrate 110. This application embodiment does not limit this.

[0085] Figure 8 for Figure 7 A schematic diagram of the structure after the substrate and power devices are bonded together. (Refer to...) Figure 8 As shown, for the upper bridge chip 161 disposed on the DC electrode section 1131 of the first substrate 110, the drain of the upper bridge chip 161 is connected to the DC electrode section 1131, and the source of the upper bridge chip 161 is connected to the AC electrode section 1132 of the first substrate 110 through the upper bridge chip bonding wire 1611.

[0086] For the lower bridge chip 162 disposed on the AC electrode section 1132 of the first substrate 110, the drain of the lower bridge chip 162 is connected to the AC electrode section 1132, and the source of the lower bridge chip 162 is connected to the second upper conductor layer 123 of the second substrate 120 through the lower bridge chip bonding wire 1621.

[0087] Therefore, in the entire commutation circuit of the power module unit 100, the current in the DC electrode portion 1131 of the first substrate 110 is opposite to the current in the second upper conductor layer 123 of the second substrate 120. The stacking of the first substrate 110 and the second substrate 120 prevents inductive coupling, resulting in a significant reduction in stray inductance in the substrates of the commutation circuit.

[0088] For the absorption capacitor 171 disposed in the second upper conductor layer 123 of the second substrate 120, one end of the absorption capacitor 171 is connected to the second upper conductor layer 123, and the other end of the absorption capacitor 171 is connected to the DC electrode portion 1131 of the first substrate 110 through the absorption capacitor binding wire 1711. Similarly, when the absorption capacitor 171 is disposed on the DC electrode portion 1131 of the first substrate 110, one end of the absorption capacitor 171 is connected to the DC electrode portion 1131, and the other end of the absorption capacitor 171 is connected to the second upper conductor layer 123 of the second substrate 120 through the absorption capacitor binding wire 1711.

[0089] Thus, an absorption capacitor 171 is integrated between the DC positive and DC negative terminals of the power module unit 100. During the switching process of the power device, a switching loop is formed between the absorption capacitor 171 and the power device, thereby shielding the loop inductance of other circuits, including the terminals. Furthermore, the current loop formed by the absorption capacitor 171 and the power device is formed in the stacked substrate, achieving an extremely low inductance effect in the switching loop.

[0090] In addition, Figure 8and Figure 1 In this configuration, the gate of the upper bridge chip 161 is connected to the upper bridge gate driver 1135 of the first substrate 110 via a bonding wire and is led out through the upper bridge gate terminal 1612. The source of the upper bridge chip 161 is connected to the upper bridge source driver 1136 of the first substrate 110 via a bonding wire and is led out through the upper bridge source terminal 1613. The gate of the lower bridge chip 162 is connected to the lower bridge gate driver 1137 of the first substrate 110 via a bonding wire and is led out through the lower bridge gate terminal 1622. The source of the lower bridge chip 162 is connected to the lower bridge source driver 1138 of the first substrate 110 via a bonding wire and is led out through the lower bridge source terminal 1623.

[0091] like Figure 1 The individual power module unit 100 shown, after being assembled with the corresponding power terminals and drive terminals, constitutes a single-phase half-bridge power module with complete functions. Figure 9 This is an exploded structural diagram of a power module packaging structure provided in an embodiment of this application. (Refer to...) Figure 9 As shown, a complete three-phase full-bridge power module can be constructed by encapsulating three identical power module units 100 in a housing 200.

[0092] The outer casing 200 may include a top cover 210 and a base plate 220, which are connected together by mechanical fastening (screws, rivets, or other fasteners) or by bonding, snap-fitting, or other methods. The power module unit 100 can be fixed to the base plate 220, which may be made of a material with good thermal conductivity to ensure the heat dissipation of the power module unit 100. The top cover 210 may be made of plastic and serves a protective and insulating function.

[0093] Figure 10 This is a schematic diagram of another power module unit provided in an embodiment of this application. (Refer to...) Figure 10 As shown, the power module unit 100 may include a substrate and power devices connected to the substrate.

[0094] The substrate may include a first substrate 110 and a second substrate 120 stacked on the first substrate 110. The first substrate 110 has a DC electrode portion 1131 and an AC electrode portion 1132. The DC electrode portion 1131 is electrically connected to the positive terminal 130, for example, the DC electrode portion 1131 is connected to the positive terminal 130 via a positive electrode bonding wire 131. The AC electrode portion 1132 is electrically connected to the output terminal 140, for example, the AC electrode portion 1132 is connected to the output terminal 140 via an output electrode bonding wire 141. The second substrate 120 is electrically connected to the negative terminal 150, for example, the second substrate 120 is connected to the negative terminal 150 via a negative electrode bonding wire 151.

[0095] The power device includes an upper bridge chip 161 and a lower bridge chip 162, which are mounted on a substrate. The upper bridge chip 161 is electrically connected to the DC electrode portion 1131 in the first substrate 110 and to the AC electrode portion 1132 in the first substrate 110. The lower bridge chip 162 is electrically connected to the AC electrode portion 1132 in the first substrate 110 and to the second substrate 120. Further details are omitted here.

[0096] Figure 11 for Figure 10 A schematic diagram of the structure after the substrate and power devices are bonded together in a power module unit. (Combined with...) Figure 10 and Figure 11 As shown, with Figure 1 The power module unit 100 shown is different in that, Figure 10 The power module unit 100 shown can use a capacitor without integrated resistors as the absorption capacitor 171. For example, the absorption capacitor 171 is a multi-layer ceramic capacitor (MLCC). In this case, a series resistor 172 can be connected in series with the absorption capacitor 171.

[0097] Figure 12 This is an overall structural diagram of another substrate provided in an embodiment of this application. (Refer to...) Figure 12 As shown, when the absorption capacitor 171 and the series resistor 172 are connected in series, the substrate of the power module unit 100 can be designed to integrate the absorption capacitor 171 and the series resistor 172 on the substrate.

[0098] Specifically, a first connection portion 191 and a second connection portion 192 can be provided on the first substrate 110 or the second substrate 120. The first connection portion 191 and the second connection portion 192 realize the series connection of the absorption capacitor 171 and the series resistor 172, and connect the absorption capacitor 171 between the DC positive terminal portion of the first substrate 110 and the second upper conductor layer 123 of the second substrate 120.

[0099] Figure 13 for Figure 12 An exploded view of the substrate. Combined with... Figure 12 and Figure 13 As shown, in one embodiment, the first connecting portion 191 and the second connecting portion 192 can be disposed on the second substrate 120, and the first connecting portion 191 and the second connecting portion 192 are disposed on the same layer as the second upper conductor layer 123 of the second substrate 120. In this case, the structure of the first substrate 110 can be similar to... Figure 2 The first substrate 110 shown has the same structure.

[0100] WillFigure 13 and Figure 11 In combination, when the first connecting portion 191 and the second connecting portion 192 are disposed on the second substrate 120 and on the same layer as the second upper conductor layer 123, one end of the absorption capacitor 171 is soldered to the second upper conductor layer 123 of the second substrate 120, thereby connecting the absorption capacitor 171 to the DC negative terminal. The other end of the absorption capacitor 171 is soldered to the first connecting portion 191. The series resistor 172 is connected in series with the absorption capacitor 171, and one end of the series resistor 172 is also soldered to the first connecting portion 191. The other end of the series resistor 172 is soldered to the second connecting portion 192, and this end of the series resistor 172 is connected to the DC electrode portion 1131 of the first substrate 110 through the absorption capacitor binding wire 1711, thereby connecting the series resistor 172 to the DC positive terminal. Thus, the absorption capacitor 171 and the series resistor 172 are integrated in series between the DC positive and DC negative terminals of the power module unit 100.

[0101] Similarly, if the first connecting portion 191 and the second connecting portion 192 are disposed on the first upper conductor layer 113 of the first substrate 110, one end of the absorbing capacitor 171 can be soldered to the DC electrode portion 1131 of the first upper conductor layer 113, thereby connecting the absorbing capacitor 171 to the DC positive terminal. The other end of the absorbing capacitor 171 is soldered to the first connecting portion 191. The series resistor 172 is connected in series with the absorbing capacitor 171, and one end of the series resistor 172 is also soldered to the first connecting portion 191. The other end of the series resistor 172 is soldered to the second connecting portion 192, and this end of the series resistor 172 is connected to the second upper conductor layer 123 of the second substrate 120 through the absorbing capacitor binding wire 1711, thereby connecting the series resistor 172 to the DC negative terminal.

[0102] Reference Figure 13 As shown, in one embodiment, the first connecting portion 191 may have a plurality of spaced-apart first protrusions 1911, each protruding from the side of the first connecting portion 191 facing the second connecting portion 192. The second connecting portion 192 may have a plurality of spaced-apart second protrusions 1921, each protruding from the side of the second connecting portion 192 facing the first connecting portion 191. The first protrusions 1911 and the second protrusions 1921 are arranged side by side, and the first protrusions 1911 and the second protrusions 1921 are arranged alternately in sequence.

[0103] The absorption capacitor 171 is connected to one end of the first connection portion 191, which can be located at the first protrusion 1911. The series resistor 172 is connected to one end of the second connection portion 192, which can be located at the second protrusion 1921. In this way, the distance between the absorption capacitor 171 and the series resistor 172 can be further reduced, the path of the absorption current loop formed by the absorption capacitor 171 and the series resistor 172 is shorter, and the parasitic inductance of the absorption current loop can be further reduced.

[0104] Figure 14 This is a partial structural diagram of another power module packaging structure provided in an embodiment of this application. (Refer to...) Figure 14 As shown in the figure, the three Figure 10 The power module unit 100 shown is encapsulated within a housing 200 to form a complete three-phase full-bridge power module. The housing 200 may include a top cover (not shown) and a base plate 220 that are snapped together, and the power module unit 100 can be fixed to the base plate 220. Further details are omitted here.

[0105] In the description of this application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0106] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A power module unit, characterized by, The power module comprises: a first substrate comprising a first lower conductor layer, a first insulating layer and a first upper conductor layer which are sequentially stacked, the first upper conductor layer comprising a direct current electrode portion and an alternating current electrode portion, the direct current electrode portion being electrically connected to a positive terminal, and the alternating current electrode portion being electrically connected to an output terminal; a second substrate comprising a second lower conductor layer, a second insulating layer and a second upper conductor layer which are sequentially stacked on the first upper conductor layer, the second upper conductor layer being electrically connected to a negative terminal; an upper bridge chip which is electrically connected to the direct current electrode portion and the alternating current electrode portion; a lower bridge chip which is electrically connected to the alternating current electrode portion and the second upper conductor layer; an absorption capacitor which is electrically connected to the direct current electrode portion and the second upper conductor layer.

2. The power module unit of claim 1, wherein, The direct current electrode portion and the alternating current electrode portion are at least partially exposed outside the second substrate, the upper bridge chip is arranged on the direct current electrode portion, the lower bridge chip is arranged on the alternating current electrode portion, and the upper bridge chip and the lower bridge chip are exposed outside the second substrate.

3. The power module unit of claim 2, wherein, The direct current electrode portion surrounds the outer periphery of the alternating current electrode portion, and the orthographic projection of the second substrate on the first upper conductor layer is located within the direct current electrode portion.

4. The power module cell according to any one of claims 1-3, characterized in that, The absorption capacitor is arranged on the second upper conductor layer or the direct current electrode portion.

5. The power module unit according to any one of claims 1-3, characterized in that, One of the first substrate and the second substrate further comprises a first connecting portion and a second connecting portion, the first connecting portion and the second connecting portion are both arranged on the first upper conductor layer, or the first connecting portion and the second connecting portion are both arranged in the same layer as the second upper conductor layer; The absorption capacitor is connected to the first connecting portion, and a series resistor is connected between the first connecting portion and the second connecting portion.

6. The power module unit of claim 5, wherein, The first connecting portion has a plurality of first protruding portions arranged at intervals, the second connecting portion has a plurality of second protruding portions arranged at intervals, and the first protruding portions and the second protruding portions are arranged side by side and alternately. The absorption capacitor is connected to the first protruding portions, and the series resistor is connected to the second protruding portions.

7. The power module unit according to any one of claims 1-3, characterized in that, The first upper conductor layer further comprises an upper bridge gate resistor portion and a lower bridge gate resistor portion, the upper bridge gate resistor portion is provided with an upper bridge gate resistor, and the lower bridge gate resistor portion is provided with a lower bridge gate resistor.

8. The power module unit of claim 7, wherein, The direct current electrode portion surrounds the outer periphery of the alternating current electrode portion, and the alternating current electrode portion surrounds a central region. The upper bridge gate resistor portion is arranged between the direct current electrode portion and the alternating current electrode portion, and the lower bridge gate resistor portion is arranged in the central region.

9. The power module cell of any one of claims 1-3, wherein, The first upper conductor layer further comprises an upper bridge gate drive portion, an upper bridge source drive portion, a lower bridge gate drive portion and a lower bridge source drive portion.

10. A power module package structure, characterized by, The power module comprises: a housing; three power module units according to any one of claims 1-9, which are arranged in the housing.

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