Overlapping switching mode of SWISS rectifier voltage expansion circuit
By employing an overlapped switching method in the SWISS rectifier voltage expansion circuit and utilizing the nonlinear resistance characteristics of MOSFETs, the dead zone problem at the switching point of the voltage expansion circuit is solved, achieving stable and high-quality input current.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-29
- Publication Date
- 2026-03-13
AI Technical Summary
The voltage expansion circuit of the existing SWISS rectifier has a dead zone at the switching point, which causes input current distortion and reduces the quality of input current.
An overlapping switching method is adopted. By setting the overlap time in the voltage expansion circuit, the nonlinear resistance characteristics of the MOSFET are utilized to ensure that the bidirectional switch is stable and reliable during switching and to reduce input current distortion.
Stable and reliable switching of bidirectional switching of voltage expansion circuit was achieved, reducing input current distortion and improving input current quality.
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Figure CN121663939A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of AC / DC converters, and more specifically to an overlapping switching method for a SWISS rectifier voltage expansion circuit. Background Technology
[0002] Three-phase PWM rectifiers employ fully controlled power devices, enabling excellent control over the input current waveform and phase, thus achieving a high power factor. They are now widely researched and applied. The SWISS rectifier is a new type of step-down three-phase PWM rectifier, characterized by high efficiency, high power factor, and a wide output voltage range, showing promising application prospects in electric vehicle systems and high-power lighting.
[0003] The switching logic of the voltage expansion circuit of the existing SWISS rectifier is as follows: the three-phase bidirectional switch remains on when the voltage amplitude of its corresponding phase is in the middle of the three-phase voltage amplitude, and the drive signal is simultaneously set high or low at the switching point. Since the bidirectional switch is not an ideal switch, there will inevitably be a dead zone between the two sets of bidirectional switches at the switching point. This will cause the input current to be distorted at the switching point, reducing the quality of the input current. Summary of the Invention
[0004] This invention addresses the shortcomings of existing modulation strategies by proposing an overlapping switching method for the voltage expansion circuit of a SWISS rectifier. This scheme realizes the overlapping switching method of the voltage expansion circuit from both software and hardware perspectives, enabling stable and reliable operation and reducing input current distortion.
[0005] To solve the above-mentioned technical problems, the present invention adopts the following technical solution:
[0006] A switching method for a SWISS rectifier voltage expansion circuit: the bidirectional switch of each phase of the voltage expansion circuit remains open when the voltage amplitude of its corresponding phase is at the middle position of the three-phase voltage amplitude. When the voltage amplitudes of two phases are equal, it is the sector boundary. At this time, the bidirectional switch is switched to turn on the bidirectional switch that needs to be turned on and turn off the bidirectional switch that needs to be turned off with a delay. The time when the two sets of bidirectional switches are turned on at the same time is the overlap time.
[0007] When switching between two sets of bidirectional switches, one set of bidirectional switches turns on while the other set turns off with a lag. The appropriate overlap time is determined based on the constraints of the bus capacitor ripple transition range and the magnitude of the two-phase short-circuit current during the overlap period. The bidirectional switch drive logic of the voltage expansion circuit with overlap time is set up, and the switching is achieved by utilizing the nonlinear resistance characteristics of the MOSFET turn-on transition stage.
[0008] Furthermore, the method for determining the bus capacitor ripple transition range is as follows: calculate the peak value of the bus capacitor voltage ripple and the expression for the ideal two-phase voltage difference. When the ideal two-phase voltage difference is less than half of the peak value of the capacitor voltage ripple, the bus capacitor ripple transition occurs. During the bus capacitor ripple transition, the input current is distorted. The overlap time of the voltage expansion circuit is set within the bus capacitor ripple transition range, and the overlap time is less than the duration of this transition range.
[0009] Furthermore, the specific calculation and implementation methods include the following steps:
[0010] 1) Based on the operating modes of the high-frequency isolation circuit, the peak value of the capacitor ripple satisfies the following relationship:
[0011]
[0012] Where C f L is the equivalent value of the bus capacitance. r t is the equivalent value of the input filter inductance. H For u H The duration of power transfer, t L For u L The duration of power transfer, u s This is the primary voltage of the transformer.
[0013] 2) Each sector u xy and u yz It has symmetry and can be accessed through u xy and u yz Derivation of the general expression from the expression:
[0014]
[0015] In the formula, θ is the grid phase value obtained by phase locking, and θ' is the phase value with remainder π / 3;
[0016] 3) When the ideal two-phase voltage difference is less than half the peak value of the capacitor voltage ripple, the input current is distorted due to sector switching, as shown in the formula:
[0017]
[0018] 4) Solving using equations (1), (2), and (3) yields:
[0019]
[0020] The obtained θ' can determine the bus capacitor ripple range. The overlap time is set within this range, and the overlap time is less than the duration of this junction range.
[0021] Furthermore, the method for determining the short-circuit current magnitude constraint is as follows: the short-circuit current magnitude is affected by the short-circuit duration, and the peak value of the short-circuit current should be less than the inrush current of the selected device, with a margin. The calculation yields:
[0022]
[0023] Furthermore, the method for determining the overlap duration is as follows: the overlap time is less than the duration of the bus capacitor ripple transition range, and also less than the short-circuit duration t determined by the short-circuit current magnitude constraint. short .
[0024] Furthermore, the hardware configuration method is as follows: increase the gate drive resistance and reverse capacitor of the MOSFET, and take advantage of its characteristic of exhibiting nonlinear high impedance to the outside during the turn-on transition phase to further suppress the two-phase short-circuit current.
[0025] Compared with the prior art, the present invention, employing the above technical solution, has the following technical effects:
[0026] 1) The bidirectional switching of the voltage expansion circuit eliminates dead time, reducing input current distortion;
[0027] 2) The bidirectional switch of the voltage expansion circuit provides stable and reliable switching.
[0028] 3) The implementation is simple, requiring only the calculation of a reasonable overlap time and a small modification to the hardware, without the need for additional power devices. Attached Figure Description
[0029] Figure 1 This is a diagram of the SWISS rectifier topology;
[0030] Figure 2 This is the driving logic diagram of the SWISS rectifier voltage expansion circuit of the present invention;
[0031] Figure 3 These are waveforms of the filter capacitor voltage, bus capacitor voltage, and bidirectional switch drive when the voltage expansion circuit has overlapping switching.
[0032] Figure 4 This is the working mode diagram of the SWISS rectifier voltage expansion circuit with overlapping switching of the present invention;
[0033] Figure 5 This is a waveform diagram of the capacitor voltage ripple difference;
[0034] Figure 6 This is a schematic diagram of the charging and discharging process of the bus capacitor;
[0035] Figure 7 This is a schematic diagram of the software execution flow for the bidirectional switch of the voltage expansion circuit;
[0036] Figure 8 This is an experimental diagram of the bidirectional switch drive logic of the voltage expansion circuit;
[0037] Figure 9 The waveforms of the bidirectional switch being turned on and off are shown when Rg = 5Ω and Crss = 13pF.
[0038] Figure 10 The waveforms of the bidirectional switch being turned on and off are shown when Rg = 30Ω and Crss = 43pF.
[0039] Figure 11 It is a waveform diagram of the opening and closing of the bidirectional switch after adding the overlap time;
[0040] Figure 12 This is the input and output waveform diagram of the voltage expansion circuit without overlapping switching;
[0041] Figure 13 This is the input current THD diagram of the voltage expansion circuit without overlapping switching;
[0042] Figure 14 This is the input and output waveform diagram of a voltage expansion circuit with overlapping switching;
[0043] Figure 15 This is the input current THD diagram of a voltage expansion circuit with overlapping switching. Detailed Implementation
[0044] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings:
[0045] First, it needs to be explained that the voltage expansion circuit with overlap time switching helps to reduce input current distortion. Then, the calculation of the overlap time and the software implementation method are explained. Finally, the hardware solution is explained.
[0046] 1. Operating modes of voltage expansion circuit with overlapping switching:
[0047] according to Figure 3 The voltage expansion circuit overlap switching is divided into three stages.
[0048] Stage ①: It will reach pi / 3, ideally the three-phase input voltage will decrease from u a >u b >u c Change to u b >u a >u c .
[0049] Phase ②: s ya On, s yb Delayed shutdown, at this time s ya s ybSimultaneous conduction occurs, with a brief overlap time. s ya s yb After conduction, the voltage u of the filter capacitor ca u cb When clamped, Da+ and Db+ are simultaneously turned on. In this state, the bus capacitor voltage u cx and u cy It was also clamped.
[0050] Phase ③: s yb Shutdown, because it was clamped in the previous moment, u ca =u cb When s yb When a shutdown signal is received, the voltage is zero for shutdown, and the clamping process ends. cb >u ca Da+ is turned off, and the switching process ends.
[0051] As can be seen from the above circuit operation, when the low-frequency power transistors of the voltage expansion circuit switch with overlapping, the bus capacitor voltage between the two phases is clamped during the overlapping time, and the difference in the average value of the bus capacitor voltage is almost 0. At this time, it can be considered that the voltage difference on the corresponding two-phase input filter inductors is 0, and no additional current will be injected into the input current, thereby reducing the distortion of the input current at the switching point.
[0052] 2. Calculation of overlap time:
[0053] The following limitations apply to the calculation of the overlap time: ① The overlap can clamp the bus capacitor voltage, and the overlap time should be less than the duration of the bus capacitor ripple transition; ② Avoid excessively long overlap times that could lead to excessive two-phase short-circuit currents. These will be explained in detail below:
[0054] ① The overlap time should be less than the duration of bus capacitor ripple handover:
[0055] Taking the transition from sector B to sector A as an example, since the overlap time can be used to... cx and u cy The clamping is performed to make them equal, thereby reducing the difference in the average value of the actual bus capacitance. Therefore, overlap is performed during the distortion period. The time of distortion occurrence and the duration of distortion will be calculated below.
[0056] The input current begins to distort when the capacitor voltage ripples first intersect, and the distortion ends when the two capacitor voltage ripples no longer intersect. At the first intersection, the bus capacitor voltage difference u... xy The bus capacitor voltage difference u reaches 0 for the first time, and remains constant until the final handover. xy No longer reaching 0, the current distortion time is t. d . Figure 4 This is a waveform diagram of the capacitor voltage ripple difference. The dashed line represents the ideal two-phase voltage difference u. xy / yzThe solid line represents the actual two-phase voltage difference u. xy Therefore, the condition for current distortion can be obtained as follows:
[0057]
[0058] in, This indicates the peak value of the capacitor voltage ripple.
[0059] To calculate the distortion duration using this formula, we first need to obtain the peak value of the capacitor voltage ripple. The ripple generation mechanism will be analyzed below.
[0060] The schematic diagram of the charging and discharging process of the bus capacitor during half a high-frequency switching cycle is shown below. Figure 6 As shown. Where u H This represents the voltage at node pq when the high-frequency switch in the high-frequency isolation circuit is connected to the xz bus. H =u xy +u yz u L This represents the voltage at node pq when the high-frequency switching transistor in the high-frequency isolation circuit is connected to the xy or yz bus. L =u xy or u yz . Figure 6 (a) is u H During the power transfer phase, C in this mode x Discharge, C y and C z Charge. Figure 6 (b) is u L During the power transfer phase, C in this mode y Discharge, C x and C z Charge. Figure 6 (c) is the follow-through phase, under which C z Discharge, C x and C y Charge. Figure 6 (d) represents the discontinuous current phase. In this mode, the charging and discharging process is consistent with the freewheeling phase. C z Discharge, C x and C y Charging. During negative magnetization, the direction of the bus current flow is the same as during positive magnetization, so the charging and discharging state of the capacitors is the same as the positive magnetization period of the transformer. It can be observed that only one phase capacitor discharges in each conduction mode, while the rest of the capacitors charge. Therefore, the magnitude of the capacitor voltage ripple is related to the duration of each conduction mode.
[0061] Depend on Figure 6 (b) It can be seen that in u L During the power transfer stage, C y Discharge C xDuring charging, the voltage between the two capacitors rises to its peak value. Therefore, the relationship that satisfies the peak value of the capacitor ripple can be obtained as follows:
[0062]
[0063] The sector switching point is around π / 3, which can be considered as follows:
[0064]
[0065] Combining equations (2) and (3), the expression for the peak value of the capacitor ripple can be obtained as follows:
[0066]
[0067] Where C f L is the equivalent value of the bus capacitance. r t is the equivalent value of the input filter inductance. H For u H The duration of power transfer, t L For u L The duration of power transfer, u s This is the primary voltage of the transformer.
[0068] Because each sector is symmetrical, and the carrier u xy / yz u in each sector xy and u yz The smaller value in the range. Each sector u xy and u yz It has symmetry and can be accessed through u xy and u yz Derivation of the general expression from the expression:
[0069]
[0070] In the formula, θ is the grid phase value obtained by phase locking, and θ` is the phase value with remainder π / 3.
[0071] Therefore, taking the area near the switching point π / 3 as an example, substituting expressions (4) and (5) into (1) yields:
[0072]
[0073] Finally, it was determined that the ripple transition range is approximately 15µs before and after the sector switching point.
[0074] ② Avoid excessive overlap time, which could lead to excessive two-phase short-circuit current:
[0075]
[0076] According to constraint ①, the ripple transition time is known to be the starting position of current distortion. In order to ensure that the short-circuit current is large due to the large voltage difference between the two phases at the beginning of the overlap, the overlap is selected to start at the sector switching point. The overlap duration needs to be calculated according to equation (7) and must meet the following requirements:
[0077]
[0078] As can be seen, near the sector switching boundary, since the voltage difference between the two phases to be switched is very small, as long as the overlap time is not too long, the short-circuit current of the two phases can be guaranteed to be within a safe range. The final overlap time is chosen to be 5µs.
[0079] 3. Software execution flow:
[0080] The software execution flow for the voltage expansion circuit bidirectional switch is as follows: Figure 7 As shown. First, the sampling results of the three-phase input voltage are output through a phase-locked loop. The output result is the grid phase θ. The remainder of θ divided by π is used to determine sectors A, B, and C. Among them, 0 to π / 3 is sector A, π / 3 to 2π / 3 is sector B, and 2π / 3 to π is sector C. Sector A indicates that the voltage amplitude of phase A is in the middle of the three-phase voltage range. At this time, the bidirectional switch S... ya The current sector should be activated, and the same logic applies to the remaining sectors. The current sector is determined based on the remainder calculation, and the intermediate phase that should be activated is identified as Newphase, while the intermediate phase activated at the previous sampling time is Lastphase. Then, it is determined whether Newphase equals Lastphase. If they are equal, the bidirectional switch does not need to switch. If they are not equal, it indicates a transition from one sector to the next, and the bidirectional switch needs to switch. In this case, the PWM signal of the new phase switch is set high, and the CMPA is updated, causing the PWM signal of the old phase switch to lag by 5µs before being set low, thus achieving a certain overlap time during bidirectional switch switching.
[0081] 4. Hardware Solution:
[0082] The selected bidirectional switch is an Infineon SiC MOSFET, model IMZ120R030M1H, with a reverse capacitance C. rss =13pF. The gate drive resistor is increased from 5Ω to 30Ω, and a 30pF capacitor is connected between the gate and drain of the MOSFET. The reverse capacitor is adjusted to 43pF. Thus, in the overlapped switching mode, the MOSFET in the overlapped region slowly rises during the turn-on phase and exhibits high impedance characteristics, suppressing the two-phase short-circuit current. Before the end of the overlapped region, the MOSFET is fully turned on, avoiding the dead zone at the switching moment. This achieves stable and reliable switching of the voltage expansion circuit and reduces input current distortion.
[0083] 5. Experimental verification results:
[0084] 1) First, the software and hardware solutions were verified. Figure 8 This is an experimental diagram of the bidirectional switch driving logic of the voltage expansion circuit. Here, the result of taking the remainder of θ with respect to π / 3 is output by the DAC and compared with the bidirectional switch driving waveform. It can be seen that each bidirectional switch conducts π / 3 and completes the switching at the switching point.
[0085] 2) Figure 9 These are the turn-on and turn-off waveforms of a bidirectional switch when Rg = 5Ω and Crss = 13pF. Figure 10 The waveforms for the bidirectional switch when Rg = 30Ω and Crss = 43pF are shown. It can be seen that increasing the gate drive resistance and the reverse capacitor slows down the MOSFET turn-on and turn-off processes, reduces dv / dt during fast switching, and the MOSFET exhibits high impedance characteristics during the transition process, which helps to suppress the two-phase short-circuit current caused by overlap.
[0086] 3) Figure 11 It is the turn-on and turn-off waveform of the bidirectional switch after adding the overlap time, with an overlap time of approximately 5µs.
[0087] 4) Figure 12 These are the input and output waveforms of the voltage expansion circuit without overlapping switching. The input phase voltage amplitude is 311V, the phase current amplitude is 5A, and the output voltage is 400V. Figure 13 It is the input current THD when the voltage expansion circuit does not have overlapping switching, at which time the input current THD = 4.38%.
[0088] 4) Figure 14 These are the input and output waveforms of the voltage expansion circuit with overlapping switching. The input phase voltage amplitude is 311V, the phase current amplitude is 5A, and the output voltage is 400V. Figure 15 It is the input current THD when the voltage expansion circuit does not have overlapping switching, at which time the input current THD = 3.58%.
[0089] 5) Comparison Figures 12 to 15 It can be seen that the bidirectional switching method with overlapping switching of the SWISS rectifier voltage expansion circuit proposed in this invention can work stably and is beneficial to reducing the input current THD and improving the input current quality.
Claims
1. A switching method for a SWISS rectifier voltage expansion circuit, characterized in that: In the voltage expansion circuit, the bidirectional switch of each phase remains open when the voltage amplitude of its corresponding phase is at the middle position of the three-phase voltage amplitude. When the voltage amplitudes of two phases are equal, it is the sector boundary. At this time, the bidirectional switch is switched to turn on the bidirectional switch that needs to be turned on and turn off the bidirectional switch that needs to be turned off with a delay. The time when the two sets of bidirectional switches are turned on at the same time is the overlap time. When switching between two sets of bidirectional switches, one set of bidirectional switches turns on while the other set turns off with a lag. The appropriate overlap time is determined based on the constraints of the bus capacitor ripple transition range and the magnitude of the two-phase short-circuit current during the overlap period. The bidirectional switch drive logic of the voltage expansion circuit with overlap time is set up, and the switching is achieved by utilizing the nonlinear resistance characteristics of the MOSFET turn-on transition stage.
2. The switching method of the SWISS rectifier voltage expansion circuit according to claim 1, characterized in that: The method for determining the bus capacitor ripple transition range is as follows: calculate the peak value of the bus capacitor voltage ripple and the expression for the ideal two-phase voltage difference. When the ideal two-phase voltage difference is less than half of the peak value of the capacitor voltage ripple, the bus capacitor ripple transition occurs. During the bus capacitor ripple transition, the input current is distorted. The overlap time of the voltage expansion circuit is set within the bus capacitor ripple transition range, and the overlap time is less than the duration of the transition range.
3. The switching method of the SWISS rectifier voltage expansion circuit according to claim 1, characterized in that: The switching method includes the following steps: 1) Based on the operating modes of the high-frequency isolation circuit, the peak value of the capacitor ripple satisfies the following relationship: (2) in This is the equivalent value of the bus capacitance. The equivalent value of the input filter inductance, for The duration of power transmission for The duration of power transmission This is the primary voltage of the transformer; 2) Each sector u xy and u yz It has symmetry and can be accessed through u xy and u yz Derivation of the general expression from the expression: (5) In the formula, θ is the grid phase value obtained by phase locking, and θ' is the phase value with remainder π / 3; 3) When the ideal two-phase voltage difference is less than half the peak value of the capacitor voltage ripple, the input current is distorted due to sector switching, as shown in the formula: (1) 4) Solving using equations (1), (2), and (3) yields: (6) The obtained θ' can determine the bus capacitor ripple range. The overlap time is set within this range, and the overlap time is less than the duration of this junction range.
4. The switching method of the SWISS rectifier voltage expansion circuit according to claim 1, characterized in that: The method for determining the short-circuit current magnitude constraint is as follows: the short-circuit current magnitude is affected by the short-circuit duration, and the peak value of the short-circuit current should be less than the inrush current of the selected device, with a margin. The calculation yields the following result: (7) 5. The switching method of the SWISS rectifier voltage expansion circuit according to claim 1, characterized in that: The method for determining the overlap duration is as follows: the overlap time is less than the duration of the bus capacitor ripple transition range, and less than the short-circuit duration determined by the short-circuit current magnitude constraint. .
6. The switching method of the SWISS rectifier voltage expansion circuit according to claim 1, characterized in that: The hardware configuration method is as follows: increase the gate drive resistance and reverse capacitor of the MOSFET, and take advantage of its nonlinear high impedance to the outside during the turn-on transition phase to further suppress the two-phase short-circuit current.