Wide-interval frequency hopping sequence generation method, device, equipment, medium and product

By using techniques such as triple entropy source hybrid seeding, dynamic taps, and nonlinear mapping to generate wide-interval frequency hopping sequences, the problems of uneven frequency point distribution and insufficient minimum interval in traditional pseudo-random frequency hopping sequences are solved, thereby improving the security and anti-interference capability of frequency hopping communication systems.

CN121664233APending Publication Date: 2026-03-1310TH RES INST OF CETC +1
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-11-19
Publication Date
2026-03-13

AI Technical Summary

Technical Problem

Traditional pseudo-random frequency hopping sequences suffer from uneven frequency distribution, insufficient minimum frequency intervals, and obvious periodic characteristics in complex electromagnetic environments and highly adversarial communication scenarios, leading to a decrease in the system's anti-interference capability and security.

Method used

By employing triple entropy source hybrid seeding, dynamic taps, nonlinear mapping, and frequency backtracking techniques, a wide-interval frequency hopping sequence is generated, ensuring uniform frequency distribution and minimum interval, thereby improving randomness and anti-interference capability.

Benefits of technology

It significantly expands the capacity and periodicity of random sequences, achieves uniform coverage of the entire frequency band, improves the security and anti-interference capability of frequency hopping communication systems, and effectively resists synchronization head spoofing and frequency hopping follower interference.

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Abstract

The invention relates to the technical field of wireless communication, and provides a wide-interval frequency hopping sequence generation method, device and equipment, a medium and a product, and the method comprises the steps: generating a triple entropy source hybrid seed as an LFSR state initial value; generating a dynamic tap and updating the LFSR state based on the dynamic tap; carrying out nonlinear mapping on the LFSR state vector; performing frequency mapping on the state vector of the nonlinear mapping to generate an available frequency point set and a frequency index corresponding to each frequency point in the available frequency point set; and taking the frequency index corresponding to each frequency point in the available frequency point set as a candidate frequency index, performing frequency backtracking on the candidate frequency index, reading the available frequency point set by using the frequency index determined by the frequency backtracking, and outputting the current frequency. According to the method, the capacity, the periodicity, the randomness, the balance and the dynamic of the random sequence generated based on the LFSR can be obviously expanded, so that a frequency hopping communication system realizes full-band uniform coverage of frequency points, strict minimum interval constraint and high randomness.
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Description

Technical Field

[0001] This invention relates to the field of wireless communication technology, and more specifically, to a method, apparatus, device, medium, and product for generating wide-interval frequency hopping sequences. Background Technology

[0002] By interfering with specific frequencies, pulse frequency hopping can effectively evade enemy detection and interference. The combination of pulse frequency hopping and ultra-short burst pulses greatly enhances the anti-interception and anti-jamming capabilities of wireless communication systems. Pulse frequency hopping possesses extremely strong anti-jamming and low interception capabilities, and is also the most complex implementation of ultra-high-speed frequency hopping communication systems. By intercepting and analyzing frequency-hopping signals, jammers can reconstruct some or all of the characteristics of the frequency-hopping sequence, and then use repeater-type jamming to precisely target the synchronization channel or key frequency-hopping points. A typical jamming method is "synchronization head spoofing," which involves transmitting strong jamming signals at the time slot and frequency point where the synchronization head appears, preventing the receiver from correctly acquiring synchronization information. Another more covert jamming method is "frequency-hopping follower jamming," where jamming equipment tracks changes in the frequency-hopping sequence in real time and transmits appropriately delayed jamming pulses at each frequency-hopping point. This jamming highly overlaps with the real signal in the time and frequency domain, making it difficult for the receiver to filter out using conventional methods. The impact of pulse-repeater-type smart jamming on frequency-hopping system synchronization is mainly reflected in three aspects: First, it prolongs the synchronization acquisition time. In a jamming environment, the system may need to attempt to establish initial synchronization multiple times, directly reducing the timeliness of communication; second, it increases the probability of synchronization loss. Established synchronization states may be interrupted due to jamming, leading to fluctuations in communication quality; third, it compromises the confidentiality of the frequency-hopping pattern. Long-term repeater-type jamming may expose the regularity of the frequency-hopping sequence, endangering the security of the entire communication system.

[0003] In frequency-hopping communication systems, pseudo-random frequency-hopping sequences (such as those based on linear feedback shift registers, LFSRs) are widely used due to their simplicity and high computational efficiency. However, these sequences exhibit a series of key defects in complex electromagnetic environments and highly adversarial communication scenarios, severely limiting the system's anti-interference capability, spectrum utilization, and security.

[0004] 1. Insufficient minimum frequency spacing One of the core requirements of frequency hopping communication is to ensure a minimum frequency spacing between adjacent frequency points (e.g., typically greater than four channel intervals) to avoid problems such as partial band interference, spectral aliasing, and intermodulation interference. However, due to structural limitations, the frequency point distribution of pseudo-random sequences generated based on LFSRs exhibits strong correlation. Results show that in a 51-frequency system, sequences generated based on an 8th-order LFSR account for as much as 17.3% where the interval between adjacent frequency points is ≤ two channels. When multiple frequency points are too close together, nonlinear devices (such as power amplifiers) generate third-order intermodulation distortion (IMD3), degrading the system's signal-to-noise ratio (SNR), a problem that is particularly pronounced in narrowband frequency hopping communication systems.

[0005] 2. Poor uniformity of frequency distribution Ideally, frequency hopping sequences should be uniformly distributed across the entire frequency band to maximize resistance to narrowband interference. However, the frequency distribution of LFSR sequences exhibits significant non-uniformity. Kolmogorov-Smirnov (KS) test analysis shows that traditional LFSR sequences deviate significantly from a uniform distribution. In a 51-frequency hopping system, the probability of use for some frequencies deviates by as much as ±20%, leading to a spectral hole effect. This means that some frequency bands have a low probability of use, while others are frequently occupied. This allows adversaries to predict high-probability frequencies through statistical analysis and implement targeted jamming. If the frequency distribution of the frequency hopping sequence is uneven, the communication quality of the system in specific frequency bands will deteriorate sharply.

[0006] 3. Defects in the periodicity of the sequence The biggest problem with LFSR sequences is their obvious periodicity, making them easily predictable by the enemy. In military communications, sequence reconstruction attacks and the predictability of sequences directly threaten communication security. Studies have shown that the period length of LFSR sequences is limited by the number of register bits (e.g., the period of an 8-bit LFSR is 255), while modern electronic reconnaissance equipment (such as software-defined radio, SDR) can quickly capture the sequence period and then carry out synchronization jamming.

[0007] To overcome the spectral spacing, balance, and randomness problems of traditional pseudo-random sequences, researchers have proposed several wide-interval frequency hopping algorithms, mainly including the fixed-interval method and the collision retry method. The core idea of ​​the fixed-interval method is to enforce a minimum interval between adjacent frequency points (e.g., ≥4 channels) to ensure spectral dispersion. The collision retry method employs a "generation-detection" mechanism, that is, it first randomly selects frequency points, and if the interval requirement is not met, it regenerates them. The former, while ensuring the minimum interval, often sacrifices randomness; the latter sacrifices balance and is difficult to meet the needs of complex communication scenarios. Summary of the Invention

[0008] The present invention aims to provide a method, apparatus, device, medium and product for generating wide-interval frequency hopping sequences, so as to solve the problems of reduced security and anti-interference ability caused by the short period of frequency hopping sequences, large balance variance and insufficient frequency hopping interval in frequency hopping wireless communication systems.

[0009] In a first aspect, the present invention provides a method for generating wide-interval frequency hopping sequences, comprising: Generate a triple entropy source hybrid seed as the initial value of the LFSR state; Generate dynamic taps and update the LFSR state based on the dynamic taps; Perform a nonlinear mapping on the LFSR state vector; The state vector of the nonlinear mapping is frequency mapped to generate a set of available frequency points and the frequency index corresponding to each frequency point in the set of available frequency points. The frequency index corresponding to each frequency point in the available frequency point set is used as the candidate frequency index. Frequency backtracking is performed on the candidate frequency index, and the available frequency point set is read using the frequency index determined by frequency backtracking, and the current frequency is output.

[0010] In a preferred embodiment, generating a triple entropy source hybrid seed includes: Extract the triple key, including the system key, hardware noise value, and user key; Perform hash transformation on the triple key ; Perform bitwise XOR operation on the result of the triple key hash transformation. The XOR result is randomly folded to obtain a triple entropy source hybrid seed.

[0011] In a preferred embodiment, generating dynamic taps and updating the LFSR state based on the dynamic taps includes: Based on the LFSR state, a nonlinear function is used to generate dynamic taps; The LFSR state is updated based on dynamic taps, represented as follows:

[0012] in, for LFSR state vector at time step For the updated LFSR state vector, Indicates a circular right shift. This represents the XOR operation. This indicates a bitwise AND operation.

[0013] In a preferred embodiment, the nonlinear mapping of the LFSR state vector includes: Divide the N-bit LFSR state vector into G groups of sub-vectors on an equal basis; Randomly swap the positions of bits within the group; Invert the bits that occupy the most significant bits; In sequence, the G groups are concatenated into an N-bit mapping vector.

[0014] In a preferred embodiment, the step of frequency mapping the state vector of the nonlinear mapping includes: The N-bit mapping vector is expanded into a 2N-bit extended vector using a hash function. ; Based on the extended vector Frequency mapping is performed, represented as:

[0015] in, This represents a 2N-bit bit vector. Represented as a non-negative integer. Represents the set of available frequency points. This indicates the size of the available frequency point set.

[0016] In a preferred embodiment, the frequency backtracking includes: Obtain several candidate frequency indices from the available frequency point set; Determine if the current frequency index meets the interval requirement: Calculate whether the minimum value of the cyclic distance between the current frequency index and a number of consecutive frequency indices in history is greater than a preset distance threshold; if it is greater, directly output the current frequency index, and read the set of available frequency points based on the frequency index, and output the current frequency; if the condition is not met, continue to execute the subsequent steps. Calculate the minimum cyclic distance between each frequency index in the candidate frequency index and a number of consecutive frequency indices in history; based on the minimum cyclic distance and the probability of use, calculate the benefit of using each frequency index in the candidate frequency index; select the frequency index with the highest benefit from the candidate frequency index as the current frequency index, and read the set of available frequency points based on this frequency index, and output the current frequency.

[0017] In a second aspect, the present invention provides a wide-interval frequency hopping sequence generation apparatus, comprising: The seed generation module is used to generate a triple entropy source hybrid seed as the initial value of the LFSR state. The state update module is used to generate dynamic taps and update the LFSR state based on the dynamic taps; The nonlinear mapping module is used to perform nonlinear mapping on the LFSR state vector; The frequency mapping module is used to perform frequency mapping on the state vector of the nonlinear mapping, and generate a set of available frequency points and the frequency index corresponding to each frequency point in the set of available frequency points. The frequency backtracking module is used to take the frequency index corresponding to each frequency point in the available frequency point set as the candidate frequency index, perform frequency backtracking on the candidate frequency index, and use the frequency index determined by the frequency backtracking to read the available frequency point set and output the current frequency.

[0018] Thirdly, the present invention provides an electronic device, comprising: At least one processor; and a memory communicatively connected to said at least one processor; The memory stores instructions that can be executed by the at least one processor, and the at least one processor executes the instructions stored in the memory to perform the method described above.

[0019] Fourthly, the present invention provides a computer-readable storage medium for storing instructions that, when executed, cause the above-described method to be implemented.

[0020] Fifthly, the present invention provides a computer program product that, when invoked by a computer, causes the computer to execute the above-described method.

[0021] In summary, due to the adoption of the above technical solution, the beneficial effects of the present invention are: 1. This invention employs techniques such as triple entropy source mixing, dynamic tapping, dynamic nonlinear mapping, frequency mapping, and frequency backtracking to solve the problems of short period, uneven frequency distribution, and insufficient minimum interval in traditional LFSR sequences. This greatly improves the capacity of random sequences, significantly expanding the capacity, periodicity, randomness, balance, and dynamism of random sequences generated based on LFSR. This enables frequency hopping communication systems to achieve beneficial effects such as uniform coverage of the entire frequency band, strict minimum interval constraints, and high randomness. Ultimately, this results in better security and anti-interference capabilities for frequency hopping communication systems.

[0022] 2. This invention is applicable to military communications, the Internet of Things, and 5G / 6G systems. It can effectively resist interference such as synchronization head spoofing and frequency hopping, and improve the anti-interception and anti-interference capabilities of communication systems. Attached Figure Description

[0023] Figure 1 This is a flowchart of a wide-interval frequency hopping sequence generation method provided in an embodiment of the present invention.

[0024] Figure 2 This is a flowchart illustrating the generation of a triple entropy source hybrid seed in an embodiment of the present invention.

[0025] Figure 3 This is a flowchart of frequency backtracking in an embodiment of the present invention.

[0026] Figure 4 This is a schematic diagram of a wide-interval frequency hopping sequence generation device provided in an embodiment of the present invention.

[0027] Figure 5 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0028] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0029] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0030] In this invention, superscripts represent indices, specifically the indices of the N-bit key, seed, LFSR register, and taps; subscripts represent time. The XOR operation is defined as follows: when the operand is a binary vector, it represents bitwise XOR; when the operand is a single binary digit, it represents XOR. The cyclic distance is defined as: Let... For model an integer ring, for any Its cycle distance ,in, This is for absolute value operations.

[0031] like Figure 1 As shown, this embodiment of the invention provides a method for generating wide-interval frequency hopping sequences, including: S100, generate a triple entropy source mixed seed as the initial value of the LFSR state; S200, generate dynamic taps and update the LFSR state based on the dynamic taps; S300 performs a nonlinear mapping on the LFSR state vector; S400 performs frequency mapping on the state vector of the nonlinear mapping to generate a set of available frequency points and the frequency index corresponding to each frequency point in the set of available frequency points. S500: Use the frequency index corresponding to each frequency point in the available frequency point set as the candidate frequency index, perform frequency backtracking on the candidate frequency index, and use the frequency index determined by the frequency backtracking to read the available frequency point set and output the current frequency.

[0032] The following details the specific implementation of the wide-interval frequency hopping sequence generation method described above.

[0033] S100, generate a triple entropy source mixed seed as the initial value of the LFSR state, such as Figure 2 As shown, it includes the following four sub-steps: S101, extract the triple key, including the system key, hardware noise value, and user key. ; S102, Perform a hash transformation on the triple key. They were obtained respectively ; S103, perform a bitwise XOR operation on the result of the triple key hash transformation, as follows: ; S104, randomly fold the XOR result to obtain the triple entropy source mixing seed, represented as:

[0034] in, This indicates the bit width of the triple entropy source mixing seed; Indicates the slow time dimension; Generated by an auxiliary random number generator. ,express arrive Integers between [a certain value] and uniformly distributed. Every [a certain number]... Seconds, regenerate the system key, hardware noise value, and user key. and random numbers And refresh the triple entropy source hybrid seed according to the steps above. Reset the LFSR status.

[0035] S200, generating dynamic taps and updating the LFSR state based on the dynamic taps, includes the following two sub-steps: S201, Dynamically generate taps: The characteristic polynomial corresponding to the tap is:

[0036] in, Represents the set of tap positions.

[0037] set up The fast time dimension represents the generation period of the frequency hopping sequence; based on the LFSR state, a nonlinear function is used. The generation of dynamic taps is represented as follows:

[0038] in, express LFSR state vector at time step; ; ; , Indicates a circular right shift. Indicates a circular left shift. Represents a binary vector Circularly shift right by 1 bit. Represents a binary vector Shift left by 1 bit.

[0039] S202, Update LFSR Status:

[0040] in, for LFSR state vector at time step For the updated LFSR state vector, Indicates a circular right shift. This represents the XOR operation. This indicates a bitwise AND operation.

[0041] S300 performs a nonlinear mapping of the LFSR state vector, which includes the following four sub-steps: S301, Bit Blocking: Divide the N-bit LFSR state vector Divide the vectors into G groups of subvectors.

[0042] S302, Intra-group order rearrangement: Randomly swap the positions of bits within a group.

[0043] S303, High-order block inversion: Inverts the bits of the block occupying the most significant bits.

[0044] S304, Bit Assembly: Sequentially concatenate G blocks into an N-bit mapping vector. .

[0045] S400, frequency mapping is performed on the state vector of the nonlinear mapping to generate a set of available frequency points and the frequency index corresponding to each frequency point in the set of available frequency points, which includes the following two sub-steps: S401, Bit Extension: Using a hash function (e.g., SHA256), the N-bit mapping vector is... Expanded into a 2N-bit extended vector, i.e. Extract the extended vector The first 2N bits; S402, Frequency Mapping: ,in, This represents a 2N-bit bit vector. Represented as a non-negative integer. For the frequency index in the set of available frequency points, Represents the set of available frequency points. This indicates the size of the available frequency point set.

[0046] S500 uses the frequency indices corresponding to each frequency point in the available frequency point set as candidate frequency indices, performs frequency backtracking on these candidate frequency indices, and uses the frequency index determined by the backtracking to read the available frequency point set and output the current frequency. The frequency backtracking mechanism ensures that adjacent frequency points meet the minimum interval requirement, and simultaneously optimizes frequency point selection through probability weights to achieve uniform distribution across the entire frequency band. Figure 3 As shown, it includes the following 5 sub-steps: S501, retrieve the available frequency points from the set. Candidate frequency index .

[0047] S502, Determine if the current frequency index meets the interval requirement: Calculate the current frequency index. and historical continuity Minimum value of the cycle distance of the second frequency index Is it greater than the preset distance threshold? If it is greater than, then directly output the current frequency index. Based on the frequency index, the set of available frequency points is read, and the current frequency is output. If the condition is not met, step S503 is executed; where, and All are preset positive integers; S503, Calculate the candidate frequency index Each frequency index and historical continuity Minimum value of the cycle distance of the second frequency index , .

[0048] S504, based on the minimum cyclic distance and the probability of use, calculate the reward for each frequency index among the candidate frequency indices, expressed as:

[0049] in, Frequency index Probability of use: , Frequency index Number of times used, It is a predefined, very small positive number, such as 0.001.

[0050] S505: Extract the frequency index with the highest benefit from the candidate frequency indexes as the current frequency index, read the set of available frequency points based on the frequency index, and output the current frequency.

[0051] The following is a specific implementation example of the wide-interval frequency hopping sequence generation method described above: The specific values ​​set in this example are as follows: The number of bits in the LFSR register and the bit width of the seed. ; Hash function SHA256 is selected. For operations with an output bit width of less than 256 bits, the required bit width is truncated starting from the MSB bit. The system key, hardware noise value, and user key are all 24 bits, and their update cycle, i.e., the slow time dimension, is also important. ; This represents the fast time dimension, which is the generation period of the frequency hopping sequence, set to 13µs; Size of the frequency set: ; Number of bit blocks:

[0052] Depth of frequency backtracking: ; When tracing back the frequency, set continuous Second frequency index, calculate cycle distance, preset distance threshold for minimum cycle distance. ; The cycle distance is defined as: Let For any integer ring modulo 51, for any Its cycle distance ,in, This is for absolute value operations.

[0053] Step 1: Each Seconds later, a new seed for generating a triple entropy source mixture is generated as the initial value for the LFSR state, which includes the following 4 sub-steps: S101, extract the triple key, including the system key, hardware noise value, and user key. ; S102, Perform a hash transformation on the triple key. They were obtained respectively ; S103, perform a bitwise XOR operation on the result of the triple key hash transformation, as follows: ; S104, randomly fold the XOR result to obtain the triple entropy source mixing seed, represented as:

[0054] in, Generated by an auxiliary random number generator. ,express arrive The random numbers are integers between 1 and 2, and are uniformly distributed. In this example, a new random number is generated every 12 seconds. ,if Step S104 indicates Seconds, 24-bit wide triple entropy source hybrid seed The nth equal The Bit.

[0055] S200, generating dynamic taps and updating the LFSR state based on the dynamic taps, includes the following two sub-steps: S201, Dynamically generate taps: The characteristic polynomial corresponding to the tap is:

[0056] in, Represents the set of tap positions.

[0057] set up The fast time dimension represents the generation period of the frequency hopping sequence; based on the LFSR state, a nonlinear function is used. The generation of dynamic taps is represented as follows:

[0058] in, Indicates LFSR in The state at any given moment.

[0059] ; ; , Indicates a circular right shift. Indicates a circular left shift. Represents a binary vector Circularly shift right by 1 bit. Represents a binary vector Shift left by 1 bit.

[0060] S202, Update LFSR Status:

[0061] in, for LFSR state vector at time step For the updated LFSR state vector, Indicates a circular right shift. This represents the XOR operation. This indicates a bitwise AND operation.

[0062] S300 performs a nonlinear mapping of the LFSR state vector, which includes the following four sub-steps: S301, Bit Blocking: ... time Bit LFSR state vector Divide into 4 sub-vectors, each with 6 bits.

[0063] S302, Intra-group order rearrangement: Randomly swap the positions of bits within a group, using the interleaver [1 4 2 0 3 5].

[0064] S303, High-order block inversion: Inverts the bits of the block occupying the most significant bits.

[0065] S304, Bit Assembly: Concatenate the four groups sequentially into a 24-bit mapping vector. .

[0066] S400, frequency mapping is performed on the state vector of the nonlinear mapping to generate a set of available frequency points and the frequency index corresponding to each frequency point in the set of available frequency points, which includes the following two sub-steps: S401, Bit Extension: A 24-bit mapping vector is created using the SHA256 hash function. Expanded into a 48-bit extended vector, i.e. Take the extended vector The first 48 bits.

[0067] S402, Frequency Mapping: ,in, This represents a 2N-bit bit vector. Represented as a non-negative integer. For the frequency index in the set of available frequency points, Represents the set of available frequency points. This indicates the size of the available frequency point set.

[0068] S500: The frequency index corresponding to each frequency point in the available frequency point set is used as the candidate frequency index. Frequency backtracking is performed on the candidate frequency index, and the available frequency point set is read using the frequency index determined by the frequency backtracking. The current frequency is then output. This process includes the following 5 sub-steps: S501, Obtain the indices of 8 candidate frequencies from the available frequency point set. .

[0069] S502, Determine if the current frequency index meets the interval requirement: Calculate the current frequency index. The minimum cyclic distance between the frequency indices and four consecutive frequency indices in history. Is it greater than 4? If it is, output the current frequency index directly. Based on the frequency index, the set of available frequency points is read and the current frequency is output. If the condition is not met, step S503 is executed. S503, Calculate the candidate frequency index Each frequency index The minimum cyclic distance between the frequency indices and four consecutive frequency indices in history. , .

[0070] S504, based on the minimum cyclic distance and the probability of use, calculate the reward for each frequency index among the candidate frequency indices, expressed as: .

[0071] in, Frequency index Probability of use: , Frequency index Number of times used, It is a predefined, very small positive number, such as 0.001.

[0072] S505: Extract the frequency index with the highest benefit from the candidate frequency indexes as the current frequency index, read the set of available frequency points based on the frequency index, and output the current frequency.

[0073] Based on the same technological concept, such as Figure 4 As shown, this embodiment of the invention also provides a wide-interval frequency hopping sequence generation apparatus, comprising: The seed generation module is used to generate a triple entropy source hybrid seed as the initial value of the LFSR state. The state update module is used to generate dynamic taps and update the LFSR state based on the dynamic taps; The nonlinear mapping module is used to perform nonlinear mapping on the LFSR state vector; The frequency mapping module is used to perform frequency mapping on the state vector of the nonlinear mapping, and generate a set of available frequency points and the frequency index corresponding to each frequency point in the set of available frequency points. The frequency backtracking module is used to take the frequency index corresponding to each frequency point in the available frequency point set as the candidate frequency index, perform frequency backtracking on the candidate frequency index, and use the frequency index determined by the frequency backtracking to read the available frequency point set and output the current frequency.

[0074] The working principles of the above-mentioned functional modules can be referred to the description in the foregoing method embodiments, and will not be repeated here.

[0075] Based on the same technical concept, embodiments of the present invention also provide an electronic device that can implement the wide-interval frequency hopping sequence generation method provided in the above embodiments of the present invention. In one embodiment, the electronic device can be a server, a terminal device, or other electronic devices. Figure 5 As shown, the electronic device may include: At least one processor and a memory connected to the at least one processor. In this embodiment of the invention, the specific connection medium between the processor and the memory is not limited. Figure 5 The example used is the connection between the processor and memory via a bus. The bus... Figure 5 The connections between other components are indicated by thick lines and are for illustrative purposes only, not as limiting information. Buses can be divided into address buses, data buses, control buses, etc., but for ease of representation, [the specific bus type is not shown here]. Figure 5 The processor is represented by a single thick line, but this does not imply that there is only one bus or one type of bus. Alternatively, a processor can also be called a controller; there are no restrictions on the name.

[0076] In this embodiment of the invention, the memory stores instructions that can be executed by at least one processor. By executing the instructions stored in the memory, at least one processor can execute a wide-interval frequency hopping sequence generation method described above.

[0077] The processor is the control center of the device. It can connect to various parts of the control device through various interfaces and lines. By running or executing instructions stored in memory and calling data stored in memory, it can monitor the device's various functions and process data, thereby enabling overall monitoring of the device.

[0078] In an alternative design, the processor may include one or more processing units. The processor may integrate an application processor and a modem processor, wherein the application processor primarily handles the operating system, user interface, and applications, while the modem processor primarily handles wireless communication. It is understood that the modem processor may also not be integrated into the processor. In some embodiments, the processor and memory may be implemented on the same chip; in some embodiments, they may also be implemented separately on separate chips.

[0079] The processor can be a general-purpose processor, such as a CPU, digital signal processor, application-specific integrated circuit, field-programmable gate array or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component, capable of implementing or executing the methods, steps, and logic block diagrams disclosed in the embodiments of this invention. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the wide-interval frequency hopping sequence generation method disclosed in the embodiments of this invention can be directly manifested as being executed by a hardware processor, or executed by a combination of hardware and software modules within the processor.

[0080] Memory, as a non-volatile computer-readable storage medium, can be used to store non-volatile software programs, non-volatile computer-executable programs, and modules. Memory can include at least one type of storage medium, such as flash memory, hard disk, multimedia cards, card-type memory, random access memory (RAM), static random access memory (SRAM), programmable read-only memory (PROM), read-only memory (ROM), and electrically erasable programmable read-only memory (EPROM). Only memory (EEPROM), magnetic storage, magnetic disks, optical disks, etc. A memory is any other medium capable of carrying or storing desired program code in the form of instructions or data structures, and accessible by a computer, but is not limited thereto. The memory in embodiments of this invention can also be a circuit or any other device capable of performing storage functions for storing program instructions and / or data.

[0081] By designing and programming the processor, the code corresponding to the wide-interval frequency hopping sequence generation method described in the foregoing embodiments can be embedded into the chip, enabling the chip to execute the steps of the method described in the foregoing embodiments during operation. How to design and program the processor is a technique well-known to those skilled in the art and will not be elaborated upon here.

[0082] Based on the same inventive concept, embodiments of the present invention also provide a storage medium storing computer instructions that, when executed on a computer, cause the computer to perform a wide-interval frequency hopping sequence generation method described above.

[0083] In some alternative embodiments, the present invention also provides a method for generating wide-interval frequency hopping sequences that can also be implemented as a program product comprising program code that, when the program product is run on a device, causes the control device to perform the steps in a method for generating wide-interval frequency hopping sequences according to various exemplary embodiments of the present invention as described above.

[0084] It should be noted that although several units or sub-units of the apparatus have been mentioned in the detailed description above, this division is merely exemplary and not mandatory. In fact, according to embodiments of the invention, the features and functions of two or more units described above can be embodied in one unit. Conversely, the features and functions of one unit described above can be further divided and embodied by multiple units. Furthermore, although the operation of the method of the invention is described in a specific order in the drawings, this does not require or imply that these operations must be performed in that specific order, or that all the operations shown must be performed to achieve the desired result. Additionally or alternatively, certain steps may be omitted, multiple steps may be combined into one step, and / or one step may be broken down into multiple steps.

[0085] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can be implemented in one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROMs) containing computer-usable program code. The form of a computer program product implemented on ROM, optical memory, etc.

[0086] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a server, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0087] Program code for performing the operations of this invention can be written using any combination of one or more programming languages, including object-oriented programming languages ​​such as Java and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on the user's computing device, partially on the user's device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server.

[0088] In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0089] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0090] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0091] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A method for generating wide-interval frequency hopping sequences, characterized in that, include: Generate a triple entropy source hybrid seed as the initial value of the LFSR state; Generate dynamic taps and update the LFSR state based on the dynamic taps; Perform a nonlinear mapping on the LFSR state vector; The state vector of the nonlinear mapping is frequency mapped to generate a set of available frequency points and the frequency index corresponding to each frequency point in the set of available frequency points. The frequency index corresponding to each frequency point in the available frequency point set is used as the candidate frequency index. Frequency backtracking is performed on the candidate frequency index, and the available frequency point set is read using the frequency index determined by frequency backtracking, and the current frequency is output.

2. The wide-interval frequency hopping sequence generation method according to claim 1, characterized in that, The generation of the triple entropy source hybrid seed includes: Extract the triple key, including the system key, hardware noise value, and user key; Perform hash transformation on the triple key ; Perform bitwise XOR operation on the result of the triple key hash transformation. The XOR result is randomly folded to obtain a triple entropy source hybrid seed.

3. The wide-interval frequency hopping sequence generation method according to claim 1, characterized in that, The generation of dynamic taps and updating the LFSR state based on the dynamic taps includes: Based on the LFSR state, a nonlinear function is used to generate dynamic taps; The LFSR state is updated based on dynamic taps, represented as follows: in, for LFSR state vector at time step For the updated LFSR state vector, Indicates a circular right shift. This represents the XOR operation. This indicates a bitwise AND operation.

4. The wide-interval frequency hopping sequence generation method according to claim 1, characterized in that, The nonlinear mapping of the LFSR state vector includes: Divide the N-bit LFSR state vector into G groups of sub-vectors on an equal basis; Randomly swap the positions of bits within the group; Invert the bits that occupy the most significant bits; In sequence, the G groups are concatenated into an N-bit mapping vector.

5. The wide-interval frequency hopping sequence generation method according to claim 1, characterized in that, The step of performing frequency mapping on the state vector of the nonlinear mapping includes: The N-bit mapping vector is expanded into a 2N-bit extended vector using a hash function. ; Based on the extended vector Frequency mapping is performed, represented as: in, This represents a 2N-bit bit vector. Represented as a non-negative integer. Represents the set of available frequency points. This indicates the size of the available frequency point set.

6. The wide-interval frequency hopping sequence generation method according to claim 1, characterized in that, The frequency backtracking includes: Obtain several candidate frequency indices from the available frequency point set; Determine if the current frequency index meets the interval requirement: Calculate whether the minimum value of the cyclic distance between the current frequency index and a number of consecutive frequency indices in history is greater than a preset distance threshold; if it is greater, directly output the current frequency index, and read the set of available frequency points based on the frequency index, and output the current frequency; if the condition is not met, continue to execute the subsequent steps. Calculate the minimum cyclic distance between each frequency index in the candidate frequency index and a number of consecutive frequency indices in history; based on the minimum cyclic distance and the probability of use, calculate the benefit of using each frequency index in the candidate frequency index; select the frequency index with the highest benefit from the candidate frequency index as the current frequency index, and read the set of available frequency points based on this frequency index, and output the current frequency.

7. A wide-interval frequency hopping sequence generation device, characterized in that, include: The seed generation module is used to generate a triple entropy source hybrid seed as the initial value of the LFSR state. The state update module is used to generate dynamic taps and update the LFSR state based on the dynamic taps; The nonlinear mapping module is used to perform nonlinear mapping on the LFSR state vector; The frequency mapping module is used to perform frequency mapping on the state vector of the nonlinear mapping, and generate a set of available frequency points and the frequency index corresponding to each frequency point in the set of available frequency points. The frequency backtracking module is used to take the frequency index corresponding to each frequency point in the available frequency point set as the candidate frequency index, perform frequency backtracking on the candidate frequency index, and use the frequency index determined by the frequency backtracking to read the available frequency point set and output the current frequency.

8. An electronic device, characterized in that, include: At least one processor; and a memory communicatively connected to the at least one processor; The memory stores instructions executable by the at least one processor, which executes the instructions stored in the memory to perform the method as described in any one of claims 1-6.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium is used to store instructions that, when executed, cause the method as described in any one of claims 1-6 to be implemented.

10. A computer program product, characterized in that, When the computer program product is invoked by a computer, it causes the computer to perform the method as described in any one of claims 1-6.