Insulated gate field effect transistor including trench structure
By designing trench structures and doping concentration distributions in the shielding region within IGFETs, the trade-off between on-resistance and electrical breakdown capability is resolved, achieving electric field shielding and improved device reliability in high-voltage, high-current applications.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-29
- Publication Date
- 2026-03-13
AI Technical Summary
In the process of shrinking the geometry of insulated gate field-effect transistors (IGFETs) to reduce costs, it is difficult to balance the trade-off between on-resistance and electrical breakdown capability, especially in high-voltage and high-current applications, where existing designs struggle to effectively shield against the effects of electric fields.
A trench structure is formed from a wide-bandgap semiconductor body, combined with a shielding region of the first conductivity type. By setting the doping concentration distribution of the first sub-region and the second sub-region within the shielding region, the high doping concentration of the first sub-region shields the electric field, while the low doping concentration of the second sub-region protects the shielding region, thus achieving effective shielding of the electric field.
It improves the electric field shielding effect of IGFET, reduces electrical parameter degradation, enhances device reliability and current conduction capability, and is suitable for high voltage and high current applications.
Smart Images
Figure CN121665633A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to a semiconductor device, and more particularly to an insulated gate field-effect transistor (IGFET) including a trench structure. Background Technology
[0002] The development of next-generation semiconductor devices (such as IGFETs) aims to improve the characteristics and reduce the cost of electronic devices by shrinking their geometry. While shrinking the device geometry can reduce costs, various trade-offs and challenges must be met when increasing the device functionality per unit area. For example, the on-area ratio to resistance R... on The trade-off between xA and reliability requirements, such as those affected by electrical breakdown capability, requires optimized design.
[0003] Therefore, an improved insulated-gate field-effect transistor is needed. Summary of the Invention
[0004] One example of this disclosure relates to an insulated-gate field-effect transistor (IGFET). The IGFET includes a trench structure extending vertically from a first surface of a wide-bandgap semiconductor body into the wide-bandgap semiconductor body. The IGFET also includes a body region of a first conductivity type. The IGFET also includes a source region of a second conductivity type. The IGFET also includes a shielding region of the first conductivity type. The shielding region includes a first sub-region adjacent to the bottom side of the trench structure. The shielding region also includes a second sub-region adjacent to the bottom side of the first sub-region. The first sub-region has a larger maximum doping concentration than the second sub-region. The vertical doping concentration distribution of the first sub-region and the vertical doping concentration distribution of the second sub-region overlap each other on the bottom side of the first sub-region.
[0005] Another example of this disclosure relates to a method of fabricating an insulated-gate field-effect transistor (IGFET). The method includes forming a trench structure extending vertically from a first surface of a wide-bandgap semiconductor body into the wide-bandgap semiconductor body. The method also includes forming a body region of a first conductivity type. The method further includes forming a source region of a second conductivity type. The method also includes forming a shielding region of the first conductivity type. The shielding region includes a first sub-region adjacent to the bottom side of the trench structure. The shielding region also includes a second sub-region adjacent to the bottom side of the first sub-region. The first sub-region has a larger maximum doping concentration than the second sub-region. The vertical doping concentration distributions of the first sub-region and the second sub-region overlap each other on the bottom side of the first sub-region.
[0006] Those skilled in the art will recognize the additional features and advantages after reading the following detailed description and viewing the accompanying drawings. Attached Figure Description
[0007] The accompanying drawings are included to provide a further understanding of the embodiments and are incorporated in and constitute a part of this specification. The drawings illustrate examples of IGFETs and, together with the description, serve to explain the principles of the examples. Further examples are described in the following detailed description and the appended claims.
[0008] Figure 1 This is an exemplary process diagram for manufacturing an IGFET including a shielded region.
[0009] Figure 2A and 2B It is a schematic cross-sectional view used to illustrate the process features that form the shielding area.
[0010] Figure 3 and Figure 4 This is a schematic cross-sectional view used to illustrate an example configuration of an IGFET, including a trench structure and a shielding region.
[0011] Figure 5A and 5B This is a graph illustrating an exemplary vertical distribution of doping concentration in the shielded region.
[0012] Figure 6 This is a schematic cross-sectional view used to illustrate a configuration example of a vertical junction field-effect transistor (VJFET) including a trench structure and a shielding region. Detailed Implementation
[0013] In the following detailed description, reference is made to the accompanying drawings, which form part of the description and illustrate specific examples of IGFETs by way of illustration. It should be understood that other examples may be utilized and structural or logical changes may be made without departing from the scope of this disclosure. For example, a feature shown or described for one example may be used in combination with other examples to produce yet another example. Such modifications and variations are intended to be included in this disclosure. Specific language is used to describe the examples, and this specific language should not be construed as limiting the scope of the appended claims. The drawings are not drawn to scale and are for illustrative purposes only. Unless otherwise stated, corresponding elements are designated with the same reference numerals in different drawings.
[0014] The terms “having,” “comprising,” “including,” “including,” etc., are open-ended and indicate the presence of the stated structure, element, or feature, but do not exclude the presence of additional elements or features. The articles “a,” “an,” and “the” are intended to include both plural and singular unless the context clearly indicates otherwise.
[0015] The term "electrical connection" describes a permanent low-resistance connection between electrically connected elements, such as a direct contact between related elements or a low-resistance connection via a metal and / or heavily doped semiconductor material. The term "electrical coupling" includes one or more intermediate elements suitable for signal and / or power transmission that can be connected between electrically coupled elements; for example, elements controllable to temporarily provide a low-resistance connection in a first state and provide high-resistance electrical decoupling in a second state. An ohmic contact is a non-rectified electrical junction.
[0016] The range given for physical dimensions includes boundary values. For example, the range of parameter y from a to b is read as a≤y≤b. The same applies to ranges with a single boundary value, such as "at most" and "at least".
[0017] The terms “on” and “above” should not be interpreted as simply meaning “directly on” and “directly above”. Rather, if one element is located “on” or “above” another element (e.g., one layer is located “on” or “above” another layer or one layer is located “on” or “above” a substrate), then another component (e.g., another layer) may be located between the two elements (e.g., if one layer is located “on” or “above” a substrate, then another layer may be located between that layer and the substrate).
[0018] One example relates to an insulated-gate field-effect transistor (IGFET). The IGFET includes a trench structure extending vertically from a first surface of a wide-bandgap semiconductor body into the wide-bandgap semiconductor body. The IGFET also includes a body region of a first conductivity type. The IGFET further includes a source region of a second conductivity type. The IGFET also includes a shield region of the first conductivity type. The shield region includes a first sub-region adjacent to the bottom side of the trench structure. The shield region also includes a second sub-region adjacent to the bottom side of the first sub-region. The first sub-region has a larger maximum doping concentration than the second sub-region. The vertical doping concentration distributions of the first and second sub-regions overlap each other on the bottom side of the first sub-region.
[0019] For example, an IGFET can be part of an integrated circuit or can define a discrete semiconductor device or semiconductor module. For example, an IGFET can be a vertical-channel IGFET. In a vertical-channel IGFET, load current flows between a first load electrode (e.g., a source electrode) on a first surface of the semiconductor body and a second load electrode (e.g., a drain electrode) on a second surface perpendicular to the first surface in a vertical direction. In a vertical-channel IGFET, the load current can flow in a direction perpendicular to the first and / or second surfaces. For example, IGFETs can be used in applications related to power transmission and distribution, automotive and transportation, renewable energy, consumer electronics, and other industrial applications.
[0020] For example, the first surface may be the front or top surface of the semiconductor body, and the second surface may be the back or rear surface of the semiconductor body. For example, the semiconductor body may be attached to the lead frame via, for example, the second surface. For example, bonding pads may be arranged on the first surface of the semiconductor body, and bonding wires may be bonded to the bonding pads.
[0021] An IGFET can be configured to conduct currents greater than 1A, 10A, or even 100A. For example, an IGFET can be designed as a transistor cell array with multiple transistor cells having the same layout. The transistor cell array can be a one-dimensional or two-dimensional regular arrangement of multiple transistor cells. For example, multiple transistor cells in a transistor cell array can be electrically connected in parallel. For example, the source regions of multiple transistor cells in an IGFET transistor cell array can be electrically connected together. Similarly, the drain regions of multiple transistor cells in an IGFET transistor cell array can be electrically connected together. For example, the gate regions of multiple transistor cells in an IGFET transistor cell array can be electrically connected together. The transistor cells of the transistor cell array, or a portion thereof, such as the gate region, can be designed in shapes such as stripes, polygons, circles, or ellipses.
[0022] For example, the number of transistor cells in a transistor cell array may depend on the maximum load current. For example, the number of transistor cells in a transistor cell array may be greater than 100, or greater than 1000, or even greater than 10000. An IGFET can also be configured to block voltages between load electrodes greater than 60V, 100V, 400V, 650V, 1.2kV, 1.7kV, 3.3kV, 4.5kV, 5.5kV, 6kV, 6.5kV, and 10kV, such as the voltage between the drain and source of the IGFET. For example, the blocking voltage may correspond to the voltage rating specified in the IGFET's datasheet. The blocking voltage of the IGFET can be adjusted by the impurity concentration and / or vertical extension of the drift region in the semiconductor body. The doping concentration of the drift region may gradually or progressively increase or decrease with increasing distance to the first surface, at least in its vertically extended portion. According to other examples, the impurity concentration in the drift region may be approximately uniform. When the IGFET is operated in voltage blocking mode, the space charge region can extend vertically through the drift region, either partially or completely, depending on the blocking voltage applied to the IGFET.
[0023] The semiconductor device can be based on a wide-bandgap semiconductor body derived from a crystalline wide-bandgap semiconductor material with a bandgap greater than that of silicon, i.e., greater than 1.12 eV. For example, the wide-bandgap semiconductor material can have a hexagonal lattice and can be silicon carbide (SiC). For instance, the semiconductor material can be 2H-SiC (2H polytype SiC), 6H-SiC, or 15R-SiC. According to one example, the semiconductor material is 4H polytype silicon carbide (4H-SiC). The semiconductor body can include, or consist of, a semiconductor substrate having, or having one or more semiconductor layers (e.g., epitaxial growth layers). One of the semiconductor layers can be, for example, a doped semiconductor layer, such as a current diffusion layer. As an alternative to the SiC semiconductor body, gallium arsenide (GaAs) or gallium nitride (GaN), for example, can be used as the material for the wide-bandgap semiconductor body.
[0024] For example, the source region can be electrically connected to the source electrode of an IGFET. The source electrode can be disposed on a first surface of the semiconductor body and can be part of a wiring region on the semiconductor body. The wiring region can include one or more, such as two, three, four, or even more wiring layers. Each wiring layer can be formed from a single conductive layer or a stack of conductive layers (e.g., one or more metal layers). For example, the wiring layers can be photolithographically patterned. An interlayer dielectric structure can be disposed between the stacked wiring layers. One or more contact plugs or contact lines can be formed in the openings in the interlayer dielectric structure to electrically connect portions of different wiring layers (e.g., metal lines or contact regions) to each other. The source electrode can be formed from one or more elements of the wiring region on the first surface. Similarly, for example, the drain electrode can be formed from one or more elements of the wiring region on a second surface of the wide-bandgap semiconductor body.
[0025] For example, dopants in a SiC-containing semiconductor substrate may include Al, B, Be, Ga, or any combination thereof for p-type doping, and may include N, P, or any combination thereof for n-type doping. Similarly, dopants in a Si-containing semiconductor substrate may include Al, B, Ga, In, or any combination thereof for p-type doping, and P, As, Sb, hydrogen-related donors, or any combination thereof for n-type doping.
[0026] According to the configuration examples described herein, the shielding region including the first and second sub-regions allows for numerous technical benefits. For example, the shielding of the electric field extending into the shielding region from the electrode pairs in the gate dielectric or trench structure can be tuned by using a combination of low-dose regions (e.g., the second sub-region) and high-dose regions (e.g., the first sub-region) in a prescribed order. Furthermore, defective regions in the high-dose region (e.g., the first sub-region) can be shielded from the electric field by the low-dose region (e.g., the second sub-region). Additionally, the high-dose region, such as the first sub-region, can achieve doping levels down to low-ohmic connections or even ohmic contacts at the screening potential.
[0027] For example, starting from the bottom side of the first sub-region (e.g., the high-dose region), the vertical doping concentration distribution of the second sub-region can correspond to a space charge per unit area greater than 0.95 times the breakdown charge per unit area of the wide-bandgap semiconductor bulk. This can allow shielding of the high-dose region, such as the first sub-region, from the effects of high electric fields, which may include defects caused by high-dose ion implantation. Therefore, undesirable degradation of electrical parameters, such as leakage current, can be avoided or counteracted.
[0028] For example, the wide-bandgap semiconductor substrate can be a silicon carbide semiconductor substrate. Starting from the bottom side of the trench structure along the vertical direction, the maximum doping concentration of the first sub-region can be greater than 2 × 10⁻⁶. 18 cm -3 or greater than 5×10 18 cm -3 Starting from the bottom of the first sub-region and moving vertically, the maximum doping concentration of the second sub-region can be less than 2 × 10⁻⁶. 18 cm -3 This can support shielding the gate dielectric or electrodes in the trench structure from the effects of the electric field, while ensuring the doping level of low-ohmic connections or even ohmic contacts with the shielding potential.
[0029] For example, starting from the bottom side of the first sub-region and moving vertically, the vertical doping concentration distribution of the second sub-region may include at least one peak P, which has a vertical distance d to the bottom side of the first sub-region. For example, at least one peak may be formed by an ion implantation process using dopant that penetrates the bottom side of the trench in the trench structure. The ion implantation energy used to form the second sub-region may be greater than the ion implantation energy used to form the first sub-region.
[0030] For example, starting from the bottom side of the first sub-region and moving vertically, the maximum doping concentration of the second sub-region can be located at the transition point from the first sub-region to the bottom side of the first sub-region. Therefore, the doping concentration distribution of the second sub-region can be shaped as a shoulder extending vertically from the first sub-region. This can be caused, for example, by the ion implantation process used to form the dopant of the second sub-region, which has peaks located around the transition to the first sub-region or even within the first sub-region.
[0031] For example, the trench structure can be a trench gate structure including a trench gate dielectric and a trench gate electrode. The trench gate dielectric can be formed by an oxidation process or can include an oxidation process, such as a thermal oxidation process and / or an oxide deposition process. Other dielectric materials can be used besides oxides, or as a substitute for oxides. For example, high-k materials can be used. For example, the trench gate dielectric layer can include a high-k dielectric layer, which includes Al2O3, ZrO2, HfO2, AlN, aluminosilicate AlSiO2, etc. x The trench gate dielectric may include at least one of the following: silicon (La or Si) doped with HfO2, TiO2, Y2O3, or Si3N4. For example, the trench gate dielectric may include at least a first dielectric sublayer and a second dielectric sublayer. The dielectric constant of the first dielectric sublayer adjacent to the channel region may be less than the dielectric constant of the high-k dielectric sublayer, for example, equal to or greater than the dielectric constant of SiO2. For example, the first dielectric layer may include at least one of, for example, SiO2, AlN, or Si3N4. The trench gate electrode may include one or more conductive materials, such as metals, metal alloys, such as Cu, Au, AlCu, Ag, or alloys thereof, metal compounds, such as TiN, and highly doped semiconductor materials, such as highly doped polysilicon. For example, one or more conductive materials may form a layer stack. For example, the trench gate electrode may be electrically connected to a gate pad via a gate interconnect structure (e.g., a gate channel). The gate pad / interconnect structure and, for example, a first load electrode pad (e.g., the source pad of an IGFET) may be part of a wiring region on a wide-bandgap semiconductor body.
[0032] For example, the source region may be adjacent to the first sidewall of the opposing first and second sidewalls of the trench gate structure. The body region may be adjacent to the first sidewall of the trench gate structure. The shielding region may be adjacent to the second sidewall of the trench gate structure. Therefore, the IGFET may have a single-sided channel region. The shielding region may extend from below the bottom side of the trench gate structure along the second sidewall of the trench gate structure to the contact region at the first surface of the wide-bandgap semiconductor body.
[0033] For example, a first sub-region on the bottom side of the trench structure can be defined by an opposite portion of the second sub-region along a first lateral direction. In other words, the first sub-region can be marked with a line using the second sub-region. The transition or interface between the first and second sub-regions can extend vertically from the bottom side of the trench structure and perform a U-turn. After the U-turn, the transition or interface can extend up to or near or toward a first surface of the wide-bandgap semiconductor body, for example, parallel to the second sidewall of the trench gate structure.
[0034] For example, the trench structure can be a contact trench structure including contact material electrically coupled to the shielding region. The contact material can include one or more conductive materials, such as metals, metal alloys such as Cu, Au, AlCu, Ag, or alloys thereof, metal compounds such as TiN, and highly doped semiconductor materials such as highly doped polysilicon. For example, one or more conductive materials can form a layer stack. The contact material can be electrically connected to the first load electrode of the IGFET, such as the source electrode.
[0035] For example, an IGFET including a contact trench structure may further include a trench gate structure extending vertically from a first surface of a wide-bandgap semiconductor body into the wide-bandgap semiconductor body. The trench gate structure includes a trench gate dielectric and a trench gate electrode. The trench gate dielectric can be formed by an oxidation process or may include an oxidation process, such as a thermal oxidation process and / or an oxide deposition process. Other dielectric materials may be used besides oxides, or as an alternative to oxides. For example, a high-k material may be used. For example, the trench gate dielectric layer may include a high-k dielectric layer comprising at least one of Al₂O₃, ZrO₂, HfO₂, AlN, aluminosilicate AlSiOₓ, silicon La or Si-doped HfO₂, TiO₂, Y₂O₃, or Si₃N₄. For example, the trench gate dielectric may include at least a first dielectric sublayer and a second dielectric sublayer. The dielectric constant of the first dielectric sublayer adjacent to the channel region may be less than the dielectric constant of the high-k dielectric sublayer, for example, equal to or greater than the dielectric constant of SiO₂. For example, the first dielectric layer may include at least one of, for example, SiO2, AlN, or Si3N4. The trench gate electrode may include one or more conductive materials, such as metals, metal alloys, such as Cu, Au, AlCu, Ag, or alloys thereof, metal compounds, such as TiN, or highly doped semiconductor materials, such as highly doped polysilicon. For example, one or more conductive materials may form a layer stack. For example, the trench gate electrode may be electrically connected to a gate pad via a gate interconnect structure (e.g., a gate channel). The gate pad / interconnect structure and, for example, a first load electrode pad (e.g., the source pad of an IGFET) may be part of a wiring region on a wide-bandgap semiconductor body. A portion of the body region may be defined along a first lateral direction by the trench gate structure and a shielding region. A portion of the shielding region may be defined along the first lateral direction by the body region and the trench structure.
[0036] For example, the IGFET may further include a current-spreading region of a second conductivity type and a drift region of a second conductivity type. The current-spreading region may be arranged vertically between the body region and the drift region. The maximum doping concentration of the current-spreading region may be greater than the maximum doping concentration of the portion of the drift region adjacent to the bottom side of the current-spreading region. For example, the vertical distance from the bottom side of the shielding region to the first surface may be greater than the vertical distance from the bottom side of the current-spreading region to the first surface. The vertical distance from the bottom side of the trench structure to the first surface may be greater than the vertical distance from the top side of the current-spreading region to the first surface.
[0037] The details above regarding the structural, functional, or technical benefits of features described for wide-bandgap semiconductor devices such as IGFETs also apply to the exemplary methods further described below. Processing a wide-bandgap semiconductor body may include one or more optional additional features corresponding to one or more aspects mentioned in conjunction with the presented concepts or one or more examples described above or below.
[0038] The examples above and below are described in conjunction with a silicon carbide substrate. Alternatively, a wide bandgap semiconductor substrate, such as a wide bandgap wafer, can be processed, for example, comprising a wide bandgap semiconductor material different from silicon carbide. The bandgap of the wide bandgap semiconductor wafer can be greater than that of silicon (1.12 eV). For example, the wide bandgap semiconductor wafer can be a silicon carbide (SiC) wafer or a gallium arsenide (GaAs) wafer.
[0039] The example shown depicts an n-channel IGFET, such as a MOSFET. However, the example described here can also be applied to p-channel devices, such as p-channel MOSFETs.
[0040] Figure 1 The process description involves the process characteristics of forming IGFETs.
[0041] Process feature S100 includes forming a trench structure that extends vertically from a first surface of the wide bandgap semiconductor body into the wide bandgap semiconductor body.
[0042] Process feature S110 includes forming a body region of a first conductivity type.
[0043] Process feature S120 includes forming a source region of a second conductivity type.
[0044] Process feature S130 includes forming a shielding region of a first conductivity type, wherein the shielding region includes a first sub-region adjacent to the bottom side of the trench structure and a second sub-region adjacent to the bottom side of the first sub-region, the first sub-region having a larger maximum doping concentration than the second sub-region, and wherein the vertical doping concentration distribution of the first sub-region and the vertical doping concentration distribution of the second sub-region overlap each other on the bottom side of the first sub-region.
[0045] It should be understood that the disclosure of multiple actions, processes, operations, steps, or functions in the specification or claims should not be construed as being in a particular order unless expressly or implicitly stated otherwise, for example, by expressions such as "hereafter" for technical reasons. Therefore, the disclosure of multiple actions or functions will not limit these actions or functions to a particular order unless these actions or functions are not interchangeable for technical reasons. Furthermore, in some examples, a single action, function, process, operation, or step may include or may be divided into multiple sub-actions, sub-functions, sub-processes, sub-operations, or sub-steps. Unless expressly excluded, such sub-actions may be included within or as part of the disclosure of that single action. For example, in the exemplary method described above, a trench structure may be formed after forming the body region and / or the source region and / or the shielding region. Each of the trench structures and shielding regions to be formed by the above process features S100 to S130, or any combination of structural features, may be formed by multiple sub-processes that can be sequentially mixed according to the requirements of the target process.
[0046] For example, forming a first subregion may include at least one ion implantation process having a first ion implantation energy and a first ion implantation angle, and forming a second subregion may include at least one ion implantation process having a second ion implantation energy and a second ion implantation angle. For example, at least one ion implantation process for forming the first subregion and / or at least one ion implantation process for forming the second subregion may introduce dopant through the bottom side and / or sidewalls of the trench in the trench structure.
[0047] Figure 2A and 2B The schematic cross-sectional view illustrates an exemplary process feature for forming the shielding area.
[0048] refer to Figure 2A The second sub-region 1122 of the shielding region 112 is formed by at least one ion implantation process I2 having an ion implantation energy E2 and an ion implantation tilt angle α2. Dopant from at least one ion implantation process I2 is introduced through the bottom / sidewall of the trench 1021.
[0049] refer to Figure 2B The first sub-region 1121 of the shielding region 112 is formed by at least one ion implantation process I1 having a first ion implantation energy E1 and a first ion implantation tilt angle α1. Dopant from at least one ion implantation process I1 is introduced through the bottom / sidewall of the trench 1021. The trench 1021 can be further processed into a trench structure at a later process stage.
[0050] The order in which the first and second sub-regions 1121 and 1122 are formed can also be related to Figure 2A and 2B reverse.
[0051] For example, the second ion implantation energy E2 can be at least 50% greater than the first ion implantation energy E1. The second ion implantation tilt angle α2 can be smaller than the first ion implantation angle α1.
[0052] For example, the total ion implantation dose for at least one ion implantation process used to form the second subregion can be from 3 × 10⁻⁶. 13 cm -2 Up to 1×10 14 cm -2 Within the range.
[0053] exist Figure 3 A schematic cross-sectional view shows a configuration example of IGFET 100. IGFET 100 is an example of an IGFET with a single-sided channel region.
[0054] The IGFET 100 includes a trench structure 102 extending from a first surface 1061 of a wide-bandgap semiconductor body 104 along a vertical direction y into the wide-bandgap semiconductor body 104 (e.g., a SiC semiconductor body). The trench structure 102 is configured as a trench gate structure 103. The trench gate structure 103 includes a trench gate dielectric 1031 and a trench gate electrode 1032.
[0055] The IGFET 100 also includes an n+ doped source region 110 adjacent to the first sidewall 1035 of the trench gate structure 103. The second sidewall 1036 of the trench gate structure 103 is opposite to the first sidewall. The n+ doped region is omitted at the second sidewall 1036 of the trench gate structure 103. + The source region 110 is doped to form a single-sided channel region. The p-doped host region 108 is adjacent to the first sidewall 1035 of the trench gate structure 103.
[0056] The IGFET 100 also includes a p-doped shielding region 112. The shielding region 112 includes a first sub-region 1121 adjacent to the bottom side of the trench structure 102. The shielding region 112 also includes a second sub-region 1122 adjacent to the bottom side 113 of the first sub-region 1121. The maximum doping concentration of the first sub-region 1121 is greater than the maximum doping concentration of the second sub-region 1122. The vertical doping concentration distribution of the first sub-region 1121 and the vertical doping concentration distribution of the second sub-region 1122 overlap at the bottom side 113 of the first sub-region 1121 (see also Exemplary). Figure 5A , 5B The shielding area 112 is adjacent to the second sidewall 1036 of the trench gate structure 103.
[0057] A first sub-region 1121 on the bottom side of the trench structure 102 is defined by an opposite portion of the second sub-region 1122 along a first lateral direction x1. The transition or interface between the first sub-region 1121 and the second sub-region 1122 extends vertically from the bottom side of the trench gate structure 103 and performs a U-turn. After the U-turn, the transition or interface extends up to p at the first surface 1061 of the wide-bandgap semiconductor body 104. + Doped contact region 118, for example, parallel to the second sidewall 1036 of trench gate structure 103. + The doped contact region 118 electrically connects the shielding region 112 to the source electrode S on the first surface 1061. The n+ doped source region 110 is also electrically connected to the source electrode S.
[0058] The IGFET 100 also includes an n-type doped current extension region 114 and an n-type doped current extension region 114. - Doped drift region 116. For example, n - The doped drift region can be part of a semiconductor substrate with a background doping concentration, or it can be formed in a semiconductor layer on the semiconductor substrate. The n-doped current extension region 114 is arranged along the vertical direction y between the p-doped main region 108 and the n-doped main region 108. - Between doped drift regions 116. The maximum doping concentration of the n-doped current extension region 114 is greater than that of the bottom side of the adjacent n-doped current extension region 114. - The maximum doping concentration of a portion of the doped drift region 116. - The doped drift region 116 is electrically connected to the drain electrode D via the second surface of the wide bandgap semiconductor body 104, which is opposite to the first surface 1061.
[0059] Another configuration example of IGFET 100 is in Figure 4 The schematic cross-sectional view is shown. IGFET 100 is an example of an IGFET with dual-channel regions.
[0060] The IGFET 100 includes a trench structure 102 extending from a first surface 1061 of a wide-bandgap semiconductor body 104 along a vertical direction y into the wide-bandgap semiconductor body 104 (e.g., a SiC semiconductor body). The trench structure 102 is configured as a contact trench structure 105, including contact material 1051 electrically coupled to a p-doped shielding region 112. Similar to... Figure 3 For example, the p-doped shielding region 112 includes a first sub-region 1121 and a second sub-region 1122. However, the first sub-region 1121 of the p-doped shielding region 112 is adjacent not only to the bottom side and the second sidewall 1056 of the contact trench structure 105, but also to the first sidewall 1055 of the contact trench structure 105.
[0061] The IGFET 100 also includes a trench gate structure 103 extending from a first surface 1061 of a wide-bandgap semiconductor body 104 along a vertical direction x1 into the wide-bandgap semiconductor body 104. The trench gate structure 103 includes a trench gate dielectric 1031 and a trench gate electrode 1032. A portion of a p-doped body region 108 is defined along a first lateral direction x1 by the trench gate structure 103 and a shielding region 112. A portion of the shielding region 112 is defined along the first lateral direction x1 by the body region 108 and a contact trench structure 105. An n+ doped source region 110 extends along the first lateral direction x1 from the trench gate structure 103 to the contact trench structure 105. The n+ doped source region 110 may include sub-regions spaced apart from each other along a second lateral direction x2 perpendicular to the first lateral direction x1. For example, the second lateral direction x2 may be perpendicular to... Figure 4 The drawing plane. Although in Figure 4 Not shown in the cross-sectional view, but between the sub-regions of the n+ doped source region 110, p + Subregions of the doped contact region 118 may extend along the first and second sidewalls 1055, 1056 of the contact trench structure 105 to the first surface 1061 for electrically connecting the shielding region 112 to the source electrode S above the first surface 1061. The n+ doped source region 110 is also electrically connected to the source electrode S.
[0062] Similar to Figure 3 The IGFET 100 shown has an n-doped current extension region 114 arranged along the vertical direction y in the p-doped body region 108 and n-doped body region 108. - The doped drift region is between 116. - The doped drift region 116 is electrically connected to the drain electrode D via the second surface of the wide bandgap semiconductor body 104, which is opposite to the first surface 1061.
[0063] exist Figure 5A and 5B The curve graph shows along Figure 3 and 4 An exemplary doping concentration distribution of the shielding region 112 of line AA'.
[0064] Figure 5A The curve graph shows along Figure 3 and Figure 4 An example of the distribution of doping concentration c in the vertical direction y of line AA'. The distribution of doping concentration c includes a peak P in the second sub-region 1122, which has a vertical distance d from the bottom side 113 of the first sub-region 1121.
[0065] Figure 5B The curve graph shows along Figure 3 and Figure 4Another example of the distribution of doping concentration c in the vertical direction y of line AA'. Starting from the bottom side 113 of the first sub-region 1121 along the vertical direction y, the maximum doping concentration c2m of the second sub-region 1122 is located at the transition from the bottom side 113 of the first sub-region 1121 to the first sub-region 1121.
[0066] As an example, for Figure 5A , 5B For each exemplary distribution of doping concentration c shown, the maximum doping concentration c1m of the first sub-region 1121 starting from the bottom side of the trench structure 102 along the vertical direction y can be greater than 2 × 10⁻⁶. 18 cm -3 Furthermore, the maximum doping concentration c2m of the second sub-region 1122, starting from the bottom side 113 of the first sub-region 1121 along the vertical direction y, can be less than 2 × 10⁻⁶. 18 cm -3 .
[0067] The shielding region 112 can also be applied to other semiconductor device types. For example, the shielding region can be applied to an insulated gate bipolar transistor (IGBT) to enable... Figure 3 , 4 The source pole region 110 is replaced by the emitter pole region. Figure 6 Another example of a vertical junction field-effect transistor (VJFET) 101 is shown. For example, a VJFET can be a trench and injected vertical channel JFET TI-VJFET.
[0068] VJFET 101 includes a trench structure 102 extending from a first surface 1061 into a wide bandgap semiconductor body 104 (e.g., a SiC semiconductor body). The trench structure 102 is laterally confined by a mesa region along a first lateral direction x1.
[0069] Each mesa region includes an n-doped mesa channel region 120. A p-doped gate / shield region 122 is adjacent to the opposite sidewalls 1025, 1026 of the trench structure 102. The p-doped gate / shield region 122 is further adjacent to the bottom side 1023 of the trench structure 102. The p-doped gate / shield region 122 includes a first sub-region 1221 and a second sub-region 1222. The details described regarding the shielding region of an IGFET also apply to the gate / shield region of a VJFET.
[0070] The gate / shielding region 122 is electrically connected or coupled to the contact material 124 in the trench structure 102. The contact material includes a conductive material, such as a metal or a highly doped semiconductor material, or any combination thereof, and may also include an insulating material. The insulating material may, for example, be disposed between the conductive material and a portion of the surrounding wide-bandgap semiconductor body 104.
[0071] A dielectric layer 126 is disposed on the contact material 124. The dielectric layer 126 extends along the vertical direction y from below the first surface 1061 toward the first surface 1061, or extends onto or above the first surface 1061.
[0072] With one or more previously described examples and appendices Figure 1 The aspects and features mentioned and described can also be combined with one or more other examples in order to replace similar features in other examples or to introduce that feature additionally into other examples.
[0073] Although specific embodiments have been shown and described herein, those skilled in the art will understand that various alternatives and / or equivalent implementations may be used instead of the shown and described specific embodiments without departing from the scope of the invention. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, the invention is intended to be limited only by the claims and their equivalents.
Claims
1. An insulated-gate field-effect transistor (IGFET) (100), comprising: A trench structure (102) extends from the first surface (1061) of the wide bandgap semiconductor body (104) along the vertical direction (y) into the wide bandgap semiconductor body (104); The main body region (108) of the first conductivity type; The source region (110) of the second conductivity type; A shielding region (112) of a first conductivity type, wherein the shielding region (112) includes a first sub-region (1121) adjacent to the bottom side of the trench structure (102) and a second sub-region (1122) adjacent to the bottom side (113) of the first sub-region (1121), the first sub-region (1121) having a larger maximum doping concentration than the second sub-region (1122), and wherein the vertical doping concentration distribution of the first sub-region (1121) and the vertical doping concentration distribution of the second sub-region (1122) overlap each other at the bottom side (113) of the first sub-region (1121).
2. The IGFET (100) according to the preceding claim, wherein the vertical doping concentration distribution of the second sub-region (1122) starting from the bottom side (113) of the first sub-region (1121) corresponds to a space charge per unit area that is greater than 0.95 times the breakdown charge per unit area of the wide-bandgap semiconductor body (104).
3. The IGFET (100) according to any one of the preceding claims, wherein the wide bandgap semiconductor body (104) is a silicon carbide semiconductor body, and the maximum doping concentration (c1m) of the first sub-region (1121) along the vertical direction (y) from the bottom side of the trench structure (102) is greater than 2 × 10⁻⁶. 18 cm -3 Furthermore, the maximum doping concentration (c2m) of the second sub-region (1122) along the vertical direction (y) starting from the bottom (113) of the first sub-region (1121) is less than 2 × 10⁻⁶. 18 cm -3 .
4. The IGFET (100) according to the preceding claim, wherein the vertical doping concentration distribution of the second sub-region (1122) includes at least one peak (P) having a vertical distance (d) to the bottom side (113) of the first sub-region (1121) along the vertical direction (y).
5. The IGFET (100) according to claim 3, wherein the maximum doping concentration (c2m) of the second sub-region (1122) is located at the transition from the bottom side (113) of the first sub-region (1121) to the first sub-region (1121) along the vertical direction (y).
6. The IGFET (100) according to any one of the preceding claims, wherein the trench structure (102) is a trench gate structure (103) including a trench gate dielectric (1031) and a trench gate electrode (1032).
7. The IGFET (100) according to the preceding claim, wherein the source region (110) is adjacent to the first sidewall (1035) of the opposing first and second sidewalls (1035, 1036) of the trench gate structure (103), the body region (108) is adjacent to the first sidewall (1035) of the trench gate structure (103), and the shielding region (112) is adjacent to the second sidewall (1036) of the trench gate structure (103).
8. The IGFET (100) according to any one of the preceding two claims, wherein a first sub-region (1121) on the bottom side of the trench structure (102) is defined by an opposite portion of a second sub-region (1122) along a first lateral direction (x1).
9. The IGFET (100) according to any one of claims 1 to 2, wherein the trench structure (102) is a contact trench structure (105) comprising a contact material (1051) electrically coupled to the shielding region (112).
10. The IGFET (100) according to the preceding claim further includes a trench gate structure (103) extending from a first surface (1061) of a wide bandgap semiconductor body (104) along a vertical direction (y) into the wide bandgap semiconductor body (104), the trench gate structure (103) including a trench gate dielectric (1031) and a trench gate electrode (1032), and wherein a portion of a body region (108) is defined along a first lateral direction (x1) by the trench gate structure (103) and a shielding region (112), and a portion of the shielding region (112) is defined along the first lateral direction (x1) by the body region (108) and the trench structure (102).
11. The IGFET (100) according to any one of the preceding claims further includes a current extension region (114) of a second conductivity type and a drift region (116) of a second conductivity type, wherein the current extension region (114) is arranged along a vertical direction (y) between the body region (108) and the drift region (116), and the maximum doping concentration of the current extension region (114) is greater than the maximum doping concentration of the portion of the drift region (116) adjacent to the bottom side of the current extension region (114).
12. A method for manufacturing an insulated-gate field-effect transistor (IGFET) (100), the method comprising: A trench structure (102) is formed extending from the first surface (1061) of the wide bandgap semiconductor body (104) along the vertical direction (y) into the wide bandgap semiconductor body (104); A main region of the first conductivity type is formed (108); A source region of the second conductivity type is formed (110); A shielding region (112) of a first conductivity type is formed, wherein the shielding region (1121) includes a first sub-region (1121) adjacent to the bottom side of the trench structure (102) and a second sub-region (1122) adjacent to the bottom side (113) of the first sub-region (1121), the first sub-region (1121) having a larger maximum doping concentration than the second sub-region (1122), and wherein the vertical doping concentration distribution of the first sub-region (1121) and the vertical doping concentration distribution of the second sub-region (1122) overlap each other at the bottom side (113) of the first sub-region (1121).
13. The method according to the preceding claim, wherein forming the first sub-region (1121) comprises at least one ion implantation process having a first ion implantation energy (E1) and a first ion implantation tilt angle (α1), and forming the second sub-region (1122) comprises at least one ion implantation process having a second ion implantation energy (E2) and a second ion implantation tilt angle (α2).
14. The method according to the preceding claim, wherein the second ion implantation energy (E2) is at least 50% greater than the first ion implantation energy (E1), and the second ion implantation tilt angle (α2) is smaller than the first ion implantation tilt angle (α1).
15. The method according to any one of the preceding claims, wherein the total ion implantation dose of at least one ion implantation process for forming the second sub-region (1122) is 3 × 10⁻⁶. 13 cm -2 Up to 1×10 14 cm -2 Within the range.