Photoelectric detection chip and preparation method thereof, photoelectric detector and electronic equipment

Abstract

The invention provides a photoelectric detection chip and a preparation method thereof, a photoelectric detector and electronic equipment, the photoelectric detection chip comprises a substrate, a first doping layer, a second doping layer, an intrinsic absorption layer, a micro-nano structure, a first electrode and a second electrode, the first doping layer is arranged on the surface of the substrate along the thickness direction of the substrate, and the second doping layer is arranged on the surface of the substrate; the intrinsic absorption layer is located between the first doping layer and the second doping layer, the multiple micro-nano structures are arranged in an array mode in the direction perpendicular to the thickness direction of the substrate, so that at least part of incident light is limited in the intrinsic absorption layer, the absorption efficiency of the intrinsic absorption layer on the incident light is improved, more electrons and holes can be generated conveniently, and the light emitting efficiency is improved. The responsivity of the photoelectric detection chip is improved; meanwhile, the micro-nano structure penetrates through the first doping layer, the intrinsic absorption layer and the second doping layer, so that electrons and holes move in the thickness direction, the transition distance and the transition time of the electrons and the holes are shortened, and the bandwidth of the photoelectric detection chip is improved.

Description

Technical Field

[0001] This application relates to the field of photodetector technology, and in particular to a photodetector chip and its fabrication method, a photodetector and electronic equipment. Background Technology

[0002] Photodetectors convert incident light signals into electrical signals and detect them by processing and analyzing these electrical signals. They are widely used in optical communication, signal processing, sensing systems, and measurement systems. A photodetector consists of a photodetector chip for photo-to-electrical conversion, a signal amplification module for amplifying the output electrical signal of the photodetector chip, and a signal processing module for analyzing and processing the signal output from the signal amplification module.

[0003] Typically, a photodetector chip includes a silicon substrate and a lower doped layer, a germanium absorption layer, and an upper doped layer disposed on the silicon substrate. The upper and lower doped layers have opposite doping types. When the photodetector chip is illuminated, more holes in the upper doped layer move to the lower doped layer, and more electrons in the lower doped layer move to the upper doped layer, thereby forming a current and an internal electric field. The upper and lower doped layers are electrically connected to the positive and negative electrodes, respectively, to facilitate the output current.

[0004] Responsivity and bandwidth are important factors in evaluating the performance of photodetector chips. Responsivity and bandwidth are related to the thickness of the germanium absorption layer. The thicker the germanium absorption layer, the higher the light absorption efficiency of the germanium absorption layer, and the higher the responsivity of the photodetector chip. However, the thicker the germanium absorption layer, the longer it takes for electrons and holes to cross the germanium absorption layer, which leads to a decrease in the bandwidth of the photodetector chip.

[0005] To improve the responsivity of a photodetector chip without altering the thickness of the germanium absorption layer, a dielectric metasurface structure can be fabricated on the chip. This metasurface structure extends through the doped layer along the thickness direction of the silicon substrate and is embedded in the top of the germanium absorption layer, meaning it does not penetrate the entire absorption layer. During operation, the metasurface structure creates a guided-mode resonance condition, allowing the incident light signal to be contained within the germanium absorption layer. This improves the absorption efficiency of the germanium absorption layer and thus enhances the responsivity of the photodetector chip.

[0006] However, when electrons and holes move between the lower and upper doped layers, the direction of movement of electrons or holes located below the dielectric metasurface structure will have a certain angle with the thickness direction of the germanium absorption layer, which will cause the transit distance and transit time of electrons and holes to increase, which will still have a negative impact on the bandwidth of the photoelectric detection chip.

[0007] Therefore, how to balance the constraints between bandwidth and responsiveness is a technical problem that urgently needs to be solved. Summary of the Invention

[0008] In view of this, this application provides a photoelectric detection chip and its fabrication method, a photoelectric detector and an electronic device, which can improve the responsivity of the photoelectric detection chip without disrupting the internal electric field distribution.

[0009] The first aspect of this application provides a photoelectric detection chip, which includes a substrate, a first doped layer, a second doped layer, an intrinsic absorption layer, a micro / nano structure, a first electrode, and a second electrode. The first doped layer, the second doped layer, and the intrinsic absorption layer are stacked on the surface of the substrate along the thickness direction, with the intrinsic absorption layer located between the first doped layer and the second doped layer. The micro / nano structure extends along the thickness direction of the substrate and penetrates the first doped layer, the second doped layer, and the intrinsic absorption layer. In a direction perpendicular to the thickness direction of the substrate, a plurality of micro / nano structures are arranged in an array. The first electrode and the second electrode are electrically connected to the first doped layer and the second doped layer, respectively.

[0010] In this application, the micro / nanostructure extends along the thickness direction of the substrate and penetrates the first doped layer, the second doped layer, and the intrinsic absorption layer. Multiple micro / nanostructures are arranged in an array perpendicular to the thickness direction of the substrate, thus forming a micro / nano array. This micro / nano array has the same effect as the aforementioned dielectric metasurface structure, namely, it can effectively confine the light field and control the amplitude, phase, polarization, and other characteristics of the light beam within a range much smaller than the wavelength scale. It possesses powerful light field manipulation capabilities and can adjust the propagation direction of at least a portion of the incident light signal, thereby confining at least a portion of the light signal within the intrinsic absorption layer and prolonging the propagation time of the light signal within the intrinsic absorption layer. The transmission time and path are adjusted, thereby improving the absorption efficiency of the intrinsic absorption layer for optical signals, so as to generate more electrons and holes, thus improving the responsivity of the photodetector chip. At the same time, since the micro-nano structure runs through the first doped layer, the intrinsic absorption layer and the second doped layer, electrons and holes are distributed in the first direction and their movement direction is parallel to the first direction. This makes the electric field direction of the photodetector chip parallel to the first direction. The movement direction of electrons and holes is consistent, which increases the movement speed of electrons and holes, thereby shortening the time for electrons and holes to cross the intrinsic absorption layer, and thus improving the bandwidth of the photodetector chip.

[0011] In one possible design, there are multiple micro / nano structures. In a plane perpendicular to the thickness direction of the substrate, the lines connecting adjacent micro / nano structures form a regular N-gon, where N ≥ 3.

[0012] In this application, the connection lines between adjacent micro / nano structures form regular polygons, which makes it easier to achieve periodic arrangement of micro / nano structures, thereby reducing the fabrication difficulty and cost of micro / nano structures, and also helps to shorten the overall fabrication cycle of micro / nano structures and photodetector chips. The periodic arrangement of micro / nano structures can improve the control effect on optical signals and reduce the risk of inconsistent control effects leading to strong local optical signals and weak local optical signals within the intrinsic absorption layer. That is, it improves the uniformity of optical signal intensity within the intrinsic absorption layer, thereby improving the uniformity of photogenerated carrier distribution, i.e., improving the uniformity of the distribution of photogenerated electrons and holes, which in turn helps to further improve the uniformity of electric field distribution within the photodetector chip.

[0013] In one possible design, the distance between two adjacent micro / nano structures is 400 nm to 2000 nm; within the space occupied by the first doped layer, the second doped layer, the intrinsic absorption layer, and the micro / nano structure, the duty cycle K of the micro / nano structure satisfies: 0.4 ≤ K ≤ 0.8.

[0014] In this application, the distance between two adjacent micro-nano structures is 400nm to 2000nm, which can increase the number of photogenerated carriers, thereby improving the responsivity of the photodetector and enhancing the control effect on the optical signal, thereby increasing the bandwidth of the photodetector and improving the working performance of the photodetector.

[0015] When the spacing and total space of the micro-nano structures are constant, the duty cycle K of the micro-nano structures satisfies: 0.4≤K≤0.8, which can increase the number of photogenerated carriers, thereby improving the responsivity of the photodetector and enhancing the control effect on the optical signal, thereby increasing the bandwidth of the photodetector and improving the working performance of the photodetector.

[0016] In one possible design, the cross-sectional shape of the micro / nanostructure is circular, triangular, quadrilateral, pentagonal, or hexagonal in a plane perpendicular to the thickness direction of the substrate.

[0017] In this application, the cross-sectional shape of the micro-nano structure is circular, triangular, quadrilateral, pentagonal or hexagonal, which increases the flexibility of the micro-nano structure's shape. In the embodiments of this application, the cross-sectional shape of the micro-nano structure is a regular shape to facilitate the processing of the micro-nano structure, thereby reducing the processing difficulty and processing cost of the micro-nano structure.

[0018] In one possible design, the photodetector chip further includes a first light confinement structure located outside the intrinsic absorption layer in a plane perpendicular to the first direction. The first light confinement structure is used to reflect at least a portion of the optical signal back into the intrinsic absorption layer.

[0019] In this application, in a plane perpendicular to the first direction, a horizontal first light confinement structure causes light to be reflected back into the intrinsic absorption layer at the boundary of the intrinsic absorption layer, thereby further improving the light absorption efficiency of the intrinsic absorption layer, so as to generate more electrons and holes, thereby improving the responsivity of the photodetector chip and thus improving the working performance of the photodetector.

[0020] In one possible design, the photodetector chip further includes an epitaxial stop layer surrounding the first doped layer, the second doped layer, and the intrinsic absorption layer; and in a plane perpendicular to the first direction, a first light confinement structure is located outside the epitaxial stop layer.

[0021] In this application, the first light-confining structure is disposed on the outside of the epitaxial stop layer, which can increase the light absorption efficiency of the intrinsic absorption layer without damaging the electrical structure of the photodetector chip, thereby improving the working performance and stability of the photodetector chip.

[0022] In one possible design, the electrical detector chip further includes an epitaxial stop layer surrounding the first doped layer, the second doped layer, and the intrinsic absorption layer; the refractive index of the epitaxial stop layer is less than the refractive index of the intrinsic absorption layer, and / or the refractive index of the micro / nano structure is less than the refractive index of the intrinsic absorption layer.

[0023] In this application, by setting an epitaxial stop layer, the dimensional accuracy of the first doped layer, the intrinsic absorption layer and the second doped layer can be improved in a plane perpendicular to the second direction, thereby reducing the processing difficulty of the first doped layer, the intrinsic absorption layer and the second doped layer, which in turn helps to shorten the processing cycle of the photodetector chip. At the same time, it can reduce the material cost of processing the first doped layer, the intrinsic absorption layer and the second doped layer, thereby reducing the cost of the photodetector chip.

[0024] Both the epitaxial stop layer and the micro / nano structure have refractive indices lower than that of the intrinsic absorption layer. When a light signal within the intrinsic absorption layer moves along a direction perpendicular to the first direction (e.g., along the second direction) to the surface of the epitaxial stop layer or the micro / nano structure, total internal reflection occurs at the interfaces between the intrinsic absorption layer and the epitaxial stop layer, and between the intrinsic absorption layer and the micro / nano structure, due to the refractive index difference between them. That is, in a plane perpendicular to the first direction, the interface between the intrinsic absorption layer and the epitaxial stop layer constitutes part of the first light confinement structure. The interface of the structure forms part of the first optical confinement structure, which allows the optical signal to be reflected back into the intrinsic absorption layer. This improves the light absorption efficiency of the intrinsic absorption layer, thereby generating more electrons and holes, enhancing the responsivity of the photodetector chip, and thus improving the working performance of the photodetector. At the same time, the interface between the intrinsic absorption layer and the epitaxial stop layer forms part of the first optical confinement structure, as does the interface between the intrinsic absorption layer and the micro / nano structure. This simplifies the structure of the photodetector chip, thereby reducing its cost and shortening its processing cycle.

[0025] In one possible design, the photodetector chip further includes a second light confinement structure distributed along a first direction with the intrinsic absorption layer. The second light confinement structure is used to reflect at least a portion of the optical signal back into the intrinsic absorption layer.

[0026] In this application, within the plane of the first direction, the vertical second light confinement structure causes light to be reflected back into the intrinsic absorption layer at the boundary of the intrinsic absorption layer, thereby further improving the light absorption efficiency of the intrinsic absorption layer, so as to generate more electrons and holes, thereby improving the responsivity of the photodetector chip and thus improving the working performance of the photodetector.

[0027] In one possible design, the refractive index of the first doped layer is less than that of the intrinsic absorption layer, and the interface between the first doped layer and the intrinsic absorption layer constitutes part of the second optical confinement structure; and / or, the refractive index of the second doped layer is less than that of the intrinsic absorption layer, and the interface between the second doped layer and the intrinsic absorption layer constitutes part of the second optical confinement structure.

[0028] In this application, when the light signal leaves the intrinsic absorption layer, this portion of light undergoes total internal reflection at the interfaces of the first doped layer and the intrinsic absorption layer, and the second doped layer and the intrinsic absorption layer. That is, in a plane parallel to the first direction, the first doped layer and the second doped layer form a vertical light confinement structure, thus being reflected back into the intrinsic absorption layer. This further improves the light absorption efficiency of the intrinsic absorption layer, facilitating the generation of more electrons and holes, thereby enhancing the responsivity of the photodetector chip and improving the working performance of the photodetector. Simultaneously, the interfaces of the first doped layer and the intrinsic absorption layer form part of a vertical second light confinement structure, and the interfaces of the second doped layer and the intrinsic absorption layer form part of a vertical second light confinement structure, simplifying the structure of the photodetector chip, thereby reducing the cost of the photodetector chip and shortening the processing cycle of the photodetector chip.

[0029] In one possible design, the photodetector chip also includes a reflective layer located on the side of the substrate away from the first doped layer along the thickness direction of the substrate. The reflective layer is used to reflect light that penetrates the substrate back into the intrinsic absorption layer, and the reflective layer forms part of the second light confinement structure.

[0030] In this application, when a portion of the optical signal does not reach the total internal reflection condition at the interface between the second doped layer and the intrinsic absorption layer, i.e., when the incident angle does not meet the condition, a portion of the optical signal will penetrate the second doped layer and enter the substrate, where it will be absorbed by the substrate or even penetrate the substrate and leave the photodetector chip. By setting a reflective layer on the back side of the substrate to reflect the light, the light that has penetrated the substrate can be reflected back into the intrinsic absorption layer, thereby improving the light absorption efficiency of the intrinsic absorption layer. This facilitates the generation of more electrons and holes, thereby improving the responsivity of the photodetector chip and ultimately enhancing the working performance of the photodetector.

[0031] In one possible design, a recess is provided on the side of the substrate away from the first doped layer along the thickness direction of the substrate, and at least a portion of the reflective layer is located within the recess.

[0032] In this application, at least a portion of the reflective layer is located within the recess to reduce the distance between the reflective layer and the intrinsic absorption layer, thereby further reducing the loss of optical signals by the substrate and improving the light utilization rate of the photodetector chip.

[0033] In one possible design, the photodetector also includes an antireflection coating located along the thickness direction of the substrate on the side of the second doped layer opposite to the intrinsic absorption layer.

[0034] In this application, the antireflection film can increase the transmittance of light signals on its own surface and reduce the reflectance of light signals on its own surface, thereby enabling light signals to enter the intrinsic absorption layer to the maximum extent, so as to improve the utilization rate of light by the photodetector chip. Moreover, the antireflection film is transparent within the absorption band of the photodetector, that is, light signals of specific wavelengths can penetrate the antireflection film, and the antireflection film has low or even no loss of light signals.

[0035] A second aspect of this application provides a photodetector, which includes a mounting substrate and a photodetector chip as described above, wherein the photodetector chip is mounted on the mounting substrate.

[0036] In this application, the micro-nano structure can confine at least a portion of the optical signal within the intrinsic absorption layer, thereby improving the absorption efficiency of the intrinsic absorption layer for optical signals and enabling the photodetector chip to have a high responsivity. At the same time, since the micro-nano structure penetrates the first doped layer, the intrinsic absorption layer, and the second doped layer, the photodetector chip has a large bandwidth, thereby improving the working performance of the photodetector.

[0037] A third aspect of this application provides an electronic device, which includes a housing and a photodetector installed within the housing, the photodetector including any of the photodetector chips described above.

[0038] In this application, the micro-nano structure can confine at least a portion of the optical signal within the intrinsic absorption layer, thereby improving the absorption efficiency of the intrinsic absorption layer for optical signals and enabling the photodetector chip to have a high responsivity. At the same time, since the micro-nano structure penetrates the first doped layer, the intrinsic absorption layer, and the second doped layer, the photodetector chip has a large bandwidth, thereby improving the working performance of the electronic device.

[0039] This application provides a method for fabricating a photodetector chip. The photodetector chip includes a substrate, a micro / nano structure, a first doped layer, an intrinsic absorption layer, a second doped layer, a first electrode, and a second electrode. The method for fabricating the photodetector chip includes: taking a substrate, the substrate including a first surface and a second surface disposed opposite to each other along its own thickness direction; fabricating a micro / nano structure on the first surface, with multiple micro / nano structures arranged in an array; fabricating a first doped layer in a plane perpendicular to the thickness direction of the substrate, on the outer side of the micro / nano structure, and in the gaps between adjacent micro / nano structures; fabricating an intrinsic absorption layer on the surface of the first doped layer; fabricating a second doped layer on the surface of the intrinsic absorption layer; and fabricating a first electrode and a second electrode, such that the first electrode is electrically connected to the first doped layer and the second electrode is electrically connected to the second doped layer.

[0040] In this application, the micro / nano structure can modulate the optical signal, confining it within the intrinsic absorption layer. This increases the absorption efficiency of the intrinsic absorption layer, thereby improving the responsivity of the photodetector chip. First, a micro / nano structure is fabricated, followed by a first doped layer, an intrinsic absorption layer, and a second doped layer. The micro / nano structure connects these layers, ensuring the electric field direction of the photodetector chip is parallel to a first direction, aligning the movement directions of electrons and holes. This increases the speed of electron and hole movement, shortening the time it takes for electrons and holes to traverse the intrinsic absorption layer, thus increasing the bandwidth of the photodetector chip and ultimately improving its performance.

[0041] In one possible design, the step of fabricating a first doped layer on the outside of the micro / nano structure and in the gap between adjacent micro / nano structures includes: growing the first doped layer on the outside of the micro / nano structure and in the gap between adjacent micro / nano structures by selective epitaxial growth, wherein the first doped layer covers the substrate; the step of fabricating an intrinsic absorption layer on the surface of the first doped layer includes: growing the intrinsic absorption layer on the surface of the first doped layer by selective epitaxial growth; the step of fabricating a second doped layer on the surface of the intrinsic absorption layer includes: growing the second doped layer on the surface of the intrinsic absorption layer by selective epitaxial growth.

[0042] In this application, the first doped layer, the intrinsic absorption layer, and the second doped layer are prepared by selective epitaxial growth, which can improve the structural integrity of the outer surfaces of the first doped layer, the intrinsic absorption layer, and the second doped layer, reduce the risk of surface defects in the first doped layer, the intrinsic absorption layer, and the second doped layer, thereby reducing the risk of electrons and holes capturing at the defect energy level and thus reducing the dark current of the photodetector chip, so as to improve the responsivity of the photodetector chip and thus improve the working performance of the photodetector.

[0043] In one possible design, the photodetector chip also includes an epitaxial stop layer. In a plane perpendicular to the thickness direction of the substrate, the epitaxial stop layer is located outside the first doped layer, the intrinsic absorption layer, the second doped layer, and the micro / nano structure. The steps of fabricating the micro / nano structure on the substrate include: fabricating a third doped layer on the surface of the substrate; growing an oxide layer on the third doped layer by plasma chemical vapor deposition; and performing photolithography or inductively coupled plasma etching on the oxide layer to form the epitaxial stop layer and the micro / nano structure.

[0044] In this application, an epitaxial stop layer is placed on the outer side of the micro / nano structure, which improves the dimensional accuracy of the first doped layer, the intrinsic absorption layer, and the second doped layer. This reduces the fabrication difficulty of the first doped layer, the intrinsic absorption layer, and the second doped layer, thereby shortening the fabrication cycle of the photodetector chip. Simultaneously, it reduces the material cost of fabricating the first doped layer, the intrinsic absorption layer, and the second doped layer, thus reducing the cost of the photodetector chip. The epitaxial stop layer is fabricated simultaneously with the micro / nano structure, simplifying the fabrication process and shortening the fabrication time of the photodetector, thereby reducing the fabrication cost of the photodetector.

[0045] In one possible design, the steps of fabricating the first electrode and the second electrode include: etching the epitaxial stop layer in a plane perpendicular to the thickness of the substrate, on the side of the epitaxial stop layer opposite to the micro / nano structure, to form a first window, exposing the substrate at the first window; fabricating the first electrode and the second electrode at the first window and on the surface of the second doped layer, using photolithography, electron beam evaporation, magnetron sputtering, or metal lift-off processes; the photodetector chip also includes an antireflection film, and after the steps of fabricating the first electrode and the second electrode, the fabrication method of the photodetector chip includes: depositing the antireflection film on the surface of the second electrode and the second doped layer; removing a portion of the antireflection film by photolithography or etching to form a second window, exposing the second electrode at the location where the second window is formed.

[0046] In this application, a first electrode and a second electrode are prepared first, and then an antireflection film is prepared so that the antireflection film covers the surface of the second electrode and the second doped layer. Then the antireflection film on the surface of the second electrode is removed to expose the second electrode. This preparation method can improve the coverage of the antireflection film on the surface of the second doped layer and reduce the impact of the antireflection film on the difficulty of preparing the second electrode.

[0047] In one possible design, the photodetector chip further includes an antireflection film. Before the steps of fabricating the first electrode and the second electrode, the fabrication method of the photodetector chip includes: etching the epitaxial stop layer in a plane perpendicular to the thickness of the substrate, on the side of the epitaxial stop layer opposite to the micro / nano structure, by photolithography or etching to form a first window, exposing the substrate at the first window; depositing an antireflection film on the surface of the second doped layer; removing a portion of the antireflection film by photolithography to form a second window, exposing the second doped layer at the second window; and fabricating the first electrode and the second electrode at the first window and on the surface of the second doped layer by photolithography, electron beam evaporation, magnetron sputtering, or metal lift-off processes.

[0048] In this application, the antireflection film is prepared first, followed by the preparation of the first and second electrodes. This reduces the risk of damage to the first and second electrodes during the preparation of the antireflection film, thereby improving the processing yield of the photoelectric detection chip.

[0049] In one possible design, the photodetector chip also has a reflective layer. The fabrication method of the photodetector chip includes depositing a reflective film on the side of the second surface of the substrate by physical vapor deposition or chemical vapor deposition.

[0050] In this application, a reflective layer for reflecting light is provided on the back side of the substrate, which can reflect the light that penetrates the substrate back into the intrinsic absorption layer, thereby improving the light absorption efficiency of the intrinsic absorption layer, so as to generate more electrons and holes, thereby improving the responsivity of the photodetector chip and thus improving the working performance of the photodetector.

[0051] In one possible design, prior to the step of depositing a reflective film on the second surface of the substrate, the method for fabricating the photodetector chip includes: creating a recess on the second surface of the substrate by double-sided photolithography or etching; the step of depositing a reflective film on the side where the second surface of the substrate is located includes: depositing a reflective film on the surface of the recess, or on the recess and the second surface.

[0052] In this application, the substrate is thinned to reduce light loss. By placing the reflective film within the recess, the distance between the reflective film and the intrinsic absorption layer is reduced, thereby decreasing the light absorption loss of the substrate. Attached Figure Description

[0053] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0054] Figure 1 A schematic diagram of the structure of the electronic device provided in this application in one embodiment;

[0055] Figure 2 for Figure 1 A schematic diagram of signal transmission in an electronic device in one embodiment;

[0056] Figure 3 This is a cross-sectional view of the photoelectric detection chip in the original scheme;

[0057] Figure 4 for Figure 3 A partial optical path diagram of the photoelectric detection chip in the image;

[0058] Figure 5 for Figure 3 A schematic diagram showing the distribution and movement direction of electrons and holes in the photoelectric detection chip;

[0059] Figure 6 This is a partial structural schematic diagram of the photoelectric detection chip provided in this application in one embodiment;

[0060] Figure 7 A cross-sectional view of the photoelectric detection chip provided in this application in one embodiment;

[0061] Figure 8 for Figure 7 A schematic diagram showing the distribution and movement direction of electrons and holes in the photoelectric detection chip;

[0062] Figure 9 A schematic diagram of the array structure of the micro / nano structure provided in this application in one embodiment;

[0063] Figure 10 This is a schematic diagram of a local optical path between the epitaxial stop layer, the intrinsic absorption layer, and the micro / nano structure.

[0064] Figure 11 This is a partial optical path diagram between the first doped layer, the intrinsic absorption layer, and the second doped layer.

[0065] Figure 12 A cross-sectional view of the photoelectric detection chip provided in this application in another embodiment;

[0066] Figure 13 A cross-sectional view of the photoelectric detection chip provided in this application in yet another embodiment;

[0067] Figure 14 A cross-sectional view of the photoelectric detection chip provided in this application in yet another embodiment;

[0068] Figures 15 to 38 This is a schematic diagram of the fabrication process of the photoelectric detector chip provided in this application.

[0069] Figure label:

[0070] 100 - Housing;

[0071] 200-Photoelectric detection chip;

[0072] 300-Signal Amplification Module;

[0073] 400 - Signal Processing Module;

[0074] 500-Display screen;

[0075] 01-Silicon substrate;

[0076] 02-Lower doped layer;

[0077] 03-Germanium absorber layer;

[0078] 04- Upper doped layer;

[0079] 05 - Positive electrode;

[0080] 06 - Negative electrode;

[0081] 07-Medium Metasurface Structure;

[0082] 1-Substrate;

[0083] 11-First surface;

[0084] 12-Second surface;

[0085] 13-Depression;

[0086] 14-Reflective layer;

[0087] 2-Epipolar stop layer;

[0088] 3-Micro / nano structures;

[0089] 4-First doped layer;

[0090] 5-Intrinsic absorption layer;

[0091] 6-Second doped layer;

[0092] 7-First electrode;

[0093] 8-Second electrode;

[0094] 9-Antireflective membrane;

[0095] 1A - Third doped layer;

[0096] 1B - Oxide layer;

[0097] 1C - First Window;

[0098] 1D - Second Window;

[0099] 1E-photosensitive area. Detailed Implementation

[0100] To better understand the technical solution of this application, the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0101] It should be understood that the described embodiments are merely some, not all, of the embodiments in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0102] The terminology used in the embodiments of this application is for the purpose of describing particular embodiments only and is not intended to be limiting of this application. The singular forms “a,” “the,” and “the” used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0103] It should be understood that the term "and / or" used in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article generally indicates that the preceding and following related objects have an "or" relationship.

[0104] Photodetectors convert incident light signals into electrical signals and detect light signals by processing and analyzing the electrical signals. They are widely used in optical communication, signal processing, sensing systems, measurement systems, and other technical fields. In communication systems, information can be loaded onto light to form optical signals, and the propagation of these optical signals enables signal transmission between devices. Photodetectors receive optical signals and convert them into electrical signals. As an important component of signal processing and transmission, photodetectors can be used in base stations or electronic devices with signal transmission and reception functions. These electronic devices can include mobile phones, tablet computers, laptop computers, personal digital assistants (PDAs), cameras, personal computers, laptops, in-vehicle devices, wearable devices, augmented reality (AR) glasses, AR headsets, virtual reality (VR) glasses, or VR headsets, and other devices with camera modules.

[0105] Figure 1 The electronic device illustrated in this embodiment is a mobile phone as an example. Figure 1 As shown, the electronic device includes a housing 100 and a photodetector installed inside the housing. Figure 2 This is a schematic diagram of signal transmission in one embodiment of an electronic device. The photodetector includes a photodetector chip 200 for realizing photo-to-electric conversion, a signal amplification module 300 for amplifying the output electrical signal of the photodetector chip 200, and a signal processing module 400 for analyzing and processing the signal output by the signal amplification module 300. Finally, the processing result of the signal processing module 400 is displayed to the operator through the display screen 500 of the electronic device in the form of charts, graphs, etc.

[0106] Typically, a photodetector includes a housing and a mounting substrate. The housing and the mounting substrate form a mounting cavity. The photodetector chip is mounted on the mounting substrate and located inside the mounting cavity, so as to achieve sealed mounting of the photodetector chip and improve the working stability of the photodetector chip.

[0107] Silicon is an indirect bandgap semiconductor material with advantages such as abundant reserves, low cost, high mechanical strength, and compatibility with microelectronic circuits. Therefore, it is an important material for fabricating photodetectors, especially integrated photodetectors. However, because silicon is an indirect bandgap material, there is a risk that the photodetector will not respond when the wavelength of the optical signal is above 1.1 μm, making it difficult to use silicon in active devices for optical communication.

[0108] Since germanium can achieve light absorption in the near-infrared communication band and is fully compatible with silicon's CMOS (Complementary Metal-Oxide-Semiconductor) process, with the breakthrough in silicon-based germanium thin film epitaxy technology, optoelectronic devices based on silicon-based germanium materials are developing rapidly. Among them, silicon-based integrated germanium detectors are currently the most popular optical detection solutions for silicon-based optical interconnects.

[0109] Typically, the structure of a silicon-based germanium photodetector chip is as follows: Figure 3 As shown, Figure 3 This is a cross-sectional view of a partial structure of a silicon-based germanium photodetector chip. The silicon-based germanium photodetector chip includes a silicon substrate 01 and a lower doped layer 02, a germanium absorption layer 03, and an upper doped layer 04 disposed on the silicon substrate 01. The upper doped layer 04 and the lower doped layer 02 have opposite doping types, so that the upper doped layer and the lower doped layer form a semiconductor PN junction.

[0110] The basic working mechanism of a photoelectric detection chip is as follows: Light of a certain wavelength acts on a semiconductor PN junction. The energy of the incident photon is greater than or equal to the band gap of the semiconductor material, which excites electron-hole pairs (i.e., photogenerated carriers). An electromotive force effect is generated on both sides of the depletion region (potential barrier region). When connected to an external circuit, it is converted into a current signal, and then the electrical signal is converted into an optical signal.

[0111] When the photodetector chip is illuminated, more holes in the upper doped layer move to the lower doped layer, and more electrons in the lower doped layer move to the upper doped layer, thus forming a current and an internal electric field. The upper and lower doped layers are electrically connected to the positive and negative electrodes, respectively, to facilitate the output current.

[0112] Responsivity and bandwidth are crucial factors in evaluating the performance of photodetector chips. Responsivity is the ratio of the power of the incident light signal to the output current of the photodetector chip. When the power of the light signal is constant, a higher output current results in a higher responsivity. The response speed of a photodetector chip can be expressed by the transit time of photogenerated carriers. The frequency response resulting from the transit time of photogenerated carriers is the bandwidth of the photodetector chip. In short, a shorter transit time for photogenerated carriers results in a higher bandwidth. In silicon-based germanium photodetector chips, responsivity and bandwidth are also related to the thickness of the germanium absorption layer. A thicker germanium absorption layer results in higher light absorption efficiency, leading to a higher responsivity. However, a thicker germanium absorption layer also results in a longer transit time for photogenerated carriers, thus reducing the bandwidth of the silicon-based germanium photodetector chip.

[0113] To improve the responsivity of silicon-based germanium photodetector chips without changing the thickness of the germanium absorber layer, such as... Figure 3 As shown, a dielectric metasurface structure 07 can be fabricated on a silicon-based germanium photodetector chip. The dielectric metasurface structure 07 is a subwavelength periodic structure comprising several spliced ​​micro / nano pattern arrays, each array consisting of multiple identical micro / nano pattern periodically arranged. Along the first direction Y, for example, along the thickness direction of the silicon substrate 01, the dielectric metasurface structure 07 penetrates the upper doped layer 04 and is embedded on top of the germanium absorption layer 03; that is, the dielectric metasurface structure 07 does not penetrate the germanium absorption layer 03. The dielectric metasurface structure 07 is an artificial two-dimensional structure with special electromagnetic properties, composed of a series of subwavelength resonant units. It can effectively confine the light field and control the amplitude, phase, polarization, and other characteristics of the light beam within a range much smaller than the wavelength scale, exhibiting powerful light field manipulation capabilities. The dielectric metasurface structure 07 utilizes Mie resonance to generate resonance for light signals of specific wavelengths. Figure 4 This is a partial optical path diagram of a photodetector chip. During the operation of the photodetector chip, as... Figure 4 As shown, an optical signal is incident on a silicon-based germanium photodetector chip along the first direction Y. The optical signal is modulated by the dielectric metasurface structure 07, which changes the propagation direction of at least a portion of the optical signal at a specific wavelength. That is, the propagation direction of the adjusted optical signal has an angle with both the first direction Y and the second direction X. For example, the second direction X is the radial direction of the silicon substrate 01, thereby lengthening the path of light movement within the germanium absorption layer 03, improving the light absorption efficiency of the germanium absorption layer 03, and thus improving the responsivity of the silicon-based germanium photodetector chip.

[0114] Figure 5 This is a schematic diagram showing the distribution and movement direction of electrons and holes inside a silicon-based germanium photodetector chip when it is illuminated. When electrons and holes move between the lower doped layer 02 and the upper doped layer 04, as shown... Figure 5As shown, when electrons located at the lower doped layer 02 move to the upper doped layer 04, they need to bypass the dielectric metasurface structure 07. This causes the direction of movement of these electrons to have a certain angle with the first direction Y. When holes at the upper doped layer 04 move to the lower doped layer 02, some holes will move to the bottom of the dielectric metasurface structure 07. The direction of movement of these holes also has a certain angle with the first direction Y. This makes the transit path of these electrons and holes longer, thereby increasing the transit time of photogenerated carriers. This still has a negative impact on the bandwidth of the silicon-based germanium photodetector chip.

[0115] This application embodiment changes the structure of the photodetector chip, causing electrons or holes to move along a first direction between the upper and lower doped layers, thereby reducing the risk of bandwidth reduction in the photodetector chip due to longer transit time caused by the tilted movement of electrons or holes.

[0116] Specifically, embodiments of this application provide a photoelectric detection chip, such as... Figure 6 As shown, Figure 6 This is a schematic diagram of the structure of the photoelectric detection chip provided in the embodiment of this application. The photoelectric detection chip includes a substrate 1, a first doped layer 4, a second doped layer 6, an intrinsic absorption layer 5, a micro / nano structure 3, a first electrode 7, and a second electrode 8. Along a first direction Y, for example along the thickness direction of the substrate 1, the first doped layer 4, the second doped layer 6, and the intrinsic absorption layer 5 are stacked on the surface of the substrate 1, and the intrinsic absorption layer 5 is located between the first doped layer 4 and the second doped layer 6. The first electrode 7 and the second electrode 8 are electrically connected to the first doped layer 4 and the second doped layer 6, respectively, such that one of the first electrode 7 and the second electrode 8 serves as the positive electrode of the photoelectric detection chip, and the other serves as the negative electrode of the photoelectric detection chip.

[0117] Figure 6 In the illustrated embodiment, the substrate 1 has a cylindrical structure, and the first doped layer 4, the second doped layer 6, the intrinsic absorption layer 5, the first electrode 7, and the second electrode 8 are all annular structures. In other embodiments, the substrate 1 can be a quadrilateral, pentagon, or other polygonal structure, and the outline shapes of the first doped layer 4, the second doped layer 6, the intrinsic absorption layer 5, the first electrode 7, and the second electrode 8 can also be quadrilateral, pentagonal, or other polygonal structures. This application does not impose any special limitations on the specific outline shapes of the substrate 1, the first doped layer 4, the second doped layer 6, the intrinsic absorption layer 5, the first electrode 7, and the second electrode 8.

[0118] Figure 7 This is a cross-sectional view of the photoelectric detection chip provided in one embodiment of this application, specifically, as shown below. Figure 7As shown, the first electrode 7 is disposed on the substrate 1, and the first electrode 7 is indirectly electrically connected to the first doped layer 4 through the substrate 1. The second electrode 8 is disposed on the side of the second doped layer 6 facing away from the intrinsic absorption layer 5, and the second doped layer 6 is directly electrically connected to the second electrode 8, as shown. Figure 7 As shown, the micro / nano structure 3 extends along the first direction Y (e.g., along the thickness direction of the substrate 1) and penetrates the first doped layer 4, the second doped layer 6, and the intrinsic absorption layer 5. In the direction perpendicular to the thickness direction of the substrate 1, multiple micro / nano structures 3 are arranged in an array to form a micro / nano array. The micro / nano array can effectively confine the light field and control the amplitude, phase, polarization, and other characteristics of the light beam within a range much smaller than the wavelength scale. It has a strong light field manipulation capability and can adjust the propagation direction of at least part of the light signal. For example, the micro / nano array can change the propagation direction of vertically incident light to horizontal, that is, it can rotate the incident light by approximately 90°, thereby confining at least part of the light signal within the intrinsic absorption layer 5, extending the transmission time and path of the light signal within the intrinsic absorption layer 5, and thus improving the absorption efficiency of the intrinsic absorption layer 5 for the light signal, so as to generate more electrons and holes, thereby improving the responsivity of the photodetector chip.

[0119] Please refer to Figure 8 , Figure 8 This is a schematic diagram showing the distribution and movement direction of electrons and holes in a photoelectric detector chip. Because the micro / nano structure 3 penetrates the first doped layer 4, the intrinsic absorption layer 5, and the second doped layer 6 in the first direction Y, Figure 8Electrons and holes are distributed along the first direction Y, and their movement directions are parallel to the first direction Y. This minimizes the transit path of electrons and holes within the intrinsic absorption layer 5, thereby shortening their transit time and increasing the bandwidth of the photodetector chip. This, in turn, improves the performance of the photodetector and electronic devices. Simultaneously, since the micro / nano structure 3 penetrates the first doped layer 4, the intrinsic absorption layer 5, and the second doped layer 6 along the first direction Y, the effective area of ​​the photosensitive region (the region used to absorb light and generate current) is reduced, lowering the capacitance of the photodetector. A reduced capacitance means that, under the same voltage, the amount of charge that can be stored in the intrinsic absorption layer 5 is reduced, leading to a decrease in the amount of charge that can be stored under the same voltage. In the initial stage of voltage application, in order to achieve a new charge balance state, charge carriers need to move faster in the intrinsic absorption layer 5 to neutralize the electric field, thereby reducing the accumulation time of charge carriers. In addition, the reduction of capacitance usually means a reduction in the time constant of the circuit. The time constant refers to the time required for the voltage or current in the circuit to change to a certain proportion of its final stable value. This also leads to an increase in the current build-up speed. When the time constant is small, the voltage or current changes faster, so the movement speed of charge carriers also increases accordingly. The increased movement speed of charge carriers shortens the transit time of electrons and holes, thereby further improving the bandwidth of the photodetector chip, and thus improving the working performance of the photodetector and electronic equipment.

[0120] In a plane perpendicular to the thickness direction of the substrate, the lines connecting adjacent micro / nanostructures can form irregular shapes or regular N-gons, where N ≥ 3. For example, the lines connecting adjacent micro / nanostructures can form equilateral triangles, squares, pentagons, hexagons, or other regular polygonal structures. Figure 9 Taking the example of adjacent micro- and nanostructures forming a regular quadrilateral, the adjacent micro- and nanostructures form a regular polygon, and multiple regular polygons are evenly arranged in a plane perpendicular to the first direction Y. Compared with forming irregular shapes, forming regular polygons makes it easier to achieve the periodic arrangement of micro- and nanostructures, thereby reducing the processing difficulty and cost of micro- and nanostructures, and also helping to shorten the overall processing cycle of micro- and nanostructures and photoelectric detection chips.

[0121] The periodic arrangement of micro- and nano-structures can improve the control effect on optical signals and reduce the risk of local optical signals being strong and local optical signals being weak due to inconsistent control effects. In other words, it improves the uniformity of the intensity of optical signals within the intrinsic absorption layer, thereby improving the uniformity of the distribution of photogenerated carriers, that is, improving the uniformity of the distribution of photogenerated electrons and holes, which is conducive to further improving the uniformity of the electric field distribution within the photodetector chip.

[0122] The distance between two adjacent micro / nano structures ranges from 400nm to 2000nm. For example, the distance between two adjacent micro / nano structures can be 400nm, 450nm, 500nm, 550nm, 600nm, 650nm, 700nm, 750nm, 800nm, 850nm, 900nm, 950nm, 1000nm, 1050nm, 1100nm, 1150nm, 1200nm, 1250nm, 1300nm, 1350nm, 1400nm, 1450nm, 1500nm, 1550nm, 1600nm, 1650nm, 1700nm, 1750nm, 1800nm, 1850nm, 1900nm, 1950nm, 2000nm, etc.

[0123] If the distance between two adjacent micro / nanostructures is small, the size of the first doped layer, the second doped layer, and the intrinsic absorption layer is reduced, thereby decreasing the number of photogenerated carriers that can be generated, which in turn affects the responsivity of the photodetector. If the distance between two adjacent micro / nanostructures is large, the micro / nanostructures have a poorer control effect on the optical signal, resulting in a shorter transmission time and distance of the optical signal within the intrinsic absorption layer, which in turn affects the bandwidth of the photodetector. Therefore, a distance of 400 nm to 2000 nm between two adjacent micro / nanostructures can increase the number of photogenerated carriers, thereby improving the responsivity of the photodetector and enhancing the control effect on the optical signal, thus increasing the bandwidth of the photodetector and improving its operating performance.

[0124] If the total volume of the first doped layer, the second doped layer, the intrinsic absorption layer, and the micro / nano structure is K1, and the volume of the micro / nano structure is K2, then the duty cycle of the micro / nano structure is K = K2 / K1, and K satisfies: 0.4 ≤ K ≤ 0.8. The specific duty cycles of the micro / nano structure can be 0.4, 0.42, 0.44, 0.46, 0.48, 0.5, 0.52, 0.54, 0.56, 0.58, 0.6, 0.62, 0.64, 0.66, 0.68, 0.7, 0.72, 0.74, 0.76, 0.78, 0.8, etc.

[0125] When the spacing between micro- and nano-structures and K1 are constant, a small duty cycle results in fewer micro- and nano-structures, leading to poorer control over the optical signal and thus affecting the bandwidth of the photodetector. Conversely, a large duty cycle allows for smaller sizes of the first doped layer, second doped layer, and intrinsic absorption layer, reducing the number of photogenerated carriers and consequently affecting the photodetector's responsivity. Therefore, a duty cycle K of 0.4 ≤ K ≤ 0.8 increases the number of photogenerated carriers, thereby improving the photodetector's responsivity and enhancing its control over the optical signal, thus increasing the photodetector's bandwidth and overall performance.

[0126] In a plane perpendicular to the first direction Y, the cross-sectional shape of the micro-nano structure is a circle, triangle, quadrilateral, pentagon, hexagon or other polygon. The cross-sectional shape of the micro-nano structure can be a regular shape or an irregular shape to increase the flexibility of the shape of the micro-nano structure. In the embodiments of this application, the micro-nano structure is a cylinder, that is, the cross-sectional shape of the micro-nano structure is circular, so as to facilitate the processing of the micro-nano structure, thereby reducing the processing difficulty and processing cost of the micro-nano structure.

[0127] Figure 10 This is a schematic diagram of a partial structure and partial optical path of the photoelectric detection chip provided in this application, as shown below. Figure 10 As shown, the photoelectric detection chip also includes an epitaxial stop layer 2, which surrounds the first doped layer 4, the second doped layer 6 and the intrinsic absorption layer 5.

[0128] During the fabrication of the photodetector chip, an epitaxial stop layer 2 and micro / nano structures 3 are fabricated simultaneously. Fabrication methods include, but are not limited to, selectively growing a first doped layer 4, an intrinsic absorption layer 5, and a second doped layer 6 sequentially via epitaxial growth within the gap between the epitaxial stop layer 2 and the micro / nano structure 3, and within the gaps between adjacent micro / nano structures 3. By setting the epitaxial stop layer 2, the dimensional accuracy of the first doped layer 4, the intrinsic absorption layer 5, and the second doped layer 6 can be improved in a plane perpendicular to the second direction Y, thereby reducing the fabrication difficulty of the first doped layer 4, the intrinsic absorption layer 5, and the second doped layer 6. This, in turn, helps to shorten the fabrication cycle of the photodetector chip. Simultaneously, it can reduce the material cost of fabricating the first doped layer 4, the intrinsic absorption layer 5, and the second doped layer 6, thereby reducing the cost of the photodetector chip.

[0129] Furthermore, in one embodiment, a first light confinement structure is provided on the outer side of the intrinsic absorption layer (i.e., the side of the intrinsic absorption layer away from the micro / nano structure) in a direction perpendicular to the second direction Y. In a plane perpendicular to the second direction Y, the first light confinement structure can reflect light back into the intrinsic absorption layer to further improve the light absorption efficiency of the intrinsic absorption layer, so as to generate more electrons and holes, thereby improving the responsivity of the photodetector chip and thus improving the working performance of the photodetector.

[0130] In one embodiment, no epitaxial stop layer is provided on the outer side of the intrinsic absorption layer. In this case, a reflective film, a mirror, or other reflective structure can be provided on the outer side of the intrinsic absorption layer to form a horizontal first light-limiting structure, thereby reflecting the light back into the intrinsic absorption layer.

[0131] In another embodiment, when an epitaxial stop layer is disposed outside the intrinsic absorption layer, a reflective film, mirror, or other reflective structure can be disposed outside the epitaxial stop layer (i.e., on the side of the epitaxial stop layer away from the intrinsic absorption layer) to form a horizontal first light-confining structure. Disposing the first light-confining structure outside the epitaxial stop layer increases the light absorption efficiency of the intrinsic absorption layer without damaging the electrical structure of the photodetector chip, thereby improving the working performance and stability of the photodetector chip.

[0132] In another embodiment, the refractive index of the epitaxial stop layer is lower than that of the intrinsic absorption layer, and / or, the refractive index of the micro / nano structure is lower than that of the intrinsic absorption layer, such as... Figure 10 As shown, when the light signal within the intrinsic absorption layer 5 moves along a direction perpendicular to the first direction Y (e.g., along the second direction) to the surface of the epitaxial stop layer 2 or the micro / nano structure 3, due to the refractive index difference between the epitaxial stop layer 2 and the intrinsic absorption layer 5, and the refractive index difference between the micro / nano structure 3 and the intrinsic absorption layer 5, total internal reflection occurs at the interfaces of the intrinsic absorption layer 5 and the epitaxial stop layer 2, and at the interfaces of the intrinsic absorption layer 5 and the micro / nano structure 3. That is, in a plane perpendicular to the first direction Y, the interface between the intrinsic absorption layer 5 and the epitaxial stop layer 2 constitutes part of the first light confinement structure, and the interface between the intrinsic absorption layer 5 and the micro / nano structure 3 constitutes... As part of the first light-confining structure, the light signal is reflected back into the intrinsic absorption layer 5, which can improve the light absorption efficiency of the intrinsic absorption layer 5 to generate more electrons and holes, thereby improving the responsivity of the photodetector chip and thus improving the working performance of the photodetector and electronic equipment. At the same time, the interface between the intrinsic absorption layer 5 and the epitaxial stop layer 2 constitutes part of the first light-confining structure, and the interface between the intrinsic absorption layer 5 and the micro / nano structure 3 constitutes part of the first light-confining structure, simplifying the structure of the photodetector chip, thereby reducing the cost of the photodetector chip and shortening the processing cycle of the photodetector chip.

[0133] When an epitaxial stop layer is provided on the outside of the intrinsic absorption layer, the first light-confining structure in the above two embodiments can be provided individually or simultaneously.

[0134] Similarly, the photodetector chip also includes a second light confinement structure. The second light confinement structure and the intrinsic absorption layer are distributed along the first direction Y. In the plane where the first direction Y is located, the vertical second light confinement structure can make the light be reflected back into the intrinsic absorption layer to further improve the light absorption efficiency of the intrinsic absorption layer, so as to generate more electrons and holes, thereby improving the responsivity of the photodetector chip and thus improving the working performance of the photodetector.

[0135] In one embodiment, the refractive index of the first doped layer may be less than that of the intrinsic absorption layer, and / or the refractive index of the second doped layer may be less than that of the intrinsic absorption layer, thereby forming a total internal reflection condition at the interface between the first doped layer and the intrinsic absorption layer and the interface between the second doped layer and the intrinsic absorption layer. That is, along the first direction Y, the interface between the first doped layer and the intrinsic absorption layer constitutes part of the second light confinement structure, and the interface between the second doped layer and the intrinsic absorption layer constitutes part of the second light confinement structure.

[0136] Figure 11 This is a partial optical path diagram between the first doped layer, the intrinsic absorption layer, and the second doped layer, as shown below. Figure 11 As shown, when a portion of the light signal leaves the intrinsic absorption layer 5, this portion of light undergoes total internal reflection at the interfaces of the first doped layer 4 and the intrinsic absorption layer 5, and the second doped layer 6 and the intrinsic absorption layer 5. That is, in a plane parallel to the first direction Y, the interfaces of the first doped layer 4 and the intrinsic absorption layer 5 form part of a vertical second light confinement structure, and the interfaces of the second doped layer 6 and the intrinsic absorption layer 5 also form part of a vertical second light confinement structure. This light is then reflected back into the intrinsic absorption layer 5, further improving the light absorption efficiency of the intrinsic absorption layer 5, thereby generating more electrons and holes, improving the responsivity of the photodetector chip, and ultimately enhancing the performance of the photodetector and electronic equipment. Simultaneously, the interfaces of the first doped layer 4 and the intrinsic absorption layer 5, and the interfaces of the second doped layer 6 and the intrinsic absorption layer 5, form part of a vertical second light confinement structure, simplifying the structure of the photodetector chip, reducing its cost, and shortening its processing cycle.

[0137] The intrinsic absorption layer is made of high-refractive-index materials containing germanium, such as germanium and silicon-based germanium. The first doped layer is made of low-refractive-index materials such as silicon, polycrystalline silicon, or silicon oxide. The second doped layer is made of low-refractive-index materials such as silicon, polycrystalline silicon, or silicon oxide. The intrinsic absorption layer and the micro / nano structure are made of silicon oxide, a low-refractive-index material. The silicon oxide is including, but is not limited to, silicon monoxide, silicon dioxide, and silicon hexaoxide.

[0138] In another embodiment, such as Figure 12 As shown, the photoelectric detection chip also includes a reflective layer 14. Along the first direction Y, the reflective layer 14 is located on the side of the substrate 1 away from the first doped layer 4. The reflective layer 14 is used to reflect the light that penetrates the substrate 1 back into the intrinsic absorption layer 5. That is, the reflective layer 14 constitutes part of the second light confinement structure.

[0139] When some light signals do not reach total internal reflection at the interface between the second doped layer 6 and the intrinsic absorption layer 5, i.e., when the incident angle does not meet the condition, some light signals will penetrate the second doped layer 6 and enter the substrate 1, where they will be absorbed or even penetrate the substrate 1 and leave the photodetector chip. A reflective layer 14 is provided on the back side of the substrate 1 to reflect light back into the intrinsic absorption layer 5, thereby improving the light absorption efficiency of the intrinsic absorption layer 5. This facilitates the generation of more electrons and holes, thereby improving the responsivity of the photodetector chip and ultimately enhancing the working performance of the photodetector.

[0140] The second light-limiting structure in the above two embodiments can be set individually or simultaneously.

[0141] In one embodiment, such as Figure 12 As shown, the reflective layer 14 is directly disposed on the back side of the substrate 1. During the processing, the substrate 1 can be thinned as a whole to reduce the loss of light signals by the substrate 1, so as to improve the light utilization rate of the photoelectric detection chip.

[0142] Figure 13 A cross-sectional view of the photoelectric detection chip provided in this application in another embodiment, such as... Figure 13 As shown, along the first direction Y, a recess 13 is provided on the side of the substrate 1 away from the first doped layer 4, and at least a portion of the reflective layer 14 is located in the recess 13 to reduce the distance between the reflective layer 14 and the intrinsic absorption layer, thereby further reducing the loss of optical signal by the substrate 1, so as to improve the light utilization rate of the photoelectric detection chip.

[0143] In the first direction Y, the reflective layer 14 must completely cover the photosensitive area 1E of the photodetector chip, such as... Figure 13 As shown, the photosensitive region 1E ( Figure 13The area within the dashed box (specifically the area where the first doped layer 4 and the micro / nano structure 3 are exposed) refers to the area where the first doped layer 4 and the micro / nano structure 3 are exposed. The reflective layer 14 covers the area directly below the photosensitive region 1E, meaning that the projection of the entire photosensitive region 1E in the first direction Y is completely within the coverage area of ​​the reflective layer 14, so that the reflective layer 14 can reflect the optical signal back to the photosensitive region 1E, thereby improving the utilization rate of the optical signal in the photosensitive region 1E.

[0144] Figure 14 A cross-sectional view of the photoelectric detection chip provided in this application in another embodiment, as shown below. Figure 14 As shown, the photodetector also includes an antireflection film 9. Along the first direction Y, the antireflection film 9 is located on the side of the second doped layer 6 away from the intrinsic absorption layer 5, and the antireflection film 9 must completely cover the photosensitive area of ​​the photodetector chip.

[0145] The antireflection film 9 can increase the transmittance of light signals on its own surface and reduce the reflectance of light signals on its own surface, thereby enabling light signals to enter the intrinsic absorption layer 5 to the maximum extent, so as to improve the utilization rate of light by the photodetector chip. Moreover, the antireflection film 9 is transparent within the absorption band of the photodetector, that is, light signals of specific wavelengths can penetrate the antireflection film 9, and the antireflection film 9 has low or even no loss of light signals, thereby improving the intensity of light signals in the intrinsic absorption layer 5.

[0146] Based on the photoelectric detection chip in any of the above embodiments, this application also provides a method for fabricating a photoelectric detection chip. Figures 15 to 17 The method for fabricating a photodetector chip in one embodiment generally includes the following steps:

[0147] like Figure 15 As shown, a substrate 1 is taken, and a first doped layer 4, an intrinsic absorption layer 5, and a second doped layer 6 are sequentially stacked along the first direction Y on the surface of the substrate 1. The doping types of the first doped layer 4 and the second doped layer 6 are opposite. For example, the first doped layer 4 can be a P-type silicon doped layer containing doped elements, and the second doped layer 6 can be an N-type silicon doped layer or a polycrystalline silicon doped layer containing doped elements. The doped elements include, but are not limited to, nitrogen, phosphorus, arsenic, boron, aluminum, gallium, indium, thallium, etc.

[0148] like Figure 16 As shown, the first doped layer 4, the intrinsic absorption layer 5, and the second doped layer 6 are etched along the first direction to form a channel that penetrates the first doped layer 4, the intrinsic absorption layer 5, and the second doped layer 6 along the first direction Y.

[0149] like Figure 17 As shown, a filled micro / nano structure 3 is prepared within the pores;

[0150] like Figure 17As shown, a first electrode 7 and a second electrode 8 are prepared respectively, so that the first electrode 7 is electrically connected to the first doped layer 4 and the second electrode 8 is electrically connected to the second doped layer 6.

[0151] In another embodiment, the general steps of the method for fabricating the photodetector chip include:

[0152] Take a substrate and first fabricate micro / nano structures on the surface of the substrate;

[0153] A first doped layer, an intrinsic absorption layer, and a second doped layer are sequentially stacked along a first direction in the gap between adjacent micro / nano structures and on the outside of the micro / nano structures. The doping types of the first and second doped layers are opposite. For example, the first doped layer can be a P-type silicon doped layer containing doping elements, and the second doped layer can be an N-type silicon doped layer or a polycrystalline silicon doped layer containing doping elements. The doping elements include, but are not limited to, nitrogen, phosphorus, arsenic, boron, aluminum, gallium, indium, thallium, etc.

[0154] A first electrode and a second electrode are prepared respectively, so that the first electrode is electrically connected to the first doped layer and the second electrode is electrically connected to the second doped layer.

[0155] The micro / nano structure can modulate the optical signal, confining it within the intrinsic absorption layer. This increases the absorption efficiency of the intrinsic absorption layer, thereby improving the responsivity of the photodetector chip. First, a micro / nano structure is fabricated, followed by a first doped layer, an intrinsic absorption layer, and a second doped layer. The micro / nano structure connects these layers, ensuring the electric field direction of the photodetector chip is parallel to a specific direction, aligning the movement of electrons and holes. This increases the speed of electron and hole movement, shortening the time it takes for them to traverse the intrinsic absorption layer, thus increasing the bandwidth of the photodetector chip and ultimately improving its performance.

[0156] The first doped layer, the intrinsic absorption layer, and the second doped layer can be prepared by deposition, sputtering, epitaxial growth, or other methods.

[0157] When the first doped layer, the intrinsic absorption layer, and the second doped layer are prepared by epitaxial growth, in one embodiment, it can be prepared according to... Figures 18 to 23 The steps shown directly prepare the first doped layer, the intrinsic absorption layer, and the second doped layer on the surface of the micro / nano structure.

[0158] In one specific embodiment, fabricating micro / nano structures on a substrate specifically includes: fabricating an epitaxial stop layer and micro / nano structures on the substrate.

[0159] In this embodiment, the steps of fabricating the epitaxial stop layer 2 and the micro / nano structure 3 on the substrate 1 include:

[0160] like Figure 18 As shown, the substrate 1 includes a first surface 11 and a second surface 12 disposed opposite to each other along its own thickness direction (e.g., along the first direction Y). A third doped layer 1A is formed on the first surface 11 of the substrate 1 by ion implantation. The third doped layer 1A is the part of the substrate 1 containing doped elements, including but not limited to nitrogen, phosphorus, arsenic, boron, aluminum, gallium, indium, thallium, etc. The third doped layer 1A serves as the substrate for the preparation of the epitaxial stop layer 2 and the micro / nano structure 3, which can reduce the preparation difficulty of the epitaxial stop layer 2 and the micro / nano structure 3.

[0161] like Figure 19 As shown, an oxide layer 1B is prepared on the third doped layer 1A. The preparation method includes, but is not limited to, plasma-enhanced chemical vapor deposition (PECVD). The material of the oxide layer 1B includes, but is not limited to, silicon oxide or silicon nitride. The specific process of PECVD is as follows: the substrate 1 with the third doped layer 1A is placed in the reaction chamber of the reaction equipment, the reaction chamber is heated and a special gas is introduced. Depending on the oxidation type of the oxide layer 1B, the special gas can be oxygen, nitrogen or other gases containing oxygen and nitrogen elements. Under the excitation of the microwave source, the special gas is ionized to form a plasma state and deposited on the surface of the third doped layer 1A, thereby forming the oxide layer 1B.

[0162] Figure 20 right Figure 19 The oxide layer 1B shown is etched to form a micro / nano structure 3. The etching methods include, but are not limited to, photolithography or inductively coupled plasma etching. The photolithography step includes: irradiating a local area of ​​the oxide layer 1B to modify the irradiated part of the oxide layer 1B, cleaning to remove the modified part, and the remaining part forming the micro / nano structure 3. Inductively coupled plasma etching refers to the process of creating trenches at the etched site of the oxide layer 1B through physical and chemical reactions. The specific steps include: placing the substrate 1 with the oxide layer 1B in the etching chamber, evacuating the etching chamber and introducing an etching gas (e.g., argon), and generating high-density plasma through glow discharge under the action of the coupled electric field. The high-density plasma interacts with the surface of the oxide layer 1B to form trenches, and the remaining unetched part forms the micro / nano structure 3.

[0163] After that, as Figure 21As shown, a first doped layer 4 is grown in the gap between adjacent micro / nano structures 3 and on the outside of the micro / nano structures 3 by selective epitaxial growth, and the first doped layer 4 covers the substrate 1. The selective epitaxial growth steps include: covering the substrate 1 and the surface of the micro / nano structures 3 with photoresist, patterning the photoresist with light so that the part where the first doped layer 4 needs to be grown is exposed, that is, removing the photoresist in the gap between the micro / nano structures 3 and on the outside of the micro / nano structures 3, or directly covering the surface where the first doped layer 4 does not need to be grown with a mask, placing the substrate 1 into the growth cavity, introducing gas into the growth cavity and promoting the decomposition and deposition of the gas on the surface of the substrate 1, thereby forming a silicon crystal structure containing doped elements, that is, forming the first doped layer 4.

[0164] like Figure 22 As shown, an intrinsic absorption layer 5 is grown on the surface of the first doped layer 4 by selective epitaxial growth. That is, based on the growth of the first doped layer 4, the gas introduced is changed so that the surface of the first doped layer 4 is decomposed and a germanium or silicon-based germanium structure is deposited to form the intrinsic absorption layer 5.

[0165] like Figure 23 As shown, a second doped layer 6 is grown on the surface of the intrinsic absorption layer 5 by selective epitaxial growth. That is, based on the growth of the intrinsic absorption layer 5, the gas introduced is changed so that the surface of the intrinsic absorption layer 5 is decomposed and a silicon or polycrystalline silicon structure containing doped elements is deposited to form the second doped layer 6.

[0166] Finally, remove the photoresist or mask from the surface.

[0167] In another embodiment, an epitaxial stop layer is provided on the outside of the micro / nano structure, and epitaxial growth is performed in the area enclosed by the epitaxial stop layer, that is, between the epitaxial stop layer and the micro / nano structure, and between adjacent micro / nano structures, to form a first doped layer, an intrinsic absorption layer and a second doped layer.

[0168] In this embodiment, Figures 24 to 25 This is a schematic diagram of the fabrication process of the epitaxial stop layer 2 and the micro / nano structure 3. Specifically, the steps for fabricating the epitaxial stop layer 2 and the micro / nano structure 3 on the substrate 1 include:

[0169] A third doped layer is formed on the first surface of the substrate by ion implantation;

[0170] like Figure 24 As shown, an oxide layer 1B is prepared on the third doped layer 1A;

[0171] like Figure 25 As shown, the oxide layer 1B is etched to form the epitaxial stop layer 2 and the micro / nano structure 3. The etching methods include, but are not limited to, photolithography or inductively coupled plasma etching.

[0172] The first doped layer, the intrinsic absorption layer, and the second doped layer are fabricated within the gap between the epitaxial stop layer and the micro / nano structure, and within the gap between adjacent micro / nano structures. Specific steps include:

[0173] Within the gap between the epitaxial stop layer 2 and the micro / nano structure 3, and within the gap between adjacent micro / nano structures 3, such as Figure 26 As shown, the first doped layer 4 is grown by selective epitaxial growth and covers the substrate 1.

[0174] The step of preparing the intrinsic absorption layer 5 on the surface of the first doped layer 4 includes:

[0175] like Figure 27 As shown, an intrinsic absorption layer 5 is grown on the surface of the first doped layer 4 by selective epitaxial growth.

[0176] The steps for preparing the second doped layer 6 on the surface of the intrinsic absorption layer 5 include:

[0177] like Figure 28 As shown, a second doped layer 6 is grown on the surface of the intrinsic absorption layer 5 by selective epitaxial growth.

[0178] The epitaxial stop layer 2 is set on the outside of the micro / nano structure 3, which can improve the dimensional accuracy of the first doped layer 4, the intrinsic absorption layer 5 and the second doped layer 6, thereby reducing the processing difficulty of the first doped layer 4, the intrinsic absorption layer 5 and the second doped layer 6, which in turn helps to shorten the processing cycle of the photoelectric detection chip. At the same time, it can reduce the material cost of processing the first doped layer 4, the intrinsic absorption layer 5 and the second doped layer 6, thereby reducing the cost of the photoelectric detection chip.

[0179] The epitaxial stop layer 2 and the micro / nano structure 3 were fabricated simultaneously, which simplified the fabrication process, thereby shortening the fabrication time of the photodetector and thus reducing the fabrication cost of the photodetector.

[0180] By selectively epitaxially growing the first doped layer 4, the intrinsic absorption layer 5, and the second doped layer 6, the structural integrity of the outer surfaces of the first doped layer 4, the intrinsic absorption layer 5, and the second doped layer 6 can be improved. This reduces the risk of surface defects in the first doped layer 4, the intrinsic absorption layer 5, and the second doped layer 6, thereby reducing the risk of electrons and holes capturing at defect energy levels and causing electrons and holes to coincide at defect energy levels. This, in turn, reduces the magnitude of the dark current (current generated in the absence of light) of the photodetector chip, thereby improving the responsivity of the photodetector chip and ultimately improving the working performance of the photodetector.

[0181] When the photoelectric detection chip is equipped with an antireflection coating 9 Figures 29 to 32This is a schematic diagram of the fabrication process of the antireflection film 9, the first electrode 7, and the second electrode 8 in one embodiment. Specifically, the fabrication method of the photodetector chip includes:

[0182] In a plane perpendicular to the thickness of substrate 1, on the side of epitaxial stop layer 2 facing away from micro / nano structure 3 (reference). Figure 28 The part within the dashed box in the image, such as Figure 30 As shown, the epitaxial stop layer 2 is etched by photolithography or etching process to form the first window 1C, and the third doped layer 1A of the substrate 1 is exposed at the first window 1C;

[0183] like Figure 31 As shown, a ring-shaped first electrode 7 and a second electrode 8 are fabricated at the first window 1C and on the surface of the second doped layer 6 by photolithography, electron beam evaporation, magnetron sputtering or metal stripping processes; wherein, the fabrication of the first electrode 7 at the first window 1C reduces the size of the epitaxial stop layer 2 in the second direction X, thereby helping to reduce the overall size of the photodetector chip, so as to improve the integration of the photodetector chip and the photodetector.

[0184] like Figure 32 As shown, an antireflection film 9 is prepared on the surface of the second electrode 8 and the second doped layer 6. The preparation methods include, but are not limited to, deposition or coating, rolling, vacuum pressing and other bonding processes.

[0185] like Figure 32 As shown, a portion of the antireflection film 9 is removed using photolithography or etching to form the second window 1D, exposing the second electrode 8 at the location where the second window 1D is formed. The photolithography process includes: covering the surface with photoresist, patterning the photoresist with light to expose the antireflection film 9 above the second electrode 8, etching away the antireflection film 9 above the second electrode 8 to form the second window 1D, and then removing the remaining photoresist. The etching process includes: covering the surface of the antireflection film 9 with a mask, while the antireflection film 9 above the second electrode 8 is not covered with a mask, etching away the antireflection film 9 above the second electrode 8 to form the second window 1D, and then removing the remaining mask. The second electrode 8 being exposed at the second window 1D facilitates electrical connection between the second electrode 8 and external components, thereby reducing the difficulty of electrical connection for the photodetector chip.

[0186] In this embodiment, the first electrode 7 and the second electrode 8 are prepared first, and then the antireflection film 9 is prepared so that the antireflection film 9 covers the surface of the second electrode 8 and the second doped layer 6. Then the antireflection film 9 on the surface of the second electrode 8 is removed so that the second electrode 8 is exposed. This preparation method can improve the coverage of the antireflection film 9 on the surface of the second doped layer 6 and also reduce the impact of the antireflection film 9 on the difficulty of preparing the second electrode 8.

[0187] Figures 33 to 35This is a schematic diagram of the fabrication process of the antireflection film 9, the first electrode 7, and the second electrode 8 in another embodiment. Specifically, the fabrication method of the photodetector chip includes:

[0188] like Figure 33 As shown, in a plane perpendicular to the thickness of the substrate 1, on the side of the epitaxial stop layer 2 away from the micro / nano structure 3, the epitaxial stop layer 2 is etched by photolithography or etching process to form a first window 1C, and the third doped layer 1A of the substrate 1 is exposed at the first window 1C.

[0189] like Figure 33 As shown, an antireflection film 9 is deposited on the surface of the second doped layer 6. The antireflection film 9 covers the entire surface of the second doped layer 6, and the antireflection film 9 can also cover the surface of the epitaxial stop layer 2 to simplify the preparation of the antireflection film 9.

[0190] like Figure 34 As shown, a portion of the antireflection film 9 is removed by photolithography to form the second window 1D, and the second doped layer 6 is exposed at the second window 1D;

[0191] like Figure 35 As shown, at the first window 1C and the second window 1D, an annular first electrode 7 and a second electrode 8 are fabricated by photolithography, electron beam evaporation, magnetron sputtering or metal stripping processes.

[0192] In this embodiment, the antireflection film 9 is prepared first, followed by the preparation of the first electrode 7 and the second electrode 8. This reduces the risk of damage to the first electrode 7 and the second electrode 8 during the preparation of the antireflection film 9, thereby improving the processing yield of the photoelectric detection chip.

[0193] When the photodetector chip also has a reflective layer 14, in one embodiment, the method for fabricating the photodetector chip includes:

[0194] like Figure 36 As shown, a reflective film is directly deposited on the side of the second surface 12 of the substrate 1 by physical vapor deposition or chemical vapor deposition.

[0195] In this embodiment, a reflective layer 14 for reflecting light is provided on the back side of the substrate 1. This layer reflects light that has penetrated the substrate 1 back into the intrinsic absorption layer 5, thereby improving the light absorption efficiency of the intrinsic absorption layer 5. This facilitates the generation of more electrons and holes, improving the responsivity of the photodetector chip and ultimately enhancing the performance of the photodetector. Depositing the reflective film directly on the second surface 12 simplifies the fabrication process of the photodetector chip, shortening the fabrication cycle and reducing the fabrication cost.

[0196] Before depositing the reflective film, the substrate 1 can be thinned by temporary bonding or back-side thinning process to reduce the light loss of the substrate 1.

[0197] In another embodiment, the method for fabricating the photodetector chip includes:

[0198] like Figure 37 As shown, a recess 13 is formed on the second surface 12 of the substrate 1 by double-sided photolithography or etching process;

[0199] like Figure 38 As shown, a reflective film is deposited on the surface of the recess 13, or on the recess 13 and the second surface 12.

[0200] In this embodiment, the reflective film is disposed in the recess 13, which reduces the distance between the reflective film and the intrinsic absorption layer 5, thereby reducing the absorption loss of light by the substrate 1.

[0201] In addition, the substrate can be thinned through temporary bonding and back-side thinning processes to further reduce the loss of light by the substrate. Temporary bonding refers to first bonding and fixing the substrate to the bonding carrier, which provides mechanical support for the substrate. Then, the substrate on the bonding carrier is thinned and polished. Finally, the substrate is separated from the bonding carrier.

[0202] The substrate thinning process can be performed before the fabrication of the micro / nano structure, after the fabrication of the micro / nano structure, before the fabrication of the first doped layer, after the fabrication of the second doped layer, before the fabrication of the reflective and antireflective films, or after the fabrication of the reflective and antireflective films. In this application embodiment, the order of the substrate thinning process is not particularly limited. Preferably, the substrate thinning process is performed before the fabrication of the recessed portion to reduce the depth of the recessed portion to be processed, thereby reducing the difficulty of fabricating the recessed portion and the antireflective film.

[0203] In summary, the periodic array arrangement of the micro / nano structure 3 in the photodetector chip provided in this application enables the micro / nano structure 3 to effectively confine the light field and control the amplitude, phase, polarization, and other characteristics of the light beam within a range much smaller than the wavelength scale. It has a powerful light field manipulation capability and can adjust the propagation direction of at least a portion of the light signal, thereby confining at least a portion of the light signal within the intrinsic absorption layer 5. This prolongs the transmission time and path of the light signal within the intrinsic absorption layer 5, thereby improving the absorption efficiency of the intrinsic absorption layer 5 for the light signal, so as to generate more electrons and holes, thus improving the responsivity of the photodetector chip. At the same time, since the micro / nano structure 3 penetrates the first doped layer 4, the intrinsic absorption layer 5, and the second doped layer 6 in the first direction Y, the electrons and holes are evenly distributed and move in the same direction, thus making the electric field direction consistent. This shortens the time for electrons and holes to cross the intrinsic absorption layer 5, thereby increasing the bandwidth of the photodetector chip and improving the working performance of the photodetector.

[0204] For the same or similar parts among the various embodiments in this specification, please refer to each other.

Claims

1. A photoelectric detection chip, characterized in that, The photoelectric detection chip includes: Substrate; A first doped layer, a second doped layer, and an intrinsic absorption layer are stacked on the surface of the substrate along a first direction, with the intrinsic absorption layer located between the first doped layer and the second doped layer. A micro / nano structure, wherein the micro / nano structure extends along the thickness direction of the substrate and penetrates the first doped layer, the second doped layer and the intrinsic absorption layer, and multiple micro / nano structures are arranged in an array in a direction perpendicular to the thickness direction of the substrate; The first electrode is electrically connected to the first doped layer; The second electrode is electrically connected to the second doped layer.

2. The photoelectric detection chip according to claim 1, characterized in that, The number of micro-nano structures is multiple. In a plane perpendicular to the thickness direction of the substrate, the lines connecting adjacent micro-nano structures form a regular N-gon, where N≥3.

3. The photoelectric detection chip according to claim 1 or 2, characterized in that, The distance between two adjacent micro / nano structures is 400 nm to 2000 nm; Within the space occupied by the first doped layer, the second doped layer, the intrinsic absorption layer, and the micro / nano structure, the duty cycle K of the micro / nano structure satisfies: 0.4 ≤ K ≤ 0.

8.

4. The photoelectric detection chip according to any one of claims 1 to 3, characterized in that, In a plane perpendicular to the thickness direction of the substrate, the cross-sectional shape of the micro / nano structure is circular, triangular, quadrilateral, pentagonal, or hexagonal.

5. The photoelectric detection chip according to any one of claims 1 to 4, characterized in that, The photoelectric detection chip further includes a first light confinement structure, which is located outside the intrinsic absorption layer in a plane perpendicular to the first direction. The first light confinement structure is used to reflect at least a portion of the optical signal back into the intrinsic absorption layer.

6. The photoelectric detection chip according to claim 5, characterized in that, The photoelectric detection chip further includes an epitaxial stop layer, which surrounds the first doped layer, the second doped layer and the intrinsic absorption layer. In a plane perpendicular to the first direction, the first light-confining structure is located outside the epitaxial stop layer.

7. The photoelectric detection chip according to claim 5 or 6, characterized in that, The photoelectric detection chip further includes an epitaxial stop layer, which surrounds the first doped layer, the second doped layer and the intrinsic absorption layer. The refractive index of the epitaxial stop layer is less than that of the intrinsic absorption layer, and the interface between the epitaxial stop layer and the intrinsic absorption layer constitutes part of the first light confinement structure; And / or, the refractive index of the micro / nano structure is less than the refractive index of the intrinsic absorption layer, and the interface between the micro / nano structure and the intrinsic absorption layer constitutes part of the first light confinement structure.

8. The photoelectric detection chip according to any one of claims 1 to 7, characterized in that, The photoelectric detection chip further includes a second light confinement structure, which is distributed along the first direction with the intrinsic absorption layer. The second light confinement structure is used to reflect at least a portion of the optical signal back into the intrinsic absorption layer.

9. The photoelectric detection chip according to claim 8, characterized in that, The refractive index of the first doped layer is less than that of the intrinsic absorption layer, and the interface between the first doped layer and the intrinsic absorption layer constitutes part of the second light confinement structure. And / or, the refractive index of the second doped layer is less than the refractive index of the intrinsic absorption layer, and the interface between the second doped layer and the intrinsic absorption layer constitutes part of the second light confinement structure.

10. The photoelectric detection chip according to claim 8 or 9, characterized in that, The photodetector chip further includes a reflective layer. Along the thickness direction of the substrate, the reflective layer is located on the side of the substrate opposite to the first doped layer. The reflective layer is used to reflect light that penetrates the substrate back into the intrinsic absorption layer. The reflective layer constitutes part of the second light confinement structure.

11. The photoelectric detection chip according to claim 10, characterized in that, Along the thickness direction of the substrate, a recess is provided on the side of the substrate opposite to the first doped layer, and at least a portion of the reflective layer is located within the recess.

12. The photoelectric detection chip according to any one of claims 1 to 11, characterized in that, The photodetector further includes an antireflection film, which is located on the side of the second doped layer away from the intrinsic absorption layer along the thickness direction of the substrate.

13. A photodetector, characterized in that, The photodetector includes: Mounting substrate; The photoelectric detection chip according to any one of claims 1 to 12, wherein the photoelectric detection chip is mounted on the mounting substrate.

14. An electronic device, characterized in that, The electronic device includes: case; A photodetector, wherein the photodetector is installed within the housing, and the photodetector comprises the photodetector chip according to any one of claims 1 to 12.

15. A method for fabricating a photoelectric detection chip, characterized in that, The method for fabricating the photoelectric detector chip includes: A substrate is taken, the substrate including a first surface and a second surface disposed opposite to each other along its own thickness direction, a micro-nano structure is fabricated on the first surface, and a plurality of the micro-nano structures are arranged in an array; A first doped layer is prepared in a plane perpendicular to the thickness direction of the substrate, on the outside of the micro / nanostructure and in the gap between adjacent micro / nanostructures. An intrinsic absorption layer is prepared on the surface of the first doped layer; A second doped layer is prepared on the surface of the intrinsic absorption layer; A first electrode and a second electrode are prepared such that the first electrode is electrically connected to the first doped layer and the second electrode is electrically connected to the second doped layer.

16. The method for fabricating a photoelectric detection chip according to claim 15, characterized in that, The step of fabricating the first doped layer on the outside of the micro / nanostructure and in the gap between adjacent micro / nanostructures includes: The first doped layer is grown on the outside of the micro / nano structure and in the gap between adjacent micro / nano structures by selective epitaxial growth, and the first doped layer covers the substrate. The step of preparing the intrinsic absorption layer on the surface of the first doped layer includes: The intrinsic absorption layer is grown on the surface of the first doped layer by selective epitaxial growth. The step of preparing the second doped layer on the surface of the intrinsic absorption layer includes: The second doped layer is grown on the surface of the intrinsic absorption layer by selective epitaxial growth.

17. The method for fabricating a photoelectric detection chip according to claim 16, characterized in that, The steps for fabricating the micro / nano structures on the substrate include: A third doped layer is prepared on the surface of the substrate; An oxide layer was grown on the third doped layer by plasma chemical vapor deposition. The oxide layer is subjected to photolithography or inductively coupled plasma etching to form an epitaxial stop layer and the micro / nano structure. In a plane perpendicular to the thickness direction of the substrate, the epitaxial stop layer is located outside the first doped layer, the intrinsic absorption layer, the second doped layer, and the micro / nano structure.

18. The method for fabricating a photoelectric detection chip according to claim 17, characterized in that, The steps for preparing the first electrode and the second electrode include: In a plane perpendicular to the thickness of the substrate, on the side of the epitaxial stop layer opposite to the micro / nano structure, the epitaxial stop layer is etched by photolithography or etching to form a first window, and the substrate is exposed at the first window; The first electrode and the second electrode are fabricated at the first window and on the surface of the second doped layer by photolithography, electron beam evaporation, magnetron sputtering or metal lift-off processes. After the steps of preparing the first electrode and the second electrode, the method for preparing the photodetector chip includes: An antireflection film is deposited on the surfaces of the second electrode and the second doped layer; A portion of the antireflective film is removed by photolithography or etching to form a second window, where the second electrode is exposed at the location where the second window is formed.

19. The method for fabricating a photoelectric detection chip according to claim 17, characterized in that, Prior to the steps of fabricating the first electrode and the second electrode, the method for fabricating the photodetector chip includes: In a plane perpendicular to the thickness of the substrate, on the side of the epitaxial stop layer opposite to the micro / nano structure, the epitaxial stop layer is etched by photolithography or etching to form a first window, and the substrate is exposed at the first window; An antireflection film is deposited on the surface of the second doped layer; A portion of the antireflection film is removed using a photolithography process to form a second window, where the second doped layer is exposed. The first electrode and the second electrode are fabricated at the first window and on the surface of the second doped layer by photolithography, electron beam evaporation, magnetron sputtering or metal lift-off processes.

20. The method for preparing a photoelectric detection chip according to any one of claims 15 to 19, characterized in that, The method for fabricating the photoelectric detector chip includes: A reflective film is deposited on the side of the substrate containing the second surface using either physical vapor deposition or chemical vapor deposition.

21. The method for fabricating a photoelectric detection chip according to claim 20, characterized in that, Prior to the step of depositing the reflective film on the second surface of the substrate, the method for fabricating the photodetector chip includes: A recess is formed on the second surface of the substrate using a double-sided photolithography or etching process; The step of depositing the reflective film on the side where the second surface of the substrate is located includes: The reflective film is deposited on the surface of the recess, or on the recess and the second surface.

Images