Retired battery performance test method and system

Abstract

The invention discloses a decommissioned battery performance test method and system, and relates to the technical field of decommissioned battery testing, and the method comprises the steps: implementing four-wire system access, carrying out sampling link stability verification, constructing an identification frequency point set, and intercepting a pilot frequency candidate set; selecting a discrete multi-frequency composite current block as an excitation system, obtaining a positive block terminal voltage and a positive block terminal current, executing a polarity flipping instruction, collecting a negative block terminal voltage and a negative block terminal current, and sealing data of the same test batch; generating linearized current and voltage signals, performing single-frequency-point discrete projection on the linearized current and voltage signals, acquiring pilot frequency candidate impedance, screening pilot frequency pairs, and determining equivalent time delay and phase bias; single-frequency-point discrete projection is carried out on the linearized current and voltage signals, an uncompensated impedance set is obtained, equivalent time delay and phase bias are combined, a compensated impedance set is obtained, an impedance amplitude-phase characteristic set is generated, amplitude-phase consistency and test repeatability are improved, and screening reliability and engineering applicability are improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of retired battery testing, and in particular to a retired battery performance testing method and system. BACKGROUND

[0002] In the process of cascade utilization and recycling grading of retired batteries, performance characterization is needed to obtain key indicators such as capacity retention rate, internal resistance and frequency domain response. Conventional testing usually uses constant current charging and discharging or pulse current method to measure direct current resistance, applies alternating current excitation at several frequency points, collects terminal voltage and terminal current, calculates complex impedance at each frequency point, and obtains impedance amplitude and phase characteristic curves varying with frequency, which are used to evaluate battery health status and perform consistency screening.

[0003] However, in multi-frequency impedance testing, if the equivalent time delay and phase bias of the excitation and sampling link are not effectively calibrated, the phase may be shifted overall with frequency, and the impedance amplitude and phase characteristics are difficult to accurately align. In addition, the wire resistance, contact resistance and bias related to polarity constitute an additive error term of the terminal voltage measurement, which is superimposed into the terminal voltage measurement value, weakening the consistency and accuracy of the impedance amplitude value characteristics. SUMMARY

[0004] In view of the above existing problems, the present application is proposed.

[0005] Therefore, the present application provides a retired battery performance testing method to solve the problems of phase shift caused by sampling link equivalent time delay and phase bias and measurement interference caused by terminal voltage measurement additive error in the prior art.

[0006] To solve the above technical problems, the present application provides the following technical solutions:

[0007] In a first aspect, the present application provides a retired battery performance testing method, which comprises implementing four-wire access, establishing a synchronous sampling mechanism and recording the sampling frequency, verifying the stability of the sampling link, constructing an identification frequency point set and intercepting a pilot candidate set;

[0008] According to the identification frequency point set and the pilot candidate set, a discrete multi-frequency composite current block is selected as the excitation system, a forward discrete multi-frequency composite current block is output by the excitation source, the positive block terminal voltage and the positive block terminal current are obtained, a polarity inversion instruction is executed, the negative block terminal voltage and the negative block terminal current are collected, and the same test batch data is stored; according to the same test batch data, a linearized current voltage signal is generated, a single frequency point discrete projection is performed on the linearized current voltage signal, a pilot candidate impedance is obtained, a pilot pair is selected through a phase flatness index, an equivalent time delay and a phase bias are determined; according to the identification frequency point set, a single frequency point discrete projection is performed on the linearized current voltage signal, an uncompensated impedance set is obtained, a compensated impedance set is obtained in combination with the equivalent time delay and the phase bias, and an impedance amplitude and phase characteristic set is generated.

[0009] As a preferred scheme of the performance test method of the retired battery, the sampling link stability verification comprises cleaning the positive and negative terminals of the retired battery, implementing four-wire access, establishing a synchronous sampling mechanism, setting a sampling frequency, maintaining zero-current excitation, synchronously collecting and generating terminal current and voltage sequences, and verifying the stability of the sampling link.

[0010] As a preferred scheme of the performance test method of the retired battery, the construction of the identification frequency point set and the interception of the pilot candidate set comprise determining the available frequency band boundary according to the sampling frequency, generating a frequency point, obtaining an identification frequency point set, and intercepting a pilot candidate set.

[0011] As a preferred scheme of the performance test method of the retired battery, the obtaining of the positive block terminal voltage and the positive block terminal current comprises selecting a discrete multi-frequency composite current block as an excitation system according to the identification frequency point set and the pilot candidate set, setting the current amplitude of the mirror discrete multi-frequency composite current block pair, generating a fixed excitation configuration; according to the fixed excitation configuration, the positive discrete multi-frequency composite current block is excited by the source, the terminal voltage and the terminal current are synchronously collected, the positive block start and end markers are recorded, and the positive block terminal voltage and the positive block terminal current are cut and saved.

[0012] As a preferred scheme of the performance test method of the retired battery, the storage of the same test batch data comprises executing a polarity reversal instruction, the negative discrete multi-frequency composite current block is excited by the source, the terminal voltage and the terminal current are synchronously collected, the negative block start and end markers are recorded, and the negative block terminal voltage and the negative block terminal current are cut and saved; the positive block terminal voltage, the positive block terminal current, the negative block terminal voltage and the negative block terminal current are bound to form a same test batch data package.

[0013] As a preferred scheme of the performance test method of the retired battery, the obtaining of the pilot candidate impedance comprises aligning the sampling time sequence according to the same test batch data, performing a difference and normalization operation to obtain a linearized current voltage signal; according to the linearized current voltage signal, a quadrature reference sequence is generated in combination with the pilot candidate set, a single frequency point discrete projection is performed, and the pilot candidate impedance is calculated.

[0014] As a preferred scheme of the performance test method of the retired battery, the determination of the equivalent time delay and the phase bias comprises enumerating the frequency point pairs in the pilot candidate set, calculating the candidate equivalent time delay, compensating the phase of the pilot candidate impedance by the candidate equivalent time delay, and calculating the phase flatness index; the frequency point pair with the smallest phase flatness index is screened, the pilot pair and the equivalent time delay are determined, and the phase bias is calculated.

[0015] As a preferred scheme of the performance test method of the retired battery, the obtaining of the uncompensated impedance set comprises: generating an orthogonal reference sequence for each frequency point according to the set of identification frequency points, performing single-frequency-point discrete projection on the linearized current-voltage signal, and obtaining the voltage and current complex components of each frequency point; and the uncompensated impedance values are calculated according to the voltage and current complex components of each frequency point, and the uncompensated impedance set is obtained.

[0016] As a preferred scheme of the performance test method of the retired battery, the generating of the impedance amplitude and phase feature set comprises: constructing a phase compensation factor through equivalent time delay and phase bias, combining the uncompensated impedance set to obtain a compensated impedance set, and calculating the impedance modulus and impedance phase from the compensated impedance set point by point to obtain the impedance amplitude and phase feature set.

[0017] In a second aspect, the present application provides a performance test system for retired batteries, comprising: an access sampling module for implementing four-wire access, establishing a synchronous sampling mechanism and recording a sampling frequency, verifying the stability of a sampling link, constructing a set of identification frequency points and intercepting a pilot candidate set; a mirror excitation module for selecting a discrete multi-frequency composite current block as an excitation system according to the set of identification frequency points and the pilot candidate set, outputting a forward discrete multi-frequency composite current block from a source, obtaining a positive block end voltage and a positive block end current, executing a polarity inversion instruction, collecting a negative block end voltage and a negative block end current, and sealing the same test batch data; a calibration extraction module for generating a linearized current-voltage signal according to the same test batch data, performing single-frequency-point discrete projection on the linearized current-voltage signal, obtaining pilot candidate impedance, selecting pilot pairs through a phase flatness index, and determining equivalent time delay and phase bias; and a compensation output module for performing single-frequency-point discrete projection on the linearized current-voltage signal according to the set of identification frequency points, obtaining an uncompensated impedance set, combining the equivalent time delay and the phase bias to obtain a compensated impedance set, and generating an impedance amplitude and phase feature set.

[0018] The present application has the following advantages: through mirror acquisition and linearization processing, the consistency and accuracy of the impedance amplitude and phase features are enhanced; through selection of pilot pairs according to the phase flatness index, determination of equivalent time delay and phase bias, conversion of phase drift into calculable, verifiable and traceable correction parameters, improvement of amplitude and phase consistency and test repeatability; full-frequency phase compensation is performed on the uncompensated impedance set to form an impedance amplitude and phase feature set, realizing consistent representation across frequency points, which can be directly used for retired battery batch grading, state of health evaluation and data archiving, and improving screening reliability and engineering applicability. BRIEF DESCRIPTION OF DRAWINGS

[0019] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 A flowchart for the performance testing method of retired batteries.

[0021] Figure 2 A schematic diagram of a performance testing system for retired batteries.

[0022] Figure 3 This is a flowchart for calculating the phase offset.

[0023] Figure 4 A flowchart for generating the impedance amplitude-phase characteristic set.

[0024] Figure 5 This is a comparison curve showing the change of impedance phase with frequency.

[0025] Figure 6 This is a box plot of the full-frequency phase root mean square error statistics. Detailed Implementation

[0026] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0027] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.

[0028] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in different places in this specification does not necessarily refer to the same embodiment, nor is it a single or selective embodiment that is mutually exclusive with other embodiments.

[0029] Reference Figures 1-6 As one embodiment of the present invention, this embodiment provides a method for testing the performance of retired batteries, including the following steps:

[0030] S1. Implement four-wire access, establish a synchronous sampling mechanism and record the sampling frequency, verify the stability of the sampling link, construct an identification frequency point set and extract a pilot candidate set.

[0031] Clean the positive and negative terminals of the retired battery, implement a four-wire connection, establish a synchronous sampling mechanism, set the sampling frequency, maintain zero current excitation, synchronously collect and generate terminal current sequence and terminal voltage sequence, and verify the stability of the sampling link.

[0032] The positive and negative terminals of the retired battery to be tested are surface treated. Specifically, cleaning tools are used to remove the oxide layer, stains and loose attachments on the terminal surface, exposing the metal substrate and ensuring that the contact surface is flat. After cleaning, four-wire connection is performed immediately to avoid the terminals from oxidizing again and causing increased randomness in contact.

[0033] Install the fixture or connector and mechanically fix it, ensuring that the force direction is consistent and the tightness is stable during fixing, so that the fixture does not loosen or slightly shift throughout the entire test cycle.

[0034] A four-wire connection is implemented. Specifically, two wires carrying excitation current are connected to the positive and negative terminals of the retired battery, respectively, to form a current loop; two wires for collecting voltage are connected to the same pair of positive and negative terminals, with the connection point of the voltage wire close to the metal body of the terminal and adjacent to the connection point of the current wire. The potential collected by the voltage wire is closer to the true potential of the retired battery terminal.

[0035] Keep the excitation current output at zero, read the instantaneous reading of the terminal voltage acquisition channel and check the polarity to confirm that the positive terminal voltage line corresponds to the high potential end and the negative terminal voltage line corresponds to the low potential end; read the instantaneous reading of the current channel and confirm that it is in the zero output state.

[0036] A synchronous sampling mechanism is established. Specifically, the sampling frequency is set in the acquisition device and written into the configuration record of this test as a unified time reference. The synchronous sampling mode is enabled, and the terminal current acquisition channel and the terminal voltage acquisition channel are driven by the same sampling clock and start sampling simultaneously from the same trigger edge. The two channels share the same sampling trigger signal, and the sampling point number is incremented simultaneously in both channels to avoid time base drift between channels.

[0037] After enabling sampling, keep the excitation current output at zero and continuously sample for a period of time to confirm the stability of the sampling link. Observe whether the output of the terminal voltage acquisition channel is continuous, without sudden jumps, and whether the sign direction and polarity are consistent. Observe whether the terminal current acquisition channel keeps the output near zero and without abnormal fluctuations.

[0038] After the sampling link is stabilized, the current data obtained by synchronous sampling is saved as a terminal current sequence according to the sampling point number, and the voltage data obtained by synchronous sampling is saved as a terminal voltage sequence according to the same sampling point number. The terminal current sequence, terminal voltage sequence and sampling frequency are bound and stored in the same test batch.

[0039] Furthermore, based on the sampling frequency, the available frequency band boundary is determined, frequency points are generated, the set of identification frequency points is obtained, and the pilot candidate set is extracted.

[0040] Construct a set of identification frequency points. Specifically, based on the sampling frequency, determine the available frequency band boundary of the set of identification frequency points to ensure that all constructed frequency points are within the resolvable frequency band, thus ensuring that stable frequency domain information can be extracted from the terminal current sequence and terminal voltage sequence at the frequency points.

[0041] Within the available frequency band, an identification frequency point set is generated at equal intervals on a logarithmic coordinate system. Specifically, the frequency range within the frequency band is divided into equally spaced points on a logarithmic coordinate system, and each point is mapped to a frequency point, forming an identification frequency point set covering relatively high and relatively low frequencies. The identification frequency point set is written into the test configuration record and stored in association with the sampling frequency.

[0042] It should be noted that the dynamic response of retired batteries has multiple time constants. Logarithmically spaced frequency points are more conducive to taking into account both high-frequency and low-frequency characteristics within a limited test duration. The identified frequency point set is written into the configuration record and used as the fixed frequency basis for applying mirrored discrete multi-frequency composite current block pairs in the future. It will not be changed in the same batch of tests.

[0043] Furthermore, a pilot candidate set is extracted from the identified frequency point set. Specifically, the frequency points in the identified frequency point set are sorted in ascending order of frequency, and the largest frequency points in the identified frequency point set are selected to form a high-frequency end frequency point segment. Several frequency points are selected from the high-frequency end frequency point segment to form a pilot candidate set. The pilot candidate set must contain two or more distinct frequency points.

[0044] After the pilot candidate set is extracted, the pilot candidate set and the identified frequency point set are written into the test configuration record and stored together with the sampling frequency, terminal current sequence and terminal voltage sequence to form a closed-loop record of "data, time base and frequency point system".

[0045] S2. Based on the identified frequency point set and pilot candidate set, select the discrete multi-frequency composite current block as the excitation system. The excitation source outputs a positive discrete multi-frequency composite current block to obtain the positive block terminal voltage and positive block terminal current. Execute the polarity reversal command to collect the negative block terminal voltage and negative block terminal current, and seal the data of the same test batch.

[0046] Based on the identified frequency point set and pilot candidate set, a discrete multi-frequency composite current block is selected as the excitation system. The current amplitude of the mirror discrete multi-frequency composite current block pair is set to generate a fixed excitation configuration. According to the fixed excitation configuration, the excitation source outputs a positive discrete multi-frequency composite current block, synchronously collects the terminal voltage and terminal current, records the positive block start and end marks, and segments and saves the positive block terminal voltage and positive block terminal current.

[0047] Before applying the stimulus, the set of identification frequency points and the set of pilot candidates are read from the configuration record of this test, and the relationship between the two is checked to confirm that the set of pilot candidates belongs to a subset of the set of identification frequency points.

[0048] The excitation mechanism is defined as a discrete multi-frequency composite current block, in which the excitation source simultaneously contains multiple frequency components corresponding to the identification frequency point set within the same current command waveform, and the frequency components corresponding to the pilot candidate set are embedded into the current command waveform.

[0049] It should be noted that the positive discrete multi-frequency composite current block is the output segment of the discrete multi-frequency composite current block when the current direction is positive, and the negative discrete multi-frequency composite current block is the output segment after performing an overall polarity reversal on the same discrete multi-frequency composite current block; the amplitudes of the two are equal and opposite in sign at any time, and the two together constitute a mirrored discrete multi-frequency composite current block pair. For the sake of simplicity, the positive discrete multi-frequency composite current block is simply referred to as the positive block, and the negative discrete multi-frequency composite current block is simply referred to as the negative block.

[0050] In the configuration interface of the excitation source, the set of identified frequency points is written into a frequency list. The excitation source generates a current command waveform according to the frequency list and binds the frequency list with the batch identifier of this test.

[0051] Furthermore, the current amplitude of the mirror discrete multi-frequency composite current block pair is set. Specifically, the current capability of the excitation source is read, and the battery current capability allowed by the retired battery under the current test procedure is read. The current amplitude of the mirror discrete multi-frequency composite current block pair is set to the minimum of the above two capabilities, and the current amplitude is written into the test configuration record to ensure that the positive discrete multi-frequency composite current block and the negative discrete multi-frequency composite current block output the same current amplitude in this test.

[0052] The mirror relationship is solidified in the excitation source control logic. Specifically, the negative discrete multi-frequency composite current block is obtained by taking the opposite polarity of the positive discrete multi-frequency composite current block, and the values ​​are equal and opposite at any time.

[0053] Furthermore, to maintain the continuous operation of the synchronous sampling mechanism, a start output command is issued to the excitation source, causing the excitation source to generate a discrete multi-frequency composite current command waveform according to the frequency components corresponding to the identified frequency point set, and output a positive discrete multi-frequency composite current block according to the current amplitude.

[0054] It should be noted that, in order to ensure that the positive and negative block data can be directly aligned under the same time base, sampling is not stopped, not reset, and the sampling frequency is not changed during the entire positive block output period.

[0055] Furthermore, at the instant the positive discrete multi-frequency composite current block begins to output, the positive block start mark is recorded; at the instant the positive block output ends, the positive block end mark is recorded.

[0056] The positive block data stream is segmented from the continuous sampling data stream according to the positive block start mark and positive block end mark. The terminal current corresponding to the positive block data segment is saved as the positive block terminal current, and the terminal voltage corresponding to the positive block data segment is saved as the positive block terminal voltage.

[0057] Execute the polarity reversal instruction, the excitation source outputs a negative discrete multi-frequency composite current block, synchronously collects the terminal voltage and terminal current, records the start and end marks of the negative block, segments and saves the terminal voltage and terminal current of the negative block; bind the terminal voltage, positive terminal current, negative terminal voltage and negative terminal current of the positive block, and seal them to form the same test batch data package.

[0058] Furthermore, a polarity reversal command is issued to the excitation source, which performs an overall polarity reversal on the same discrete multi-frequency composite current command waveform and outputs a negative discrete multi-frequency composite current block.

[0059] It should be noted that during the polarity reversal process, the frequency components corresponding to the identification frequency point set are not changed, the current amplitude is not changed, only the current direction is changed, ensuring that the negative discrete multi-frequency composite current block is a strict mirror image of the positive discrete multi-frequency composite current block; consistent with the positive block acquisition requirements, the negative block output maintains synchronous sampling and continuous operation before and after, without stopping or resetting.

[0060] Furthermore, the moment when the negative discrete multi-frequency composite current block starts outputting is recorded as the negative block start mark, and the moment when the negative discrete multi-frequency composite current block ends outputting is recorded as the negative block end mark. According to the negative block start mark and the negative block end mark, the negative block data segment is segmented from the continuous sampling data stream. The terminal current corresponding to the negative block data segment is saved as the negative block terminal current, and the terminal voltage corresponding to the negative block data segment is saved as the negative block terminal voltage.

[0061] After all positive block current, positive block voltage, negative block current, and negative block voltage have been collected and segmented, the four data objects are bound to the test batch identifier and sealed to form the same test batch data package.

[0062] Furthermore, the current amplitude of the identified frequency point set, pilot candidate set, and mirror discrete multi-frequency composite current block pair is bound and sealed with the same test batch identifier, so that the frequency point system and amplitude of the batch data can be traced during the review, avoiding calibration failure caused by cross-batch or cross-configuration mixing.

[0063] Furthermore, the positive block start marker, positive block end marker, negative block start marker, and negative block end marker are bound and sealed with the same test batch identifier.

[0064] S3. Based on the data from the same test batch, generate linearized current and voltage signals, perform single-frequency discrete projection on the linearized current and voltage signals, obtain pilot candidate impedances, screen pilot pairs through phase flatness index, and determine equivalent time delay and phase offset.

[0065] Based on the same batch of test data, the sampling timing is aligned, differential and normalization operations are performed to obtain linearized current and voltage signals; based on the linearized current and voltage signals, combined with the pilot candidate set, an orthogonal reference sequence is generated, single-frequency point discrete projection is performed, and pilot candidate impedances are calculated.

[0066] Furthermore, the positive block voltage, negative block voltage, positive block current, and negative block current are read from the same test batch data, and the positive block start mark, positive block end mark, negative block start mark, and negative block end mark corresponding to the batch are also read.

[0067] The continuous sampled data stream is segmented according to the start and end marks, so that the positive block voltage and positive block current come from the same segment interval, and the negative block voltage and negative block current come from another segment interval, and both segments come from the same test batch.

[0068] It should be noted that the sampling point numbers of the positive and negative blocks are retained in the same numbering system, the positive and negative data have clear and verifiable boundaries, and can be aligned and linearized current and voltage signals generated under the same numbering system.

[0069] It should be noted that the linearized current-voltage signal includes both the linearized terminal voltage and the linearized terminal current.

[0070] Furthermore, the positive and negative block voltages are aligned point by point according to the sampling point number, and the positive and negative block currents are aligned point by point according to the sampling point number, with the same sampling point number corresponding to the data point at the same phase position.

[0071] According to the fixed differential rule, a linearized terminal voltage is generated. Specifically, for each sampling point number, the positive block terminal voltage is subtracted from the negative block terminal voltage and normalized to obtain the linearized terminal voltage corresponding to the sampling point. According to the fixed differential rule, a linearized terminal current is generated. Specifically, for each sampling point number, the positive block terminal current is subtracted from the negative block terminal current and normalized to obtain the linearized terminal current corresponding to the sampling point.

[0072] Specifically, the linearized terminal voltage and linearized terminal current are expressed as follows:

[0073] ;

[0074] ;

[0075] in, Represents the linearized terminal voltage. Represents the linearized terminal current. Indicates the positive terminal voltage. Indicates the voltage at the negative block terminal. Indicates the positive terminal current. Indicates the current at the negative block terminal. Represents a time variable. Indicates linearization, Indicates a positive block. This indicates a negative block.

[0076] It should be noted that since the positive and negative blocks are mirror excitations, the current directions are opposite and the amplitudes are equal. Differentiating the two sampled values ​​can cancel the superposition bias that is independent of polarity. The amplitude of the response term related to the current direction is doubled. In order to make the linearized signal consistent with the equivalent response of unidirectional excitation in terms of amplitude, the difference result is divided by 2 to restore the amplitude.

[0077] The pilot candidate set was read from the test configuration record to confirm that each frequency point in the pilot candidate set is a frequency point included in this excitation.

[0078] Furthermore, according to the frequency points of the pilot candidate set, the reference sequences required for projection are generated one by one. Specifically, for each candidate pilot frequency point, a cosine reference sequence and a sine reference sequence corresponding to the frequency point are generated according to the sampling point number. The reference sequences correspond one-to-one with the linearized terminal voltage and the linearized terminal current in terms of the sampling point number.

[0079] For each candidate pilot frequency point in the pilot candidate set, a projection operation is performed on the linearized terminal voltage. Specifically, the linearized terminal voltage is multiplied by the cosine reference sequence of the candidate pilot frequency point to obtain the in-phase component, and the linearized terminal voltage is multiplied by the sine reference sequence of the candidate pilot frequency point to obtain the quadrature component. The in-phase component and the quadrature component are combined to obtain the complex component of the linearized terminal voltage at the candidate pilot frequency point.

[0080] In the same manner, a projection operation is performed on the linearized terminal current to obtain the complex components of the linearized terminal current at the candidate pilot frequency points.

[0081] At the candidate pilot frequency point, calculate the ratio of the complex component of the linearized terminal voltage to the complex component of the linearized terminal current to obtain the pilot candidate impedance of the candidate pilot frequency point. Using the same method, calculate the pilot candidate impedance of all candidate pilot frequency points in the pilot candidate set to obtain the correspondence between the candidate pilot frequency points and the pilot candidate impedance.

[0082] Enumerate frequency pairs in the pilot candidate set, calculate the candidate equivalent time delay, compensate the phase of the pilot candidate impedance with the candidate equivalent time delay, and calculate the phase flatness index; select the frequency pair with the smallest phase flatness index, determine the pilot pair and equivalent time delay, and calculate the phase offset.

[0083] Furthermore, within the pilot candidate set, any two different candidate pilot frequencies are enumerated as a frequency pair. For each frequency pair, the two corresponding pilot candidate impedances are read, and the phase difference and frequency difference of the two pilot candidate impedances are calculated. The phase difference is normalized according to the frequency difference to obtain the candidate equivalent time delay.

[0084] It should be noted that the pilot candidate impedance phase is calculated by the phase operator. The phase operator output phase range is limited to the negative half-cycle phase to the positive half-cycle phase. After the phase difference of the pilot candidate impedance corresponding to the frequency point is calculated, the pilot candidate impedance phase difference is subjected to winding correction processing. Specifically, when the pilot candidate impedance phase difference is greater than half-cycle phase, the pilot candidate impedance phase difference is subtracted by one full cycle phase; when the pilot candidate impedance phase difference is less than the negative half-cycle phase, the pilot candidate impedance phase difference is added by one full cycle phase; when the pilot candidate impedance phase difference falls within the range of negative half-cycle phase to positive half-cycle phase, the pilot candidate impedance phase difference remains unchanged; the candidate equivalent time delay calculation uses the pilot candidate impedance phase difference and frequency difference after phase winding correction processing.

[0085] Specifically, the candidate equivalent delay is represented as:

[0086] ;

[0087] in, Indicates the candidate equivalent delay. The frequency index in the pilot candidate set is The candidate pilot frequency point values, The frequency index in the pilot candidate set is The candidate pilot frequency point values, Indicates the pilot candidate impedance. Represents the phase operator, This indicates the index of the first candidate pilot frequency point selected from the pilot candidate set. This indicates the index of the second candidate pilot frequency point selected from the pilot candidate set. This indicates a pilot candidate identifier.

[0088] Based on the candidate equivalent time delay, candidate compensation impedances are constructed. Specifically, for each candidate pilot frequency point in the pilot candidate set, the pilot candidate impedance is phase-compensated according to the candidate equivalent time delay to obtain the candidate compensation impedance at the candidate pilot frequency point. One frequency point pair corresponds to a candidate compensation impedance curve in the frequency band of the pilot candidate set. By repeatedly calculating all frequency point pairs, multiple sets of candidate compensation impedances for each frequency point pair are obtained.

[0089] Specifically, the candidate compensation impedance is expressed as:

[0090] ;

[0091] in, Indicates the candidate compensation impedance. Represents the imaginary unit. This represents the candidate pilot frequency points in the pilot candidate set.

[0092] The phase flatness index of each group of candidate compensation impedances is calculated. Specifically, the candidate pilot frequencies in the pilot candidate set are sorted from smallest to largest. The phase difference and frequency difference between adjacent candidate pilot frequencies are approximated by finite difference derivatives, and the summation is approximated by integrals over adjacent intervals to obtain the value of the phase flatness index.

[0093] It should be noted that the phase flatness index calculation includes the calculation of the phase difference and frequency difference between adjacent candidate pilot frequency points. After the phase difference between adjacent candidate pilot frequency points is calculated, phase winding correction processing is performed. Specifically, when the phase difference between adjacent candidate pilot frequency points is greater than half a cycle phase, the phase difference between adjacent candidate pilot frequency points is reduced by one cycle phase; when the phase difference between adjacent candidate pilot frequency points is less than the negative half cycle phase, the phase difference between adjacent candidate pilot frequency points is added to one cycle phase; when the phase difference between adjacent candidate pilot frequency points falls within the range of the negative half cycle phase to the positive half cycle phase, the phase difference between adjacent candidate pilot frequency points remains unchanged; the finite difference approximate derivative calculation and the approximate integral operation of the summation of adjacent intervals use the phase difference between adjacent candidate pilot frequency points after phase winding correction processing.

[0094] Specifically, the phase flatness index is expressed as:

[0095] ;

[0096] in, Indicates the phase flatness index. This represents the minimum frequency value of the candidate pilot frequency points within the candidate pilot set. This represents the maximum frequency value of the candidate pilot frequency points within the pilot candidate set.

[0097] It should be noted that if the calculated candidate equivalent delay for a certain frequency point can more accurately reflect the link delay term, then after compensation for the candidate equivalent delay, the phase within the pilot candidate set should be closer to flat, and the corresponding phase flatness index should be smaller.

[0098] The frequency pair with the smallest phase flatness index is taken as the pilot pair, and the pilot pair is kept unchanged within this test batch. The two frequency points in the pilot pair are respectively recorded as the first pilot frequency point and the second pilot frequency point.

[0099] Furthermore, the candidate equivalent delay corresponding to the pilot pair during the enumeration process is taken as the equivalent delay, and the equivalent delay is bound to the same test batch identifier for recording.

[0100] Calculate the phase offset. Specifically, for each candidate pilot frequency point in the pilot candidate set, read the phase of the pilot candidate impedance and obtain the corresponding phase residual. Combine the phase residuals of all candidate pilot frequency points in the pilot candidate set into a phase residual set, and use the median of the phase residual set as the phase offset. Bind and archive the pilot pair, equivalent time delay, and phase offset with the same test batch identifier.

[0101] Specifically, the phase offset is expressed as:

[0102] ;

[0103] in, Indicates phase offset. Represents the pilot candidate set, Indicates the equivalent delay. This represents the median operator.

[0104] S4. Based on the identified frequency point set, perform single-frequency discrete projection on the linearized current and voltage signals to obtain the uncompensated impedance set. Combine the equivalent time delay and phase offset to obtain the compensated impedance set and generate the impedance amplitude and phase characteristic set.

[0105] Furthermore, based on the identified frequency point set, an orthogonal reference sequence is generated for each frequency point, and the linearized current and voltage signals are subjected to single-frequency point discrete projection to obtain the voltage and current complex components of each frequency point; based on the voltage and current complex components of each frequency point, the uncompensated impedance value is calculated to obtain the uncompensated impedance set.

[0106] Furthermore, within the same test batch processing environment, the linearized terminal voltage, linearized terminal current, identified frequency set, equivalent time delay, and phase offset are retrieved all at once to verify whether they all come from the same test batch record, thus avoiding compensation failure caused by cross-batch mixing.

[0107] The set of identified frequency points is fixed as the set of frequency indexes of the output impedance amplitude and phase required for this batch, and the equivalent time delay and phase offset are fixed as the compensation amounts used for full-frequency phase compensation for this batch.

[0108] Furthermore, for each frequency point in the identified frequency point set, the same extraction action is performed sequentially. Based on the sampling frequency and sampling point number, a cosine reference sequence and a sine reference sequence corresponding to the frequency point are generated. The reference sequences correspond one-to-one with the linearized terminal voltage and the linearized terminal current in terms of the sampling point number.

[0109] Furthermore, a single-frequency discrete projection is performed on the linearized terminal voltage. Specifically, the linearized terminal voltage and the cosine reference sequence are multiplied point by point and accumulated to obtain the in-phase component. The linearized terminal voltage and the sine reference sequence are multiplied point by point and accumulated to obtain the quadrature component. The in-phase component and the quadrature component are combined to obtain the complex component of the linearized terminal voltage at the frequency point. The linearized terminal current is subjected to a single-frequency discrete projection in the same way to obtain the complex component of the linearized terminal current at the frequency point.

[0110] After completing a frequency point, immediately bind and save the complex components of the linearized terminal voltage and the complex components of the linearized terminal current of the frequency point with the frequency point index, and then enter the next frequency point in the identification frequency point set to repeatedly extract the complex components and obtain the complex components at each frequency point.

[0111] For each frequency point in the identified frequency point set, calculate the ratio of the complex component of the linearized terminal voltage to the complex component of the linearized terminal current to obtain the uncompensated impedance of the frequency point.

[0112] Furthermore, the uncompensated impedance is paired with the corresponding frequency point to form a frequency point uncompensated impedance data pair, and saved according to the frequency point order of the identified frequency point set or according to the frequency point index structure; the uncompensated impedance is repeatedly calculated for all frequency points in the identified frequency point set to form an uncompensated impedance set.

[0113] A phase compensation factor is constructed by using equivalent time delay and phase bias. Combined with the uncompensated impedance set, the compensated impedance set is obtained. The impedance magnitude and impedance phase are calculated point by point from the compensated impedance set to obtain the impedance amplitude and phase characteristic set.

[0114] Furthermore, full-frequency phase compensation is performed on each frequency point in the identified frequency point set. Specifically, the phase compensation factor is calculated based on the frequency point, equivalent time delay, and phase offset, and the uncompensated impedance is multiplied by the phase compensation factor to obtain the compensated impedance.

[0115] Specifically, the compensated impedance is expressed as:

[0116] ;

[0117] in, To compensate for the impedance, For uncompensated impedance, To identify the frequency points in the frequency point set, This indicates the frequency index within the set of identified frequency points.

[0118] The compensated impedance is repeatedly calculated point by point for the identified frequency set to form a compensated impedance set indexed by the identified frequency set.

[0119] Furthermore, for each frequency point in the identified frequency point set, the compensated impedance of the frequency point is read, and the impedance amplitude and impedance phase are calculated. The amplitude represents the magnitude of the impedance at the frequency point, and the phase represents the phase relationship between the voltage and current at the frequency point.

[0120] The frequency point, impedance amplitude, and impedance phase of the frequency point are collected into a single record. All records are generated point by point according to the identified frequency point set to form an impedance amplitude and phase feature set. The impedance amplitude and phase feature set is bound and sealed with the identified frequency point set, equivalent time delay, and phase offset in the same test batch. Verification can trace the frequency point system and compensation source of this output.

[0121] In this embodiment, simulation experiments were conducted to verify the effectiveness of the retired battery performance testing method in improving amplitude-phase consistency and test repeatability under the condition of sampling link drift. The testing environment adopted a four-wire access and synchronous sampling mechanism, and the material object was a retired battery cell. In the simulation, the true impedance of the retired battery under the identification frequency point set was used as the benchmark reference. The excitation system adopted a discrete multi-frequency composite current block, and the overall polarity reversal was performed to obtain the negative discrete multi-frequency composite current block.

[0122] Specifically, the sampling frequency is set to Hertz, the identified frequency set covers 1 Hz to 1 Hz The frequency points are arranged at logarithmic intervals, and the pilot candidate set is extracted from the identification frequency point set and written into the same test configuration record as a subset of the identification frequency point set. In order to simulate the sampling link drift, the disturbances of equivalent time delay term and phase offset term are injected into each test batch, and normal noise and DC offset are superimposed to reflect engineering disturbances such as synchronous sampling error, phase drift and channel zero drift.

[0123] The number of test batches is determined using an adaptive expansion method. Specifically, the initial number of test batches is set to 30, and the test time points corresponding to each batch are evenly distributed within the range of 0 to 300 seconds. For each test batch, the root mean square error of the full-frequency phase before compensation and the root mean square error of the full-frequency phase after compensation are calculated. The ratio of the difference between the two to the error before compensation is used as the improvement amount of the batch. The average improvement amount of all test batches is calculated, and the dispersion is calculated. The interval width of the average improvement amount is obtained using the 95% confidence interval method. The ratio of the interval width of the average improvement amount to the absolute value of the average improvement amount is calculated to obtain the relative interval width. If the relative interval width is less than or equal to 0.08, the statistical result of the improvement amount is considered to be sufficiently stable. If the relative interval width is still greater than 0.08, the number of test batches is increased in increments of 15, and the statistical process is repeated until the relative interval width is less than or equal to 0.08, or the number of test batches is increased to 120.

[0124] It should be noted that, in one embodiment, experimental statistics were conducted on retired batteries of the same type. The number of test batches was increased in increments of 15, and the relative interval width was calculated. It was observed that when the number of batches continued to increase, the change in the relative interval width slowed down significantly and stabilized at 0.08. 0.08 was used as the reference value for stability judgment.

[0125] For data from the same test batch, the sampling timing is aligned and linearized terminal voltage and current are generated according to a fixed differential rule. Single-frequency discrete projection is performed on the linearized current and voltage signals using the pilot candidate set to obtain pilot candidate impedances. Frequency pairs in the pilot candidate set are enumerated to calculate candidate equivalent time delays. The phase of the pilot candidate impedances is compensated using these candidate equivalent time delays, and a phase flatness index is calculated. The frequency pair with the smallest phase flatness index is taken as the pilot pair, and the candidate equivalent time delay corresponding to the frequency pair is recorded as the equivalent time delay and bound to the same test batch identifier. The phase offset is calculated using the median operator. An uncompensated impedance set is extracted by combining the identified frequency set. A phase compensation factor is constructed using the equivalent time delay and phase offset. Full-frequency phase compensation is performed point-by-point on the uncompensated impedance set to obtain the compensated impedance set. The impedance magnitude and impedance phase are calculated point-by-point to form an impedance amplitude-phase characteristic set.

[0126] Figure 5 The comparison curves of impedance phase versus frequency within the same test batch demonstrate that this method transforms phase drift into a calculable, verifiable, and traceable compensation quantity, achieving consistent characterization across frequency points. Specifically, Figure 5 The three curves represent the true phase curve, the uncompensated phase curve, and the compensated phase curve. The uncompensated phase curve is calculated from the uncompensated impedance set extracted from the identified frequency set using linearized terminal voltage and linearized terminal current. The phase includes the overall offset and frequency-dependent tilt caused by the equivalent delay term of the sampling link and the phase offset term. The compensated phase curve enumerates frequency pairs based on the pilot candidate set, calculates the candidate equivalent delay, filters pilot pairs using the phase flatness index, determines the equivalent delay and phase offset, and then performs full-frequency phase compensation on the uncompensated impedance set. This intuitively demonstrates the effect of the compensated phase curve converging towards the true phase curve and enhancing cross-frequency consistency.

[0127] Figure 6Box plots of full-frequency phase root mean square error (RMSE) across test batches demonstrate the improvement in test repeatability achieved by this method. Specifically, within each test batch, the uncompensated impedance set is extracted from the identified frequency point set. The phase of the uncompensated impedance set is compared point by point with the true phase to calculate the full-frequency phase RMSE, thus obtaining the full-frequency phase RMSE before compensation. Then, frequency point pairs are enumerated based on the pilot candidate set to calculate candidate equivalent time delays. Pilot pairs are screened using the phase flatness index, and the equivalent time delay and phase offset are determined. The equivalent time delay is bound to the same test batch identifier and recorded. Full-frequency phase compensation is performed point by point on the uncompensated impedance set to form the compensated impedance set, and the full-frequency phase RMSE after compensation is calculated. Figure 6 The display shows that the overall box shifts downward and the dispersion converges after compensation, indicating that the error level and batch-to-batch fluctuations decrease synchronously after compensation. This demonstrates that phase drift, after being parameterized by equivalent time delay and phase offset, can be stably used for full-frequency phase compensation, enhancing amplitude-phase consistency and improving test repeatability.

[0128] This embodiment also provides a retired battery performance testing system, including: an access sampling module for implementing four-wire access, establishing a synchronous sampling mechanism and recording the sampling frequency, verifying the stability of the sampling link, constructing an identification frequency point set and extracting a pilot candidate set.

[0129] The mirror excitation module is used to select a discrete multi-frequency composite current block as the excitation mode based on the identified frequency point set and pilot candidate set. The excitation source outputs a positive discrete multi-frequency composite current block, obtains the positive block terminal voltage and positive block terminal current, executes the polarity reversal command, collects the negative block terminal voltage and negative block terminal current, and seals the data of the same test batch.

[0130] The calibration extraction module is used to generate linearized current and voltage signals based on data from the same test batch, perform single-frequency discrete projection on the linearized current and voltage signals to obtain pilot candidate impedances, screen pilot pairs through phase flatness index, and determine equivalent time delay and phase offset.

[0131] The compensation output module is used to perform single-frequency discrete projection on the linearized current and voltage signals based on the identified frequency point set, obtain the uncompensated impedance set, and obtain the compensated impedance set by combining the equivalent time delay and phase offset, thereby generating the impedance amplitude and phase characteristic set.

[0132] In summary, this invention enhances the consistency and accuracy of impedance amplitude and phase characteristics through mirror acquisition and linearization processing; by screening pilot pairs based on phase flatness indicators to determine equivalent time delay and phase offset, phase drift is transformed into calculable, verifiable, and traceable correction parameters, improving amplitude and phase consistency and test repeatability; full-frequency phase compensation is performed on the uncompensated impedance set to form an impedance amplitude and phase characteristic set, achieving consistent characterization across frequency points. This can be directly used for batch grading of retired batteries, health status assessment, and data archiving, improving screening reliability and engineering applicability.

[0133] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A method of testing the performance of a retired battery, the method comprising: include, ​ Implement four-wire access, establish a synchronous sampling mechanism and record the sampling frequency, verify the stability of the sampling link, construct an identification frequency point set and extract a pilot candidate set; Based on the identified frequency point set and pilot candidate set, a discrete multi-frequency composite current block is selected as the excitation system. The excitation source outputs a positive discrete multi-frequency composite current block to obtain the positive block terminal voltage and positive block terminal current. The polarity reversal instruction is executed to collect the negative block terminal voltage and negative block terminal current, and the data of the same test batch is sealed. Based on the data from the same test batch, linearized current and voltage signals are generated. Single-frequency discrete projection is performed on the linearized current and voltage signals to obtain pilot candidate impedances. Pilot pairs are screened through phase flatness index to determine equivalent time delay and phase offset. Based on the identified frequency point set, single-frequency discrete projection is performed on the linearized current and voltage signals to obtain the uncompensated impedance set. Combined with the equivalent time delay and phase offset, the compensated impedance set is obtained, and the impedance amplitude and phase characteristic set is generated.

2. The method of claim 1, wherein: The sampling link stability verification includes cleaning the positive and negative terminals of the retired battery, implementing a four-wire connection, establishing a synchronous sampling mechanism, setting the sampling frequency, maintaining zero current excitation, synchronously collecting and generating terminal current sequences and terminal voltage sequences, and performing sampling link stability verification.

3. The method of claim 2, wherein: The process of constructing the identification frequency point set and extracting the pilot candidate set includes determining the available frequency band boundary based on the sampling frequency, generating frequency points, obtaining the identification frequency point set, and extracting the pilot candidate set.

4. The method of claim 3, wherein: The process of obtaining the positive block terminal voltage and positive block terminal current includes selecting a discrete multi-frequency composite current block as the excitation system based on the identified frequency point set and pilot candidate set, setting the current amplitude of the mirror discrete multi-frequency composite current block pair, and generating a fixed excitation configuration. According to the fixed excitation configuration, the excitation source outputs a positive discrete multi-frequency composite current block, synchronously collects the terminal voltage and terminal current, records the start and end marks of the positive block, and segments and saves the positive block terminal voltage and positive block terminal current.

5. The method of claim 4, wherein: The process of sealing the same batch of test data includes executing a polarity reversal command, outputting a negative discrete multi-frequency composite current block from the excitation source, synchronously acquiring the terminal voltage and terminal current, recording the start and end marks of the negative block, and dividing and saving the terminal voltage and terminal current of the negative block. The positive block voltage, positive block current, negative block voltage, and negative block current are bound together and sealed to form the same test batch data package.

6. The method of claim 3, wherein: The process of obtaining pilot candidate impedances includes aligning the sampling timing based on data from the same test batch, performing differential and normalization operations, and obtaining linearized current and voltage signals. Based on the linearized current and voltage signals, combined with the pilot candidate set, an orthogonal reference sequence is generated, and single-frequency point discrete projection is performed to calculate the pilot candidate impedance.

7. The method of claim 3, wherein: The determination of equivalent time delay and phase offset includes enumerating frequency pairs in the pilot candidate set, calculating candidate equivalent time delay, compensating the phase of pilot candidate impedance through candidate equivalent time delay, and calculating phase flatness index. Select the frequency pair with the smallest phase flatness index, determine the pilot pair and equivalent time delay, and calculate the phase offset.

8. The method of claim 7, wherein: The acquiring of the uncompensated impedance set comprises: generating a quadrature reference sequence for each frequency point according to the set of identified frequency points, performing single-frequency-point discrete projection on the linearized current-voltage signal, and acquiring voltage and current complex components of each frequency point; According to the voltage and current complex components of each frequency point, the uncompensated impedance value is calculated, and the uncompensated impedance set is acquired.

9. The method of claim 7, wherein: The generating of the impedance amplitude and phase feature set comprises: constructing a phase compensation factor through equivalent time delay and phase bias, combining the uncompensated impedance set to acquire the compensated impedance set, and calculating impedance modulus and impedance phase from the compensated impedance set to acquire the impedance amplitude and phase feature set. The generating of the impedance amplitude and phase feature set comprises: constructing a phase compensation factor through equivalent time delay and phase bias, combining the uncompensated impedance set to acquire the compensated impedance set, and calculating impedance modulus and impedance phase from the compensated impedance set to acquire the impedance amplitude and phase feature set.

10. A system for testing the performance of a retired battery based on the method for testing the performance of a retired battery according to any one of claims 1 to 9, characterized in that: It comprises, The access sampling module is used for implementing four-wire access, establishing a synchronous sampling mechanism and recording a sampling frequency, verifying the stability of a sampling link, constructing a set of identified frequency points and intercepting a pilot candidate set; The mirror excitation module is used for selecting a discrete multi-frequency composite current block as an excitation system according to the set of identified frequency points and the pilot candidate set, outputting a forward discrete multi-frequency composite current block from a source, acquiring a positive block end voltage and a positive block end current, executing a polarity inversion instruction, collecting a negative block end voltage and a negative block end current, and sealing the same test batch data; The calibration extraction module is used for generating a linearized current-voltage signal according to the same test batch data, performing single-frequency-point discrete projection on the linearized current-voltage signal, acquiring pilot candidate impedance, screening pilot pairs through phase flatness index, and determining equivalent time delay and phase bias; The compensation output module is used for performing single-frequency-point discrete projection on the linearized current-voltage signal according to the set of identified frequency points, acquiring the uncompensated impedance set, combining the equivalent time delay and the phase bias to acquire the compensated impedance set, and generating the impedance amplitude and phase feature set.

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