A high-speed signal simulation method and system

Abstract

The application discloses a high-speed signal simulation method and system, and belongs to the simulation field. In view of the problems of long simulation time and high failure rate, the application provides a high-speed signal simulation method, which comprises the following steps: setting a simulation network and a simulation port corresponding to the simulation network according to a signal design layout, wherein the simulation port comprises a transceiving port; segmenting the signal design layout according to segmentation parameters to obtain a plurality of simulation partitions; judging whether the simulation network in each simulation partition simultaneously exists the transceiving port; if not, adjusting the segmentation parameters; if yes, simulating each simulation partition, cascading simulation results of each simulation partition, and obtaining a high-speed signal simulation result. Through the divide-and-conquer mode, the application reduces the demand for memory and computing resources of a simulation solver, and the simulation time is short; through the judgment on the transceiving port of the same simulation network, the simulation failure or invalid result is avoided, and the independent success rate of each sub-simulation task is greatly improved.

Description

Technical Field

[0001] This invention belongs to the field of simulation technology, and more specifically, relates to a high-speed signal simulation method and system. Background Technology

[0002] High-speed signal simulation is a technique that uses computer models and algorithms to simulate the behavior of high-speed signals during transmission, processing, and reception, predicting signal integrity issues (such as reflection, crosstalk, and attenuation) and optimizing system design. Its core objective is to verify design reliability before physical implementation, avoiding functional abnormalities or performance degradation caused by signal distortion. The scale of high-speed signal simulation has expanded from the single-board level to the entire system level, covering complex scenarios in fields such as communications, computing, and automotive. Its core technology lies in multi-physics coupling modeling, high-frequency algorithm optimization, and high-performance computing support. In the future, with the development of AI and quantum computing, the scale of simulation will further break through physical limits, achieving end-to-end virtual verification from nanoscale devices to global communication networks. As the scale of high-speed signal simulation expands, simulating large-scale high-speed signal designs involving hundreds of thousands or millions of signals is often time-consuming (a single simulation can take hours or even days), and the computational and memory requirements for simulation software are enormous, making it difficult to apply to large-scale parameter scanning and design verification. In other words, for large-scale high-speed signal design, directly performing full-design layout simulation often results in long simulation time, high hardware resource consumption, and even non-convergence of simulation results due to issues such as excessively large design scale and small-sized electrical units, wasting valuable time and hardware resources.

[0003] To address the aforementioned issues, corresponding improvements have been made. For example, Chinese patent application CN202311037351.5, published on April 9, 2024, discloses a modular high-speed signal transmission link simulation method. The modularization process includes: Step S1. Establishing a board simulation model based on reference board data obtained from actual testing; Step S2. Importing stack-up design controls and transmission line structure controls into the board simulation model to form a substrate simulation model; Step S3. Converting the electrical performance parameters of the board simulation model, the stack-up design parameters of the stack-up design controls, and the transmission line structure parameters of the transmission line structure controls into variables; Step S4. Using the symbol command of the simulation software, encapsulating the substrate simulation model into an upper-level module and saving it in the symbol database; During the construction of the simulation link, the required upper-level module is dragged out from the symbol database to form one of the components of the simulation link. The shortcomings of this patent are: it is highly dependent on the accuracy of input parameters (board material, stack-up, linewidth, etc.) and requires a large amount of preliminary work to establish an accurate underlying parameter library, which is time-consuming and costly. Summary of the Invention

[0004] 1. The problem to be solved

[0005] To address the problems of long simulation times and high failure rates in existing simulation methods, this invention provides a high-speed signal simulation method and system. This invention uses a divide-and-conquer approach, breaking down the originally single, large simulation problem into multiple smaller sub-problems, reducing the memory and computational resource requirements of the simulation solver. By judging the transmit and receive ports of the same simulation network, simulation failures or invalid results are avoided, greatly improving the independent success rate of each sub-simulation task, thereby ensuring the reliability of the final cascaded result. The overall high-speed signal simulation method has a short simulation time and a high simulation success rate.

[0006] 2. Technical Solution

[0007] To solve the above problems, the present invention adopts the following technical solution.

[0008] A high-speed signal simulation method includes the following steps:

[0009] S1: Set up the simulation network and the corresponding simulation ports according to the signal design layout. The simulation ports include receiving ports and transmitting ports.

[0010] S2: The signal design layout is divided according to the segmentation parameters to obtain several simulation partitions; the segmentation parameters include row parameters and column parameters, both of which are natural numbers greater than 0;

[0011] S3: Determine whether the simulation network in each simulation partition has both a receive port and a transmit port at the same time; if they exist at the same time, proceed to step S5; if they do not exist at the same time, proceed to step S4.

[0012] S4: Adjust the segmentation region so that the simulation network in each simulation partition has both a receive port and a transmit port;

[0013] S5: Simulate each simulation partition, and concatenate the simulation results of each simulation partition to obtain the high-speed signal simulation results.

[0014] Furthermore, step S4, adjusting the segmented region, includes a primary adjustment, which involves adjusting the position of at least one of the row and column parameters, specifically:

[0015] This includes adjusting the position of the row parameters: shifting the row partition cutting line corresponding to the row parameters upward or downward so that the simulation network in each simulation partition has both a receiving port and a transmitting port.

[0016] and / or

[0017] This includes adjusting the position of the column parameters, as detailed below:

[0018] The column partition cutting lines corresponding to the column parameters are shifted to the left or right to ensure that the simulation network in each simulation partition has both a receiving port and a transmitting port.

[0019] Furthermore, the initial adjustment includes first adjusting the position of the row parameters; if it is not possible to satisfy the requirement that the simulation network in each simulation partition has both a receiving port and a transmitting port, then the position of the column parameters is adjusted.

[0020] Alternatively, the position of the column parameters can be adjusted first. If this does not satisfy the requirement that the simulation network in each simulation partition has both a receiving port and a transmitting port, then the position of the row parameters can be adjusted.

[0021] Furthermore, if the primary adjustment cannot ensure that the simulation network within each simulation partition simultaneously has both a receive port and a transmit port, a secondary adjustment is performed. This secondary adjustment includes redefining the segmentation baseline, specifically:

[0022] Obtain the locations of the receive and transmit ports on each stack corresponding to the signal design layout;

[0023] Using the rectangular outer border formed by the positions of all receiving and transmitting ports as a reference, the rectangular outer border is uniformly divided into M rows and N columns by a segmentation parameter to obtain several simulation partitions, so that the simulation network in each simulation partition has both receiving and transmitting ports; where M and N are both natural numbers greater than 0.

[0024] Furthermore, after redefining the segmentation baseline, if the simulation network within each simulation partition does not simultaneously possess both a receive port and a transmit port, then fine adjustments are made. These fine adjustments specifically include:

[0025] Count the number of receive ports and transmit ports on each stack layer, and select the two stack layers with the most receive ports and transmit ports as condition decision layers;

[0026] One of the layers is adjusted to ensure that the simulation network within the same simulation partition simultaneously has both a receiving port and a transmitting port; the adjustment is either a primary adjustment or a primary adjustment followed by a secondary adjustment.

[0027] Then, another layer is fine-tuned to ensure that the simulated network in the same simulation partition has both a receiving port and a transmitting port; the fine-tuning is to adjust the row dividing lines and / or column dividing lines in the segmentation region where the other layer is located in the vertical or horizontal direction;

[0028] After the two stacks meet the requirements, all other stacks are fine-tuned to ensure that all stacks satisfy the requirement that the simulated network in the same simulation partition has both a receive port and a transmit port.

[0029] Furthermore, during the fine-tuning of all stacks other than these two stacks, the adjustment offset range of the row dividing line and / or column dividing line shall not exceed 1 / 5 of the minimum width and height of the segmentation region in which the stack is located.

[0030] Furthermore, if the fine-tuning cannot ensure that the simulation network in each simulation partition has both a receiving port and a transmitting port simultaneously, an error is reported, and the segmentation parameters in the secondary adjustment are redefined.

[0031] Furthermore, in step S2, when dividing the signal design layout:

[0032] For components with metal layers, if a component is divided into two or more sub-components in different regions by a dividing line, add edge ports at the dividing line position for the cut sub-components, record the edge port relationship at this time, and use it for subsequent cascading operations.

[0033] For components in the via or bump layer, if the component is divided into two or more sub-components in different regions by the dividing line, delete the component.

[0034] Furthermore, step S5 includes:

[0035] Simulation is performed on each simulation partition to obtain the initial simulation result dataset for the simulation partition;

[0036] Based on the relationship between the edge ports, the corresponding cascaded edge ports are used to obtain the first simulation result dataset;

[0037] Based on the top-down and left-to-right partition order, the first simulation result datasets of two adjacent simulation partitions are concatenated with the corresponding receiving and transmitting ports.

[0038] The final simulation result is generated, which is the high-speed signal simulation result.

[0039] A system using the high-speed signal simulation method described in any of the above technical solutions includes:

[0040] Network configuration module: used to configure the simulation network and the corresponding simulation ports of the simulation network according to the signal design layout;

[0041] Segmentation module: Used to segment the signal design layout according to segmentation parameters to obtain several simulation partitions;

[0042] Judgment module: Used to determine whether the simulation network in each simulation partition has both a receive port and a transmit port at the same time;

[0043] Adjustment module: Used to adjust the segmented regions so that the simulation network within each simulation partition has both receive and transmit ports simultaneously;

[0044] Simulation module: Used to simulate each simulation partition, and to cascade the simulation results of each simulation partition to obtain the high-speed signal simulation results.

[0045] 3. Beneficial effects

[0046] (1) This invention first divides the signal design layout into several simulation partitions, decomposing the originally single and large simulation problem into multiple smaller sub-problems, directly reducing the memory and computing resource requirements of the simulation solver, and enabling the processing of ultra-large-scale designs under limited hardware resources; and each sub-partition can be allocated to different computing nodes for parallel simulation, thereby effectively utilizing distributed computing resources and significantly shortening the overall simulation time; secondly, by innovatively judging whether the simulation network in each simulation partition contains both receiving and transmitting ports, the partitions that do not meet the condition are automatically adjusted in terms of segmentation area, fundamentally avoiding the situation where the signal network in a single sub-region is incomplete due to improper segmentation, avoiding simulation failure or invalid results, greatly improving the independent success rate of each sub-simulation task, and thus ensuring the reliability of the final cascaded result; the overall high-speed signal simulation method has a short simulation time and a high simulation success rate;

[0047] (2) The present invention adjusts the segmentation area in a step-by-step manner. First, a primary adjustment is made, the core idea of ​​which is a small adjustment. By slightly moving the existing row or column segmentation lines up / down or left / right, each simulation partition contains a complete signal path. The computational cost is low, and the regularity and controllability of the segmentation are maintained. When the primary adjustment cannot be achieved, a secondary adjustment is introduced. The core idea of ​​the secondary adjustment is to provide a fundamental solution to ensure the feasibility and reliability of the simulation. By redefining the segmentation benchmark, the segmentation operation is ensured to directly act on the core area covered by all key signal ports, which greatly increases the probability that there is a pair of signal transmission and reception ports in each partition. At the same time, the rectangular frame method has a simple and efficient judgment logic, which can achieve seamless and non-overlapping complete coverage of the entire key area. This method of adjusting the segmentation area optimizes resource allocation, so that the partitioning can be completed in the most efficient way in most common cases, and a more powerful method is used only in special cases or extreme cases, so as to maintain high efficiency and success rate when dealing with layouts of various complexities.

[0048] (3) Based on the secondary adjustment, this invention introduces micro-adjustment for multi-layer stacks to ensure that the integrity of the signal network can be satisfied in each simulation partition of each stack, thereby eliminating simulation failure caused by inter-layer distribution conflict and significantly improving the success rate and reliability of the overall simulation of complex multilayer boards. At the same time, the stack adjustment selects the two stacks with the most ports as the condition judgment layers. The first key layer is adjusted and its conditions are met first, and then the second key layer is fine-tuned. The offset range of the row / column dividing lines of other stacks is strictly limited to limit the adjustment range. This is mainly to maintain that the overall area size difference of the same sub-partition between adjacent stacks is not too large. If the amplitude limit is removed or the adjustment amplitude is allowed to be too large, it may cause the partitions processed later to be assigned to unreasonable positions, affecting the subsequent simulation.

[0049] (4) The system of the present invention constructs a high-efficiency, stable and resource-friendly high-speed signal simulation solution by segmentation, integrity verification and adjustment, parallel simulation and result concatenation; it can effectively utilize distributed computing resources, greatly shorten the overall simulation time, accelerate the design verification cycle, and greatly improve the independent success rate of each sub-simulation task by ensuring the integrity of the signal path within each sub-region, thereby ensuring the reliability of the final concatenation result. Attached Figure Description

[0050] Figure 1 This is a schematic diagram showing the setup without regional simulation.

[0051] Figure 2 A schematic diagram showing the setup for simulating an initial 2x2 column segmentation region;

[0052] Figure 3 This is a schematic diagram of the automatically adjusted dividing line;

[0053] Figure 4 for Figure 1 The time consumption of full-page simulation under certain conditions;

[0054] Figure 5 The simulation time after partitioning;

[0055] Figure 6 This is a schematic diagram of an edge port added at the cut edge after the segmented area on the metal layer is cut.

[0056] Figure 7 This is a basic flowchart of the application.

[0057] Figure 8 This is a flowchart illustrating the process of adjusting the segmented regions in this application. Detailed Implementation

[0058] The present invention will now be further described with reference to specific embodiments and accompanying drawings.

[0059] like Figure 7 As shown, a high-speed signal simulation method includes the following steps:

[0060] S1: Set up the simulation network and the corresponding simulation ports according to the signal design layout. The simulation ports include receiving ports and transmitting ports.

[0061] S2: Divide the signal design layout according to the segmentation parameters to obtain several simulation partitions; the segmentation parameters include row parameters and column parameters, both of which are natural numbers greater than 0; in this step, it is worth noting that after the segmentation parameters are determined, the user can fine-tune the position of the partition cutting line. The purpose of this method is to take into account that the user has a certain understanding of the layout, so user intervention can resolve some of the conflicts in the cutting layout position.

[0062] S3: Determine whether the simulation network in each simulation partition has both a receive port and a transmit port at the same time; if they exist at the same time, proceed to step S5; if they do not exist at the same time, proceed to step S4.

[0063] S4: Adjust the segmentation region so that the simulation network in each simulation partition has both a receive port and a transmit port;

[0064] S5: Simulate each simulation partition, and concatenate the simulation results of each simulation partition to obtain the high-speed signal simulation results.

[0065] Specifically, in this embodiment, the core approach is to divide the signal design layout into regions, simulate each region in parallel, and cascade the simulation results of each region to solve the technical problem of large-scale high-speed signal simulation. At the same time, during the region division process, the layer partition is automatically adjusted according to the arrangement of the port sink and source of each layer, reducing the occurrence of simulation failures caused by the same simulation network having only port sink or source in some regions.

[0066] like Figures 1 to 5 As shown, Figure 1 and Figure 4 This is the existing technology approach, which involves directly performing overall simulation of the full-signal design layout; Figure 2 and Figure 5 This simulation was performed using the method described in this application. Figure 4 and Figure 5It is evident that using the simulation method described in this application can shorten the overall simulation time. Furthermore, this embodiment innovatively determines whether the simulation network within each simulation partition simultaneously contains both a receiving port and a transmitting port. For partitions that do not meet this condition, the segmentation area is automatically adjusted, fundamentally avoiding the situation where the signal network in a single sub-region is incomplete due to improper segmentation. This prevents simulation failures or invalid results, greatly improves the independent success rate of each sub-simulation task, and thus ensures the reliability of the final cascaded result.

[0067] In one specific implementation, step S4, adjusting the segmented region, includes a primary adjustment, which involves adjusting the position of at least one of the row and column parameters, specifically:

[0068] This includes adjusting the position of the row parameters: shifting the row partition cutting line corresponding to the row parameters upward or downward so that the simulation network in each simulation partition has both a receiving port and a transmitting port.

[0069] and / or

[0070] This includes adjusting the position of the column parameters, as detailed below:

[0071] The column partition cutting lines corresponding to the column parameters are shifted to the left or right to ensure that the simulation network in each simulation partition has both a receiving port and a transmitting port.

[0072] Specifically, in this embodiment, for example, if step S2 determines that the partition is divided into 2 rows and 2 columns, then the fine-tuning involves making minor adjustments to the positions of the row or column dividing lines. The core idea of ​​this approach is "fine-tuning," which avoids initiating a completely new, global re-segmentation of the entire layout due to a few partitions not meeting the conditions. It only offsets the local cutting lines, resulting in low computational overhead and low resource consumption.

[0073] Meanwhile, by making linear offsets along the row or column direction, the adjusted partitions still remain regular rectangles, and the total number of partitions remains unchanged. This ensures a relatively balanced load for subsequent parallel simulation tasks and consistency of the cascaded logic of simulation results, avoiding uncontrollable risks caused by the complexity of partition shapes or drastic changes in the number of partitions.

[0074] In one specific implementation, the initial adjustment includes first adjusting the position of the row parameters; if it is not possible to satisfy the requirement that the simulation network in each simulation partition has both a receiving port and a transmitting port, then the position of the column parameters is adjusted.

[0075] Alternatively, the column parameters can be adjusted first. If this does not satisfy the requirement that the simulation network within each simulation partition simultaneously has both a receive port and a transmit port, then the row parameters can be adjusted. The adjustment method—row first, then column, or column first, then row—can be determined by the user's preference.

[0076] like Figure 8 As shown, in one specific implementation, if the primary adjustment cannot ensure that the simulation network within each simulation partition simultaneously has both a receiving port and a transmitting port, a secondary adjustment is performed. This secondary adjustment includes redefining the segmentation baseline, specifically:

[0077] Obtain the locations of the receive and transmit ports on each stack corresponding to the signal design layout;

[0078] Using the rectangular outer border formed by the positions of all receiving and transmitting ports as a reference, the rectangular outer border is uniformly divided into M rows and N columns by a segmentation parameter to obtain several simulation partitions, so that the simulation network in each simulation partition has both receiving and transmitting ports; where M and N are both natural numbers greater than 0.

[0079] In this embodiment, both the initial segmentation parameters and the rectangular outer border formed by the positions of all receiving and transmitting ports ensure that the segmented area is rectangular. The reason for using a rectangle is as follows:

[0080] 1. Based on the outer border formed by the design layout, rectangular division can always divide the outer border of the design layout into several rectangles without creating gaps (if circular cutting is used, because the cutting areas cannot overlap, there will always be areas between adjacent circles that are not covered by the circles).

[0081] 2. When cutting and processing layout design, the algorithm for rectangular cutting is simpler. Compared with other shapes (such as circles or polygons), it is not necessary to perform complex boundary calculations to determine whether the shape is within the area (such as circles, which require the standard equation of a circle or its derived equation to determine whether a shape exceeds the circle). Rectangle determination only requires directly judging whether the top, bottom, left, and right edges of the outer border of the layout shape exceed the specified rectangular boundary.

[0082] This embodiment emphasizes the re-division of the reference, using the rectangular outer frame formed by the positions of all receiving ports and transmitting ports as the reference. This is because, in large-scale design layouts, there may be a wide distribution range of simulated network components or some simulated network components may be clustered in a small area. Using the rectangular outer frame formed by the sink and source positions as the reference can minimize the possibility of some cut areas being relatively narrow while others are too large.

[0083] The core idea behind this secondary adjustment is to provide a fundamental solution, ensuring the feasibility and reliability of the simulation. Secondary adjustments are only initiated when the primary adjustment is inapplicable, optimizing resource allocation overall. This allows for the most efficient partitioning in most common situations, with secondary adjustments only performed in specific or extreme cases, thus maintaining high efficiency and success rates when handling layouts of varying complexity.

[0084] In one specific implementation, after redefining the segmentation baseline, if the simulation network within each simulation partition does not simultaneously possess both a receiving port and a transmitting port, then a fine-tuning is performed. This fine-tuning specifically includes:

[0085] Count the number of receive ports and transmit ports on each stack layer, and select the two stack layers with the most receive ports and transmit ports as condition decision layers;

[0086] One of the layers is adjusted to ensure that the simulation network within the same simulation partition simultaneously has both a receiving port and a transmitting port; the adjustment is either a primary adjustment or a primary adjustment followed by a secondary adjustment.

[0087] Then, another layer is fine-tuned to ensure that the simulated network in the same simulation partition has both a receiving port and a transmitting port; the fine-tuning is to adjust the row dividing lines and / or column dividing lines in the segmentation region where the other layer is located in the vertical or horizontal direction;

[0088] After the two stacks meet the requirements, all other stacks are fine-tuned to ensure that all stacks satisfy the requirement that the simulated network in the same simulation partition has both a receive port and a transmit port.

[0089] Specifically, in this embodiment, when the cut region satisfies the sink and source conditions of most stacks, but some stacks do not, only the cut region formed by these stacks is fine-tuned. Ultimately, the boundary position of the cut region of these stacks will be misaligned with other stacks. The advantage of this is that when the cut region positions of most stacks satisfy the simulation solver conditions, forcibly cutting the remaining stacks (C) that do not satisfy the simulation solver conditions perpendicular to the same cutting position may lead to simulation failure. Furthermore, when adjusting the region position to satisfy the simulation solver conditions based on C, the current cutting region position may not satisfy the sink and source distribution of the other stacks besides C, also leading to simulation failure.

[0090] This embodiment first selects the two stacks with the most ports as "condition determination layers" and makes fine adjustments to these two stacks. The fine adjustments between each layer are relatively independent and have limited ranges. Within each sub-partition, the component size, mesh quantity, and unknowns are still significantly reduced compared to the overall layout, which significantly reduces the resource requirements of the simulation solver. At the same time, simulation tasks for different stacks and different partitions can be performed independently, making full use of distributed computing resources and effectively shortening the overall simulation time. More importantly, it avoids restarting the secondary adjustment process of the entire layout due to some stacks not meeting the requirements, which greatly saves preprocessing time.

[0091] In one specific implementation, during the fine-tuning of all stacks other than the two aforementioned stacks, the adjustment offset range of the row and / or column dividing lines shall not exceed 1 / 5 of the minimum width and height of the segmented region in which the stack is located; this stack is the stack that requires fine-tuning. This fine-tuning process limits the adjustment range primarily to maintain a consistent overall size difference between adjacent stacks of the same segmented sub-partition. Removing the range limit or allowing excessively large adjustment ranges could lead to later-processed partitions being assigned to unreasonable positions, affecting subsequent simulations. Here, 1 / 5 of the minimum width and height of the segmented region refers to taking the smaller of the width and height of the segmented region and multiplying it by one-fifth.

[0092] In one specific implementation, if the fine-tuning cannot ensure that the simulation network within each simulation partition simultaneously has both a receive port and a transmit port, an error is reported, and the segmentation parameters in the secondary adjustment are redefined. In this embodiment, by introducing an error reporting mechanism, when adjustments cannot meet the requirements of all layers, an error is triggered, guiding the re-determination of segmentation parameters (such as adjusting the values ​​of M and N), thus enhancing the robustness and practicality of the entire method in the face of extremely complex designs.

[0093] In one specific implementation, during step S2, when dividing the signal design layout, as follows: Figure 6 As shown:

[0094] For components with metal layers, if a component is divided into two or more sub-components in different regions by a dividing line, add edge ports at the dividing line position for the cut sub-components, record the edge port relationship at this time, and use it for subsequent cascading operations.

[0095] For components in the via or bump layers, if a component is divided into two or more sub-components in different regions by the dividing line, delete the component to avoid the situation of half a via or half a bump, which would cause the solver simulation to fail.

[0096] In one specific embodiment, step S5 includes:

[0097] Simulation is performed on each simulation partition to obtain the initial simulation result dataset for the simulation partition;

[0098] Based on the relationship between the edge ports, the corresponding cascaded edge ports are used to obtain the first simulation result dataset;

[0099] Based on the top-down and left-to-right partition order, the first simulation result datasets of two adjacent simulation partitions are concatenated with their corresponding receiving and transmitting ports.

[0100] The final simulation result is generated, which is the high-speed signal simulation result.

[0101] Specifically, in this embodiment, the initial simulation result dataset fully utilizes the advantages of small sub-problems and low resource requirements after partitioning, achieving parallel and high-speed solving, which is the foundation for improving overall efficiency. At the same time, through two-level cascading operations, the scattered sub-results are systematically integrated into a complete global simulation result, ensuring that the simulation time is significantly shortened without sacrificing the accuracy of the overall system performance evaluation.

[0102] Furthermore, by first cascading the edge ports, the boundary effects introduced by artificial segmentation are resolved, ensuring the correct spatial connection of electromagnetic fields or circuit signals. Then, by cascading the transmit and receive ports in spatial order, the natural relationships of signal flow or spatial adjacency are simulated, making the cascading process deterministic and repeatable, avoiding data dependency chaos or result conflicts that may result from random or parallel cascading. Thus, through a hierarchical and sequential cascading strategy, an accurate transition from parallel distributed simulation to the overall system characteristic restoration is ensured.

[0103] A system using the high-speed signal simulation method described in any of the above technical solutions includes:

[0104] Network configuration module: used to configure the simulation network and the corresponding simulation ports of the simulation network according to the signal design layout;

[0105] Segmentation module: Used to segment the signal design layout according to segmentation parameters to obtain several simulation partitions;

[0106] Judgment module: Used to determine whether the simulation network in each simulation partition has both a receive port and a transmit port at the same time;

[0107] Adjustment module: Used to adjust the segmented regions so that the simulation network within each simulation partition has both receive and transmit ports simultaneously;

[0108] Simulation module: Used to simulate each simulation partition, and to cascade the simulation results of each simulation partition to obtain the high-speed signal simulation results.

[0109] The system structure in this embodiment is simple, employing a divide-and-conquer approach: specifying the simulation network to be simulated; adding simulation ports; specifying partitioning parameters to decompose the design layout into smaller regions, adding edge ports to the edges of these regions; simulating the design layout within each region in parallel; cascading the edge ports of each partition; and cascading the ports of the simulation networks in each region to finally obtain the overall high-speed signal design simulation S-parameter results. This approach effectively utilizes distributed computing resources, significantly shortens the overall simulation time, accelerates the design verification cycle, and greatly improves the independent success rate of each sub-simulation task by ensuring the integrity of the signal path within each sub-region, thereby guaranteeing the reliability of the final cascaded result.

[0110] To further facilitate understanding of the method of this application, the following examples are provided:

[0111] Example 1

[0112] A high-speed signal simulation method includes the following steps:

[0113] S100 sets up the simulation network;

[0114] Based on the simulation network, S200 generates corresponding simulation ports sink and source for each simulation network; sink port (receiver) and source port (transmitter).

[0115] S300 specifies the partitioning parameters as M rows and N columns (M and N are parameters, where M is the number of rows and N is the number of columns); the user can also fine-tune the partitioning cut line positions.

[0116] S400 counts the positions of the sink and source ports on each stack-up layer;

[0117] The S500 verifies the sink and source layout of each partition based on the user-adjusted partition positions.

[0118] If the same simulation network has sink and source in each partition region, the S600 will directly apply the partition settings and skip the following steps to perform the simulation analysis.

[0119] If the S700 does not satisfy the condition that all simulation networks have sink and source, it processes the row separators from top to bottom.

[0120] S800 records the position of the row separator line in this adjustment;

[0121] S900 moves the row dividing line vertically up and down until the sink and source distributions of each simulation network meet the requirements.

[0122] If, during the adjustment of the row divider, the sink and source of the simulated network within the same region cannot be simultaneously satisfied, the row divider position is reset to the initially adjusted row divider position.

[0123] S1100 processes column separators from left to right;

[0124] S1200 records the position of the column separator line in this adjustment;

[0125] The S1300 column divider line is moved horizontally left and right until the sink and source distributions of each simulation network meet the specified conditions.

[0126] If, during the adjustment of the column divider line, the sink and source of the simulation network in the same area cannot be satisfied at the same time, the column divider line position is reset to the initially adjusted column divider line position.

[0127] If the sink and source of the simulation network in the same region exist simultaneously, then the simulation analysis step is executed directly in S1500.

[0128] Based on the statistical information of S400, S1600 uses the rectangular outer frame A formed by the positions of all ports as a reference, and divides it into M rows and N columns based on the rectangular outer frame A.

[0129] If, in each partition region, the same simulation network has both sink and source, then the partition settings are applied directly, and the simulation analysis steps are executed directly.

[0130] S1800 statistically designs the number of sinks and sources on each stack of the layout and selects the two stacks with the most sinks and sources as new condition decision layers (these two stacks are called stacks L1 and L2). In the following steps, condition decisions are made only based on the sink and source distribution of the two stacks L1 and L2.

[0131] S1900 executes steps S700-S1500 on the newly generated partition location in S1600;

[0132] In S2000, if the partitioning position does not satisfy the requirement that the sink and source of the simulation network within the same region exist simultaneously, first adjust L1 to satisfy the requirement that the sink and source of the simulation network within the same region exist simultaneously. Then, fine-tune the partitioning position of L2. The fine-tuning offset should not exceed 1 / 5 of the minimum width and height of the region. Refer to S7-S15 for the fine-tuning method.

[0133] If, after S2000 ends, the partitioning location does not satisfy the simultaneous existence of sink and source of the simulation network in the same region, the interface will report an error and notify the user to re-specify the region partitioning parameters M and N, and then execute the simulation analysis steps.

[0134] For the remaining stacks in S1800 (i.e., stacks other than L1 and L2), S2200 applies the partitioning position of S20. If the sink and source of the simulation network in the same region exist at the same time, the simulation analysis step is executed directly.

[0135] For stacks in S2200 that do not meet the conditions, S2300 makes fine adjustments by referring to the method in S2100;

[0136] If, after S2300, the partitioning location does not satisfy the simultaneous existence of sink and source of the simulation network in the same region, the interface will report an error and notify the user to re-specify the region partitioning parameters M and N, and then execute step S300.

[0137] The S2500 divides the layout according to the final determined dividing lines and records the relationship between the sink and source of each region.

[0138] For metal layer components, if the component is divided into two or more different regions by a dividing line, the S2600 adds an edge port (edge ​​port: edge port type) at the dividing line position for the cut component, records the edge port relationship at this time, and uses it for subsequent cascading operations.

[0139] For components in the via or bump layer, if a component is divided into two or more different regions by a dividing line, the S2700 should delete the component to avoid half a via or half a bump, which would cause the solver simulation to fail.

[0140] The S2800 performs a remove FNP operation (FNP: non-functional pads and floating pads; floating pads: independent pads not connected to other signal network components) on each segmented area, deleting the floating components.

[0141] S2900 performs parallel simulations on each partition region;

[0142] S3000 processes the partition result set ResultA of S2900 and generates a new result set ResultB by correspondingly cascading edge ports according to the edge port relationship of S2600.

[0143] S3100 concatenates the relevant sink and source ports of the ResultB results of adjacent regions in a top-down, left-to-right partition order.

[0144] S3200 generates the final result ResultC, which is the overall simulation result of the design layout.

[0145] This embodiment's method, when dealing with large-scale high-speed signal simulation, divides the overall design layout into several sub-regions, adds edge ports at the cut-off points between adjacent sub-regions, and then performs parallel simulations on each sub-region. Cascading the simulation results of each sub-region improves the efficiency of large-scale high-speed signal simulation and reduces the probability of simulation failure. The partitioning adjustment scheme can reduce the likelihood of simulation failures caused by situations where only a single sink or source belongs to the same simulation network within the same simulation region after partitioning.

[0146] The examples described herein are merely preferred embodiments of the invention and are not intended to limit the concept and scope of the invention. Any modifications and improvements made by those skilled in the art to the technical solutions of the invention without departing from the design concept of the invention should fall within the protection scope of the invention.

Claims

1. A high-speed signal simulation method, characterized in that: Includes the following steps: S1: Set up the simulation network and the corresponding simulation ports according to the signal design layout. The simulation ports include receiving ports and transmitting ports. S2: The signal design layout is divided according to the segmentation parameters to obtain several simulation partitions; the segmentation parameters include row parameters and column parameters, both of which are natural numbers greater than 0; S3: Determine whether the simulation network in each simulation partition has both a receive port and a transmit port at the same time; if they exist at the same time, proceed to step S5; if they do not exist at the same time, proceed to step S4. S4: Adjust the segmentation region so that the simulation network in each simulation partition has both a receive port and a transmit port; S5: Simulate each simulation partition, and concatenate the simulation results of each simulation partition to obtain the high-speed signal simulation results.

2. The high-speed signal simulation method according to claim 1, characterized in that: Step S4, adjusting the segmented region, includes a primary adjustment, which involves adjusting the position of at least one of the row and column parameters. Specifically: This includes adjusting the position of the row parameters: shifting the row partition cutting line corresponding to the row parameters upward or downward so that the simulation network in each simulation partition has both a receiving port and a transmitting port. and / or This includes adjusting the position of the column parameters, as detailed below: The column partition cutting lines corresponding to the column parameters are shifted to the left or right to ensure that the simulation network in each simulation partition has both a receiving port and a transmitting port.

3. The high-speed signal simulation method according to claim 2, characterized in that: The initial adjustment includes first adjusting the position of the row parameters; if it is not possible to satisfy the requirement that the simulation network in each simulation partition has both a receiving port and a transmitting port, then the position of the column parameters is adjusted. Alternatively, the position of the column parameters can be adjusted first. If this does not satisfy the requirement that the simulation network in each simulation partition has both a receiving port and a transmitting port, then the position of the row parameters can be adjusted.

4. The high-speed signal simulation method according to claim 2, characterized in that: If the primary adjustment cannot ensure that the simulation network within each simulation partition simultaneously has both a receive port and a transmit port, a secondary adjustment is performed. This secondary adjustment includes redefining the segmentation baseline, specifically: Obtain the locations of the receive and transmit ports on each stack corresponding to the signal design layout; Using the rectangular outer border formed by the positions of all receiving and transmitting ports as a reference, the rectangular outer border is uniformly divided into M rows and N columns by a segmentation parameter to obtain several simulation partitions, so that the simulation network in each simulation partition has both receiving and transmitting ports; where M and N are both natural numbers greater than 0.

5. The high-speed signal simulation method according to claim 4, characterized in that: After redefining the segmentation baseline, if the simulation network within each simulation partition does not simultaneously possess both a receive port and a transmit port, then fine adjustments are made. These fine adjustments specifically include: Count the number of receive ports and transmit ports on each stack layer, and select the two stack layers with the most receive ports and transmit ports as condition decision layers; One of the layers is adjusted to ensure that the simulation network within the same simulation partition simultaneously has both a receiving port and a transmitting port; the adjustment is either a primary adjustment or a primary adjustment followed by a secondary adjustment. Then, another layer is fine-tuned to ensure that the simulated network in the same simulation partition has both a receiving port and a transmitting port; the fine-tuning is to adjust the row dividing lines and / or column dividing lines in the segmentation region where the other layer is located in the vertical or horizontal direction; After the two stacks meet the requirements, all other stacks are fine-tuned to ensure that all stacks satisfy the requirement that the simulated network in the same simulation partition has both a receive port and a transmit port.

6. The high-speed signal simulation method according to claim 5, characterized in that: During the fine-tuning of all stacks other than these two stacks, the adjustment offset range of the row dividing line and / or column dividing line shall not exceed 1 / 5 of the minimum width and height of the dividing region where the stack is located.

7. The high-speed signal simulation method according to claim 5, characterized in that: If the fine-tuning cannot ensure that the simulation network in each simulation partition has both a receiving port and a transmitting port at the same time, an error is reported and the segmentation parameters in the second-level adjustment are redefined.

8. The high-speed signal simulation method according to claim 1, characterized in that: In step S2, when dividing the signal design layout: For components with metal layers, if a component is divided into two or more sub-components in different regions by a dividing line, add edge ports at the dividing line position for the cut sub-components, record the edge port relationship at this time, and use it for subsequent cascading operations. For components in the via or bump layer, if the component is divided into two or more sub-components in different regions by the dividing line, delete the component.

9. A high-speed signal simulation method according to claim 8, characterized in that: Step S5 includes: Simulation is performed on each simulation partition to obtain the initial simulation result dataset for the simulation partition; Based on the relationship between the edge ports, the corresponding cascaded edge ports are used to obtain the first simulation result dataset; Based on the top-down and left-to-right partition order, the first simulation result datasets of two adjacent simulation partitions are concatenated with the corresponding receiving and transmitting ports. The final simulation result is generated, which is the high-speed signal simulation result.

10. A system using the high-speed signal simulation method as described in any one of claims 1-9, characterized in that: include: Network configuration module: used to configure the simulation network and the corresponding simulation ports of the simulation network according to the signal design layout; Segmentation module: Used to segment the signal design layout according to segmentation parameters to obtain several simulation partitions; Judgment module: Used to determine whether the simulation network in each simulation partition has both a receive port and a transmit port at the same time; Adjustment module: Used to adjust the segmented regions so that the simulation network within each simulation partition has both receive and transmit ports simultaneously; Simulation module: Used to simulate each simulation partition, and to cascade the simulation results of each simulation partition to obtain the high-speed signal simulation results.

Images