Lithium-based synaptic transistor based on epitaxial orientation regulation and preparation method thereof

Abstract

The invention discloses a lithium-based synapse transistor based on epitaxial orientation regulation and a preparation method thereof. The synapse transistor comprises a single-crystal substrate, a lithium-based material channel layer, a gate dielectric layer and a gate electrode from bottom to top, and a source electrode and a drain electrode which are in ohmic contact with the two ends of the lithium-based material channel layer are further arranged on the surface of the single-crystal substrate. A single crystal substrate matched with a specific crystal lattice is selected, a lithium-based channel layer with specific crystal orientation is epitaxially grown on the substrate by utilizing a coating technology, the lithium-based channel has cubic crystal grain morphology and shows anisotropic ion migration characteristics, the diffusion barrier in one direction is relatively low, and the diffusion barrier in the other direction is relatively low. And high-efficiency and low-energy-consumption conductivity regulation and control can be realized, and the diffusion barrier in the other direction is relatively high, so that the excellent retention performance of the conductivity state is ensured. According to the invention, the intrinsic anisotropy is utilized to successfully inhibit the separation of the current peak and the heterogeneity in the channel, so that the device realizes linear, symmetrical and non-volatile conductance change.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of neuromorphic computing devices, and particularly relates to a lithium-based synaptic transistor based on epitaxial orientation regulation and a preparation method thereof. BACKGROUND

[0002] With the development of artificial intelligence and brain-like computing, synaptic devices, as the core unit of neuromorphic computing systems, directly affect the learning efficiency and inference accuracy of artificial neural networks. The commonly used synaptic devices include resistive random access memory (RRAM), phase change memory (PCM), and ferroelectric tunnel junction (FTJ), etc. These devices have shown certain potential in realizing adjustable conductance and synaptic-like behavior, but still have many limitations. In order to overcome these limitations, in recent years, the ion-gated transistor (IGT) has gradually become an important candidate for the next generation of bionic synaptic devices due to its low operating voltage, analog weight multi-linear regulation, and dynamic response close to biological synapses. However, the current ion-gated transistor still has some key problems: the conductance regulation process is prone to nonlinearity, which seriously affects the accuracy of weight update; the retention characteristic is poor, making it difficult for the device to maintain long-term stable synaptic weights; at the same time, due to the metal-insulator phase separation (MIT) effect, the device will have significant current noise and spike phenomenon during conduction, thereby interfering with signal transmission and reducing the accurate implementation of neural network algorithms. These factors to a large extent restrict the further application of ion-gated transistors in high-performance brain-like computing. Therefore, there is an urgent need for an ion synaptic transistor with low energy consumption, multi-linearity, and high retention characteristic, as well as a preparation method thereof, to realize high-precision, low-noise artificial neural network weight regulation and brain-like computing applications.

[0003] Epitaxial thin film technology is an important means to realize high-performance thin film materials. Epitaxial growth mainly includes epitaxial orientation control and crystal structure regulation, which is considered as a key approach to improve the electrical, optical and magnetic properties of materials. Among them, epitaxial orientation regulation plays a crucial role in obtaining high-quality thin films and excellent device performance. Therefore, it is essential to develop a suitable and simple epitaxial preparation process to effectively regulate the epitaxial orientation of thin films. Epitaxial thin film devices are a class of high-performance electronic devices based on single crystals or epitaxial thin films. Compared with traditional polycrystalline thin film or amorphous thin film devices, epitaxial thin film devices have the advantages of low defect density, strong structure controllability, and good physical performance repeatability. However, due to the complexity of epitaxial growth process, lattice mismatch between material systems, and other problems, the current epitaxial thin film technology is still in the exploratory stage in terms of device performance improvement and large-scale application. SUMMARY

[0004] This invention aims to provide a lithium-based synaptic transistor based on epitaxial orientation control and its fabrication method. This method induces the growth of a highly crystalline, preferentially oriented lithium-based thin film on a single-crystal substrate, obtaining an electrode / channel system with a smooth surface and uniform orientation. This facilitates in-situ or high-resolution characterization of the electrode-channel interface and improves the electrical consistency, retention, and reproducibility of the device. This invention utilizes epitaxial technology to obtain a lithium-based three-terminal synaptic transistor with anisotropic ion transport characteristics.

[0005] The technical solution of the present invention is as follows:

[0006] A lithium-based synaptic transistor based on epitaxial orientation modulation is disclosed. The lithium-based synaptic transistor comprises, from bottom to top, a single-crystal substrate, a lithium-based material channel layer epitaxially grown on the single-crystal substrate, a gate dielectric layer covering the lithium-based material channel layer, and a gate electrode located on the gate dielectric layer. The surface of the single-crystal substrate is further provided with a source electrode and a drain electrode that are in ohmic contact with both ends of the lithium-based material channel layer. The lithium-based material channel layer has a preferred crystal orientation and high crystal quality. The synaptic transistor is configured to achieve gate voltage-induced lithium-ion migration and non-volatile conductivity modulation.

[0007] The single-crystal substrate is formed from materials such as lanthanum aluminate (LaAlO3), strontium ruthenium oxide (SrRuO3), strontium tantalate (SrTaO3), strontium titanate (SrTiO3), or sapphire (Al2O3).

[0008] The lithium-based material channel layer consists of lithium cobalt oxide (LiCoO2) and lithium nickel cobalt manganese oxide (LiNi). x Co x Mn2O2), lithium nickel cobalt aluminum oxide (LiNi) x Co x Lithium iron phosphate (LiFePO4), lithium manganese oxide (LiMnPO4), lithium titanate (Li4Ti5O4) 12 It can be formed from lithium-based materials such as lithium niobate (LiNbO3) or lithium tungstate (Li2WO4).

[0009] The gate dielectric layer is an insulating layer or an ion control layer. The insulating layer is formed of SiO2, Si3N4, HfO2, or Al2O3, and the ion control layer is formed of LiPON, Li3PO4, or Li7La3Zr2O. 12 Or Li 1.3 Al 0.3 Ti 1.7 (PO4)3 molding.

[0010] The source electrode, drain electrode, or gate electrode is formed from a conductive noble metal material, such as gold (Au) or platinum (Pt).

[0011] The source electrode and drain electrode are arranged in parallel.

[0012] The thickness of the source electrode, drain electrode, or gate electrode is 50±5nm, the thickness of the lithium-based material channel layer is 20-100nm, and the thickness of the gate dielectric layer is 80±10nm.

[0013] Furthermore, the lithium-based synaptic transistor uses lithium cobalt oxide (LiCoO2, LCO) as an example for its lithium-based channel layer. In a preferred embodiment, LCO has a (104) crystal plane as its preferred orientation. The epitaxially grown LCO channel layer has anisotropic lithium-ion diffusion channels, providing ion migration channels with a barrier of less than 2.0 eV in the vertical direction and a diffusion barrier of more than 6.0 eV provided by the Co-O layer in the horizontal direction, which is used to achieve linear, non-volatile conductivity modulation to simulate the plasticity of biological synapses.

[0014] The present invention discloses a method for fabricating a lithium-based synaptic transistor based on epitaxial orientation control, comprising the following steps:

[0015] 1) The single-crystal substrate is cleaned and heat-treated to obtain an atomically flat surface;

[0016] 2) Electrode patterns are photolithographically etched on the single-crystal substrate, and source and drain electrodes are fabricated using a film deposition technique;

[0017] The photolithography process includes: sequentially coating an adhesion promoter and a positive photoresist on the substrate surface, followed by soft baking and ultraviolet exposure to cause chemical changes in the photosensitive area, then removing the photoresist in the exposed area through a development process to obtain the desired electrode pattern window, then depositing source and drain electrodes in the pattern area, and using a lift-off process to remove residual photoresist to obtain a clear electrode structure.

[0018] During the formation of source and drain electrodes on the surface of a single-crystal substrate, the thickness and uniformity of the thin film can be controlled by adjusting the vacuum level, working atmosphere and deposition power of the deposition environment, thereby obtaining source and drain electrode layers with suitable thickness and good interface quality on the substrate.

[0019] 3) Using a coating technology, a lithium-based material channel layer with a specific orientation is epitaxially grown on the single crystal substrate in an argon-rich atmosphere at 500-700℃;

[0020] 4) Perform in-situ annealing for at least 30 minutes in an argon-oxygen atmosphere at 500-700℃;

[0021] 5) Deposit a gate dielectric layer on the lithium-based material channel layer;

[0022] 6) Deposit the gate electrode over the gate dielectric layer by physical masking.

[0023] Furthermore, the coating techniques described in steps 2) and 3) include, but are not limited to, magnetron sputtering (MS), pulsed laser deposition (PLD), or molecular beam epitaxy (MBE).

[0024] Furthermore, during the epitaxial growth process, the thickness, crystal quality, and surface morphology of the lithium-based material channel layer are controlled by adjusting the sputtering power, deposition rate, and argon-oxygen partial pressure.

[0025] The present invention also provides a neuromorphic computing system comprising the lithium-based synaptic transistor array described herein, the array being configured to perform weight updates in a neural network.

[0026] The lithium-based synaptic transistor described in this invention is used to achieve linear, non-volatile conductance control and reduce device power consumption.

[0027] This invention employs the above technical solution, selecting a single-crystal substrate with specific lattice matching and utilizing a coating technique to epitaxially grow a lithium-based material channel layer with a specific crystal orientation on the substrate. This epitaxial lithium-based channel has a cubic grain morphology and exhibits anisotropic ion migration characteristics. One direction has a lower diffusion barrier, which is beneficial for achieving efficient and low-energy-consumption conductance control, while the other direction has a higher diffusion barrier, thus ensuring excellent conductance retention. This invention utilizes this intrinsic anisotropy to successfully suppress current spikes and non-uniform phase separation within the channel, enabling the device to achieve linear, symmetrical, and non-volatile conductance changes, significantly improving the accuracy and energy efficiency of synaptic transistors in artificial neural network simulations.

[0028] This invention, based on the epitaxial method for controlling the channel layer structure of lithium-based synaptic transistors, utilizes radio frequency magnetron sputtering technology. This technology offers fast deposition speed, stable performance, wide applicability to various substrates, and high flexibility. By inducing the growth of lithium-based material thin films on a single-crystal substrate, it effectively avoids uneven film thickness caused by local substrate irregularities and prevents the formation of impurity phases due to the influence of other ions, providing an ideal sample for electrode surface research. Furthermore, this invention controls the growth of epitaxial films by regulating the growth orientation of the single-crystal substrate, thereby fabricating synaptic transistors with a single orientation and free from grain boundary interference. This has significant implications for the study of neural-like structures.

[0029] The essential feature of this invention is that by using a single-crystal substrate, the epitaxial growth of lithium-based thin films can be controlled, enabling the preparation of an ideal electrode system with a single orientation and no grain boundary interference (e.g., using an STO single-crystal substrate as a growth template allows LCO thin films to grow epitaxially along a single crystal direction, thereby obtaining high-quality oriented thin-film electrodes without grain boundary interference. This electrode system is superior to conventional polycrystalline thin films in terms of conductivity and stability). STO has a cubic perovskite structure, which matches the triangular layered oxygen atom stacking of LCO, providing core support for directional growth. During LCO thin film preparation, Li, Co, and O atoms nucleate along the STO lattice. SrTiO3 (STO) single-crystal substrates with different crystal orientations can effectively control the epitaxial orientation of LiCoO2 (LCO) thin films. Specifically, (111) oriented STO substrates promote preferred epitaxial growth of LCO along the (003) crystal plane; (110) oriented STO substrates induce LCO orientation matching along the (018) orientation; and (100) oriented STO substrates achieve selective control of the epitaxial growth of LCO thin films along the (104) crystal plane, realizing LCO orientation uniformity. Compared to polycrystalline substrates such as metal foil and glass, STO has more prominent advantages: surface roughness is less than 0.5 nm, ensuring uniform LCO nucleation and chemical stability at high temperatures, which is beneficial for generating stable, impurity-free LCO thin films that are easy to observe directly.

[0030] The beneficial effects of this invention are as follows:

[0031] 1. The device fabrication method based on epitaxial modulation of synaptic transistor channel layer structure provided by this invention is applicable to the fabrication of ideal electrode systems, is simple and easy to implement, and can be widely used.

[0032] 2. By controlling the STO orientation of the substrate, the growth of the epitaxial LCO thin film can be controlled, resulting in a stable electrode surface free from impurity interference, which is beneficial to the reliability and stability of the detection results. The synaptic transistors fabricated in this invention allow for direct observation of their resistive switching characteristics and physical properties, playing a beneficial role in fields such as electronic device fabrication and neural network circuits. Attached Figure Description

[0033] Figure 1 This is a simplified cross-sectional view of the synaptic transistor structure of the present invention.

[0034] Figure 2 This is a schematic diagram of the synaptic transistor prepared in Example 1.

[0035] Figure 3 A schematic model and STEM image of the anisotropic ion diffusion path of the epitaxial LCO(104) thin film of the synaptic transistor prepared in Example 1.

[0036] Figure 4The conductivity modulation characteristic curve of the synaptic transistor prepared in Example 1 is shown, where the red square (■) represents the long-term boost (LTP) process and the blue dot (●) represents the long-term suppression (LTD) process.

[0037] Figure 5 The excitatory postsynaptic current (EPSC) response characteristic curve of the synaptic transistor prepared in Example 1. Detailed Implementation

[0038] The present invention will be described below with reference to examples, but this does not limit the invention to the scope of the examples.

[0039] like Figure 1 As shown, a lithium-based synaptic transistor based on epitaxial orientation control includes, from bottom to top, a single-crystal substrate 1, a lithium-based material channel layer 2 epitaxially grown on the single-crystal substrate, a gate dielectric layer 3 covering the lithium-based material channel layer, and a gate electrode 4 located on the gate dielectric layer. The surface of the single-crystal substrate is also provided with a source electrode 5 and a drain electrode 6 that are in ohmic contact with both ends of the lithium-based material channel layer.

[0040] Example 1

[0041] A method for fabricating a lithium-based synaptic transistor based on epitaxial orientation control (using SrTiO3 as a single-crystal substrate and LiCoO2 as the lithium-based channel layer material) includes the following steps:

[0042] 1) Take a size of 10×10mm 2 The single-sided polished SrTiO3 (STO) single crystal substrate was ultrasonically cleaned in acetone, alcohol and deionized water for 30 minutes in sequence, then the substrate surface was dried with a nitrogen gun, and then the substrate surface was cleaned with argon plasma.

[0043] 2) Spin-coat hexamethyldisiloxane (HMDS) adhesion promoter and MIR-701 positive photoresist onto the surface of the STO substrate. The HMDS adhesion promoter was spin-coated at 2000 rpm for 20 s. The MIR-701 positive photoresist was first spin-coated at 1400 rpm for 20 s, and then immediately a second spin-coating was performed at 2000 rpm for 30 s. Subsequently, the substrate was immediately soft-baked at 100°C for 10 minutes to remove the solvent and stabilize the photoresist layer.

[0044] 3) Ultraviolet exposure was performed for 14 seconds using a 248nm KrF light source, with an exposure energy of 66.6mJ / cm². 2 The electrode patterned area was obtained by developing in 2.38% TMAH developer for about 40 seconds.

[0045] 4) Apply gold electrodes to the developed pattern area using magnetron sputtering equipment, and pump the deposition chamber to 8×10⁻⁶ using a molecular pump.-5 Below Pa, argon gas is introduced, the sputtering working pressure is increased to 0.5 Pa, the sputtering power is adjusted to 120 W, the deposition time is 180 s, the sample / target spacing is fixed at 10 cm, and the film thickness is controlled at about 50 nm.

[0046] 5) After metal deposition is completed in the photoresist patterned area, the metal in the non-patterned area is removed by stripping liquid, thereby obtaining the source electrode and drain electrode on the substrate surface;

[0047] In this step, N-methylpyrrolidone (NMP) is used as the stripping solution. The patterned sample is immersed in the stripping solution for at least 20 minutes to thoroughly remove the photoresist layer. After immersion, the sample and stripping solution are placed together in an ultrasonic cleaning device for auxiliary cleaning to ensure complete removal of residual photoresist. Subsequently, the sample is ultrasonically cleaned sequentially with acetone, anhydrous ethanol, and deionized water at 40% of the rated output for 10 minutes to further remove surface organic residues and impurities. After cleaning, the sample surface is dried using a nitrogen stream and baked at 100°C for 10 minutes to complete the post-processing, thereby obtaining a metal electrode pattern with clear boundaries and good adhesion.

[0048] Among them, the STO orientation is (100);

[0049] 6) An epitaxial LCO channel layer with preferred orientation is deposited on the STO crystal plane (100); the epitaxial LCO film has a (104) orientation to provide a low barrier migration channel for lithium ions.

[0050] The LCO channel layer was fabricated by reactive magnetron sputtering. First, the deposition chamber was pumped to 8 × 10⁻⁶ m³ / s. -5 The base vacuum was set to Pa, and then the sputtering working pressure was increased to 0.5 Pa. A single crystal substrate was used as the deposition substrate and current collector. The total gas flow rate was controlled at 50 sccm, and the Ar:O2 ratio during deposition was controlled at 28.3:10.1. The deposition RF power supply was set to 100W, the sample / target spacing was fixed at 10 cm, the deposition time was 40 min, and the film thickness was controlled at approximately 100 nm.

[0051] 7) Deposition of an amorphous gate dielectric layer SiO2 by reactive sputtering x Covering the entire LCO channel layer;

[0052] The gate dielectric layer SiO x The deposition chamber was prepared by reactive magnetron sputtering, and the chamber was first pumped to 8 × 10⁻⁶ m³ / s. -5The base vacuum was set to Pa, and then the sputtering working pressure was increased to 0.5 Pa. A single crystal substrate was used as the deposition substrate and current collector. The total gas flow rate was controlled at 50 sccm, and the Ar:O2 ratio during deposition was controlled at 28.3:40. The deposition RF power supply was set to 80W, the sample / target spacing was fixed at 10cm, the deposition time was 14min, and the film thickness was controlled at approximately 50nm.

[0053] 8) Finally, in SiO x A gold gate electrode is deposited above the gate dielectric layer; the gold gate electrode is fabricated with the same parameters as the source and drain electrodes.

[0054] The electrical performance of the device was tested using a semiconductor parameter analyzer with an input pulse voltage range of 0.1–1V. The results showed that the device can realize brain-inspired bionic functions of long-term synaptic plasticity and exhibits low power consumption, multilinearity and high retention characteristics.

[0055] Figure 4 The conductivity modulation characteristic curves of the synaptic transistor fabricated in this embodiment are shown. The experiment used specific voltage parameters: a training pulse sequence of 50 negative pulses (200 ms) followed by 50 positive pulses (200 ms) was applied first. The curves show that the device's conductivity can achieve a continuously tunable transition from a low conductivity state to a high conductivity state, demonstrating that the synaptic transistor based on the epitaxial LCO(104) thin film possesses high linearity, high symmetry, and non-volatile modulation capabilities, providing a reliable device foundation for constructing high-performance, low-power neuromorphic computing systems.

[0056] Figure 5 The excitatory postsynaptic current (EPSC) response characteristic curve of the synaptic transistor fabricated in this embodiment is shown. After applying a gate voltage pulse with an amplitude of -3V and a pulse width of 30ms, the drain current stabilizes at a higher level, successfully simulating the short-range plasticity behavior of biological synapses, indicating that the device has the potential for long-range enhancement and key characteristics for realizing synaptic learning and memory functions.

Claims

1. An epitaxial orientation-regulated lithium-based synaptic transistor, comprising: The lithium-based synaptic transistor comprises, from bottom to top, a single crystal substrate, a lithium-based material channel layer epitaxially grown on the single crystal substrate, a gate dielectric layer covering the lithium-based material channel layer, and a gate electrode on the gate dielectric layer, and the surface of the single crystal substrate is further provided with a source electrode and a drain electrode in ohmic contact with both ends of the lithium-based material channel layer.

2. The lithium-based synaptic transistor based on epitaxial orientation control according to claim 1, wherein The single crystal substrate is formed of LaAlO3, SrRuO3, SrTaO3, SrTiO3 or Al2O3 material.

3. The lithium-based synaptic transistor based on epitaxial orientation control according to claim 1, wherein The lithium-based material channel layer is formed from LiCoO2, LiNi x Co x Mn2O2, LiNi x Co x Al2O2, LiFePO4, LiMnPO4, Li4Ti5O 12 , LiNbO3, or Li2WO4.

4. The epitaxial orientation-regulated lithium-based synaptic transistor according to claim 1, wherein, The gate medium layer is an insulating layer or an ion regulation layer, the insulating layer is formed by SiO2, Si3N4, HfO2 or Al2O3, the ion regulation layer is formed by LiPON, Li3PO4, Li7La3Zr2O 12 or Li 1.3 Al 0.3 Ti 1.7 (PO4)3.

5. The epitaxial orientation controlled lithium-based synaptic transistor of claim 1, wherein, The source electrode, the drain electrode or the gate electrode is formed of conductive noble metal material.

6. The epitaxial orientation-regulated lithium-based synaptic transistor according to claim 5, wherein The conductive noble metal material is gold or platinum.

7. The epitaxial orientation-regulated lithium-based synaptic transistor according to claim 1, wherein The thickness of the source electrode, the drain electrode or the gate electrode is 50±5 nm, the thickness of the lithium-based material channel layer is 20-100 nm, and the thickness of the gate dielectric layer is 80±10 nm.

8. The method of claim 1-7, wherein the method is a method of fabricating a lithium-based synaptic transistor based on epitaxial orientation control. The method comprises the following steps: 1) cleaning and heat treating the single crystal substrate to obtain an atomically flat surface; 2) photoetching an electrode pattern on the single crystal substrate, and using plating technology to prepare the source electrode and the drain electrode; 3) using plating technology, epitaxially growing a lithium-based material channel layer with a specific orientation on the single crystal substrate under an argon-rich atmosphere at 500-700°C; 4) in-situ annealing for more than 30 minutes under an argon-oxygen atmosphere at 500-700°C; 5) depositing a gate dielectric layer on the lithium-based material channel layer; 6) depositing a gate electrode above the gate dielectric layer by physical masking.

9. The method of claim 8, wherein the method further comprises: The plating technology in steps 2) and 3) includes but is not limited to magnetron sputtering, pulsed laser deposition or molecular beam epitaxy technology.

10. A neuromorphic computing system, comprising: The array comprises the lithium-based synaptic transistor as claimed in any one of claims 1-7. The array comprises the lithium-based synaptic transistor as claimed in any one of claims 1-7.

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