A SPAD detector based on an epitaxial structure design and a preparation method thereof

Abstract

The application discloses a SPAD detector based on an epitaxial structure design and a preparation method thereof. 0.53 Ga 0.47 As / In 0.52 Al 0.48 As superlattice transition layer, i-In 0.53 Ga 0.47 As absorption layer, AlAsSb / InAlAs composite barrier layer, InAlAs band transition layer, InAlAs charge layer, InAlAs multiplication layer and InGaAs cap layer, after epitaxial structure growth is completed, a guard ring and an active area step diffusion region are formed through process design and semiconductor technology, and then a uniform electric field can be formed in the center of the SPAD through one-time diffusion; the application can promote efficient and low-loss transmission of electrons, effectively inhibit trap-assisted tunneling TAT and SRH recombination to generate dark counts, and the uniform electric field formed can inhibit edge breakdown; and the single-photon detector based on the above epitaxial structure has low dark counts and after-pulses at room temperature.

Description

Technical Field

[0001] This invention relates to the technical field of single-photon detectors, and in particular to a SPAD detector based on epitaxial structure design and its fabrication method. Background Technology

[0002] InGaAs single-photon detectors have a response band of 0.9–1.7 μm, which is relatively less harmful to the human eye. Under appropriate bias conditions, they can detect extremely weak echo signals in complex noisy environments, enabling single-photon detection. They have high sensitivity and high detectivity and have been widely used in fields such as 3D radar imaging, long-distance high-speed digital communication, free-space optical communication, quantum communication, and phantom imaging.

[0003] Currently, common InGaAs / InP single-photon detectors are made by growing an InP buffer layer on an InP substrate, followed by an InGaAs absorption layer, then using InGaAsP as a bandgap transition layer, and finally growing an InP charge layer and an InP multiplication layer. This structure not only requires secondary diffusion, but also has high dark counting and afterpulse probability. It needs to operate efficiently at low temperatures such as -40°C, resulting in high manufacturing costs and application environments, making it difficult to implement on a large scale. Summary of the Invention

[0004] The purpose of this invention is to address the shortcomings of existing technologies by providing a SPAD detector based on epitaxial structure design and its fabrication method. The epitaxial structure and process design enable lower dark counts and afterpulses at room temperature, significantly improving performance and practicality compared to conventional InGaAs detectors. Furthermore, this structure requires only one diffusion step, reducing process costs.

[0005] To achieve the above objectives, the technical solution provided by this invention is: a SPAD detector based on epitaxial structure design, comprising an InP substrate, an n-type InP buffer layer grown from bottom to top on the InP substrate, and alternating In... 0.53 Ga 0.47 As / In 0.52 Al 0.48 As superlattice transition layer, i-In 0.53 Ga 0.47The structure comprises an As absorber layer, an AlAsSb / InAlAs composite barrier layer, an InAlAs bandgap transition layer, an InAlAs charge layer, an InAlAs multiplication layer, and an InGaAs cap layer. A first dielectric film is grown on the surface of the InGaAs cap layer. The first dielectric film has a first diffusion hole. The InGaAs layer within the first diffusion hole is removed by etching with a high-selectivity acidic solution. After removing the first dielectric film, a high-temperature resistant second dielectric film is grown. The second dielectric film has a second diffusion hole and a protective ring. The diameter of the second diffusion hole is larger than that of the first diffusion hole. The second diffusion hole and the protective ring are used to diffuse-dopant Zn elements into the leakage region using MOCVD or MBE technology. The InGaAs in the leakage region constitutes a stepped diffusion region.

[0006] Furthermore, the first dielectric film is a SiO2 or SiN dielectric film, and the thickness of the first dielectric film is 100~500nm; the second dielectric film is a SiO2 or SiN dielectric film, and the thickness of the second dielectric film is 300~500nm.

[0007] Furthermore, after the stepped diffusion region has completed diffusion, the second dielectric film is retained and a high-quality passivation layer is grown on the basis of the second dielectric film. The high-quality passivation layer includes a single layer or multiple layers of SiN, Al2O3, and Ta2O5.

[0008] A method for fabricating a SPAD detector based on the above-described epitaxial structure design includes the following steps:

[0009] S1. Using MOCVD or MBE technology, grow an n-type InP buffer layer on an InP substrate, and alternately grow In... 0.53 Ga 0.47 As / In 0.52 Al 0.48 As superlattice transition layer, i-In 0.53 Ga 0.47 As absorption layer, AlAsSb / InAlAs composite barrier layer, InAlAs band transition layer, InAlAs charge layer, InAlAs multiplication layer and InGaAs cap layer;

[0010] S2. A first dielectric film of SiO2 or SiN is grown on the surface of the InGaAs cap layer. A first diffusion hole is formed by photolithography and etching. Then, the InGaAs layer inside the first diffusion hole is removed by etching with a high-selectivity acid solution. A second dielectric film of SiO2 or SiN with high temperature resistance and good passivation effect is grown again. A second diffusion hole and a protective ring are formed by photolithography and etching. Then, Zn element is doped on the surface of the second diffusion hole and the protective ring using MOCVD or MBE technology to form a stepped diffusion region. After diffusion, the second dielectric film of the stepped diffusion region is retained and a high-quality passivation layer is grown. The high-quality passivation layer includes a single layer or multiple layers of SiN, Al2O3, and Ta2O5.

[0011] S3. After annealing the high-quality passivation layer, the P / N electrode contact holes are opened by photolithography etching technology. Then, the P / N metal electrodes are deposited by electron beam evaporation or magnetron sputtering technology. They are then flip-chip interconnected with the Si circuit substrate. After the filler is cured, the substrate is thinned by thinning and polishing technology. After the processing is completed, metal and AR anti-reflection film are deposited on the back side to complete the device processing.

[0012] Furthermore, step S1 includes:

[0013] The InP buffer layer has a thickness of 300~800nm; the In 0.53 Ga 0.47 As / In 0.52 Al 0.48 The As superlattice transition layers consist of 4 to 10 pairs, with single-layer thicknesses ranging from 8 to 15 nm; the i-In... 0.53 Ga 0.47 The thickness of the As absorption layer is 1.5~2.5 μm; the thickness of the single layer of the AlAsSb / InAlAs composite barrier layer is 5~10 nm; the InAlAs band transition layer is undoped 50~150 nm InAlAs, the InAlAs charge layer is weakly doped 100~300 nm InAlAs with a doping concentration of 5E17; the thickness of the InAlAs multiplication layer is 2~3 μm, and the thickness of the InGaAs cap layer is 300~500 nm.

[0014] Furthermore, step S2 includes:

[0015] The first dielectric film serves as a corrosion barrier layer, and the second dielectric film serves as a diffusion barrier layer that is resistant to high temperatures and has a good passivation effect. After diffusion, the second dielectric film is retained, and then the third dielectric film, which serves as a high-quality passivation layer, is grown.

[0016] Furthermore, step S3 includes:

[0017] When the high-quality passivation layer is SiN, its growth conditions include: a growth temperature of 180℃, a pressure of 10Pa, an ICP power of 400W, Ar gas as a dilution gas, a SiH4 to NH3 flow ratio of 5:1, and a refractive index of 2.12. After the passivation layer is grown, it is annealed in a pure N2 environment. The annealing process includes: an annealing temperature of 450℃ and an annealing time of 2min, which is used to reduce the stress of the passivation layer.

[0018] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0019] 1. This invention achieves strain compensation between the substrate and the absorption layer by alternately growing tens of nanometer-long compressive-strained InGaAs and tensile-strained InAlAs epitaxial layers above the InP buffer layer, thereby reducing the strain of the InP absorption layer. 0.53 Ga 0.47 As defect density is achieved, and an ultrathin AlAsSb / InAlAs composite barrier layer is used to suppress carrier tunneling. Then, InAlAs is grown as a band transition layer to smooth the band, overcome the band barrier, and promote efficient and low-loss electron transport. It effectively suppresses trap-assisted tunneling (TAT) and SRH recombination that generate dark counts. Finally, an InAlAs multiplication layer and an InGaAs cap layer are grown. After the epitaxial structure is grown, a protective ring and a stepped diffusion region of the active region are formed through process design and semiconductor technology. Then, a uniform electric field can be formed at the center of the SPAD through a single diffusion, while also suppressing edge breakdown. The single-photon detector based on the above epitaxial structure has low dark counts and afterpulses at room temperature.

[0020] 2. Compared with conventional InP multiplication layers, InAlAs as the multiplication layer has a significantly higher electron ionization rate than hole ionization rate, a smaller k value, lower noise, and a temperature coefficient that is only half that of InP, resulting in higher Vbr stability. InAlAs also has a faster response speed.

[0021] 3. Compared with the traditional InAlAs cap layer, the InGaAs cap layer has better chemical stability, which can reduce the probability of surface leakage and can also serve as a good ohmic contact layer. At the same time, the difference in diffusion coefficient between InGaAs and InAlAs further optimizes the electric field distribution after diffusion and reduces the probability of edge breakdown. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of a SPAD detector designed based on an epitaxial structure.

[0023] Figure 2 This is a comparison diagram of dark current counting between the InAlAs multiplication layer structure used in this invention and the traditional InP multiplication layer structure.

[0024] Figure 3 This is a comparison chart of the detectivity PDE of SPAD under overbias voltage using the InAlAs multiplication layer structure of this invention and the traditional InP multiplication layer structure. Detailed Implementation

[0025] The present invention will be further described below with reference to specific embodiments.

[0026] See Figure 1 As shown, the SPAD detector based on epitaxial structure design provided in this embodiment includes an InP substrate 1 and an n-type InP buffer layer 2 grown from bottom to top on the InP substrate 1, and alternating In... 0.53 Ga 0.47 As / In 0.52 Al 0.48 As superlattice transition layer 3, i-In 0.53 Ga 0.47 The structure consists of an As absorption layer 4, an AlAsSb / InAlAs composite barrier layer 5, an InAlAs bandgap transition layer 6-1, an InAlAs charge layer 6-2, an InAlAs multiplication layer 7, and an InGaAs cap layer 8. A first dielectric film is grown on the surface of the InGaAs cap layer 8, forming a first diffusion hole. The InGaAs layer within the first diffusion hole is removed by etching with a high-selectivity acidic solution, and a high-temperature resistant second dielectric film is regrown. The second dielectric film forms a second diffusion hole and a protective ring, with the second diffusion hole having a larger diameter than the first diffusion hole. The second diffusion hole and the protective ring are then diffused and doped with Zn in the leaked area using MOCVD or MBE technology to form a stepped diffusion region. The second dielectric film, serving as a diffusion mask, is retained on the stepped diffusion region, and a SiN passivation layer 10 is grown. After passivation growth, an annealing treatment is performed at 450℃ for 3 minutes to reduce the stress of the passivation layer. Finally, subsequent metal and AR device processing is completed using semiconductor technologies such as photolithography, etching, EB evaporation, thinning, and polishing. The InGaAs cap layer 8, as a contact layer, has better chemical stability than the traditional InAlAs cap layer, which can reduce the probability of surface leakage and can also serve as a good ohmic contact layer. At the same time, the difference in diffusion coefficient between InGaAs and InAlAs further optimizes the electric field distribution after diffusion and reduces the probability of edge breakdown.

[0027] A method for fabricating a SPAD detector based on the epitaxial structure design described above includes the following steps:

[0028] S1. Grow an n-type InP buffer layer on an InP substrate 1 using MOCVD or MBE technology. 2. Alternately grow In... 0.53 Ga 0.47 As / In 0.52 Al0.48 As superlattice transition layer 3, i-In 0.53 Ga 0.47 As absorption layer 4, AlAsSb / InAlAs composite barrier layer 5, InAlAs band transition layer 6-1, InAlAs charge layer 6-2, InAlAs multiplication layer 7, and InGaAs cap layer 8; InP buffer layer 2 has a thickness of 300-800 nm; In 0.53 Ga 0.47 As / In 0.52 Al 0.48 The As superlattice transition layer consists of 4-10 pairs, with single-layer thicknesses of 8-15 nm; i-In 0.53 Ga 0.47 The thickness of the As absorption layer 4 is 1.5-2.5 μm; the thickness of the single layer of the AlAsSb / InAlAs composite barrier layer 5 is 5-10 nm; the InAlAs band transition layer 6-1 is undoped 50-150 nm InAlAs, the InAlAs charge layer 6-2 is weakly doped 100-300 nm InAlAs with a doping concentration of 5E17; the thickness of the InAlAs multiplication layer 7 is 2-3 μm, and the thickness of the InGaAs cap layer 8 is 300-500 nm.

[0029] S2. A first dielectric film of SiO2 or SiN with a thickness of 300-1000 nm is grown on the surface of the InGaAs cap layer 8. A first diffusion hole is formed by photolithography and etching. Then, the InGaAs layer in the first diffusion hole is removed by etching with a high-selectivity acid solution. A second dielectric film of high-temperature resistant SiO2 or SiN with a thickness of 300-500 nm is grown again. A second diffusion hole and a protective ring are formed by photolithography and etching. The diameter of the second diffusion hole is smaller than that of the first diffusion hole.

[0030] Then, the second diffusion pore and the protective ring are doped with Zn element on the surface using MOCVD or MBE technology to form a stepped diffusion region. In this embodiment, MOCVD technology is used as an example. The diffusion conditions are as follows: diffusion temperature is 540℃, diffusion pressure is 96 Tor, Zn flow rate is 105cc, PH3 is used as protective gas during diffusion, and the diffusion process adopts the method of first heating and then cooling. Under these conditions, a stepped diffusion morphology consistent with the design is formed.

[0031] After diffusion is complete, the second dielectric film in the stepped diffusion region is retained and a high-quality passivation layer is grown. The high-quality passivation layer includes a single layer or multiple layers of SiN, Al2O3, or Ta2O5.

[0032] In this embodiment, SiN is used as a high-quality passivation layer. The growth conditions include: setting the growth temperature to 180℃, the pressure to 10Pa, the ICP power to 400W, and using Ar gas as a dilution gas. The SiH4 to NH3 flow ratio is 5:1, and the refractive index is 2.12. After the passivation layer is grown, it is annealed in a pure N2 environment. The annealing process includes: setting the annealing temperature to 450℃ and the annealing time to 2min, which is used to reduce the stress of the passivation layer.

[0033] After annealing of the S3 and SiN passivation layers, the P / N electrode contact holes are opened using photolithography etching. Then, a P-type metal electrode a2 is deposited using electron beam evaporation or magnetron sputtering. This electrode is then flip-chip interconnected with the Si circuit substrate 11. After filler curing, the substrate is thinned using thinning and polishing techniques. Following this, an N-type metal a1 and an AR antireflection film b are deposited on the back side to complete the device fabrication, ultimately forming a structure as shown in the image. Figure 1 The structure shown.

[0034] See Figures 2 to 3 As shown, after packaging and testing the chip processed using the above semiconductor technology, the pixel center-to-center distance was 70µm. Dark current count and PDE were tested at room temperature. The breakdown voltage increased by nearly 10V compared to the conventional structure. Under the same over-bias voltage of 3.5V, the new structure achieved a PDE of 23% and a dark current count of 48kHz. The conventional InGaAs SPAD structure uses InP as the multiplication layer. That is, an n-type InP buffer layer, an InGaAs absorber layer, an InGaAsP transition layer, an InP charge layer, and finally an undoped InP multiplication layer are grown sequentially on the InP substrate. A stepped doped region is formed by secondary diffusion. Then, the P / N electrode contact area is opened, metal is deposited, flip-chip bonding is performed, and finally, thinning and polishing are carried out, and an AR film is deposited to complete the processing.

[0035] The above-described embodiments are merely preferred embodiments of the present invention and are not intended to limit the scope of the present invention. Therefore, any changes made in accordance with the shape and principle of the present invention should be covered within the protection scope of the present invention.

Claims

1. A SPAD detector based on epitaxial structure design, comprising an InP substrate, characterized in that: Includes a buffer layer of n-type InP grown from bottom to top on an InP substrate, and alternating growth of In... 0.53 Ga 0.47 As / In 0.52 Al 0.48 As superlattice transition layer, i-In 0.53 Ga 0.47 The structure comprises an As absorber layer, an AlAsSb / InAlAs composite barrier layer, an InAlAs bandgap transition layer, an InAlAs charge layer, an InAlAs multiplication layer, and an InGaAs cap layer. A first dielectric film is grown on the surface of the InGaAs cap layer. The first dielectric film has a first diffusion hole. The InGaAs layer within the first diffusion hole is removed by etching with a high-selectivity acidic solution. After removing the first dielectric film, a high-temperature resistant second dielectric film is grown. The second dielectric film has a second diffusion hole and a protective ring. The diameter of the second diffusion hole is larger than that of the first diffusion hole. The second diffusion hole and the protective ring are used to diffuse-dopant Zn elements into the leakage region using MOCVD or MBE technology. The InGaAs in the leakage region constitutes a stepped diffusion region.

2. A SPAD detector based on epitaxial structure design according to claim 1, characterized in that: The first dielectric film is a SiO2 or SiN dielectric film with a thickness of 100~500nm; the second dielectric film is a SiO2 or SiN dielectric film with a thickness of 300~500nm.

3. A SPAD detector based on epitaxial structure design according to claim 1, characterized in that: After the stepped diffusion region has completed diffusion, the second dielectric film is retained and a high-quality passivation layer is grown on the basis of the second dielectric film.

4. A SPAD detector based on epitaxial structure design according to claim 3, characterized in that: The high-quality passivation layer includes single-layer or multi-layer films of SiN, Al2O3, and Ta2O5.

5. A method for fabricating a SPAD detector based on epitaxial structure design according to any one of claims 1-4, characterized in that, Includes the following steps: S1. Using MOCVD or MBE technology, grow an n-type InP buffer layer on an InP substrate, and alternately grow In... 0.53 Ga 0.47 As / In 0.52 Al 0.48 As superlattice transition layer, i-In 0.53 Ga 0.47 As absorption layer, AlAsSb / InAlAs composite barrier layer, InAlAs band transition layer, InAlAs charge layer, InAlAs multiplication layer and InGaAs cap layer; S2. A first dielectric film of SiO2 or SiN is grown on the surface of the InGaAs cap layer. A first diffusion hole is formed by photolithography and etching. Then, the InGaAs layer inside the first diffusion hole is removed by etching with a high-selectivity acid solution. A second dielectric film of SiO2 or SiN with high temperature resistance and good passivation effect is grown again. A second diffusion hole and a protective ring are formed by photolithography and etching. Then, Zn element is doped on the surface of the second diffusion hole and the protective ring using MOCVD or MBE technology to form a stepped diffusion region. After diffusion, the second dielectric film of the stepped diffusion region is retained and a high-quality passivation layer is grown. The high-quality passivation layer includes a single layer or multiple layers of SiN, Al2O3, and Ta2O5. S3. After annealing the high-quality passivation layer, the P / N electrode contact holes are opened by photolithography etching technology. Then, the P / N metal electrodes are deposited by electron beam evaporation or magnetron sputtering technology. They are then flip-chip interconnected with the Si circuit substrate. After the filler is cured, the substrate is thinned by thinning and polishing technology. After the processing is completed, metal and AR anti-reflection film are deposited on the back side to complete the device processing.

6. The method for fabricating a SPAD detector based on epitaxial structure design according to claim 5, characterized in that, Step S1 includes: The InP buffer layer has a thickness of 300~800nm; the In 0.53 Ga 0.47 As / In 0.52 Al 0.48 The As superlattice transition layers consist of 4 to 10 pairs, with single-layer thicknesses ranging from 8 to 15 nm; the i-In... 0.53 Ga 0.47 The thickness of the As absorption layer is 1.5~2.5 μm; the thickness of the single layer of the AlAsSb / InAlAs composite barrier layer is 5~10 nm; the InAlAs band transition layer is undoped 50~150 nm InAlAs, the InAlAs charge layer is weakly doped 100~300 nm InAlAs with a doping concentration of 5E17; the thickness of the InAlAs multiplication layer is 2~3 μm, and the thickness of the InGaAs cap layer is 300~500 nm.

7. The method for fabricating a SPAD detector based on epitaxial structure design according to claim 5, characterized in that, Step S2 includes: The first dielectric film serves as a corrosion barrier layer, and the second dielectric film serves as a diffusion barrier layer that is resistant to high temperatures and has a good passivation effect. After diffusion, the second dielectric film is retained, and then the third dielectric film, which serves as a high-quality passivation layer, is grown.

8. The method for fabricating a SPAD detector based on epitaxial structure design according to claim 5, characterized in that, Step S3 includes: When the high-quality passivation layer is SiN, its growth conditions include: a growth temperature of 180℃, a pressure of 10Pa, an ICP power of 400W, Ar gas as a dilution gas, a SiH4 to NH3 flow ratio of 5:1, and a refractive index of 2.

12. After the passivation layer is grown, it is annealed in a pure N2 environment. The annealing process includes: an annealing temperature of 450℃ and an annealing time of 2min, which is used to reduce the stress of the passivation layer.

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