A method for fault detection of computer memory sticks

Abstract

The present application relates to the technical field of computer hardware fault diagnosis, in particular to a fault detection method for computer memory, comprising: applying a periodically changing voltage signal and temperature stress to the computer memory, and obtaining the dynamic current response sequence of the computer memory under dynamic combined stress; performing multi-scale time-frequency transformation on the current response sequence, and extracting a feature frequency component set of the memory under different voltage and temperature combination conditions; inputting the feature frequency component set into a pre-trained abnormal pattern recognition model, judging whether there is a potential fault risk according to the electrical characteristic change of the internal unit circuit of the memory; and generating a fault diagnosis report and providing a repair or replacement suggestion scheme according to the identified fault risk type and level. The present application can simulate the real working environment and realize early and accurate diagnosis of potential faults of the memory.

Description

Technical Field

[0001] This invention relates to the field of computer hardware fault diagnosis technology, and in particular to a fault detection method for computer memory modules. Background Technology

[0002] Existing fault detection technologies for computer memory modules typically involve testing under constant rated voltage and room temperature conditions. These methods determine whether the memory module is functioning correctly by running standard diagnostic programs or monitoring fixed parameters. However, these static testing conditions differ significantly from the dynamic environment encountered by memory modules in actual operation. In real computer systems, the operating voltage of the memory module fluctuates due to instantaneous changes in load, and its temperature rises and falls with varying workload and environmental conditions. These dynamic changes in voltage and temperature are not independent; they have a coupling effect, jointly influencing the electrical characteristics of the internal circuitry of the memory module.

[0003] Current dynamic testing methods may sweep voltage or temperature within a certain range, but they fail to reproduce the real stress scenarios of periodic interaction between the two. This simplification of testing conditions makes it difficult to capture many intermittent faults or performance degradations that only manifest under specific voltage-temperature combinations. Relying solely on time-domain waveform amplitude or simple spectral analysis is insufficient to effectively separate characteristic signals caused by the degradation of specific circuit units from complex dynamic current responses. This results in insufficient sensitivity for identifying potential faults, especially early latent faults, and limits the accuracy of fault warnings. Summary of the Invention

[0004] The purpose of this invention is to overcome the shortcomings of existing technologies and propose a fault detection method for computer memory modules.

[0005] To achieve the above objectives, the present invention adopts the following technical solution: a fault detection method for computer memory modules, comprising:

[0006] Apply periodically varying voltage signals and temperature stress to computer memory modules to obtain the dynamic current response sequence of the computer memory modules under operating voltage fluctuations and temperature changes;

[0007] Multi-scale time-frequency transformation is performed on the dynamic current response sequence to extract the set of characteristic frequency components of computer memory modules under different voltage and temperature combinations.

[0008] The set of characteristic frequency components is input into a pre-trained abnormal pattern recognition model. Based on the changes in the electrical characteristics of the internal unit circuits of the computer memory module, it is determined whether there is a potential fault risk in the computer memory module.

[0009] Based on the type and level of potential failure risks, generate a computer memory module failure diagnosis report and provide recommendations for repairing or replacing the computer memory module.

[0010] As a further aspect of the present invention, the step of applying periodically varying voltage signals and temperature stress to the computer memory module to obtain a dynamic current response sequence of the computer memory module under conditions of operating voltage fluctuations and temperature changes specifically involves:

[0011] A composite voltage signal consisting of a stepped voltage change and a periodic sine wave is applied to the power pin of the computer memory module. At the same time, the computer memory module is placed in a temperature-controlled environmental test chamber, and the ambient temperature is changed according to a preset temperature profile program.

[0012] A high-precision current probe is used to measure the total power supply current of the computer memory module in real time under the synchronous action of composite voltage signal and temperature stress, and current data is collected at a constant sampling frequency.

[0013] The acquired current data is segmented according to each stage of change of the applied composite voltage signal and each temperature plateau of the temperature profile program to obtain multiple segments of current data.

[0014] Each segment of current data is preprocessed, including removing DC bias components and suppressing high-frequency noise components, to obtain preprocessed current data segments.

[0015] The pre-processed current data segments are spliced ​​and aligned according to the test time sequence to form a dynamic current response sequence that can reflect the current changes of the computer memory module during the entire voltage and temperature stress loading process.

[0016] As a further aspect of the present invention, the step of performing multi-scale time-frequency transformation on the dynamic current response sequence to extract the set of characteristic frequency components of the computer memory module under different voltage and temperature combinations specifically involves:

[0017] A set of bandpass filters with different center frequencies and bandwidths are selected to perform parallel filtering on the dynamic current response sequence;

[0018] For each filtered subsequence output by a bandpass filter, calculate its complex form Hilbert transform to obtain the analytic signal of each subsequence;

[0019] Calculate the instantaneous amplitude and instantaneous frequency of the analytic signal for each subsequence to obtain the instantaneous amplitude curve and instantaneous frequency curve within the corresponding frequency band of each bandpass filter;

[0020] Based on the distribution characteristics of the instantaneous frequency curve, the main oscillation modes in the dynamic current response sequence are identified, and the average frequency and frequency stability index of each main oscillation mode are recorded.

[0021] Near the average frequency of each major oscillation mode, the corresponding segment of the dynamic current response sequence is extracted, the power spectral density of the corresponding segment is estimated, and the spectral peak features, including peak frequency, peak amplitude and full width at half maximum (FWHM), are extracted.

[0022] The instantaneous amplitude curves, instantaneous frequency curves, average frequencies and frequency stability indices of the main oscillation modes, and spectral peak characteristics of the main oscillation modes corresponding to each bandpass filter are collectively organized into a structured set of characteristic frequency components.

[0023] As a further aspect of the present invention, the step of inputting the set of characteristic frequency components into a pre-trained abnormal pattern recognition model, and determining whether the computer memory module has potential fault risks based on changes in the electrical characteristics of the internal unit circuits of the computer memory module, specifically involves:

[0024] The instantaneous amplitude curve, instantaneous frequency curve, and spectral peak feature data in the characteristic frequency component set are normalized to a fixed dimension respectively.

[0025] The normalized data are grouped according to time domain features and frequency domain features, and then input into different feature extraction branches in the anomaly pattern recognition model.

[0026] Each feature extraction branch transforms the input feature data into a high-dimensional feature vector through multiple nonlinear transformations.

[0027] The high-dimensional feature vectors output from each feature extraction branch are concatenated and fused to obtain a comprehensive feature representation of the computer memory bar under the current test conditions;

[0028] The comprehensive feature representation is input into the classification decision network in the anomaly pattern recognition model. The classification decision network outputs the probability distribution of computer memory modules belonging to various potential fault types based on the classification boundaries learned from a large amount of computer memory module data with known fault states.

[0029] Based on the output probability distribution, fault types with probability values ​​exceeding a preset threshold are selected as potential fault risks of the computer memory module. If all probabilities do not exceed the preset threshold, it is determined that the computer memory module has no potential fault risks.

[0030] As a further aspect of the present invention, the training process of the pre-trained anomaly pattern recognition model specifically includes:

[0031] A large number of computer memory module samples with known fault states and normal states were collected. The composite voltage signal and temperature stress were applied to each computer memory module sample to obtain its dynamic current response sequence.

[0032] Extract the set of characteristic frequency components for each computer memory module sample;

[0033] The training dataset is constructed by using the set of feature frequency components as input data and the known fault or normal states of computer memory stick samples as labels.

[0034] Construct an initial abnormal pattern recognition model that includes multiple feature extraction branches and a classification decision network;

[0035] The initial abnormal pattern recognition model is trained in a supervised manner using the training dataset. The model parameters are adjusted through the backpropagation algorithm to minimize the difference between the model's predicted output and the true label.

[0036] The classification performance of the trained anomaly pattern recognition model is evaluated on an independent validation dataset, and the model structure or parameters are optimized based on the evaluation results to obtain a pre-trained anomaly pattern recognition model.

[0037] As a further aspect of the present invention, the step of generating a computer memory module fault diagnosis report based on the type and level of potential fault risks specifically includes:

[0038] For the identified potential fault risk types, query the preset computer memory module fault knowledge base to obtain the typical manifestations, physical causes and effects of the potential fault risk types;

[0039] Based on the fault type probability value output by the anomaly pattern recognition model, and combined with the voltage and temperature conditions that occur during the test, the severity level of the potential fault is assessed.

[0040] The model information, serial number information, test environment parameters, applied composite voltage signal parameters, temperature stress parameters, key indicators of the extracted characteristic frequency component set, identified potential fault risk types and levels, and typical manifestations and physical causes obtained from the computer memory module fault knowledge base are integrated into a structured document.

[0041] Following the preset computer memory module fault diagnosis report template, fill in the various information items in the structured document into the corresponding positions, and format and generate a computer memory module fault diagnosis report containing text, key data tables, and characteristic curve diagrams.

[0042] As a further aspect of the present invention, the proposed solution for repairing or replacing computer memory modules specifically includes:

[0043] Based on the severity level of the potential fault assessed in the computer memory module fault diagnosis report, if the level is minor or moderate, it is recommended to repair the computer memory module and match detailed repair steps applicable to the fault type and computer memory module model from the repair strategy library.

[0044] If the severity level is critical or the computer memory module model is discontinued and no repair parts are available, it is recommended to replace the computer memory module and search the compatibility database for a list of memory module models of the same or newer generation that are compatible with the original motherboard of the computer memory module.

[0045] Include the repair procedure guide or a list of recommended computer memory module models as a suggested solution appendix after the computer memory module fault diagnosis report.

[0046] As a further aspect of the present invention, the generation of the composite voltage signal specifically involves:

[0047] Define a base DC voltage as the normal operating voltage of the computer memory module;

[0048] A series of stepped voltages with equal durations and increasing voltage step values ​​are superimposed on the base DC voltage.

[0049] On each stepped voltage platform, a sinusoidal voltage signal with frequency and amplitude adjusted according to the stepped voltage level is superimposed.

[0050] The waveform of the entire composite voltage signal is generated by the programmable power controller according to defined rules and calibrated in real time by the voltage monitoring loop.

[0051] As a further aspect of the present invention, the step of identifying the main oscillation modes in the dynamic current response sequence based on the distribution characteristics of the instantaneous frequency curve specifically includes:

[0052] The instantaneous frequency curve is smoothed by filtering to remove random fluctuation noise;

[0053] On the smoothed instantaneous frequency curve, find plateau regions where the frequency values ​​are relatively stable. The center frequency and duration of each plateau region are defined as a candidate oscillation mode.

[0054] Cluster analysis is performed on candidate oscillation modes to merge those with similar center frequencies and durations.

[0055] Calculate the stability index of each oscillation mode after merging, whereby the stability index is defined as the reciprocal of the coefficient of variation of the frequency over the duration of each oscillation mode;

[0056] Several oscillation modes with stability indices exceeding a predetermined threshold and long durations are selected and identified as the main oscillation modes in the dynamic current response sequence.

[0057] As a further aspect of the present invention, each feature extraction branch transforms the input feature data into a high-dimensional feature vector through multiple nonlinear transformations, specifically:

[0058] Each feature extraction branch receives normalized feature data, which includes instantaneous amplitude curve data, instantaneous frequency curve data, or spectral peak feature data.

[0059] The first fully connected layer of each feature extraction branch maps the input feature data to a first hidden layer representation with a first number of neurons, and performs a nonlinear transformation on the first hidden layer representation through a first activation function to obtain a first nonlinear transformation result.

[0060] The second fully connected layer of each feature extraction branch maps the first nonlinear transformation result to the second hidden layer representation with a second number of neurons, and performs a nonlinear transformation on the second hidden layer representation through a second activation function to obtain the second nonlinear transformation result.

[0061] The third fully connected layer of each feature extraction branch maps the result of the second nonlinear transformation to a high-dimensional feature vector with a predetermined dimension, and performs a final nonlinear transformation on the high-dimensional feature vector through the third activation function to obtain the final high-dimensional feature vector output by each feature extraction branch.

[0062] Compared with the prior art, the advantages and positive effects of the present invention are as follows:

[0063] By simultaneously applying periodically varying voltage signals and temperature stress to memory modules, the dynamic and complex operating environment they face in real-world operation was simulated. This coupled stress condition can actively stimulate potential defects that behave normally under stable conditions, causing the internal circuitry of the memory module to expose abnormal current behavior under the combined fluctuations of voltage and temperature. The acquired dynamic current response sequence contains fault characteristic information that cannot be obtained under single stress or static conditions, thus enabling earlier and more comprehensive reliability risk disclosure of the memory module under real-world operating conditions.

[0064] Multi-scale time-frequency transformation is applied to the acquired dynamic current response sequence, enabling simultaneous signal analysis in both time and frequency dimensions. This method effectively separates and extracts subtle features in the current response, such as instantaneous abnormal pulses, resonant peak shifts at specific frequencies, or changes in energy distribution, forming a set of characteristic frequency components. Compared to simply observing time-domain waveforms or performing global Fourier transforms, this method can more precisely correlate the changes in the electrical characteristics of specific unit circuits within the memory module under dynamic stress, providing highly discriminative input features for anomaly pattern recognition models and improving the accuracy of fault type identification and severity assessment. Attached Figure Description

[0065] Figure 1 This is a flowchart of the fault detection method for computer memory modules according to the present invention;

[0066] Figure 2 A flowchart for obtaining the dynamic current response sequence;

[0067] Figure 3 A flowchart for extracting the set of characteristic frequency components;

[0068] Figure 4 A combined voltage-temperature risk heatmap for capacitor aging failures;

[0069] Figure 5 A floor plan of the process for selecting replacement memory modules in case of severe failure or discontinuation. Detailed Implementation

[0070] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0071] In the description of this invention, it should be understood that the terms "length," "width," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientation or positional relationships, are based on the orientation or positional relationships shown in the accompanying drawings and are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Furthermore, in the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0072] See Figure 1 The system applies periodically varying voltage signals and temperature stresses to the computer memory module, thereby obtaining its dynamic current response sequence under conditions of fluctuating operating voltage and temperature. Multi-scale time-frequency transformation is performed on the obtained dynamic current response sequence to extract the set of characteristic frequency components exhibited by the memory module under different voltage and temperature combinations. This set of characteristic frequency components is input into a pre-trained anomaly pattern recognition model. This model analyzes the changes in the electrical characteristics of the internal circuitry of the computer memory module to determine whether there are potential fault risks. Finally, based on the specific type and severity of the identified potential fault risks, a structured computer memory module fault diagnosis report is generated, providing specific recommendations for repair or replacement of the memory module.

[0073] See Figure 2In one embodiment of the present invention, a periodically varying voltage signal and temperature stress are applied to a computer memory module, and the dynamic current response sequence of the computer memory module under operating voltage fluctuations and temperature changes is obtained. Taking a DDR4 computer memory module of model XYZ as an example, a composite voltage signal containing stepped voltage changes and periodic sine wave superposition is applied to the power pin of the computer memory module. The generation of the composite voltage signal follows specific rules. The base DC voltage is set to the normal operating voltage of the computer memory module, 1.2 volts. A series of stepped voltages with equal duration and increasing voltage step values ​​are superimposed on the base DC voltage. The step value sequence of the stepped voltage is 0.1 volts, 0.2 volts, and 0.3 volts. A sine wave voltage signal with frequency and amplitude adjusted according to the stepped voltage level is superimposed on each stepped voltage platform. The relationship between the frequency of the sine wave voltage signal and the stepped voltage level is given by the following formula:

[0074]

[0075] in: This represents the instantaneous frequency of a sinusoidal voltage signal. The value represents the sequence number of the voltage level and is a positive integer. The reference frequency is set to 1 kHz, and the relationship between the amplitude and the stepped voltage levels is determined by a linear proportional relationship. The waveform of the entire composite voltage signal is generated by a programmable power controller according to defined rules and calibrated in real time by a voltage monitoring loop. The voltage monitoring loop ensures that the deviation between the actual output of the composite voltage signal and the set value is less than one percent.

[0076] In some embodiments, the computer memory module is placed in a temperature-controlled environmental testing chamber. The temperature of the environmental testing chamber varies according to a preset temperature profile program. The temperature profile program includes increasing the temperature from 25 degrees Celsius to 55 degrees Celsius in 5-degree increments and maintaining stability at each temperature plateau. The maintenance time of each temperature plateau is set to 200 milliseconds. A high-precision current probe is used to measure the total supply current of the computer memory module in real time under the synchronous action of a composite voltage signal and temperature stress. Current data is collected at a constant sampling frequency of 100 kHz, and the measurement accuracy of the high-precision current probe reaches the microampere level. The collected current data is segmented according to each stage of the applied composite voltage signal and each temperature plateau of the temperature profile program to obtain multiple segments of current data. Each segment of current data is preprocessed, including removing DC bias components and suppressing high-frequency noise components. Removing DC bias components is achieved by calculating the average value of each segment of current data and subtracting the average value from the original data. Suppressing high-frequency noise components is achieved using a Butterworth low-pass filter, which is set to order 4 and cutoff frequency to 10 kHz. After obtaining the preprocessed current data segments, the preprocessed current data segments are spliced ​​and aligned according to the test time sequence to form a dynamic current response sequence that can reflect the current changes of the computer memory module during the entire voltage and temperature stress loading process.

[0077] It is understandable that the data comparison is reflected in the current data segments at different temperature platforms. For example, the current data segment at a temperature platform of 25 degrees Celsius differs from the current data segment at a temperature platform of 55 degrees Celsius in terms of amplitude and fluctuation characteristics. This difference is reflected through the overall change in the dynamic current response sequence. In specific implementation, the duration of the stepped voltage is set to 100 milliseconds, and the reference frequency of the sinusoidal voltage signal is... The frequency is set to 1 kHz, and the scaling factor in the linear proportional relationship is set to 0.05 V. Real-time calibration of the voltage monitoring loop is continuously performed to ensure that the actual voltage fluctuation of the composite voltage signal on each step voltage platform is within ±1% of the set value. In some embodiments, the temperature platform maintenance time of the temperature profile program is set to 200 milliseconds based on the computer memory module's warm-up time constant to ensure that the computer memory module reaches a thermally stable state at each temperature point. The sampling frequency of the high-precision current probe at 100 kHz ensures that the dynamic current response sequence has sufficient time resolution to capture transient current changes. Optionally, the Butterworth low-pass filter in the preprocessing step is implemented in the data processing unit as a digital filter. After removing the DC bias component, the mean of each current data segment is zero, facilitating signal analysis in the subsequent feature extraction stage. It can be understood that the splicing and alignment operations of the dynamic current response sequence are based on timestamp information, which is synchronously recorded by the data acquisition system to ensure a strict correspondence between the composite voltage signal change stages, the temperature profile program change stages, and the current data segments.

[0078] See Figure 3 In one embodiment of the present invention, a multi-scale time-frequency transformation is performed on the dynamic current response sequence to extract a set of characteristic frequency components. This process begins by selecting a set of bandpass filters with different center frequencies and bandwidths. The bandpass filter set specifically comprises five independent bandpass filters, with center frequencies set to 1 kHz, 5 kHz, 10 kHz, 50 kHz, and 100 kHz, and corresponding bandwidths of 2 kHz, 4 kHz, 8 kHz, 20 kHz, and 40 kHz, respectively. This set of bandpass filters is used to perform parallel filtering on the dynamic current response sequence. Each data point of the dynamic current response sequence simultaneously passes through the five independent bandpass filters, thereby generating five filtered sub-sequences that are distinct across frequency bands.

[0079] For each filtered subsequence output by a bandpass filter, its complex form Hilbert transform is calculated using convolution operations. The Hilbert transform yields the analytic signal for each subsequence, which is a complex sequence. The real part of the complex sequence represents the original filtered subsequence, and the imaginary part is the result of the Hilbert transform. Based on the analytic signal, the instantaneous amplitude and instantaneous frequency of each subsequence are calculated. The instantaneous amplitude is the magnitude of the complex sequence of the analytic signal, and the instantaneous frequency is the instantaneous rate of change of the phase of the complex sequence of the analytic signal. After calculation, the instantaneous amplitude and instantaneous frequency curves within the corresponding frequency band of each bandpass filter are obtained. These curves are arrays of the same length as the original dynamic current response sequence.

[0080] In some embodiments, the main oscillation modes in the dynamic current response sequence are identified based on the distribution characteristics of the instantaneous frequency curve. The instantaneous frequency curve is smoothed using a moving average window method to remove random fluctuation noise, with the window width set to 50 data points. On the smoothed instantaneous frequency curve, relatively stable plateau regions are identified. The criterion for identifying a plateau region is that the frequency fluctuation range of 200 consecutive data points is less than 10 Hz. The center frequency and duration of each plateau region that meets the criteria are defined as a candidate oscillation mode. The center frequency of the candidate oscillation mode is obtained by calculating the average of all frequency points within the plateau region.

[0081] Cluster analysis was performed on all identified candidate oscillation modes using a density-based clustering algorithm. Candidate oscillation modes with a center frequency difference less than 20 Hz and a duration ratio between 0.8 and 1.2 were merged. The stability index of each merged oscillation mode was calculated. The stability index is defined as the reciprocal of the coefficient of variation of the frequency over the duration of each oscillation mode, expressed by the following formula:

[0082]

[0083] in: An index representing the stability of oscillation modes. This represents the standard deviation of the frequency of an oscillation mode over its duration. This represents the average frequency of the oscillation mode over its duration. Several oscillation modes with stability indices exceeding a predetermined threshold and long durations are selected as the dominant oscillation modes in the dynamic current response sequence. The predetermined threshold is set to 5, and the lower limit of the duration is set to 300 milliseconds.

[0084] It is understandable that the data comparison reflects the features extracted by different bandpass filter channels. For example, the instantaneous frequency curve output by a bandpass filter with a center frequency of 1 kHz may exhibit low-frequency drift characteristics, while the instantaneous frequency curve output by a bandpass filter with a center frequency of 100 kHz may exhibit high-frequency jitter characteristics. In specific implementation, the average frequency of each determined main oscillation mode and the calculated frequency stability index are recorded. Near the average frequency of each main oscillation mode, a corresponding signal segment is extracted from the original dynamic current response sequence. The length of the extracted signal segment is 100 times the period corresponding to the center frequency. Power spectral density estimation is performed on the extracted corresponding signal segment using the Welch method, which divides the signal segment into sub-segments of 256 points with 50% overlap allowed. Spectral peak features are extracted from the power spectral density estimation results. These features include peak frequency, peak amplitude, and half-width at half-maximum (WHM). The peak frequency is the frequency corresponding to the largest amplitude point in the power spectral density estimation result, and the WHM is the frequency width corresponding to half the peak amplitude of the power spectral density estimation curve.

[0085] Optionally, the Hilbert transform is calculated in the digital signal processor using a fast convolution algorithm, and the moving average window smoothing is performed in real time after the instantaneous frequency curves are extracted. In some embodiments, the neighborhood search radius parameter of the density-based clustering algorithm is set to 25 Hz, and the minimum number of samples parameter is set to 2. It can be understood that the set of characteristic frequency components is organized using a hierarchical dictionary structure. The first layer of the hierarchical dictionary structure uses the center frequency identifier of the bandpass filter as the key, and the second layer stores the corresponding array of instantaneous amplitude curves, the array of instantaneous frequency curves, the list of identified major oscillation modes, and the spectral peak feature dictionary corresponding to each major oscillation mode.

[0086] In one embodiment of the present invention, a set of characteristic frequency components is input into a pre-trained anomaly pattern recognition model to determine whether a computer memory module has potential fault risks. This process uses the set of characteristic frequency components extracted from a DDR4 computer memory module of model XYZ as a specific input example. The set of characteristic frequency components includes instantaneous amplitude curves, instantaneous frequency curves obtained from five bandpass filter channels, and spectral peak feature data extracted from the main oscillation modes. The instantaneous amplitude curves and instantaneous frequency curves are one-dimensional arrays of length N, and the spectral peak feature data is an array containing peak frequency, peak amplitude, and half-width at half-maximum. The instantaneous amplitude curves, instantaneous frequency curves, and spectral peak feature data in the set of characteristic frequency components are normalized to a fixed dimension. The normalization operation uses the max-min scaling method to linearly map the original data to the [0,1] interval. For curve data of length N, a linear interpolation method is used to adjust it to a fixed length L, where the value of L is set to 1000.

[0087] In some embodiments, the normalized data is grouped according to time-domain and frequency-domain features. Instantaneous amplitude curves and instantaneous frequency curves are classified into the time-domain feature group, and spectral peak feature data is classified into the frequency-domain feature group. The data from the time-domain and frequency-domain feature groups are respectively input into different feature extraction branches in the anomaly pattern recognition model. The anomaly pattern recognition model includes two feature extraction branches specifically for processing time-domain features and one feature extraction branch for processing frequency-domain features. Each feature extraction branch converts the input feature data into a high-dimensional feature vector through multiple nonlinear transformations. Each feature extraction branch receives normalized feature data, which includes instantaneous amplitude curve data, instantaneous frequency curve data, or spectral peak feature data. The first fully connected layer of each feature extraction branch maps the input feature data to a first hidden layer representation with a first number of neurons, the number of neurons being set to 512. The first hidden layer representation is then subjected to a nonlinear transformation using the ReLU activation function to obtain the first nonlinear transformation result. The second fully connected layer of each feature extraction branch maps the first nonlinear transformation result to a second hidden layer representation with a second number of neurons (set to 256). A ReLU activation function is then used to perform a nonlinear transformation on the second hidden layer representation to obtain the second nonlinear transformation result. The third fully connected layer of each feature extraction branch maps the second nonlinear transformation result to a high-dimensional feature vector with a predetermined dimension (set to 128). A ReLU activation function is then used to perform a final nonlinear transformation on the high-dimensional feature vector to obtain the final high-dimensional feature vector output by each feature extraction branch.

[0088] The high-dimensional feature vectors output from each feature extraction branch are concatenated and fused. This concatenation and fusion operation combines three 128-dimensional feature vectors end-to-end into a single 384-dimensional vector. The resulting concatenated and fused vector represents the comprehensive feature representation of the computer memory module under the current test conditions; this comprehensive feature representation is a 384-dimensional real-number vector. This comprehensive feature representation is then input into the classification decision network of the anomaly pattern recognition model. The classification decision network is a neural network with two fully connected layers. The first fully connected layer maps the 384-dimensional input to a 64-dimensional space, and the second fully connected layer maps the 64-dimensional input to the output layer. Based on classification boundaries learned from a large amount of known fault state data of computer memory modules, the classification decision network outputs a probability distribution of the computer memory module belonging to various potential fault types. The number of neurons in the output layer corresponds to the number of defined fault types. For example, setting the output layer to four neurons corresponds to four types: "normal," "capacitor aging," "address line defect," and "chip overheating damage." The Softmax function is then used to convert the output into a probability distribution. Based on the output probability distribution, fault types with probability values ​​exceeding a preset threshold are selected as potential fault risks of the computer memory module. The preset threshold is set to 0.6. If the probability values ​​of all types do not exceed 0.6, it is determined that the computer memory module has no potential fault risk.

[0089] It is understandable that the data comparison reflects the different mapping results of the trained model on the comprehensive feature representations of normal memory module samples and faulty memory module samples. For example, the probability of a normal sample in the "normal" category of the output layer is close to 1, while the probability in other fault categories is close to 0. The training process of the pre-trained anomaly pattern recognition model specifically includes several steps. A large number of computer memory module samples with known fault states and normal states are collected to form a training set, which contains 200 normal state samples and 150 samples with different fault states. A specified composite voltage signal and temperature stress are applied to each computer memory module sample to obtain its dynamic current response sequence, and the feature frequency component set of each sample is extracted according to a predetermined method. The feature frequency component set is used as input data, and the known fault state or normal state of the computer memory module sample is used as a one-hot encoded label to jointly form the training dataset.

[0090] In practice, an initial anomaly pattern recognition model is constructed, comprising multiple feature extraction branches and a classification decision network. The structure of this initial model is consistent with the aforementioned model structure used for inference. Supervised training is then performed on the initial anomaly pattern recognition model using a training dataset. The loss function used during training is the cross-entropy loss function, calculated as follows:

[0091]

[0092] in: Indicates the loss value. Indicates the total number of fault categories. Indicates the sample at the 1st Real labels in each category This indicates that the model predicts the sample belongs to the first... The probabilities of each category are calculated. Model parameters are adjusted using backpropagation to minimize the loss value. The optimizer employs the Adam algorithm, with an initial learning rate of 0.001. The classification performance of the trained anomaly pattern recognition model is evaluated on an independent validation dataset containing 50 samples not used in training. Evaluation metrics include accuracy, precision, and recall. Based on the evaluation results, the model structure or parameters are optimized. For example, if the model underfits on the validation set, the number of neurons in the fully connected layer of the feature extraction branch is increased; if overfitting occurs, a Dropout layer is added after the fully connected layer. The final result is a pre-trained anomaly pattern recognition model that performs stably on the validation set.

[0093] Optionally, the weight parameters of the fully connected layer in the feature extraction branch are initialized using the Xavier method, and the gradient clipping threshold in the backpropagation algorithm is set to 1.0 to prevent gradient explosion. In some embodiments, the training dataset is divided into mini-batch input models, with each batch containing 32 samples, and the training process lasts for a total of 100 epochs. It can be understood that during model training and validation, the fault type label originates from the post-processing physical inspection and analysis of the sample memory modules. This physical inspection and analysis includes examining the internal structure of the chip using an electron microscope and measuring the unit circuit parameters using a precision multimeter. Through the above methods, the training and application process of the abnormal pattern recognition model is completed, achieving automated judgment of potential fault risks in computer memory modules.

[0094] In one embodiment of the present invention, a computer memory module fault diagnosis report is generated. The process begins by querying a preset computer memory module fault knowledge base for the identified potential fault risk type. The computer memory module fault knowledge base is a database that stores fault modes and corresponding information. Taking the identified potential fault risk type as "capacitor aging" as an example, the query operation retrieves the typical manifestations, physical causes, and effects of "capacitor aging" faults from the computer memory module fault knowledge base. Typical manifestations include "increased current ripple under low-frequency voltage fluctuations," physical causes include "increased equivalent series resistance of the memory cell filter capacitor," and effects include "potentially leading to data write errors."

[0095] Based on the fault type probability values ​​output by the anomaly pattern recognition model, and combined with the voltage and temperature conditions encountered during the test, the severity level of potential faults is assessed. The anomaly pattern recognition model outputs a probability value of 0.85 for "capacitor aging," and this fault characteristic significantly appears during the test within a voltage gradient of 1.3V to 1.4V and a temperature range of 45°C to 55°C. The severity level is assessed using a comprehensive scoring function that integrates probability values ​​and test condition factors. The expression for the comprehensive scoring function is:

[0096]

[0097] in: This indicates the overall score. This represents the probability value of the fault type output by the model. This indicates the voltage range across which fault characteristics appear. Indicates the maximum voltage span applied during the test. This indicates the temperature range across which the fault characteristics occur. Indicates the maximum temperature span applied during the test. , , These are weighting coefficients, with values ​​set to 0.7, 0.15, and 0.15 respectively.

[0098] The model information, serial number information, test environment parameters, applied composite voltage signal parameters, temperature stress parameters, key indicators of the extracted characteristic frequency component set, identified potential fault risk types and levels, and typical manifestations and physical causes obtained from the computer memory module fault knowledge base are integrated into a structured document. The structured document adopts JSON format, and the root node of the structured document contains keys such as "Device Information", "Test Parameters", "Characteristic Indicators", "Diagnostic Results", and "Knowledge Base Information". Key characteristic indicators are stored in tabular form in the structured document, as shown in Table 1.

[0099] Table 1: Summary Table of Key Feature Frequency Indicators

[0100] Filter center frequency The average frequency of the main oscillation mode Stability Indicators Peak amplitude 1 1.05 8.2 -12.3 10 9.80 5.5 -8.7 100 101.20 6.8 -15.1

[0101] In some embodiments, the computer memory module fault knowledge base is implemented in the form of a relational database table, and retrieval is performed using a structured query language based on fault type encoding. Weighting coefficients , , The value can be adjusted based on feedback from historical maintenance data to optimize the accuracy of severity level assessment. It's understandable that data comparison shows that the same fault type but different probability values ​​or different test conditions will result in different comprehensive scores, leading to different severity level determinations. For example, a "capacitor aging" fault with the same probability value of 0.8 will receive a higher comprehensive score and a more severe level when occurring over a wider voltage and temperature range than when it occurs over a narrower range.

[0102] Following the pre-defined computer memory module fault diagnosis report template, fill in the information from the structured document into the corresponding locations. The computer memory module fault diagnosis report template is a document file containing fixed chapters and placeholders. The fixed chapters include "Summary," "Test Summary," "Feature Analysis," "Diagnostic Conclusion," and "Appendix." A formatted computer memory module fault diagnosis report containing text, key data tables, and characteristic curve diagrams is generated. The characteristic curve diagrams are plotted as line graphs using a plotting library, drawing the instantaneous amplitude curve array and instantaneous frequency curve array stored in the structured document, and then embedded into the report document.

[0103] In practice, the computer memory module fault diagnosis report is output as a PDF file. The naming convention for the report file includes the computer memory module serial number and the testing date. The "Test Environment Parameters" section in the structured document includes the model and calibration date of the environmental test chamber, and the "Composite Voltage Signal Parameters" section includes the stepped voltage sequence and the sine wave amplitude scaling factor. Optional, a comprehensive score is also included. The mapping rule to severity level is defined as follows: Corresponding to "slight", Corresponding to "medium", The term "serious" corresponds to this. In some embodiments, the "Feature Analysis" section of the computer memory module fault diagnosis report template includes a dedicated area for embedding a "Summary of Key Feature Frequency Indicators" table. It can be understood that the "physical causes" information obtained from the computer memory module fault knowledge base will be formatted and filled into the "Root Cause Analysis" paragraph of the "Diagnostic Conclusion" section of the diagnosis report. Through this method, a complete computer memory module fault diagnosis report is generated.

[0104] See Figure 4The graph presents the failure probability distribution of computer memory modules under different combinations of applied voltage and ambient temperature. The failure probability is mapped using color gradients, with the right-hand color scale showing a probability range from 0 (white) to 0.8 (dark purplish-red). The core failure area, marked by a black box, corresponds to the 1.3-1.4V voltage range and 45-55℃ temperature range defined in the project. This area is dark purplish-red, indicating that the failure probability of capacitor aging is highest under these conditions, reaching approximately 0.8, which perfectly matches the project's conclusion that "capacitor aging failures occur significantly in the 1.3-1.4V / 45-55℃ range." Looking at the overall heatmap distribution, in areas with voltages below 1.3V or above 1.4V, and temperatures below 45℃ or above 55℃, the colors are mostly light orange or light pink, with a significantly lower failure probability. This also verifies the dependence of capacitor aging failures on specific voltage and temperature combinations.

[0105] In one embodiment of the invention, a suggested solution for repairing or replacing a computer memory module is provided, the process of which begins with a decision based on a potential fault severity level assessed in a computer memory module fault diagnosis report. For example, if a diagnostic report assesses a potential fault severity level as "medium," the severity level information in the computer memory module fault diagnosis report is derived from a comprehensive score obtained in a previous step. The comprehensive score mapping rule defines a "medium" level as a comprehensive score S meeting certain conditions. Based on the severity level of the potential fault assessed in the computer memory module fault diagnosis report, if the level is "minor" or "moderate," the system generates repair suggestions for the computer memory module and matches detailed repair procedure instructions applicable to the fault type and computer memory module model from the repair policy library. The repair policy library is a database that associates fault types, memory module models, and repair operation instructions; the matching process is achieved by querying the fault type code and memory module model code.

[0106] In some embodiments, the repair procedure guide includes a specific list of operating steps, a list of required tools, and precautions. For example, for a DDR4 computer memory module with the fault type "capacitor aging" and model number XYZ, the matched repair procedure guide might include specific instructions such as "use a hot air gun to heat the back of the circuit board at 220 degrees Celsius for 30 seconds to remove the aging capacitors," "use a multimeter to measure the solder joint impedance, which must be below 5 ohms," and "install a new 100μF surface-mount capacitor." Records in the repair strategy library are entered after accumulating and verifying historical data of repair events. Each repair procedure guide is associated with an estimated operation time and a success probability indicator. The formula for calculating the success probability indicator is:

[0107]

[0108] in: This indicates the probability of success of the repair procedure. This indicates the number of historical cases where this guideline was used and successfully repaired. This indicates the total number of cases in history where this guidance has been adopted.

[0109] It's understandable that data comparisons demonstrate how different severity levels of potential faults trigger different recommendation paths. For example, when the severity level of a potential fault assessed in the computer memory module fault diagnosis report is "Severe," the decision logic will shift to recommending replacement. Based on the severity level assessed in the computer memory module fault diagnosis report, if the level is "Severe" or the computer memory module model is discontinued and no repair parts are available, the system generates a recommendation to replace the computer memory module and retrieves a list of compatible memory module models of the same or newer generation from the compatibility database. The compatibility database stores compatibility pairing information between different motherboard models and memory module models; the search operation uses the original motherboard model of the computer memory module recorded in the computer memory module fault diagnosis report as the query key.

[0110] In practice, the compatibility database is updated in sync with the product specification lists and verified compatibility reports released by motherboard manufacturers. When generating replacement recommendations, the system prioritizes memory module models of the same generation as the faulty memory module with a capacity no less than the original. If newer generation compatible products exist, they are also listed as optional upgrade options. The repair procedure guide or list of recommended computer memory module models is appended to the computer memory module fault diagnosis report as a suggested solution appendix. This appendix is ​​embedded at the end of the computer memory module fault diagnosis report PDF document as a separate chapter or table. Optionally, the success rate index of the repair procedure guide... This information will be appended as a note next to the corresponding guidance steps for operator reference. In some embodiments, if it is determined that the computer memory module model is discontinued and no repair parts are available, the system will simultaneously perform online queries from multiple parts supplier inventory databases to confirm parts availability. A replacement recommendation will only be triggered if all query results show no stock. It is understood that the list of compatible memory module models in the replacement recommendation is typically sorted according to market price or performance indicators, and the sorting logic can be configured in the system settings.

[0111] See Figure 5In the entire process of replacing memory modules with those that have suffered severe failures or are discontinued, the business logic is divided into three levels: the output layer, the decision layer, and the retrieval layer, linked together by the sequence number of the operation steps. Specifically, in the output layer, the failure level is determined (severe) or the discontinuation status is confirmed. This determination triggers the subsequent replacement selection process. The process then enters the decision layer, where the first step is to read the original motherboard model, which is the core basis for subsequent compatibility matching. Next, the process moves to the retrieval layer, using the original motherboard model as the search key to perform a matching search for same-generation / new-generation memory modules in the compatibility database. After the search is complete, the process returns to the decision layer to filter the search results by "same-generation / new-generation" to prioritize compatibility and performance continuity. It then enters the output layer, sorting the filtered models by price / performance, and returns to the decision layer to generate a standardized recommendation list. Finally, the output layer outputs a complete replacement suggestion including model, compatibility, and priority. The hierarchical route planning, through the flow and information exchange between levels, realizes a closed loop of the entire chain from fault triggering to outputting a precise replacement solution. Among them, the retrieval of the compatibility database and the multi-dimensional sorting strategy are the core support for ensuring efficient and accurate replacement selection.

[0112] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention in any other way. Any person skilled in the art may make changes or modifications to the above-disclosed technical content to create equivalent embodiments that can be applied to other fields. However, any simple modifications, equivalent changes, and modifications made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the protection scope of the present invention.

Claims

1. A fault detection method for computer memory modules, characterized in that, Includes the following steps: Apply periodically varying voltage signals and temperature stress to computer memory modules to obtain the dynamic current response sequence of the computer memory modules under operating voltage fluctuations and temperature changes; Multi-scale time-frequency transformation is performed on the dynamic current response sequence to extract the set of characteristic frequency components of computer memory modules under different voltage and temperature combinations. The set of characteristic frequency components is input into a pre-trained abnormal pattern recognition model. Based on the changes in the electrical characteristics of the internal unit circuits of the computer memory module, it is determined whether there is a potential fault risk in the computer memory module. Based on the type and level of potential fault risks, generate a computer memory module fault diagnosis report and provide suggested solutions for repairing or replacing the computer memory module. The process involves applying periodically varying voltage signals and temperature stress to the computer memory module to obtain a dynamic current response sequence of the computer memory module under conditions of operating voltage fluctuations and temperature changes. Specifically: A composite voltage signal consisting of a stepped voltage change and a periodic sine wave is applied to the power pin of the computer memory module. At the same time, the computer memory module is placed in a temperature-controlled environmental test chamber, and the ambient temperature is changed according to a preset temperature profile program. A high-precision current probe is used to measure the total power supply current of the computer memory module in real time under the synchronous action of composite voltage signal and temperature stress, and current data is collected at a constant sampling frequency. The acquired current data is segmented according to each stage of change of the applied composite voltage signal and each temperature plateau of the temperature profile program to obtain multiple segments of current data. Each segment of current data is preprocessed, including removing DC bias components and suppressing high-frequency noise components, to obtain preprocessed current data segments. The preprocessed current data segments are spliced ​​and aligned according to the test time sequence to form a dynamic current response sequence that can reflect the current changes of the computer memory module during the entire voltage and temperature stress loading process. The process of performing multi-scale time-frequency transformation on the dynamic current response sequence to extract the set of characteristic frequency components of the computer memory module under different voltage and temperature combinations is as follows: A set of bandpass filters with different center frequencies and bandwidths are selected to perform parallel filtering on the dynamic current response sequence; For each filtered subsequence output by a bandpass filter, calculate its complex form Hilbert transform to obtain the analytic signal of each subsequence; Calculate the instantaneous amplitude and instantaneous frequency of the analytic signal for each subsequence to obtain the instantaneous amplitude curve and instantaneous frequency curve within the corresponding frequency band of each bandpass filter; Based on the distribution characteristics of the instantaneous frequency curve, the main oscillation modes in the dynamic current response sequence are identified, and the average frequency and frequency stability index of each main oscillation mode are recorded. Near the average frequency of each major oscillation mode, the corresponding segment of the dynamic current response sequence is extracted, the power spectral density of the corresponding segment is estimated, and the spectral peak features, including peak frequency, peak amplitude and full width at half maximum (FWHM), are extracted. The instantaneous amplitude curves, instantaneous frequency curves, average frequencies and frequency stability indices of the main oscillation modes, and spectral peak characteristics of the main oscillation modes corresponding to each bandpass filter are collectively organized into a structured set of characteristic frequency components.

2. The fault detection method for computer memory modules according to claim 1, characterized in that, The step of inputting the set of characteristic frequency components into the pre-trained abnormal pattern recognition model, and determining whether the computer memory module has potential fault risks based on changes in the electrical characteristics of the internal unit circuits, specifically involves: The instantaneous amplitude curve, instantaneous frequency curve, and spectral peak feature data in the characteristic frequency component set are normalized to a fixed dimension respectively. The normalized data are grouped according to time domain features and frequency domain features, and then input into different feature extraction branches in the anomaly pattern recognition model. Each feature extraction branch transforms the input feature data into a high-dimensional feature vector through multiple nonlinear transformations. The high-dimensional feature vectors output from each feature extraction branch are concatenated and fused to obtain a comprehensive feature representation of the computer memory bar under the current test conditions; The comprehensive feature representation is input into the classification decision network in the anomaly pattern recognition model. The classification decision network outputs the probability distribution of computer memory modules belonging to various potential fault types based on the classification boundaries learned from a large amount of computer memory module data with known fault states. Based on the output probability distribution, fault types with probability values ​​exceeding a preset threshold are selected as potential fault risks of the computer memory module. If all probabilities do not exceed the preset threshold, it is determined that the computer memory module has no potential fault risks.

3. A fault detection method for computer memory modules according to claim 2, characterized in that, The training process of the pre-trained anomaly pattern recognition model specifically includes: A large number of computer memory module samples with known fault states and normal states were collected. The composite voltage signal and temperature stress were applied to each computer memory module sample to obtain its dynamic current response sequence. Extract the set of characteristic frequency components for each computer memory module sample; The training dataset is constructed by using the set of feature frequency components as input data and the known fault or normal states of computer memory stick samples as labels. Construct an initial abnormal pattern recognition model that includes multiple feature extraction branches and a classification decision network; The initial abnormal pattern recognition model is trained in a supervised manner using the training dataset. The model parameters are adjusted through the backpropagation algorithm to minimize the difference between the model's predicted output and the true label. The classification performance of the trained anomaly pattern recognition model is evaluated on an independent validation dataset, and the model structure or parameters are optimized based on the evaluation results to obtain a pre-trained anomaly pattern recognition model.

4. A fault detection method for computer memory modules according to claim 1, characterized in that, The process of generating a computer memory module fault diagnosis report based on the type and level of potential fault risks is as follows: For the identified potential fault risk types, query the preset computer memory module fault knowledge base to obtain the typical manifestations, physical causes and effects of the potential fault risk types; Based on the probability value of the fault type output by the abnormal pattern recognition model, and combined with the voltage and temperature conditions that occur during the test, the severity level of the potential fault is assessed. The model information, serial number information, test environment parameters, applied composite voltage signal parameters, temperature stress parameters, key indicators of the extracted characteristic frequency component set, identified potential fault risk types and levels, and typical manifestations and physical causes obtained from the computer memory module fault knowledge base are integrated into a structured document. Following the preset computer memory module fault diagnosis report template, fill in the various information items in the structured document into the corresponding positions, and format and generate a computer memory module fault diagnosis report containing text, key data tables, and characteristic curve diagrams.

5. A fault detection method for computer memory modules according to claim 4, characterized in that, The proposed solutions for repairing or replacing computer memory modules are as follows: Based on the severity level of the potential fault assessed in the computer memory module fault diagnosis report, if the level is minor or moderate, it is recommended to repair the computer memory module and match detailed repair steps applicable to the fault type and computer memory module model from the repair strategy library. If the severity level is critical or the computer memory module model is discontinued and no repair parts are available, it is recommended to replace the computer memory module and search the compatibility database for a list of memory module models of the same or newer generation that are compatible with the original motherboard of the computer memory module. Include the repair procedure guide or a list of recommended computer memory module models as a suggested solution appendix after the computer memory module fault diagnosis report.

6. A fault detection method for computer memory modules according to claim 1, characterized in that, The generation of the composite voltage signal is specifically as follows: Define a base DC voltage as the normal operating voltage of the computer memory module; A series of stepped voltages with equal durations and increasing voltage step values ​​are superimposed on the base DC voltage. On each stepped voltage platform, a sinusoidal voltage signal with frequency and amplitude adjusted according to the stepped voltage level is superimposed. The waveform of the entire composite voltage signal is generated by the programmable power controller according to defined rules and calibrated in real time by the voltage monitoring loop.

7. A fault detection method for computer memory modules according to claim 1, characterized in that, The main oscillation modes in the dynamic current response sequence are identified based on the distribution characteristics of the instantaneous frequency curve, specifically as follows: The instantaneous frequency curve is smoothed by filtering to remove random fluctuation noise; On the smoothed instantaneous frequency curve, find plateau regions where the frequency values ​​are relatively stable. The center frequency and duration of each plateau region are defined as a candidate oscillation mode. Cluster analysis is performed on candidate oscillation modes to merge those with similar center frequencies and durations. Calculate the stability index of each oscillation mode after merging, whereby the stability index is defined as the reciprocal of the coefficient of variation of the frequency over the duration of each oscillation mode; Several oscillation modes with stability indices exceeding a predetermined threshold and long durations are selected and identified as the main oscillation modes in the dynamic current response sequence.

8. A fault detection method for computer memory modules according to claim 2, characterized in that, Each feature extraction branch transforms the input feature data into a high-dimensional feature vector through multiple nonlinear transformations, specifically: Each feature extraction branch receives normalized feature data, which includes instantaneous amplitude curve data, instantaneous frequency curve data, or spectral peak feature data. The first fully connected layer of each feature extraction branch maps the input feature data to a first hidden layer representation with a first number of neurons, and performs a nonlinear transformation on the first hidden layer representation through a first activation function to obtain a first nonlinear transformation result. The second fully connected layer of each feature extraction branch maps the first nonlinear transformation result to the second hidden layer representation with a second number of neurons, and performs a nonlinear transformation on the second hidden layer representation through a second activation function to obtain the second nonlinear transformation result. The third fully connected layer of each feature extraction branch maps the result of the second nonlinear transformation to a high-dimensional feature vector with a predetermined dimension, and performs a final nonlinear transformation on the high-dimensional feature vector through the third activation function to obtain the final high-dimensional feature vector output by each feature extraction branch.

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