Fault decision-making system and chip for functional safety signal

Abstract

The invention relates to the technical field of electric digital data processing, in particular to a fault decision-making system and chip for functional safety signals. The system comprises a data acquisition layer, a control layer and an execution layer, the data acquisition layer is used for sending a functional safety signal and running state data of the tested chip, which are acquired regularly, to the control layer, and providing running configuration data of the tested chip; the control layer determines whether the function safety signal is wrong after receiving the function safety signal and the operation state data, and if the function safety signal is wrong, the control layer determines the fault level of the function safety signal and sends an action execution instruction matched with the fault level to the execution layer; and the execution layer executes the fault processing action. According to the embodiment of the invention, whether the function safety signal is wrong or not can be comprehensively and accurately detected on the basis of the multi-dimensional information, and when the function safety signal is detected to be wrong, a proper fault processing action can be accurately executed on the basis of the fault level of the function safety signal, so that invalid restart is effectively reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of electric digital data processing, and in particular to a functional safety signal fault decision system and a chip. BACKGROUND

[0002] A safety monitoring module for protecting the chip according to the functional safety (FUSA) standard is usually arranged inside the chip. During the running of the chip, the safety monitoring module inside the chip outputs a functional safety signal. The functional safety signal can be a digital signal for triggering a fault handling operation. Functional safety signal error refers to a digital signal for representing that a fault occurs inside the measured chip. When no fault occurs inside the chip, the functional safety signal output by the safety monitoring module is a digital signal for representing that no fault occurs inside the chip. When a fault occurs inside the chip, the functional safety signal output by the safety monitoring module is a digital signal for representing that a fault occurs inside the chip. The fault handling operation can be an operation that can be executed to repair the fault occurring inside the chip. During the running of the chip, it is necessary to detect whether the functional safety signal in the chip is incorrect, and a fault handling operation is executed each time the functional safety signal is detected to be incorrect.

[0003] In the related art, a common fault decision scheme for the functional safety signal is as follows: the functional safety signal output by the safety monitoring module is detected to determine whether the functional safety signal in the chip is incorrect. When the functional safety signal is detected to be incorrect each time, a chip restart is triggered to repair the fault occurring inside the chip. The fault decision scheme for the functional safety signal in the related art only detects according to a single functional safety signal, and the accuracy of the detection process is low, and accurate detection cannot be performed in combination with the running state of the chip. The fault decision scheme for the functional safety signal in the related art does not differentiate between the fixed reset action when the functional safety signal is detected to be incorrect, and invalid restart can be caused by factors such as electromagnetic interference and transient voltage fluctuation, and blind execution of the restart reduces the frequency and stability of the chip, causes chip life loss, and reduces product yield. SUMMARY

[0004] The present application provides a functional safety signal fault decision system and a chip to solve the problem that the accuracy of the detection process of the fault decision scheme for the functional safety signal in the related art is low, accurate detection cannot be performed in combination with the running state of the chip, invalid restart can be caused by factors such as electromagnetic interference and transient voltage fluctuation, the frequency and stability of the chip are reduced, chip life loss is caused, and product yield is reduced.

[0005] According to an aspect of the present application, a functional safety signal fault decision system is provided, comprising: a data acquisition layer, a control layer, and an execution layer. The data acquisition layer is used to send the functional safety signals and operating status data of the chip under test collected at regular intervals to the control layer, and to provide the control layer with the operating configuration data of the chip under test. The control layer is configured to, upon receiving a functional safety signal and operational status data, determine detection reference data matching the current operational status of the chip under test based on the functional safety signal and chip status data; wherein the chip status data is at least one of the operational status data or the operational configuration data, and the detection reference data is at least one of a fault decision configuration mode, a dynamic safety threshold, or a sensing sampling strategy; and determine whether the functional safety signal is erroneous based on the functional safety signal, the operational status data, and the detection reference data; if the functional safety signal is erroneous, determine the fault level of the functional safety signal and send an action execution instruction matching the fault level to the execution layer; The execution layer is used to perform fault handling actions according to the received action execution instructions.

[0006] The data acquisition layer includes a multi-source information acquisition unit; The multi-source information acquisition unit is used to acquire the functional safety signals and operating status data of the chip under test according to a preset acquisition frequency, and send the periodically acquired functional safety signals and operating status data of the chip under test to the control layer. The operating status data includes at least one of the following: power supply voltage, operating current, chip junction temperature, load rate, software logs, or operating scenario.

[0007] The data acquisition layer includes a static policy storage unit; The static strategy storage unit is used to store the operating configuration data of the chip under test; The runtime configuration data includes at least one of the following: hotspot functions, optimization strategies, or performance and power consumption thresholds.

[0008] The control layer includes an adaptive optimization unit; The adaptive optimization unit is used to generate a first state embedding vector based on the functional safety signal and chip state data; and input the first state embedding vector into the perception decision model to obtain detection reference data output by the perception decision model that matches the current operating state of the chip under test.

[0009] The control layer includes a fault decision unit; The fault decision unit is configured to generate a second state embedding vector based on the functional safety signal, the operating status data, and the detection reference data; input the second state embedding vector into a signal classification model to obtain the signal type of the functional safety signal output by the signal classification model; if the signal type of the functional safety signal is a true fault signal, then the functional safety signal is determined to be faulty, the second state embedding vector is input into the fault classification model to obtain the fault level of the functional safety signal output by the fault classification model, and an action execution instruction matching the fault level is sent to the execution layer; The signal type is one of a true fault signal, a false error signal, or a non-fault signal, and the fault level is one of a minor fault, a moderate fault, or an emergency fault.

[0010] The execution layer includes a decision response unit; The decision response unit is used to execute a fault handling action corresponding to the action execution instruction after receiving the action execution instruction, and to record the process data of the fault handling action.

[0011] The control layer includes a storage unit; The storage unit is used to store historical fault data of the chip under test.

[0012] The adaptive optimization unit is also used to update the acquisition frequency of the functional safety signals and operating status data of the chip under test according to the sensing sampling strategy.

[0013] The adaptive optimization unit is also used to update the model parameters of the perception decision model based on the historical fault data of the chip under test.

[0014] According to another aspect of this application, a chip is provided that includes a fault decision system for functional safety signals as described in any embodiment of this application.

[0015] In the technical solution of this application embodiment, the data acquisition layer sends the functional safety signals and operating status data of the chip under test (DUT) collected at regular intervals to the control layer, and provides the control layer with the operating configuration data of the DUT. After receiving the functional safety signals and operating status data, the control layer determines the detection reference data matching the current operating status of the DUT based on the functional safety signals and chip status data. Then, based on the functional safety signals, operating status data, and detection reference data, it determines whether the functional safety signals are erroneous. If the functional safety signals are erroneous, the control layer determines the fault level of the functional safety signals and sends the action execution instruction matching the fault level to the execution layer. The execution layer then executes the fault handling action according to the received action execution instruction, thus solving the related problems. The accuracy of fault decision-making schemes for functional safety signals in current technologies is relatively low. They cannot accurately detect errors by combining chip operating status and may lead to invalid restarts due to factors such as electromagnetic interference and transient voltage fluctuations. This reduces chip frequency and stability, resulting in chip lifespan loss and lower product yield. A more comprehensive and accurate solution can be developed based on multi-dimensional information comprised of functional safety signals, operating status data, and detection reference data. This improves the accuracy of the detection process. When a functional safety signal error is detected, appropriate fault handling actions can be precisely executed based on the fault level of the functional safety signal. This effectively reduces invalid restarts, enhances the intelligence of the fault decision-making process, and ensures chip stability and operational continuity.

[0016] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this application, nor is it intended to limit the scope of this application. Other features of this application will become readily apparent from the following description. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a schematic diagram of the structure of a fault decision system for functional safety signals provided in Embodiment 1 of this application.

[0019] Figure 2 This is a schematic diagram of the structure of a fault decision system for functional safety signals provided in Embodiment 2 of this application.

[0020] Figure 3 This is a schematic diagram of the structure of a chip provided in Embodiment 3 of this application. Detailed Implementation

[0021] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0022] It should be noted that the terms "target," "first," "second," etc., used in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising," "including," and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0023] Example 1 Figure 1 This is a schematic diagram of a fault decision system for functional safety signals provided in Embodiment 1 of this application. This embodiment is applicable to situations where, during chip usage, errors in functional safety signals within the chip are detected, and appropriate fault handling actions are executed each time an error in a functional safety signal is detected. Figure 1 As shown, the fault decision system 100 for the functional safety signal may specifically include: a data acquisition layer 101, a control layer 102, and an execution layer 103. Its structure and function are described below.

[0024] The data acquisition layer 101 is used to send the functional safety signals and operating status data of the chip under test collected at regular intervals to the control layer 102, and to provide the control layer 102 with the operating configuration data of the chip under test.

[0025] The control layer 102 is used to, after receiving the functional safety signal and operating status data, determine the detection reference data that matches the current operating status of the chip under test based on the functional safety signal and chip status data; wherein, the chip status data is at least one of operating status data or operating configuration data, and the detection reference data is at least one of fault judgment configuration mode, dynamic safety threshold or perception sampling strategy; based on the functional safety signal, operating status data and detection reference data, determine whether the functional safety signal is erroneous; if the functional safety signal is erroneous, determine the fault level of the functional safety signal, and send the action execution instruction matching the fault level to the execution layer 103.

[0026] The execution layer 103 is used to perform fault handling actions according to the received action execution instructions.

[0027] Optionally, the chip under test (DUT) is a chip that needs to detect whether functional safety signals are erroneous and execute appropriate fault handling actions each time an error in a functional safety signal is detected. The DUT can be an artificial intelligence (AI) chip with specific functions. For example, the DUT is an autonomous driving chip used to implement core functions such as environmental perception, decision control, and path planning.

[0028] Optionally, the functional safety signal of the chip under test (DUT) can be a digital signal generated by the internal safety monitoring module of the DUT to trigger fault handling operations. The safety monitoring module can be a hardware module used to provide safety protection for the DUT according to functional safety standards. A functional safety signal error refers to a digital signal that indicates a fault has occurred within the DUT. When there is no fault within the DUT, the functional safety signal output by the safety monitoring module indicates that no fault has occurred within the DUT. When a fault occurs within the DUT, the functional safety signal output by the safety monitoring module indicates that a fault has occurred within the DUT. The fault handling operation can be an operation that, once executed, can be used to repair the fault that has occurred within the DUT.

[0029] Optionally, the data acquisition layer 101 can be a software module embedded in the chip for periodically acquiring functional safety signals and operating status data of the chip under test, providing the control layer 102 with these data. The control layer 102 can be a software module embedded in the chip for detecting errors in the functional safety signals based on the functional safety signals and chip status data, and controlling the execution layer 103 to perform appropriate fault handling actions each time a functional safety signal error is detected. The execution layer 103 can be a software module embedded in the chip for performing fault handling actions.

[0030] Optionally, the data acquisition layer 101 sends the periodically acquired functional safety signals and operating status data of the chip under test to the control layer 102, and provides the control layer 102 with the operating configuration data of the chip under test. After receiving the functional safety signals and operating status data, the control layer 102 determines the detection reference data matching the current operating status of the chip under test based on the functional safety signals and chip status data. The control layer 102 determines whether the functional safety signals are erroneous based on the functional safety signals, operating status data, and detection reference data. Thus, based on multi-dimensional information composed of functional safety signals, operating status data, and detection reference data, the system comprehensively and accurately detects whether functional safety signals are erroneous, improving the accuracy of the detection process. If the functional safety signal is erroneous, the control layer 102 determines the fault level of the functional safety signal and sends the action execution instruction matching the fault level to the execution layer 103, controlling the execution layer 103 to execute the fault handling action. Therefore, when a functional safety signal error is detected, appropriate fault handling actions can be accurately executed based on the fault level of the functional safety signal. This can effectively reduce invalid restarts, improve the intelligence of the fault decision-making process, and ensure the stability and continuous operation of the chip.

[0031] Optionally, the operating status data of the chip under test may include at least one of the following: the chip's power supply voltage, operating current, chip junction temperature, load rate, software logs, or operating scenario.

[0032] Optionally, the supply voltage of the chip under test can be the externally supplied power voltage detected by the voltage detection unit in the chip under test. The voltage detection unit can be a hardware module set in the chip under test for detecting the externally supplied power voltage.

[0033] Optionally, the operating current of the chip under test can be the current consumed by the chip under test as detected by the current detection unit within the chip under test. The current detection unit can be a hardware module within the chip under test used to detect the current consumed by the chip under test.

[0034] Optionally, the junction temperature of the chip under test can be the internal operating temperature of the chip under test detected by a temperature detection unit within the chip. The temperature detection unit can be a hardware module installed in the chip under test for detecting the internal operating temperature of the chip.

[0035] Optionally, the load rate of the chip under test can be the percentage of the Central Processing Unit (CPU) inside the chip under test that is actually occupied per unit time, as calculated by the load rate calculation unit within the chip under test. The load rate value ranges from 0 to 100%. The load rate calculation unit can be a software module set in the chip under test for calculating the load rate of the chip under test.

[0036] Optionally, the software log of the chip under test (DUT) can be a text file generated internally by the DUT to record the running status of the software within the DUT. The DUT is equipped with a software log storage unit. This software log storage unit can be a software module used to store the software logs of the DUT.

[0037] Optionally, the operating scenario of the chip under test (DUT) can be text generated internally by the DUT to describe its operating state. For example, the DUT's operating scenario could be a low-power mode or a high-performance mode. The DUT includes an operating scenario storage unit. This unit can be a software module for storing the DUT's operating scenarios.

[0038] Optionally, the operational configuration data of the chip under test (DUT) may include at least one of the following: hotspot functions, optimization strategies, and performance / power consumption thresholds. Hotspot functions may be multiple functions that consume significant amounts of CPU time or are frequently called during the operation of the DUT. Optimization strategies may be text describing various strategies for optimizing the operation of the DUT. Performance / power consumption thresholds may be various preset thresholds used during the monitoring of the DUT's performance and power consumption.

[0039] Optionally, in the event of a functional safety signal error, the fault level of the functional safety signal can be text that describes the urgency of the fault represented by the functional safety signal. The fault level can be classified as minor, moderate, or critical. A minor fault level indicates a low urgency of the fault represented by the functional safety signal. A moderate fault level indicates a moderate level of urgency. A critical fault level indicates a high level of urgency. The action execution instruction matching the fault level of the functional safety signal can be an instruction to instruct the execution layer 103 to perform a fault handling action matching the fault level of the functional safety signal. The fault handling action matching the fault level of the functional safety signal is a fault handling action capable of promptly correcting the fault represented by the functional safety signal.

[0040] Optionally, if there are no errors in the functional safety signals, the control layer 102 determines that the current fault decision-making process has ended.

[0041] In the technical solution of this application embodiment, the data acquisition layer sends the functional safety signals and operating status data of the chip under test (DUT) collected at regular intervals to the control layer, and provides the control layer with the operating configuration data of the DUT. After receiving the functional safety signals and operating status data, the control layer determines the detection reference data matching the current operating status of the DUT based on the functional safety signals and chip status data. Then, based on the functional safety signals, operating status data, and detection reference data, it determines whether the functional safety signals are erroneous. If the functional safety signals are erroneous, the control layer determines the fault level of the functional safety signals and sends the action execution instruction matching the fault level to the execution layer. The execution layer then executes the fault handling action according to the received action execution instruction, thus resolving the related issues. The detection process of fault decision-making schemes for functional safety signals in current technologies has low accuracy. It cannot accurately detect errors by combining chip operating status and may cause invalid restarts due to factors such as electromagnetic interference and instantaneous voltage fluctuations. This reduces chip frequency and stability, leading to chip lifespan loss and reduced product yield. A more comprehensive and accurate detection method can be developed based on multi-dimensional information composed of functional safety signals, operating status data, and detection reference data. This improves the accuracy of the detection process. When a functional safety signal error is detected, appropriate fault handling actions can be precisely executed based on the fault level of the functional safety signal. This effectively reduces invalid restarts, improves the intelligence of the fault decision-making process, and ensures chip stability and operational continuity.

[0042] Example 2 Figure 2 This is a schematic diagram of a fault decision system for functional safety signals provided in Embodiment 2 of this application. This embodiment can be combined with various optional solutions from one or more of the above embodiments. Figure 2 As shown, the fault decision system 200 for the functional safety signal may specifically include: a data acquisition layer 201, a control layer 202, and an execution layer 203.

[0043] The data acquisition layer 201 includes a multi-source information acquisition unit 2011 and a static strategy storage unit 2012. The multi-source information acquisition unit 2011 is used to acquire functional safety signals and operating status data of the chip under test according to a preset acquisition frequency, and send the periodically acquired functional safety signals and operating status data of the chip under test to the control layer 202; wherein, the operating status data includes at least one of the following: power supply voltage, operating current, chip junction temperature, load rate, software log, or operating scenario. The static strategy storage unit 2012 is used to store the operating configuration data of the chip under test; wherein, the operating configuration data includes at least one of the following: hotspot functions, optimization strategies, or performance and power consumption thresholds.

[0044] The control layer 202 includes an adaptive optimization unit 2021, a fault decision unit 2022, and a storage unit 2023. The adaptive optimization unit 2021 generates a first state embedding vector based on functional safety signals and chip status data; it inputs the first state embedding vector into a perception decision model to obtain detection reference data output by the perception decision model that matches the current operating state of the chip under test. The fault decision unit 2022 generates a second state embedding vector based on functional safety signals, operating status data, and detection reference data; it inputs the second state embedding vector into a signal classification model to obtain the signal type of the functional safety signal output by the signal classification model; if the signal type of the functional safety signal is a true fault signal, then the functional safety signal is determined to be faulty, the second state embedding vector is input into the fault classification model to obtain the fault level of the functional safety signal output by the fault classification model, and an action execution instruction matching the fault level is sent to the execution layer 203; wherein the signal type is one of a true fault signal, a false error signal, or a non-fault signal, and the fault level is one of a minor fault, a moderate fault, or an emergency fault. Storage unit 2023 is used to store historical fault data of the chip under test.

[0045] The execution layer 203 includes a decision response unit 2031. The decision response unit 2031 is used to execute the fault handling action corresponding to the action execution instruction after receiving the action execution instruction, and to record the process data of the fault handling action.

[0046] Optionally, the multi-source information acquisition unit 2011 can be a software module installed in the chip under test (DUT) for acquiring functional safety signals and operational status data of the DUT. The preset acquisition frequency can be a pre-set frequency at which the multi-source information acquisition unit 2011 acquires functional safety signals and operational status data of the DUT. For example, the preset acquisition frequency can be 1 kHz, and the multi-source information acquisition unit 2011 performs the operation of acquiring functional safety signals and operational status data of the DUT once every 1 millisecond.

[0047] Optionally, the multi-source information acquisition unit 2011 includes a software layer and a hardware layer. The software layer can be a software module for acquiring the load rate, software logs, and operating scenarios of the chip under test (DUT). The software layer may include a CPU load statistics unit, a log caching unit, and a scenario recognition unit. The CPU load statistics unit may be a software module for reading the load rate of the DUT from the load rate calculation unit. The log caching unit may be a software module for reading the software logs of the DUT from the software log storage unit. The scenario recognition unit may be a software module for reading the operating scenarios of the DUT from the operating scenario storage unit. The hardware layer can be a software module for acquiring the functional safety signals, supply voltage, operating current, and chip junction temperature of the DUT. The hardware layer may include a functional safety signal acquisition unit, a voltage acquisition unit, a current acquisition unit, and a temperature acquisition unit. The functional safety signal acquisition unit may be a software module for acquiring the functional safety signals of the DUT. The voltage acquisition unit may be a software module for reading the supply voltage of the DUT from the voltage detection unit. The current acquisition unit may be a software module for reading the operating current of the DUT from the current detection unit. The temperature acquisition unit can be a software module used to read the junction temperature of the chip under test from the temperature detection unit.

[0048] Optionally, the multi-source information acquisition unit 2011 acquires functional safety signals and operating status data of the chip under test, including: acquiring functional safety signals of the chip under test through the functional safety signal acquisition unit; reading the supply voltage of the chip under test from the voltage detection unit through the voltage acquisition unit; reading the operating current of the chip under test from the current detection unit through the current acquisition unit; reading the junction temperature of the chip under test from the temperature detection unit through the temperature acquisition unit; reading the load rate of the chip under test from the load rate calculation unit through the CPU load statistics unit; reading the software log of the chip under test from the software log storage unit through the log cache unit; and reading the operating scene of the chip under test from the operating scene storage unit through the scene recognition unit.

[0049] Optionally, after acquiring functional safety signals and operational status data of the chip under test each time, the multi-source information acquisition unit 2011 sends the acquired functional safety signals and operational status data of the chip under test to the input layer of the adaptive optimization unit 2021 and the buffer of the fault decision unit 2022. The input layer of the adaptive optimization unit 2021 can be a software module or a hardware module for storing the data that the adaptive optimization unit 2021 needs to process. The buffer of the fault decision unit 2022 can be a software module or a hardware module for storing the data that the fault decision unit 2022 needs to process. Thus, the chip's operational status data can be synchronously incorporated into the fault identification dimension, replacing the detection method that relies solely on a single functional safety signal.

[0050] Optionally, the static policy storage unit 2012 can be a software module set in the chip under test for storing the operating configuration data of the chip under test.

[0051] Optionally, the adaptive optimization unit 2021 may be a software module set in the chip under test (DUT) for determining detection reference data matching the current operating state of the DUT based on the DUT's functional safety signals and chip status data. The chip status data may be at least one of operating status data or operating configuration data. The detection reference data may be at least one of a fault decision configuration mode, a dynamic safety threshold, or a sensing sampling strategy. The fault decision configuration mode matching the current operating state of the DUT may be text that best suits the current operating state of the DUT and guides the fault decision unit 2022 to use aggressive or conservative decision logic to determine whether the functional safety signal is erroneous and to determine the fault level of the functional safety signal. The dynamic safety threshold matching the current operating state of the DUT may be a preset threshold that best suits the current operating state of the DUT and is used to measure whether the supply voltage and chip junction temperature are abnormal. The sensing sampling strategy matching the current operating state of the DUT may be a preset sampling frequency that best suits the current operating state of the DUT.

[0052] Optionally, the first state embedding vector can be an embedding vector generated after encoding functional safety signals and chip state data to represent the functional safety signals and chip state data. The adaptive optimization unit 2021 includes an encoding layer. This encoding layer can be a software module used to encode functional safety signals and chip state data to generate embedding vectors representing them. The adaptive optimization unit 2021 can use the encoding layer to encode functional safety signals, operating state data, and operating configuration data, mapping the functional safety signals and chip state data to a unified high-dimensional feature space, generating embedding vectors representing the functional safety signals and chip state data, and achieving a deep understanding of the operating context of the chip under test.

[0053] Optionally, the adaptive optimization unit 2021 includes a perception decision model. This model can be a pre-trained machine learning model used to determine detection reference data matching the current operating state of the chip under test (DUT) based on a first state embedding vector. The machine learning model includes, but is not limited to, a neural network model. The input to the perception decision model is the first state embedding vector. The output of the perception decision model is the detection reference data matching the current operating state of the DUT. The perception decision model can analyze and perform calculations on the input first state embedding vector to determine the detection reference data matching the current operating state of the DUT, and then output the detection reference data matching the current operating state of the DUT. Therefore, a hybrid strategy generation mechanism combining offline pre-configuration and configurable neural network optimization is adopted to dynamically output the detection reference data matching the current operating state of the DUT, replacing fixed thresholds and static strategies.

[0054] Optionally, after the multi-source information acquisition unit 2011 sends the acquired functional safety signals and operating status data of the chip under test to the input layer of the adaptive optimization unit 2021, the adaptive optimization unit 2021 can obtain the operating configuration data of the chip under test from the static policy storage unit 2012. Then, through the encoding layer in the adaptive optimization unit 2021, it encodes the functional safety signals and chip status data to generate a first state embedding vector. The adaptive optimization unit 2021 can then input the first state embedding vector into the perception decision model to obtain detection reference data output by the perception decision model that matches the current operating status of the chip under test. The adaptive optimization unit 2021 can then send the detection reference data matching the current operating status of the chip under test to the fault decision unit 2022.

[0055] Optionally, in a specific instance, the perception decision model can be a dual-core lockstep neural network decision model, containing two identical neural network units. The perception decision model uses the two neural network units to analyze and compute the input first state embedding vector, respectively, to determine detection reference data matching the current operating state of the chip under test. Before outputting the detection reference data matching the current operating state of the chip under test, a bit-by-bit comparison or logical consistency check is performed on the detection reference data determined by the two neural network units. If the detection reference data determined by the two neural network units matches the current operating state of the chip under test, both sets of detection reference data matching the current operating state of the chip under test are deemed valid, and any set of detection reference data matching the current operating state of the chip under test is output. If the detection reference data determined by the two neural network units does not match the current operating state of the chip under test, the model parameters in the perception decision model are updated to default safety parameters, and then the two neural network units are used again to analyze and compute the input first state embedding vector to determine the detection reference data matching the current operating state of the chip under test. The default safety parameters can be pre-set model parameters suitable for use when the detection reference data determined by the two neural network units that matches the current operating state of the chip under test is inconsistent. When the detection reference data re-determined by the two neural network units that matches the current operating state of the chip under test is inconsistent, and the number of re-determinations reaches a target number, the perception decision model determines the default detection reference data as the detection reference data that matches the current operating state of the chip under test, and outputs the detection reference data that matches the current operating state of the chip under test. The perception decision model also outputs perception decision alarm information. The target number can be a pre-set number. For example, the target number is 3. The default detection reference data can be pre-set detection reference data used when the perception decision model cannot determine valid detection reference data through the two neural network units. The perception decision alarm information can be pre-set text used to characterize the perception decision model's inability to output valid detection reference data. After the perception decision model outputs the perception decision alarm information, the adaptive optimization unit 2021 can send the perception decision alarm information to the terminal device of the fault handling personnel. The fault handling personnel can be technicians responsible for handling anomalies in the fault decision system 200 that handles functional safety signals. This ensures that the output of the perception decision model is deterministic and secure, further guaranteeing the functional safety of the chip under test.

[0056] Optionally, the fault decision unit 2022 may be a software module configured in the chip under test (DUT) to determine whether a functional safety signal is erroneous based on the functional safety signal, operating status data synchronously acquired with the functional safety signal, and detection reference data matching the current operating status of the DUT. When an error is determined, the module instructs the decision response unit 2031 to execute a fault handling action matching the fault level of the functional safety signal via an action execution instruction matching the fault level of the functional safety signal. The action execution instruction matching the fault level of the functional safety signal may be an instruction to instruct the decision response unit 2031 to execute a fault handling action matching the fault level of the functional safety signal. The fault handling action matching the fault level of the functional safety signal is a fault handling action capable of promptly repairing the fault represented by the functional safety signal.

[0057] Optionally, the second state embedding vector can be an embedding vector generated after encoding the functional safety signal, the operating status data acquired synchronously with the functional safety signal, and the detection reference data that matches the current operating status of the chip under test, and used to characterize the functional safety signal, the operating status data, and the detection reference data.

[0058] Optionally, the fault decision unit 2022 includes a signal classification model. The signal classification model can be a pre-trained machine learning model used to determine the signal type of a functional safety signal based on a second-state embedding vector. The signal type of the functional safety signal can be text representing whether the functional safety signal is a digital signal indicating a fault within the chip under test. The signal type of the functional safety signal can be one of three: a true fault signal, a false error signal, or a non-fault signal. A true fault signal indicates that the functional safety signal is a digital signal indicating a fault within the chip under test. A false error signal indicates that the functional safety signal is a false digital signal indicating a fault within the chip under test caused by external environmental noise. A non-fault signal indicates that the functional safety signal is a digital signal indicating that no fault has occurred within the chip under test. The machine learning model includes, but is not limited to, a neural network model. The input to the signal classification model is the second-state embedding vector. The output of the signal classification model is the signal type of the functional safety signal. The signal classification model can analyze and perform calculations on the input second-state embedding vector to determine the signal type of the functional safety signal, and then output the signal type of the functional safety signal. Generally, when the signal type of the functional safety signal output by the signal classification model is a true fault signal, it can be determined that the functional safety signal is faulty. When the signal type of the functional safety signal output by the signal classification model is a pseudo-error signal or a non-fault signal, it can be determined that the functional safety signal is not faulty.

[0059] Optionally, the fault decision unit 2022 includes a fault classification model. The fault classification model can be a pre-trained machine learning model used to determine the fault level of a functional safety signal based on a second-state embedding vector in the event of a functional safety signal error. Machine learning models include, but are not limited to, neural network models. The input to the fault classification model is the second-state embedding vector. The output of the fault classification model is the fault level of the functional safety signal. The fault classification model can analyze and perform calculations on the input second-state embedding vector to determine the fault level of the functional safety signal, and then output the fault level of the functional safety signal.

[0060] Optionally, after the multi-source information acquisition unit 2011 sends the acquired functional safety signals and operating status data of the chip under test to the buffer of the fault decision unit 2022, and the adaptive optimization unit 2021 sends the detection reference data matching the current operating status of the chip under test to the fault decision unit 2022, the fault decision unit 2022 can encode the functional safety signals, operating status data, and detection reference data to generate a second state embedding vector. The fault decision unit 2022 can perform time alignment and feature space mapping on the functional safety signals, operating status data, and detection reference data to construct a high-dimensional second state embedding vector that adapts to the input of the signal classification model. Then, the fault decision unit 2022 can input the second state embedding vector into the signal classification model to obtain the signal type of the functional safety signal output by the signal classification model.

[0061] Optionally, if the signal type of the functional safety signal is a true fault signal, the fault decision unit 2022 determines that the functional safety signal is faulty, inputs the second state embedding vector into the fault classification model, obtains the fault level of the functional safety signal output by the fault classification model, and sends the action execution instruction matching the fault level to the decision response unit 2031.

[0062] Optionally, if the functional safety signal is a pseudo-error signal or a non-fault signal, the fault decision unit 2022 determines that the functional safety signal is not faulty and ends the current fault decision process. Optionally, the decision response unit 2031 can be a software module set in the chip under test for executing fault handling actions. After receiving an action execution instruction matching a minor fault, the decision response unit 2031 executes the fault handling action matching the minor fault and records the process data of the fault handling action. After receiving an action execution instruction matching a moderate fault, the decision response unit 2031 executes the fault handling action matching the moderate fault and records the process data of the fault handling action. After receiving an action execution instruction matching an emergency fault, the decision response unit 2031 executes the fault handling action matching the emergency fault and records the process data of the fault handling action.

[0063] Optionally, performing fault handling actions matching the lightweight fault may include: outputting a task retry signal, outputting a data acquisition cycle adjustment signal, and adjusting the power consumption of the multi-source information acquisition unit 2011. The task retry signal may be a signal used to trigger function retrying of the chip under test. The number of retries is a preset number. The retry interval is a preset duration. For example, the preset number of retries is 3. The preset duration is 100 milliseconds. The data acquisition cycle adjustment signal may be a signal used to instruct the adaptive optimization unit 2021 to update the acquisition frequency of the functional safety signals and operating status data of the chip under test according to the sensing sampling strategy. Adjusting the power consumption of the multi-source information acquisition unit 2011 may refer to reading the signal type involved in the fault represented by the functional safety signal, and writing a masking instruction to the multi-source information acquisition unit 2011 for non-critical acquisition channels unrelated to the current fault diagnosis, directly reducing the dynamic power consumption of the data acquisition section.

[0064] Optionally, performing fault handling actions matching a moderate fault may include: outputting a functional module restart signal and outputting a redundancy unit switching signal. The functional module restart signal may be a soft reset control signal used to trigger the restart of the target functional module of the chip under test. The target functional module may be a specific subsystem within the chip under test or an independent hardware Internet Protocol (IP) module. The redundancy unit switching signal may be a signal used to enable the backup computing module of the chip under test. The backup computing module may refer to redundant hardware computing resources pre-configured in the hardware architecture of the chip under test that are in standby, hibernation, or only performing verification tasks in normal operating mode.

[0065] Optionally, performing fault handling actions matching the emergency fault may include: outputting a system restart signal. The system restart signal may be a signal used to trigger the chip under test to restart.

[0066] This allows for precise triggering of differentiated actions such as task retries, module restarts, and global restarts. Combined with the fault scope, it enables precise reset of a single module or the entire chip, effectively reducing unnecessary downtime, accelerating the response to faults within the chip, and reducing yield losses caused by chip anomalies, thus ensuring the continuity of chip operation.

[0067] Optionally, the process data for the fault handling action may include the fault type, response action, and execution time. The fault type can be a fault level that matches the action execution instruction that triggered the fault handling action. The response action can be information describing the action performed by the chip under test after the fault handling action is executed. The execution time can be the time taken to execute the fault handling action.

[0068] Optionally, the storage unit 2023 can be a software or hardware module for storing historical fault data of the chip under test. The historical fault data of the chip under test can refer to the data recorded during operation by the multi-source information acquisition unit 2011, static strategy storage unit 2012, adaptive optimization unit 2021, fault decision unit 2022, and decision response unit 2031. The data can include various types of data acquired or determined during operation. The multi-source information acquisition unit 2011, static strategy storage unit 2012, adaptive optimization unit 2021, fault decision unit 2022, and decision response unit 2031 will store the data recorded during operation in the storage unit 2023 for easy backtracking. The storage unit 2023 can include a data buffer and off-chip storage. The data buffer can be a software or hardware module within the chip under test used to cache historical fault data. The off-chip storage can be a software or hardware module located outside the chip under test used to cache historical fault data.

[0069] Optionally, the adaptive optimization unit 2021 is also used to update the acquisition frequency of the functional safety signals and operating status data of the chip under test according to the sensing sampling strategy. The sensing sampling strategy is a preset acquisition frequency that best suits the current operating status of the chip under test. The adaptive optimization unit 2021 can control the multi-source information acquisition unit 2011 to update the acquisition frequency of the functional safety signals and operating status data to the sensing sampling strategy, and acquire the functional safety signals and operating status data of the chip under test according to the sensing sampling strategy. For example, the acquisition frequency of the functional safety signals and operating status data is updated from 1kHz to 2kHz.

[0070] Optionally, the adaptive optimization unit 2021 is also used to update the model parameters of the perception decision model based on the historical fault data of the chip under test. The adaptive optimization unit 2021 can periodically calculate the parameter values ​​of the model parameters that best fit the perception decision model based on the historical fault data of the chip under test stored in the storage unit 2023, and update the parameter values ​​of the model parameters of the perception decision model from the current values ​​to the parameter values ​​of the model parameters that best fit the perception decision model.

[0071] Optionally, the adaptive optimization unit 2021 can construct a complete decision trajectory sample based on the historical fault data of the chip under test stored in the storage unit 2023. The decision trajectory sample includes the multimodal context at the time of the fault, the fault handling actions taken at that time, and the system recovery effect after the actions. The adaptive optimization unit 2021 can use the system recovery effect as a reward signal or supervision label to evaluate the quality of the historical decisions of the perception decision model. The adaptive optimization unit 2021 can utilize online fine-tuning or online learning algorithms to calculate the gradient update amount of the model parameters of the perception decision model, so that when the perception decision model encounters similar multimodal contexts in the future, it tends to generate more suitable fault judgment configuration patterns, dynamic safety thresholds, and perception sampling strategies. The adaptive optimization unit 2021 can synchronously write the updated model weights into the perception decision model, enabling the perception decision model to make better decisions when dealing with similar future operating conditions.

[0072] Optionally, the multi-source information acquisition unit 2011, static strategy storage unit 2012, adaptive optimization unit 2021, fault decision unit 2022, storage unit 2023, and decision response unit 2031 communicate through standardized interfaces to ensure modular scalability.

[0073] Optionally, the multi-source information acquisition unit 2011, static strategy storage unit 2012, adaptive optimization unit 2021, fault decision unit 2022, storage unit 2023, and decision response unit 2031 achieve closed-loop interaction through data flow or control flow. The data flow from the chip under test (DUT) to the multi-source information acquisition unit 2011 transmits the DUT's functional safety signals and operating status data. The data flow from the multi-source information acquisition unit 2011 to the adaptive optimization unit 2021 transmits the DUT's functional safety signals and operating status data. The data flow from the static strategy storage unit 2012 to the adaptive optimization unit 2021 transmits the DUT's operating configuration data. The data flow from the multi-source information acquisition unit 2011 to the fault decision unit 2022 transmits the DUT's functional safety signals and operating status data. The data flow from the multi-source information acquisition unit 2011, static strategy storage unit 2012, adaptive optimization unit 2021, fault decision unit 2022, and decision response unit 2031 to the storage unit 2023 transmits data recorded by these units during operation. The data flow from the storage unit 2023 to the adaptive optimization unit 2021 transmits historical fault data of the chip under test. The control flow from the adaptive optimization unit 2021 to the fault decision unit 2022 transmits a fault judgment configuration mode, dynamic safety threshold, and perception sampling strategy matched to the current operating state of the chip under test. The control flow from the fault decision unit 2022 to the decision response unit 2031 transmits action execution instructions matched to the fault level of the functional safety signal. The control flow from the decision response unit 2031 to the chip under test transmits control signals such as task retry signals, functional module restart signals, and system restart signals. The control flow from the adaptive optimization unit 2021 to the multi-source information acquisition unit 2011 transmits control signals such as control instructions for updating the acquisition frequency, task retry signals, function module restart signals, and system restart signals.

[0074] The technical solution of this application can synchronously incorporate chip operating status data into the fault identification dimension, replacing the detection method that relies solely on a single functional safety signal. The technical solution of this application employs a hybrid strategy generation mechanism combining offline pre-configuration and configurable neural network optimization to dynamically output detection reference data matching the current operating status of the chip under test, replacing fixed thresholds and static strategies. The technical solution of this application designs multi-level fault decision and response logic, precisely triggering differentiated actions such as task retries, module restarts, and global restarts based on functional safety signals, voltage risks, and load levels, achieving precise reset of a single module or the entire chip by combining the fault range. The technical solution of this application can effectively reduce unnecessary downtime, accelerate the response to faults occurring inside the chip, and reduce yield losses caused by chip anomalies, ensuring the continuity of chip operation.

[0075] Example 3 Figure 3 This is a schematic diagram of the structure of a chip provided in Embodiment 3 of this application. Figure 3 As shown, chip 300 includes a fault decision system 301 for functional safety signals. The fault decision system 301 for functional safety signals is disposed in chip 300.

[0076] The fault decision system 301 for functional safety signals includes a data acquisition layer 31, a control layer 32, and an execution layer 33.

[0077] The data acquisition layer 31 is used to send the functional safety signals and operating status data of the chip 300 acquired at regular intervals to the control layer 32, and to provide the control layer 32 with the operating configuration data of the chip 300.

[0078] The control layer 32 is used to, after receiving the functional safety signal and operating status data, determine the detection reference data that matches the current operating status of the chip 300 based on the functional safety signal and chip status data; wherein, the chip status data is at least one of operating status data or operating configuration data, and the detection reference data is at least one of fault judgment configuration mode, dynamic safety threshold or perception sampling strategy; based on the functional safety signal, operating status data and detection reference data, determine whether the functional safety signal is erroneous; if the functional safety signal is erroneous, determine the fault level of the functional safety signal, and send the action execution instruction matching the fault level to the execution layer 33.

[0079] Execution layer 33 is used to perform fault handling actions based on the received action execution instructions.

[0080] In the technical solution of this application embodiment, the data acquisition layer sends the periodically acquired functional safety signals and operating status data of the chip to the control layer, and provides the control layer with the chip's operating configuration data; after receiving the functional safety signals and operating status data, the control layer determines the detection reference data matching the chip's current operating status based on the functional safety signals and chip status data, and then determines whether the functional safety signals are erroneous based on the functional safety signals, operating status data, and detection reference data; if the functional safety signals are erroneous, the control layer determines the fault level of the functional safety signals, sends the action execution instruction matching the fault level to the execution layer, and controls the execution layer to execute the fault handling action according to the received action execution instruction, thus solving the problems in related technologies. The accuracy of fault decision-making schemes for functional safety signals is low. They cannot accurately detect errors by combining chip operating status and may cause invalid restarts due to factors such as electromagnetic interference and instantaneous voltage fluctuations. This reduces chip frequency and stability, leading to chip lifespan loss and reduced product yield. A more comprehensive and accurate solution can detect functional safety signals based on multi-dimensional information composed of functional safety signals, operating status data, and detection reference data. This improves the accuracy of the detection process. When a functional safety signal error is detected, appropriate fault handling actions can be precisely executed based on the fault level of the functional safety signal. This effectively reduces invalid restarts, provides intelligence to the fault decision-making process, and ensures chip stability and operational continuity.

[0081] It should be understood that the various forms of processes shown above can be used to rearrange, add, or delete steps. For example, the steps described in this application can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this application can be achieved, and this is not limited herein.

[0082] The specific embodiments described above do not constitute a limitation on the scope of protection of this application. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A fault decision system for functional safety signals, characterized in that, include: Data acquisition layer, control layer, and execution layer; The data acquisition layer is used to send the functional safety signals and operating status data of the chip under test collected at regular intervals to the control layer, and to provide the control layer with the operating configuration data of the chip under test. The control layer is configured to, upon receiving a functional safety signal and operational status data, determine detection reference data matching the current operational status of the chip under test based on the functional safety signal and chip status data; wherein the chip status data is at least one of the operational status data or the operational configuration data, and the detection reference data is at least one of a fault decision configuration mode, a dynamic safety threshold, or a sensing sampling strategy; and determine whether the functional safety signal is erroneous based on the functional safety signal, the operational status data, and the detection reference data; if the functional safety signal is erroneous, determine the fault level of the functional safety signal and send an action execution instruction matching the fault level to the execution layer; The execution layer is used to perform fault handling actions according to the received action execution instructions.

2. The fault decision system for functional safety signals according to claim 1, characterized in that, The data acquisition layer includes a multi-source information acquisition unit; The multi-source information acquisition unit is used to acquire the functional safety signals and operating status data of the chip under test according to a preset acquisition frequency, and send the periodically acquired functional safety signals and operating status data of the chip under test to the control layer. The operating status data includes at least one of the following: power supply voltage, operating current, chip junction temperature, load rate, software logs, or operating scenario.

3. The fault decision system for functional safety signals according to claim 1, characterized in that, The data acquisition layer includes a static policy storage unit; The static strategy storage unit is used to store the operating configuration data of the chip under test; The runtime configuration data includes at least one of the following: hotspot functions, optimization strategies, or performance and power consumption thresholds.

4. The fault decision system for functional safety signals according to claim 1, characterized in that, The control layer includes an adaptive optimization unit; The adaptive optimization unit is used to generate a first state embedding vector based on the functional safety signal and chip state data; and input the first state embedding vector into the perception decision model to obtain detection reference data output by the perception decision model that matches the current operating state of the chip under test.

5. The fault decision system for functional safety signals according to claim 1, characterized in that, The control layer includes a fault decision unit; The fault decision unit is configured to generate a second state embedding vector based on the functional safety signal, the operating status data, and the detection reference data; and input the second state embedding vector into the signal classification model to obtain the signal type of the functional safety signal output by the signal classification model. If the signal type of the functional safety signal is a true fault signal, then the functional safety signal is determined to be faulty. The second state embedding vector is input into the fault classification model to obtain the fault level of the functional safety signal output by the fault classification model. The action execution instruction matching the fault level is sent to the execution layer. The signal type is one of a true fault signal, a false error signal, or a non-fault signal, and the fault level is one of a minor fault, a moderate fault, or an emergency fault.

6. The fault decision system for functional safety signals according to claim 1, characterized in that, The execution layer includes a decision response unit; The decision response unit is used to execute a fault handling action corresponding to the action execution instruction after receiving the action execution instruction, and to record the process data of the fault handling action.

7. The fault decision system for functional safety signals according to claim 1, characterized in that, The control layer includes a storage unit; The storage unit is used to store historical fault data of the chip under test.

8. The fault decision system for functional safety signals according to claim 4, characterized in that, The adaptive optimization unit is also used to update the acquisition frequency of the functional safety signals and operating status data of the chip under test according to the sensing sampling strategy.

9. The fault decision system for functional safety signals according to claim 4, characterized in that, The adaptive optimization unit is also used to update the model parameters of the perception decision model based on the historical fault data of the chip under test.

10. A chip, characterized in that, Fault decision system including functional safety signals as described in any one of claims 1-9.

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